RE: add and compare combination
Well, I run combine pass in debug mode and found my mistakes. I'd like to share what I have found :) There were 2 mistake. First my HARD_REGNO_MODE_OK returned 0 for regno=CCI_REG and mode=CCmode which lead to an early failure in combine.c. So I added this to my macro : if (GET_MODE_CLASS (mode) == MODE_CC) return (regno == CCI_REG) Secondly, I figured out that combination was different for the 2 following code : c = a + b; if (c) {...} /* use c further in code */ and if (a + b) {...} /* the addition result is a DEAD_REG */ In the first case the combiner create and try to match a parallel rtx similar to my "add_and_compare". This case was in fact working. In the second case the combiner see the DEAD_REG and try to match a single set rtx of this form : (define_insn "comparesi_plus" [(set (reg:CC CCI_REG) (compare:CC (match_operand:SI 0 "register_operand" "r") (neg:SI (match_operand:SI 1 "register_operand" "r"] ;; the 'trick' is in the neg !! "" "cmp_plus %1,%0" ) As I had no such insn the combination was failing, when I added one (with a clobbered result because I have no cmp_plus instruction), everything run ok. I watched in arm backend and I found a similar insn... So the solution was in front of me but I did not see it :) Selim -Message d'origine- De : gcc-ow...@gcc.gnu.org [mailto:gcc-ow...@gcc.gnu.org] De la part de BELBACHIR Selim Envoyé : jeudi 15 décembre 2011 16:12 À : gcc@gcc.gnu.org Objet : add and compare combination Hi, I'd like to know if there a way to express 'add' and 'compare' insn so that the combiner transform it in and 'add_and_compare' insn. I watch arm backend and it seems possible when I look at 'addsi3', 'cbranchsi4' and '*addsi3_compare0'. In my backend I have written the following insn/expand : (define_expand "addsi3" [(set (match_operand:SI 0 "register_operand" "") (plus:SI (match_operand:SI 1 "general_operand" "") (match_operand:SI 2 "off1post_general_op" "")))] "" "" ) (define_insn "add_and_compare" [(set (reg:CC CCI_REG) (compare:CC (plus:SI (match_operand:SI 1 "register_operand" "%r") (match_operand:SI 2 "register_operand" "r")) (const_int 0))) (set (match_operand:SI 0 "register_operand" "=r") (plus:SI (match_dup 1) (match_dup 2)))] "" "add %1,%2,%0" ) (define_insn "add" [(set (match_operand:SI 0 "register_operand" "=r") (plus:SI (match_operand:SI 1 "register_operand" "%r") (match_operand:SI 2 "register_operand" "r")))] "" "addk %1,%2,%0" ) (define_expand "cbranchsi4" [(set (pc) (if_then_else (match_operator 0 "comparison_operator" [(match_operand:SI 1 "register_operand" "") (match_operand:SI 2 "register_operand" "")]) (label_ref (match_operand 3 "" "")) (pc)))] { emit_insn(gen_comparesi (operands[1], operands[2])); operands[1] = gen_rtx_REG (CCmode, CCI_REG); operands[2] = const0_rtx; } ) (define_insn "comparesi" [(set (reg:CC CCI_REG) (compare:CC (match_operand:SI 0 "register_operand" "r") (match_operand:SI 1 "register_operand" "r")))] "" "cmp %1,%0" ) (define_insn "jmpifsi" [(set (pc) (if_then_else (match_operator 0 "comparison_operator" [(reg:CC CCI_REG) (const_int 0)]) (label_ref (match_operand 1 "" "")) (pc)))] "" "jmp.if %c0 %1" ) When I compile : c = a + b; if (c) {...} No combination occurs between "add" and "comparesi" insn. I was expecting to see my "add_and_compare" pattern. The resulting assembler is addk cmp jmp.if instead of add jmp.if Do someone see why combination fails ? (gcc 4.5.2) Thanks, Selim
Re: RFC - GCC Architectural Goals
On Mon, 12 Dec 2011, Quentin Neill wrote: > The OS dependencies needed to build are another thing - it seems it > could be better automated (we keep a list of packages per distro to > install when setting up a system to build GCC). What we discussed for that in London was documenting the distribution-specific commands to install all the packages that may be used when building GCC, which would cover things for a large proportion of people building GCC on a GNU/Linux distribution. -- Joseph S. Myers jos...@codesourcery.com
Re: [4.7,trans-mem] Summary of unsolved known bugs
On Thu, 15 Dec 2011, Patrick Marlier wrote: > Hi Guys! > > Transactional Memory will be released in 4.7 so even if it is experimental, I > hope it will come with only few bugs in it. Users could be enthusiastic to > test it so it could be great to offer them a great experience. > > Here a list of known bugs for trans-mem. I have tried to sort it by priority > (highest first). In addition to those you list, http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51072 (inappropriate attempts to build libitm when C++ is not enabled, or with a previously installed compiler other than in the Canadian cross case) is still open. -- Joseph S. Myers jos...@codesourcery.com
Re: [4.7,trans-mem] Summary of unsolved known bugs
Patrick Marlier writes: > I hope this message could help. Do not hesitate to complete the list (I can > try to have a look at it) or close bugs (I cannot do it). There's also PR middle-end/51252 FAIL: c-c++-common/tm/freq.c (internal compiler error) which affects all targets without named sections. Another issue is described (with proposed patch) in [libitm, build] Clear hardware capabilities on libitm.so with Sun ld http://gcc.gnu.org/ml/gcc-patches/2011-11/msg02093.html Since my original idea how to address Richard's comments failed (libtool gets in the way, as always), I'll go the other route he mentioned. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
RE: GCC Account
Hello Everyone, I filled out this form that Jeff Law mentioned ~4-5 days ago, can someone please tell me how long it would take for the form to get processed and get me write approval? I used my personal email when I submitted the form (bvi...@gmail.com), will that be a problem? Thanking You, Yours Sincerely, Balaji V. Iyer. -Original Message- From: Jeff Law [mailto:l...@redhat.com] Sent: Friday, December 09, 2011 11:08 AM To: gcc@gcc.gnu.org Subject: Re: GCC Account -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 12/09/11 08:32, Iyer, Balaji V wrote: > Hello Everyone, I am Balaji V. Iyer, and I have been maintaining the > Cilkplus branch of the GCC compiler. I have been working on the > Cilkplus branch for approximately 6 months and I have been working > different GCC projects for the past 5 years. I do not have write > access for the Cilkplus branch and thus I have to have someone else > check in my patches into the branch. Is it possible for me to get an > account so that I can check in my patches myself? You'll need to fill out this form to get write access: http://sourceware.org/cgi-bin/pdw/ps_form.cgi Jeff -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJO4jJsAAoJEBRtltQi2kC7lDYH/2+qgAq6Rlc6yBqiWTPsT9ZA 23GkKTIhGlw1QPFPw6osk2lFIO08DsY7C9kCEG2xnUCStJfnatLYwK1/yUitf6Mz jAYRnrmnGhCxSBWqNf9LBqwLPrCTENfkZqEz8igZL/SD1XnNyKwj2ACVXCIa6Rud 6Syr835HC60lxTMazzySFX4q5gtuL7IVaWSEdNZNtPMkdv3ARmzOmtaJUVNHmDRk jpjDAMGvf2uH7J6+8nMMnmtwzpR7qAkxNeCHvk4RyT0jFnXx/0YuX5Uvf2Ghni7h Rw7Zu/5QXOWwXSlNWauitlqc8a0+jiqSM7N90+438cPfOhggucTOQG8vaCJon08= =xheJ -END PGP SIGNATURE-
gcc-4.6-20111216 is now available
Snapshot gcc-4.6-20111216 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/4.6-20111216/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 4.6 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch revision 182412 You'll find: gcc-4.6-20111216.tar.bz2 Complete GCC MD5=fc0560afdd119ce86adf9d2f902031aa SHA1=e14a376fcb6472d3be02e8b74b6d03eb3f322fd6 Diffs from 4.6-20111209 are available in the diffs/ subdirectory. When a particular snapshot is ready for public consumption the LATEST-4.6 link is updated and a message is sent to the gcc list. Please do not use a snapshot before it has been announced that way.