Re: HARD_REGNO_MODE_OK_FOR_CLASS Might Be Nice (tm)

2006-01-07 Thread Bernd Jendrissek
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On Tue, Jan 03, 2006 at 05:25:55PM +, Joern RENNECKE wrote:
> In http://gcc.gnu.org/ml/gcc/2005-12/msg00642.html, Bernd Jendrissek
> wrote:
> > Which leads me to the subject.  Would it be a win to have a macro
> > HARD_REGNO_MODE_OK_FOR_CLASS (REGNO, MODE, CLASS) which would be the
> > authoritative test for this loop in find_reg()?  On my port, and I
> > imagine on many others too, I think a default
> >
> > #ifndef HARD_REGNO_MODE_OK_FOR_CLASS
> > #define HARD_REGNO_MODE_OK_FOR_CLASS(REGNO, MODE, CLASS) \
> >   HARD_REGNO_MODE_OK ((REGNO), (MODE))
> > #endif
> >
> > would be okay.
> 
> It's not that simple.  For example, consider multi-word integer arithmetic.
> If you want to allocate a 32 bit integer register on your 16 bit x86,
> all the integer registers are suitable as parts of the allocation.
> However, if you start with the last integer register, the second part
> will end up in a hard register which is not an integer register.
> So to make this work, you's have to say that the last integer register is
> not suitable for SImode, SFmode or CHImode, the last three ones are not
> suitable for DImode, DFmode, CSImode or SCmode etc.

That's true, but it's also true of HARD_REGNO_MODE_OK already, isn't it?

Maybe it's just a misunderstanding on my part but my definition for
HARD_REGNO_MODE_OK already excludes the last (2^N)-1 registers from
allocation to a integer of size N units.

But... for other ports, it would be a problem.  It *also* couldn't be

#ifndef HARD_REGNO_MODE_OK_FOR_CLASS
#define HARD_REGNO_MODE_OK_FOR_CLASS(REGNO, MODE, CLASS) \
  (HARD_REGNO_MODE_OK ((REGNO), (MODE))
   && HARD_REGNO_MODE_OK ((REGNO) + GET_MODE_SIZE ((MODE)) - 1, (MODE)))
#endif

since it would ignore boundaries between disjoint register classes which
it may be illegal to cross.

Hmm, how about this?

#ifndef HARD_REGNO_MODE_OK_FOR_CLASS
#define HARD_REGNO_MODE_OK_FOR_CLASS(REGNO, MODE, CLASS) \
  (HARD_REGNO_MODE_OK ((REGNO), (MODE))
   && REG_IN_CLASS_P ((REGNO), (CLASS))
   && HARD_REGNO_MODE_OK ((REGNO) + GET_MODE_SIZE ((MODE)) - 1, (MODE))
   && REG_IN_CLASS_P ((REGNO) + GET_MODE_SIZE ((MODE)) - 1, (CLASS)))
#endif

(Leaving REG_IN_CLASS_P as an exercise to the reader.)  This does assume
though that register classes consist of exactly one contiguous series of
registers.

Bleh, I think I'll just bite the bullet and use up all my remaining
constraint characters for now.

Thanks for the replies.

- -- 
"If you lie to the compiler, it will get its revenge." - Henry Spencer
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gcc-4.2-20060107 is now available

2006-01-07 Thread gccadmin
Snapshot gcc-4.2-20060107 is now available on
  ftp://gcc.gnu.org/pub/gcc/snapshots/4.2-20060107/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.

This snapshot has been generated from the GCC 4.2 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/trunk revision 109451

You'll find:

gcc-4.2-20060107.tar.bz2  Complete GCC (includes all of below)

gcc-core-4.2-20060107.tar.bz2 C front end and core compiler

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Diffs from 4.2-20051231 are available in the diffs/ subdirectory.

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Atomic operations on Sparc in libstdc++

2006-01-07 Thread Piotr Wyderski
Hello,

why there is no cas-based version of __exchange_and_add for 32-bit
mode Sparcs in libstdc++, namely in config/cpu/sparc/atomicity.h ?
There is spinlock-based generic code for all Sparcs, but V9 does support
32-bit cas, which can be used instead of a spinlock. This spinlock

_Atomicity_lock<__inst>::_S_atomicity_lock

causes serious scalability problems with std::string. On a machine with
4 processors our 32-bit code is only about 2.3 times faster that on a
uniprocessor. When I hack atomicity.h, providing my own cas-based
__exchange_and_add, it works nearly 4 times faster compared to a UP.

Is it possible to replace __exchange_and_add with my code without
patching libstdc++? Unfortunately it is impossible to provide a generic
patch for atomicity.h, because GCC does not define __sparcv9 in
32-bit mode, as described in this thread:

http://gcc.gnu.org/ml/gcc/2005-11/msg00842.html

Best regards
Piotr Wyderski
 



successful bootstrap

2006-01-07 Thread John Sonnenschein
Hey, just a note to let you guys know i bootstrapped gcc 3.4.5 on my
SPARC64/OpenSolaris ( ultrasparc II / opensolaris nv28) box (after
fighting with it, but that's my fault). I haven't tried to compile g77
or ada or any such thing, since i only need c and c++. Only one
processor in the box, no idea how this'd work with SMP.

evidently GNU make is a must. GNU binutils, similarly. The compiler i
used to build GCC (and everything previous) was SunStudio10 (which is
register-for-free-smokes free). also, the requirement that one passes
CC="cc -xildoff -xarch=v9" is still in effect with studio10/solaris11

here's the shell output you guys want:

[SPARCy] error404 :: objdir $ ./config.guess
sparc-sun-solaris2.11

[SPARCy] error404 :: objdir $ gcc -v
Reading specs from /opt/GNU/lib/gcc/sparc- sun-solaris2.11/3.4.5/specs
Configured with: ../configure --with-gnu-as --with-as=/opt/GNU/bin/as
--with-gnu-ld --with-ld=/opt/GNU/bin/ld --prefix=/opt/GNU
--enable-languages=c,c++ --disable-nls --enable-shared
Thread model: posix
gcc version 3.4.5


Cheers!
-john
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Re: successful bootstrap

2006-01-07 Thread Eric Botcazou
> evidently GNU make is a must.

That's documented.

> GNU binutils, similarly.

That would be a bug, the Sun tools are supported.

> The compiler i  
> used to build GCC (and everything previous) was SunStudio10 (which is
> register-for-free-smokes free). also, the requirement that one passes
> CC="cc -xildoff -xarch=v9" is still in effect with studio10/solaris11

Actually -xildoff is unnecessary.

-- 
Eric Botcazou