[PATCH 3/5] elflint: Fix invalid type of relocation info and other issues on mips

2023-04-11 Thread Ying Huang
From: Ying Huang 

add some check related functions
---
 backends/mips_init.c  |  3 +++
 backends/mips_symbol.c| 33 +
 libebl/eblrelocvaliduse.c |  8 ++--
 src/elflint.c | 23 ---
 4 files changed, 62 insertions(+), 5 deletions(-)

diff --git a/backends/mips_init.c b/backends/mips_init.c
index 5bba822b..4c2f21b9 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -51,6 +51,9 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, segment_type_name);
   HOOK (eh, dynamic_tag_check);
   HOOK (eh, dynamic_tag_name);
+  HOOK (eh, machine_section_flag_check);
   HOOK (eh, check_object_attribute);
+  HOOK (eh, check_special_symbol);
+  HOOK (eh, check_reloc_target_type);
   return eh;
 }
diff --git a/backends/mips_symbol.c b/backends/mips_symbol.c
index e760d58d..8787fcee 100644
--- a/backends/mips_symbol.c
+++ b/backends/mips_symbol.c
@@ -158,6 +158,39 @@ mips_section_type_name (int type,
   return NULL;
 }
 
+bool
+mips_check_reloc_target_type (Ebl *ebl __attribute__ ((unused)), Elf64_Word 
sh_type)
+{
+  return (sh_type == SHT_MIPS_DWARF);
+}
+
+/* Check whether given symbol's st_value and st_size are OK despite failing
+   normal checks.  */
+bool
+mips_check_special_symbol (Elf *elf,
+   const GElf_Sym *sym __attribute__ ((unused)),
+   const char *name __attribute__ ((unused)),
+   const GElf_Shdr *destshdr)
+{
+  size_t shstrndx;
+  if (elf_getshdrstrndx (elf, &shstrndx) != 0)
+return false;
+  const char *sname = elf_strptr (elf, shstrndx, destshdr->sh_name);
+  if (sname == NULL)
+return false;
+  return (strcmp (sname, ".got") == 0 || strcmp (sname, ".bss") == 0);
+}
+
+/* Check whether SHF_MASKPROC flags are valid.  */
+bool
+mips_machine_section_flag_check (GElf_Xword sh_flags)
+{
+  return ((sh_flags &~ (SHF_MIPS_GPREL |
+   SHF_MIPS_MERGE |
+   SHF_MIPS_ADDR |
+   SHF_MIPS_STRINGS)) == 0);
+}
+
 /* Check whether machine flags are valid.  */
 bool
 mips_machine_flag_check (GElf_Word flags)
diff --git a/libebl/eblrelocvaliduse.c b/libebl/eblrelocvaliduse.c
index f0bed345..44b8d300 100644
--- a/libebl/eblrelocvaliduse.c
+++ b/libebl/eblrelocvaliduse.c
@@ -32,10 +32,14 @@
 #endif
 
 #include 
-
+#include 
 
 bool
 ebl_reloc_valid_use (Ebl *ebl, int reloc)
 {
-  return ebl != NULL ? ebl->reloc_valid_use (ebl->elf, reloc) : false;
+  int relocNew = reloc;
+  GElf_Ehdr ehdr;
+  if(ebl->elf->class == ELFCLASS64 && gelf_getehdr(ebl->elf, &ehdr) != NULL && 
ehdr.e_machine == EM_MIPS)
+relocNew = ELF64_MIPS_R_TYPE(reloc);
+  return ebl != NULL ? ebl->reloc_valid_use (ebl->elf, relocNew) : false;
 }
diff --git a/src/elflint.c b/src/elflint.c
index dd42dcb4..04f1ee92 100644
--- a/src/elflint.c
+++ b/src/elflint.c
@@ -935,7 +935,10 @@ section [%2d] '%s': symbol %zu (%s): non-local symbol 
outside range described in
}
 
   if (GELF_ST_TYPE (sym->st_info) == STT_SECTION
- && GELF_ST_BIND (sym->st_info) != STB_LOCAL)
+ && GELF_ST_BIND (sym->st_info) != STB_LOCAL
+ && ehdr->e_machine != EM_MIPS
+ && strcmp (name, "_DYNAMIC_LINK") != 0
+ && strcmp (name, "_DYNAMIC_LINKING") != 0)
ERROR (_("\
 section [%2d] '%s': symbol %zu (%s): non-local section symbol\n"),
   idx, section_name (ebl, idx), cnt, name);
@@ -3789,6 +3792,12 @@ cannot get section header for section [%2zu] '%s': 
%s\n"),
&& ebl_bss_plt_p (ebl))
  good_type = SHT_NOBITS;
 
+   if (ehdr->e_machine == EM_MIPS
+   && (strstr(special_sections[s].name, ".debug") != NULL))
+ {
+   good_type = SHT_MIPS_DWARF;
+ }
+
/* In a debuginfo file, any normal section can be SHT_NOBITS.
   This is only invalid for DWARF sections and .shstrtab.  */
if (shdr->sh_type != good_type
@@ -3953,8 +3962,16 @@ section [%2zu] '%s': size not multiple of entry size\n"),
  sh_flags &= ~(GElf_Xword) SHF_MASKPROC;
}
  if (sh_flags & SHF_MASKOS)
-   if (gnuld)
- sh_flags &= ~(GElf_Xword) SHF_GNU_RETAIN;
+   {
+ if (gnuld)
+   sh_flags &= ~(GElf_Xword) SHF_GNU_RETAIN;
+ if (ehdr->e_machine == EM_MIPS)
+   {
+ if(sh_flags == SHF_MIPS_NOSTRIP || sh_flags == SHF_MIPS_LOCAL
+  || sh_flags == SHF_MIPS_NAMES || sh_flags == SHF_MIPS_NODUPE)
+   sh_flags &= ~shdr->sh_flags;
+   }
+   }
  if (sh_flags != 0)
ERROR (_("section [%2zu] '%s' contains unknown flag(s)"
" %#" PRIx64 "\n"),
-- 
2.30.2


[PATCH 0/5] Add support for MIPS

2023-04-11 Thread Ying Huang
This is a series of modifications about MIPS.
Support src/readelf, strip, unstrip, elflint, objdump related tools.
Pass all previous test cases that failed due to MIPS non-support.


[PATCH 1/5] strip: Adapt src/strip -o -f on mips

2023-04-11 Thread Ying Huang
From: Ying Huang 

In mips64 little-endian, r_info consists of four byte fields(contains
three reloc types) and a 32-bit symbol index. In order to adapt
GELF_R_SYM and GELF_R_TYPE, need convert raw data to get correct symbol
index and type.

  libelf/elf_getdata.c: Some eu-utils use read-mmap method to map file,
so we need to malloc and memcpy raw data to avoid segment fault. After
modification, the correct value are saved in the malloced memory not in
process address space.
  libelf/elf_updata.c: Because we converted the relocation info in mips
order when we call elf_getdata.c, so we need to convert the modified data
in original order bits before writing the data to the file.
---
 backends/Makefile.am|  6 ++-
 backends/mips_init.c| 49 +
 backends/mips_reloc.def | 93 +++
 backends/mips_symbol.c  | 62 ++
 libebl/eblopenbackend.c |  2 +
 libelf/elf.h| 65 +++-
 libelf/elf_getdata.c| 96 +++--
 libelf/elf_update.c | 53 +++
 8 files changed, 419 insertions(+), 7 deletions(-)
 create mode 100644 backends/mips_init.c
 create mode 100644 backends/mips_reloc.def
 create mode 100644 backends/mips_symbol.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index f373e5fb..bda1b604 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -37,7 +37,7 @@ AM_CPPFLAGS += -I$(top_srcdir)/libebl -I$(top_srcdir)/libasm \
 noinst_LIBRARIES = libebl_backends.a libebl_backends_pic.a
 
 modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \
- m68k bpf riscv csky loongarch arc
+ m68k bpf riscv csky loongarch arc mips
 
 i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \
i386_retval.c i386_regs.c i386_auxv.c \
@@ -100,12 +100,14 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c
 
 arc_SRCS = arc_init.c arc_symbol.c
 
+mips_SRCS = mips_init.c mips_symbol.c
+
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
$(aarch64_SRCS) $(sparc_SRCS) $(ppc_SRCS) \
$(ppc64_SRCS) $(s390_SRCS) \
$(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) $(csky_SRCS) 
\
-   $(loongarch_SRCS) $(arc_SRCS)
+   $(loongarch_SRCS) $(arc_SRCS) $(mips_SRCS)
 
 libebl_backends_pic_a_SOURCES =
 am_libebl_backends_pic_a_OBJECTS = $(libebl_backends_a_SOURCES:.c=.os)
diff --git a/backends/mips_init.c b/backends/mips_init.c
new file mode 100644
index ..f70d62e4
--- /dev/null
+++ b/backends/mips_init.c
@@ -0,0 +1,49 @@
+/* Initialization of MIPS specific backend library.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#define BACKENDmips_
+#define RELOC_PREFIX   R_MIPS_
+#include "libebl_CPU.h"
+
+/* This defines the common reloc hooks based on mips_reloc.def.  */
+#include "common-reloc.c"
+
+Ebl *
+mips_init (Elf *elf __attribute__ ((unused)),
+  GElf_Half machine __attribute__ ((unused)),
+  Ebl *eh)
+{
+  /* We handle it.  */
+  mips_init_reloc (eh);
+  HOOK (eh, reloc_simple_type);
+  return eh;
+}
diff --git a/backends/mips_reloc.def b/backends/mips_reloc.def
new file mode 100644
index ..8cb66a54
--- /dev/null
+++ b/backends/mips_reloc.def
@@ -0,0 +1,93 @@
+/* List the relocation types for MIPS.  -*- C -*-
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by

[PATCH 5/5] backends: Fix run-native-test.sh and run-funcretval++11.sh run fail on mips

2023-04-11 Thread Ying Huang
From: Ying Huang 

add register_info, return_value_location function on mips
---
 backends/Makefile.am   |   2 +-
 backends/mips_init.c   |   2 +
 backends/mips_regs.c   | 109 +
 backends/mips_retval.c | 261 +
 4 files changed, 373 insertions(+), 1 deletion(-)
 create mode 100644 backends/mips_regs.c
 create mode 100644 backends/mips_retval.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index ddc31c9d..5453f787 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -101,7 +101,7 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c
 arc_SRCS = arc_init.c arc_symbol.c
 
 mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c mips_initreg.c \
-   mips_cfi.c mips_unwind.c
+   mips_cfi.c mips_unwind.c mips_regs.c mips_retval.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_init.c b/backends/mips_init.c
index 3caa9fee..7ca93314 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -58,6 +58,8 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, set_initial_registers_tid);
   HOOK (eh, abi_cfi);
   HOOK (eh, unwind);
+  HOOK (eh, register_info);
+  HOOK (eh, return_value_location);
   eh->frame_nregs = 32;
   return eh;
 }
diff --git a/backends/mips_regs.c b/backends/mips_regs.c
new file mode 100644
index ..733caeee
--- /dev/null
+++ b/backends/mips_regs.c
@@ -0,0 +1,109 @@
+/* Register names and numbers for mips DWARF.
+   Copyright (C) 2006 Red Hat, Inc.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+#include 
+#include 
+
+#define BACKEND mips_
+#include "libebl_CPU.h"
+
+ssize_t
+mips_register_info (Ebl *ebl __attribute__ ((unused)),
+ int regno, char *name, size_t namelen,
+ const char **prefix, const char **setname,
+ int *bits, int *type)
+{
+  if (name == NULL)
+return 66;
+
+  if (regno < 0 || regno > 65 || namelen < 4)
+return -1;
+
+  *prefix = "$";
+  
+  if (regno < 32)
+{
+  *setname = "integer";
+  *type = DW_ATE_signed;
+  *bits = 32;
+  if (regno < 32 + 10)
+  {
+name[0] = regno + '0';
+   namelen = 1;
+  }
+  else
+  {
+name[0] = (regno / 10) + '0';
+   name[1] = (regno % 10) + '0';
+   namelen = 2;
+  }
+}
+  else if (regno < 64)
+{
+  *setname = "FPU";
+  *type = DW_ATE_float;
+  *bits = 32;
+  name[0] = 'f';
+  if (regno < 32 + 10)
+  {
+name[1] = (regno - 32) + '0';
+   namelen = 2;
+  }
+  else
+  {
+name[1] = (regno - 32) / 10 + '0';
+   name[2] = (regno - 32) % 10 + '0';
+   namelen = 3;
+  }
+}
+  else if (regno == 64)
+{
+  *type = DW_ATE_signed;
+  *bits = 32;
+  name[0] = 'h';
+  name[1] = 'i';
+  namelen = 2;
+}
+  else
+{
+  *type = DW_ATE_signed;
+  *bits = 32;
+  name[0] = 'l';
+  name[1] = 'o';
+  namelen = 2;
+}
+
+  name[namelen++] = '\0';
+  return namelen;
+}
diff --git a/backends/mips_retval.c b/backends/mips_retval.c
new file mode 100644
index ..fd9aaefa
--- /dev/null
+++ b/backends/mips_retval.c
@@ -0,0 +1,261 @@
+/* Function return value location for Linux/mips ABI.
+   Copyright (C) 2005 Red Hat, Inc.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+

[PATCH 2/5] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

2023-04-11 Thread Ying Huang
From: Ying Huang 

-h: support show Flags name
-S: support show mips related section type
-r: support show type and relocation info value of Relocation section
-w: can work and can show correct "strp" contents
-l: support show mips related program header entry type
-d: can show mips related Dynamic type name
-a: support show complete Object attribute section ".gnu.attributes"
---
 backends/Makefile.am   |   2 +-
 backends/mips_attrs.c  | 107 +++
 backends/mips_init.c   |   7 +
 backends/mips_symbol.c | 572 +
 libebl/eblreloctypecheck.c |   8 +-
 libebl/eblreloctypename.c  |   8 +-
 libelf/elf.h   |  93 +-
 src/readelf.c  | 190 +---
 8 files changed, 932 insertions(+), 55 deletions(-)
 create mode 100644 backends/mips_attrs.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index bda1b604..428a1a03 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -100,7 +100,7 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c
 
 arc_SRCS = arc_init.c arc_symbol.c
 
-mips_SRCS = mips_init.c mips_symbol.c
+mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_attrs.c b/backends/mips_attrs.c
new file mode 100644
index ..1419814e
--- /dev/null
+++ b/backends/mips_attrs.c
@@ -0,0 +1,107 @@
+/* Object attribute tags for MIPS.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+#include 
+
+#define BACKEND arm_
+#include "libebl_CPU.h"
+
+#define KNOWN_VALUES(...) do   \
+  {\
+static const char *table[] = { __VA_ARGS__ };  \
+if (value < sizeof table / sizeof table[0])\
+  *value_name = table[value];  \
+  } while (0)
+
+/* copy binutils-2.34/binutils/readelf.c display_mips_gnu_attribute */
+bool
+mips_check_object_attribute (Ebl *ebl __attribute__ ((unused)),
+   const char *vendor, int tag, uint64_t value,
+   const char **tag_name, const char **value_name)
+{
+  if (!strcmp (vendor, "gnu"))
+switch (tag)
+  {
+  case Tag_GNU_MIPS_ABI_FP:
+   *tag_name = "Tag_GNU_MIPS_ABI_FP";
+   switch (value)
+   {
+ case Val_GNU_MIPS_ABI_FP_ANY:
+   *value_name = "Hard or soft float";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_DOUBLE:
+   *value_name = "Hard float (double precision)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_SINGLE:
+   *value_name = "Hard float (single precision)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_SOFT:
+   *value_name = "Soft float";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_OLD_64:
+   *value_name = "Hard float (MIPS32r2 64-bit FPU 12 callee-saved)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_XX:
+   *value_name = "Hard float (32-bit CPU, Any FPU)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_64:
+   *value_name = "Hard float (32-bit CPU, 64-bit FPU)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_64A:
+   *value_name = "Hard float compat (32-bit CPU, 64-bit FPU)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_NAN2008:
+   *value_name = "NaN 2008 compatibility";
+   return true;
+ default:
+   return true;
+   }
+   return true;
+  case Tag_GNU_MIPS_ABI_MSA:
+   *tag_name = "Tag_GNU_MIPS_ABI_MSA";
+   switch (value)
+   {
+ case Val_GNU_MIPS_ABI_MSA_ANY:
+   *value_name = "An

[PATCH 4/5] stack: Fix stack unwind failure on mips

2023-04-11 Thread Ying Huang
From: Ying Huang 

add abi_cfi, set_initial_registers_tid, unwind on mips.
"./src/stack -p PID" can show stack information
---
 backends/Makefile.am|  3 +-
 backends/mips_cfi.c | 68 +
 backends/mips_init.c|  4 ++
 backends/mips_initreg.c | 70 ++
 backends/mips_unwind.c  | 84 +
 5 files changed, 228 insertions(+), 1 deletion(-)
 create mode 100644 backends/mips_cfi.c
 create mode 100644 backends/mips_initreg.c
 create mode 100644 backends/mips_unwind.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index 428a1a03..ddc31c9d 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -100,7 +100,8 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c
 
 arc_SRCS = arc_init.c arc_symbol.c
 
-mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c
+mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c mips_initreg.c \
+   mips_cfi.c mips_unwind.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_cfi.c b/backends/mips_cfi.c
new file mode 100644
index ..77132cc1
--- /dev/null
+++ b/backends/mips_cfi.c
@@ -0,0 +1,68 @@
+/* MIPS ABI-specified defaults for DWARF CFI.
+   Copyright (C) 2009 Red Hat, Inc.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+
+#define BACKEND mips_
+#include "libebl_CPU.h"
+
+int
+mips_abi_cfi (Ebl *ebl __attribute__ ((unused)), Dwarf_CIE *abi_info)
+{
+  static const uint8_t abi_cfi[] =
+{
+  DW_CFA_def_cfa, ULEB128_7 (31), ULEB128_7 (0),
+  /* Callee-saved regs.  */
+  DW_CFA_same_value, ULEB128_7 (16), /* s0 */
+  DW_CFA_same_value, ULEB128_7 (17), /* s1 */
+  DW_CFA_same_value, ULEB128_7 (18), /* s2 */
+  DW_CFA_same_value, ULEB128_7 (19), /* s3 */
+  DW_CFA_same_value, ULEB128_7 (20), /* s4 */
+  DW_CFA_same_value, ULEB128_7 (21), /* s5 */
+  DW_CFA_same_value, ULEB128_7 (22), /* s6 */
+  DW_CFA_same_value, ULEB128_7 (23), /* s7 */
+  DW_CFA_same_value, ULEB128_7 (28), /* gp */
+  DW_CFA_same_value, ULEB128_7 (29), /* sp */
+  DW_CFA_same_value, ULEB128_7 (30), /* fp */
+
+  DW_CFA_val_offset, ULEB128_7 (29), ULEB128_7 (0),
+};
+
+  abi_info->initial_instructions = abi_cfi;
+  abi_info->initial_instructions_end = &abi_cfi[sizeof abi_cfi];
+  abi_info->data_alignment_factor = -4;
+
+  abi_info->return_address_register = 31; /* %ra */
+
+  return 0;
+}
diff --git a/backends/mips_init.c b/backends/mips_init.c
index 4c2f21b9..3caa9fee 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -55,5 +55,9 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, check_object_attribute);
   HOOK (eh, check_special_symbol);
   HOOK (eh, check_reloc_target_type);
+  HOOK (eh, set_initial_registers_tid);
+  HOOK (eh, abi_cfi);
+  HOOK (eh, unwind);
+  eh->frame_nregs = 32;
   return eh;
 }
diff --git a/backends/mips_initreg.c b/backends/mips_initreg.c
new file mode 100644
index ..31b8de13
--- /dev/null
+++ b/backends/mips_initreg.c
@@ -0,0 +1,70 @@
+/* Fetch live process registers from TID.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHA

Re: [PATCH 1/5] strip: Adapt src/strip -o -f on mips

2023-05-15 Thread Ying Huang
Hi,

在 2023/5/9 23:15, Mark Wielaard 写道:
> Hi,
>
> On Tue, 2023-04-11 at 16:12 +0800, Ying Huang wrote:
>> From: Ying Huang 
>>
>> In mips64 little-endian, r_info consists of four byte fields(contains
>> three reloc types) and a 32-bit symbol index. In order to adapt
>> GELF_R_SYM and GELF_R_TYPE, need convert raw data to get correct symbol
>> index and type.
> Is there a spec that describes this?
   

 references:

    https://www.linux-mips.org/pub/linux/mips/doc/ABI/elf64-2.4.pdf

    Page40 && Page41

>
> I see you adjusted elf.h to include:
>
> +#define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
> +#define ELF64_MIPS_R_TYPE2(i)   (((i) >> 8) & 0xff)
> +#define ELF64_MIPS_R_TYPE3(i)   (((i) >> 16) & 0xff)
>
> And various new relocation types for MIPS variants.
> Our elf.h comes from the glibc project. Have you also submitted these
> changes to libc-al...@sourceware.org ?
    Has submitted.

    https://sourceware.org/pipermail/libc-alpha/2023-May/148026.html

    https://sourceware.org/pipermail/libc-alpha/2023-May/148112.html

>
>>   libelf/elf_getdata.c: Some eu-utils use read-mmap method to map file,
>> so we need to malloc and memcpy raw data to avoid segment fault. After
>> modification, the correct value are saved in the malloced memory not in
>> process address space.
> Where do these segfaults show up?

>
>>   libelf/elf_updata.c: Because we converted the relocation info in mips
>> order when we call elf_getdata.c, so we need to convert the modified data
>> in original order bits before writing the data to the file.
    Has tested on big/little endian machine with big/little endian ELF file, 
all were OK.
> It feels like this is in the wrong place and doesn't take into account
> whether the program itself is running on a big or little endian
> machine.
>
> Maybe I am misunderstanding why this conversion is needed always. But I
> would have expected a specific conversion function for MIPS for
> ELF_T_REL and/or ELF_T_RELA (which are currently generic).
>
> Cheers,
>
> Mark
    1.Considering that some people directly use the original data instead of 
the interface function gelf_getrela;

    2.Because there is only one parameter, so can not modify the macro 
ELF64_R_TYPE;

    3.If the mips interface function is added, other packages using libelf will 
not be compatible with mips, and the place where gelf_getrela is used need be 
modified.

    Where do you think is the most suitable place to do mips conversion?

Thanks,

Ying


Re: [PATCH 1/5] strip: Adapt src/strip -o -f on mips

2023-05-15 Thread Ying Huang
HI,

>>   libelf/elf_getdata.c: Some eu-utils use read-mmap method to map file,
>> so we need to malloc and memcpy raw data to avoid segment fault. After
>> modification, the correct value are saved in the malloced memory not in
>> process address space.
> Where do these segfaults show up?
    The screenshot of the segment error was not uploaded successfully in the 
last email, upload again.

Thanks,

YIng


Re: [PATCH 1/5] strip: Adapt src/strip -o -f on mips

2023-05-16 Thread Ying Huang
在 2023/5/16 14:46, Ying Huang 写道:
>
> HI,
>
> >> libelf/elf_getdata.c: Some eu-utils use read-mmap method to map file,
> >> so we need to malloc and memcpy raw data to avoid segment fault. After
> >> modification, the correct value are saved in the malloced memory not in
> >> process address space.
> > Where do these segfaults show up?
>     The screenshot of the segment error was not uploaded successfully in the 
> last email, upload again.
>
> Thanks,
>
> YIng
>

huangying@Sleepygon:~/elf/elfutils_4$ src/elflint src/nm.o
Segmentation fault
huangying@Sleepygon:~/elf/elfutils_4$ src/elflint src/strip.o
Segmentation fault


Re: [PATCH 2/5] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

2023-05-16 Thread Ying Huang
Hi,

在 2023/5/11 22:31, Mark Wielaard 写道:
> Hi,
>
> On Tue, 2023-04-11 at 16:12 +0800, Ying Huang wrote:
>> diff --git a/backends/mips_attrs.c b/backends/mips_attrs.c
>> new file mode 100644
>> index ..1419814e
>> --- /dev/null
>> +++ b/backends/mips_attrs.c
>> @@ -0,0 +1,107 @@
>> +/* Object attribute tags for MIPS.
>> +   Copyright (C) 2023 CIP United Inc.
>> +   This file is part of elfutils.
>> +
>> +   This file is free software; you can redistribute it and/or modify
>> +   it under the terms of either
>> +
>> + * the GNU Lesser General Public License as published by the Free
>> +   Software Foundation; either version 3 of the License, or (at
>> +   your option) any later version
>> +
>> +   or
>> +
>> + * the GNU General Public License as published by the Free
>> +   Software Foundation; either version 2 of the License, or (at
>> +   your option) any later version
>> +
>> +   or both in parallel, as here.
>> +
>> +   elfutils is distributed in the hope that it will be useful, but
>> +   WITHOUT ANY WARRANTY; without even the implied warranty of
>> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
>> +   General Public License for more details.
>> +
>> +   You should have received copies of the GNU General Public License and
>> +   the GNU Lesser General Public License along with this program.  If
>> +   not, see <http://www.gnu.org/licenses/>.  */
>> +
>> +#ifdef HAVE_CONFIG_H
>> +# include 
>> +#endif
>> +
>> +#include 
>> +#include 
>> +
>> +#define BACKEND arm_
> You mean mips_

    Yes, it should be mips_, thanks!


>> diff --git a/backends/mips_init.c b/backends/mips_init.c
>> index f70d62e4..5bba822b 100644
>> --- a/backends/mips_init.c
>> +++ b/backends/mips_init.c
>> @@ -45,5 +45,12 @@ mips_init (Elf *elf __attribute__ ((unused)),
>>/* We handle it.  */
>>mips_init_reloc (eh);
>>HOOK (eh, reloc_simple_type);
>> +  HOOK (eh, section_type_name);
>> +  HOOK (eh, machine_flag_check);
>> +  HOOK (eh, machine_flag_name);
>> +  HOOK (eh, segment_type_name);
>> +  HOOK (eh, dynamic_tag_check);
>> +  HOOK (eh, dynamic_tag_name);
>> +  HOOK (eh, check_object_attribute);
>>return eh;
>>  }
> OK
> But see below for also hooking reloc_type_check and reloc_type_name.


    OK, I would add hook for reloc_type_check and reloc_type_name.


>>  
>>  typedef union
>> @@ -2218,8 +2302,11 @@ enum
>>Val_GNU_MIPS_ABI_FP_64 = 6,
>>/* Using -mips32r2 -mfp64 -mno-odd-spreg.  */
>>Val_GNU_MIPS_ABI_FP_64A = 7,
>> +  /* This is reserved for backward-compatibility with an earlier
>> + implementation of the MIPS NaN2008 functionality.  */
>> +  Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
>>/* Maximum allocated FP ABI value.  */
>> -  Val_GNU_MIPS_ABI_FP_MAX = 7
>> +  Val_GNU_MIPS_ABI_FP_MAX = 9
>>  };
>>  
>>  /* HPPA specific definitions.  */
> We take elf.h from glibc so please suggest these additions first on
> libc-al...@sourceware.org

    I have submitted patch to libc-al...@sourceware.org and modify the  
Val_GNU_MIPS_ABI_FP_MAX to 8.

  https://sourceware.org/pipermail/libc-alpha/2023-May/148112.html

>
>> diff --git a/src/readelf.c b/src/readelf.c
>> index 6950204e..6e9a02c1 100644
>> --- a/src/readelf.c
>> +++ b/src/readelf.c
>> @@ -1125,7 +1125,7 @@ print_ehdr (Ebl *ebl, GElf_Ehdr *ehdr)
>>ehdr->e_ident[EI_VERSION] == EV_CURRENT ? _("(current)")
>>: "(\?\?\?)");
>>  
>> -  char buf[512];
>> +  char buf[64];
>>printf (_("  OS/ABI:%s\n"),
>>ebl_osabi_name (ebl, ehdr->e_ident[EI_OSABI], buf, sizeof (buf)));
>>
> Can you explain why reducing this buffer to 64 is OK?

    Because the OS/ABI and Flags are not as long as 256, maybe I did not think 
enough, can not it be reduced?


>
>> @@ -2193,17 +2193,41 @@ handle_relocs_rel (Ebl *ebl, GElf_Ehdr *ehdr, 
>> Elf_Scn *scn, GElf_Shdr *shdr)
>>  (long int) GELF_R_SYM (rel->r_info));
>>  }
>>else if (GELF_ST_TYPE (sym->st_info) != STT_SECTION)
>> -printf ("  %#0*" PRIx64 "  %-20s %#0*" PRIx64 "  %s\n",
>> -class == ELFCLASS32 ? 10 : 18, rel->r_offset,
>> -likely (ebl_reloc_type_check (ebl,
>> -  GELF_R_TYPE (

Re: [PATCH 3/5] elflint: Fix invalid type of relocation info and other issues on mips

2023-05-17 Thread Ying Huang
Hi,

在 2023/5/11 23:59, Mark Wielaard 写道:
> Hi,
>
> On Tue, 2023-04-11 at 16:12 +0800, Ying Huang wrote:
>> From: Ying Huang 
>>
>> add some check related functions
>> ---
>>  backends/mips_init.c  |  3 +++
>>  backends/mips_symbol.c| 33 +
>>  libebl/eblrelocvaliduse.c |  8 ++--
>>  src/elflint.c | 23 ---
>>  4 files changed, 62 insertions(+), 5 deletions(-)
>>
>> diff --git a/backends/mips_init.c b/backends/mips_init.c
>> index 5bba822b..4c2f21b9 100644
>> --- a/backends/mips_init.c
>> +++ b/backends/mips_init.c
>> @@ -51,6 +51,9 @@ mips_init (Elf *elf __attribute__ ((unused)),
>>HOOK (eh, segment_type_name);
>>HOOK (eh, dynamic_tag_check);
>>HOOK (eh, dynamic_tag_name);
>> +  HOOK (eh, machine_section_flag_check);
>>HOOK (eh, check_object_attribute);
>> +  HOOK (eh, check_special_symbol);
>> +  HOOK (eh, check_reloc_target_type);
>>return eh;
>>  }
> OK. But see below for hooking reloc_valid_use

 OK, I would add hook reloc_valid_use.


>> +/* Check whether given symbol's st_value and st_size are OK despite failing
>> +   normal checks.  */
>> +bool
>> +mips_check_special_symbol (Elf *elf,
>> +const GElf_Sym *sym __attribute__ ((unused)),
>> +const char *name __attribute__ ((unused)),
>> +const GElf_Shdr *destshdr)
>> +{
>> +  size_t shstrndx;
>> +  if (elf_getshdrstrndx (elf, &shstrndx) != 0)
>> +return false;
>> +  const char *sname = elf_strptr (elf, shstrndx, destshdr->sh_name);
>> +  if (sname == NULL)
>> +return false;
>> +  return (strcmp (sname, ".got") == 0 || strcmp (sname, ".bss") == 0);
>> +}
> Could you add a comment why .got and .bss are special in this case?

    raw code:

    huangying@Sleepygon:~/elf/elfutils_4$ src/elflint  src/nm
    section [38] '.symtab': symbol 781 (_gp): st_value out of bounds
    section [38] '.symtab': _DYNAMIC symbol size 0 does not match dynamic 
segment size 624
    section [38] '.symtab': _GLOBAL_OFFSET_TABLE_ symbol size 0 does not match 
.got section size 3736

    huangying@Sleepygon:~/elf/elfutils_4$ src/elflint --gnu src/nm
    section [38] '.symtab': symbol 781 (_gp): st_value out of bounds

    After add '.got':

    huangying@Sleepygon:~/elf/elfutils_4$ src/elflint  src/nm
    section [38] '.symtab': _DYNAMIC symbol size 0 does not match dynamic 
segment size 624
    section [38] '.symtab': symbol 912 (_fbss): st_value out of bounds
    section [38] '.symtab': symbol 1160 (__bss_start): st_value out of bounds

    huangying@Sleepygon:~/elf/elfutils_4$ src/elflint  --gnu src/nm
    section [38] '.symtab': symbol 912 (_fbss): st_value out of bounds

    After add '.bss':

    huangying@Sleepygon:~/elf/elfutils_4$ src/elflint  src/nm
    section [38] '.symtab': _DYNAMIC symbol size 0 does not match dynamic 
segment size 624

    huangying@Sleepygon:~/elf/elfutils_4$ src/elflint  --gnu src/nm
    No errors

    And also has error , but make check is OK.

   

>
>> +/* Check whether SHF_MASKPROC flags are valid.  */
>> +bool
>> +mips_machine_section_flag_check (GElf_Xword sh_flags)
>> +{
>> +  return ((sh_flags &~ (SHF_MIPS_GPREL |
>> +SHF_MIPS_MERGE |
>> +SHF_MIPS_ADDR |
>> +SHF_MIPS_STRINGS)) == 0);
>> +}
> OK. But see below for checking other SHF_MIPS flags.

    OK, add it:

diff --git a/backends/mips_symbol.c b/backends/mips_symbol.c
index 8787fcee..f4dee731 100644
--- a/backends/mips_symbol.c
+++ b/backends/mips_symbol.c
@@ -188,7 +188,11 @@ mips_machine_section_flag_check (GElf_Xword sh_flags)
   return ((sh_flags &~ (SHF_MIPS_GPREL |
    SHF_MIPS_MERGE |
    SHF_MIPS_ADDR |
-   SHF_MIPS_STRINGS)) == 0);
+   SHF_MIPS_STRINGS |
+   SHF_MIPS_NOSTRIP |
+   SHF_MIPS_LOCAL |
+   SHF_MIPS_NAMES |
+   SHF_MIPS_NODUPE)) == 0);
 }

>
>> diff --git a/src/elflint.c b/src/elflint.c
>> index dd42dcb4..04f1ee92 100644
>> --- a/src/elflint.c
>> +++ b/src/elflint.c
>> @@ -935,7 +935,10 @@ section [%2d] '%s': symbol %zu (%s): non-local symbol 
>> outside range described in
>>  }
>>  
>>if (GELF_ST_TYPE (sym->st_info) == STT_SECTION
>> -  && GELF_ST_BIND (sym->st_info) != STB_LOCAL)
>> +  && GELF_

Re: [PATCH 4/5] stack: Fix stack unwind failure on mips

2023-05-17 Thread Ying Huang
Hi,

在 2023/5/12 00:07, Mark Wielaard 写道:
>>  libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
>>  $(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
>> diff --git a/backends/mips_cfi.c b/backends/mips_cfi.c
>> new file mode 100644
>> index ..77132cc1
>> --- /dev/null
>> +++ b/backends/mips_cfi.c
>> @@ -0,0 +1,68 @@
>> +/* MIPS ABI-specified defaults for DWARF CFI.
>> +   Copyright (C) 2009 Red Hat, Inc.
>> +   Copyright (C) 2023 CIP United Inc.
>> +   This file is part of elfutils.
>> +
>> +   This file is free software; you can redistribute it and/or modify
>> +   it under the terms of either
>> +
>> + * the GNU Lesser General Public License as published by the Free
>> +   Software Foundation; either version 3 of the License, or (at
>> +   your option) any later version
>> +
>> +   or
>> +
>> + * the GNU General Public License as published by the Free
>> +   Software Foundation; either version 2 of the License, or (at
>> +   your option) any later version
>> +
>> +   or both in parallel, as here.
>> +
>> +   elfutils is distributed in the hope that it will be useful, but
>> +   WITHOUT ANY WARRANTY; without even the implied warranty of
>> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
>> +   General Public License for more details.
>> +
>> +   You should have received copies of the GNU General Public License and
>> +   the GNU Lesser General Public License along with this program.  If
>> +   not, see .  */
>> +
>> +#ifdef HAVE_CONFIG_H
>> +# include 
>> +#endif
>> +
>> +#include 
>> +
>> +#define BACKEND mips_
>> +#include "libebl_CPU.h"
>> +
>> +int
>> +mips_abi_cfi (Ebl *ebl __attribute__ ((unused)), Dwarf_CIE *abi_info)
>> +{
>> +  static const uint8_t abi_cfi[] =
>> +{
>> +  DW_CFA_def_cfa, ULEB128_7 (31), ULEB128_7 (0),
>> +  /* Callee-saved regs.  */
>> +  DW_CFA_same_value, ULEB128_7 (16), /* s0 */
>> +  DW_CFA_same_value, ULEB128_7 (17), /* s1 */
>> +  DW_CFA_same_value, ULEB128_7 (18), /* s2 */
>> +  DW_CFA_same_value, ULEB128_7 (19), /* s3 */
>> +  DW_CFA_same_value, ULEB128_7 (20), /* s4 */
>> +  DW_CFA_same_value, ULEB128_7 (21), /* s5 */
>> +  DW_CFA_same_value, ULEB128_7 (22), /* s6 */
>> +  DW_CFA_same_value, ULEB128_7 (23), /* s7 */
>> +  DW_CFA_same_value, ULEB128_7 (28), /* gp */
>> +  DW_CFA_same_value, ULEB128_7 (29), /* sp */
>> +  DW_CFA_same_value, ULEB128_7 (30), /* fp */
>> +
>> +  DW_CFA_val_offset, ULEB128_7 (29), ULEB128_7 (0),
>> +};
>> +
>> +  abi_info->initial_instructions = abi_cfi;
>> +  abi_info->initial_instructions_end = &abi_cfi[sizeof abi_cfi];
>> +  abi_info->data_alignment_factor = -4;
>> +
>> +  abi_info->return_address_register = 31; /* %ra */
>> +
>> +  return 0;
>> +}
> Looks good, but do you have a reference to the ABI docs would be nice
> to add an URL as comment for people to double check.

    document:

    https://irix7.com/techpubs/007-2816-004.pdf

    Page17 Page18 Page14

>> diff --git a/backends/mips_initreg.c b/backends/mips_initreg.c
>> new file mode 100644
>> index ..31b8de13
>> --- /dev/null
>> +++ b/backends/mips_initreg.c
>> @@ -0,0 +1,70 @@
>> +/* Fetch live process registers from TID.
>> +   Copyright (C) 2023 CIP United Inc.
>> +   This file is part of elfutils.
>> +
>> +   This file is free software; you can redistribute it and/or modify
>> +   it under the terms of either
>> +
>> + * the GNU Lesser General Public License as published by the Free
>> +   Software Foundation; either version 3 of the License, or (at
>> +   your option) any later version
>> +
>> +   or
>> +
>> + * the GNU General Public License as published by the Free
>> +   Software Foundation; either version 2 of the License, or (at
>> +   your option) any later version
>> +
>> +   or both in parallel, as here.
>> +
>> +   elfutils is distributed in the hope that it will be useful, but
>> +   WITHOUT ANY WARRANTY; without even the implied warranty of
>> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
>> +   General Public License for more details.
>> +
>> +   You should have received copies of the GNU General Public License and
>> +   the GNU Lesser General Public License along with this program.  If
>> +   not, see .  */
>> +
>> +#ifdef HAVE_CONFIG_H
>> +# include 
>> +#endif
>> +
>> +#include 
>> +#if (defined(mips) || defined(__mips) || defined(__mips__) || defined(MIPS) 
>> || defined(__MIPS__)) && defined(__linux__)
>> +# include 
>> +# include 
>> +#endif
>> +
>> +#define BACKEND mips_
>> +#include "libebl_CPU.h"
>> +#include 
>> +
>> +
>> +bool
>> +mips_set_initial_registers_tid (pid_t tid __attribute__ ((unused)),
>> +  ebl_tid_registers_t *setfunc __attribute__ ((unused)),
>> +  void *arg __attribute__ ((unused)))
>> +{
>> +#if (!defined(mips) && !defined(_

Re: [PATCH 5/5] backends: Fix run-native-test.sh and run-funcretval++11.sh run fail on mips

2023-05-18 Thread Ying Huang
Hi,

在 2023/5/12 00:38, Mark Wielaard 写道:
>> diff --git a/backends/mips_regs.c b/backends/mips_regs.c
>>
>> +
>> +ssize_t
>> +mips_register_info (Ebl *ebl __attribute__ ((unused)),
>> +  int regno, char *name, size_t namelen,
>> +  const char **prefix, const char **setname,
>> +  int *bits, int *type)
>> +{
>> +  if (name == NULL)
>> +return 66;
>> +
>> +  if (regno < 0 || regno > 65 || namelen < 4)
>> +return -1;
>> +
>> +  *prefix = "$";
>> +  
>> +  if (regno < 32)
>> +{
>> +  *setname = "integer";
>> +  *type = DW_ATE_signed;
>> +  *bits = 32;
>> +  if (regno < 32 + 10)
>> +  {
>> +name[0] = regno + '0';
>> +namelen = 1;
>> +  }
>> +  else
>> +  {
>> +name[0] = (regno / 10) + '0';
>> +name[1] = (regno % 10) + '0';
>> +namelen = 2;
>> +  }
>> +}
>> +  else if (regno < 64)
>> +{
>> +  *setname = "FPU";
>> +  *type = DW_ATE_float;
>> +  *bits = 32;
>> +  name[0] = 'f';
>> +  if (regno < 32 + 10)
>> +  {
>> +name[1] = (regno - 32) + '0';
>> +namelen = 2;
>> +  }
>> +  else
>> +  {
>> +name[1] = (regno - 32) / 10 + '0';
>> +name[2] = (regno - 32) % 10 + '0';
>> +namelen = 3;
>> +  }
>>
> OK, but indentation seems slightly off. space vs tabs?


    Yes, those lines that not aligned are tabs, I would fix it. Thanks.


>
>> diff --git a/backends/mips_retval.c b/backends/mips_retval.c
>> new file mode 100644
>> index ..fd9aaefa
>> --- /dev/null
>> +++ b/backends/mips_retval.c
>> @@ -0,0 +1,261 @@
>> +/* Function return value location for Linux/mips ABI.
>> +   Copyright (C) 2005 Red Hat, Inc.
>> +   Copyright (C) 2023 CIP United Inc.
>> +   This file is part of elfutils.
>> +
>> +   This file is free software; you can redistribute it and/or modify
>> +   it under the terms of either
>> +
>> + * the GNU Lesser General Public License as published by the Free
>> +   Software Foundation; either version 3 of the License, or (at
>> +   your option) any later version
>> +
>> +   or
>> +
>> + * the GNU General Public License as published by the Free
>> +   Software Foundation; either version 2 of the License, or (at
>> +   your option) any later version
>> +
>> +   or both in parallel, as here.
>> +
>> +   elfutils is distributed in the hope that it will be useful, but
>> +   WITHOUT ANY WARRANTY; without even the implied warranty of
>> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
>> +   General Public License for more details.
>> +
>> +   You should have received copies of the GNU General Public License and
>> +   the GNU Lesser General Public License along with this program.  If
>> +   not, see .  */
>> +
>> +#ifdef HAVE_CONFIG_H
>> +# include 
>> +#endif
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#define BACKEND mips_
>> +#include "libebl_CPU.h"
>> +#include "libdwP.h"
>> +
>> +/* All the possible MIPS ARCHs. */
>> +enum mips_arch
>> +  {
>> +MIPS_ARCH_UNKNOWN = 0,
>> +MIPS_ARCH_32,
>> +MIPS_ARCH_64,
>> +MIPS_ARCH_LAST
>> +  };
>> +
>> +/* Find the mips ARCH of the current file */
>> +enum mips_arch find_mips_arch(Elf *elf)
>> +{
>> +  GElf_Ehdr ehdr_mem;
>> +  GElf_Ehdr *ehdr = gelf_getehdr (elf, &ehdr_mem);
>> +
>> +  if (ehdr == NULL)
>> +return MIPS_ARCH_LAST;
>> +
>> +  GElf_Word elf_flags = ehdr->e_flags;
>> +
>> +  /* Check elf_flags to see if it specifies the ARCH being used.  */
>> +  switch ((elf_flags & EF_MIPS_ARCH))
>> +{
>> +case E_MIPS_ARCH_32:
>> +case EF_MIPS_ARCH_32R2:
>> +case E_MIPS_ARCH_32R6:
>> +  return MIPS_ARCH_32;
>> +case E_MIPS_ARCH_64:
>> +case EF_MIPS_ARCH_64R2:
>> +case E_MIPS_ARCH_64R6:
>> +  return MIPS_ARCH_64;
>> +default:
>> +  return MIPS_ARCH_32;
>> +}
>> +
>> +  return MIPS_ARCH_UNKNOWN;
>> +}
>>
>> +unsigned int
>> +mips_arch_regsize (enum mips_arch arch)
>> +{
>> +  switch (arch)
>> +{
>> +case MIPS_ARCH_32:
>> +  return 4;
>> +case MIPS_ARCH_64:
>> +  return 8;
>> +case MIPS_ARCH_UNKNOWN:
>> +case MIPS_ARCH_LAST:
>> +default:
>> +  return 0;
>> +}
>> +}
> So this is different from checking ELFCLASS32/64?

    OK, I would change to use ELFCLASS32/64:

>
>> +/* $v0 or pair $v0, $v1 */
>> +static const Dwarf_Op loc_intreg_o32[] =
>> +  {
>> +{ .atom = DW_OP_reg2 }, { .atom = DW_OP_piece, .number = 4 },
>> +{ .atom = DW_OP_reg3 }, { .atom = DW_OP_piece, .number = 4 },
>> +  };
>> +
>> +static const Dwarf_Op loc_intreg[] =
>> +  {
>> +{ .atom = DW_OP_reg2 }, { .atom = DW_OP_piece, .number = 8 },
>> +{ .atom = DW_OP_reg3 }, { .atom = DW_OP_piece, .number = 8 },
>> +  };
>> +#define nloc_intreg 1
>> +#define nloc_intregpair 4
>> +
>> +/* $f0 (float), or pair $f0, $f1 (double).
>> + * f2/f3 are used for COMPLEX (= 2 doubles) returns in

Re: [PATCH 1/5] strip: Adapt src/strip -o -f on mips

2023-05-23 Thread Ying Huang
在 2023/5/22 05:13, Mark Wielaard 写道:
> Hi Ying,
>
> On Tue, May 16, 2023 at 02:38:45PM +0800, Ying Huang wrote:
>> 在 2023/5/9 23:15, Mark Wielaard 写道:
>>> On Tue, 2023-04-11 at 16:12 +0800, Ying Huang wrote:
>>>> In mips64 little-endian, r_info consists of four byte fields(contains
>>>> three reloc types) and a 32-bit symbol index. In order to adapt
>>>> GELF_R_SYM and GELF_R_TYPE, need convert raw data to get correct symbol
>>>> index and type.
>>> Is there a spec that describes this?
>>    
>>
>>  references:
>>
>>     https://www.linux-mips.org/pub/linux/mips/doc/ABI/elf64-2.4.pdf
>>
>>     Page40 && Page41
> Thanks. Interesting. If possible please include this URL in a comment.
    OK.
>
>>> I see you adjusted elf.h to include:
>>>
>>> +#define ELF64_MIPS_R_TYPE(i)   ((i) & 0xff)
>>> +#define ELF64_MIPS_R_TYPE2(i)   (((i) >> 8) & 0xff)
>>> +#define ELF64_MIPS_R_TYPE3(i)   (((i) >> 16) & 0xff)
>>>
>>> And various new relocation types for MIPS variants.
>>> Our elf.h comes from the glibc project. Have you also submitted these
>>> changes to libc-al...@sourceware.org ?
>>     Has submitted.
>>
>>     https://sourceware.org/pipermail/libc-alpha/2023-May/148026.html
>>
>>     https://sourceware.org/pipermail/libc-alpha/2023-May/148112.html
> Thanks. We'll sync them as soon as v3 lands.
>
>>     Has tested on big/little endian machine with big/little endian
>> ELF file, all were OK.
> Could you post those ELF files somewhere?
> Maybe we can add some as test files?
    The ELF files I used were "src/strip.o" which were generated on big/little 
endian machine.

root@debian-sid-mipsbe:~# readelf -h strip.o
ELF Header:
  Magic:   7f 45 4c 46 02 01 01 00 00 00 00 00 00 00 00 00
  Class: ELF64
  Data:  2's complement, little endian
  Version:   1 (current)
  OS/ABI:    UNIX - System V
  ABI Version:   0
  Type:  REL (Relocatable file)
  Machine:   MIPS R3000
  Version:   0x1
  Entry point address:   0x0
  Start of program headers:  0 (bytes into file)
  Start of section headers:  426696 (bytes into file)
  Flags: 0x8007, noreorder, pic, cpic, mips64r2
  Size of this header:   64 (bytes)
  Size of program headers:   0 (bytes)
  Number of program headers: 0
  Size of section headers:   64 (bytes)
  Number of section headers: 41
  Section header string table index: 40
root@debian-sid-mipsbe:~# readelf -h elfutils_debug/src/strip.o
ELF Header:
  Magic:   7f 45 4c 46 01 02 01 00 00 00 00 00 00 00 00 00
  Class: ELF32
  Data:  2's complement, big endian
  Version:   1 (current)
  OS/ABI:    UNIX - System V
  ABI Version:   0
  Type:  REL (Relocatable file)
  Machine:   MIPS R3000
  Version:   0x1
  Entry point address:   0x0
  Start of program headers:  0 (bytes into file)
  Start of section headers:  215248 (bytes into file)
  Flags: 0x70001007, noreorder, pic, cpic, o32, 
mips32r2
  Size of this header:   52 (bytes)
  Size of program headers:   0 (bytes)
  Number of program headers: 0
  Size of section headers:   40 (bytes)
  Number of section headers: 40
  Section header string table index: 39
root@debian-sid-mipsbe:~#

>>> It feels like this is in the wrong place and doesn't take into account
>>> whether the program itself is running on a big or little endian
>>> machine.
>>>
>>> Maybe I am misunderstanding why this conversion is needed always. But I
>>> would have expected a specific conversion function for MIPS for
>>> ELF_T_REL and/or ELF_T_RELA (which are currently generic).
>>     1.Considering that some people directly use the original data instead of 
>> the interface function gelf_getrela;
>>
>>     2.Because there is only one parameter, so can not modify the macro 
>> ELF64_R_TYPE;
>>
>>     3.If the mips interface function is added, other packages using libelf 
>> will not be compatible with mips, and the place where gelf_getrela is used 
>> need be modified.
>>
>>     Where do you think is the most suitable place to do mips convers

Re: [PATCH 1/5] strip: Adapt src/strip -o -f on mips

2023-05-25 Thread Ying Huang
Hi Mark,

在 2023/5/22 05:14, Mark Wielaard 写道:
> Hi Ying,
>
> On Tue, May 16, 2023 at 03:34:01PM +0800, Ying Huang wrote:
>> 在 2023/5/16 14:46, Ying Huang 写道:
>>>>> libelf/elf_getdata.c: Some eu-utils use read-mmap method to map file,
>>>>> so we need to malloc and memcpy raw data to avoid segment fault. After
>>>>> modification, the correct value are saved in the malloced memory not in
>>>>> process address space.
>>>> Where do these segfaults show up?
>>>     The screenshot of the segment error was not uploaded successfully in 
>>> the last email, upload again.
> Sorry, the mailinglist seems to strip the image attachements.
>
>> huangying@Sleepygon:~/elf/elfutils_4$ src/elflint src/nm.o
>> Segmentation fault
>> huangying@Sleepygon:~/elf/elfutils_4$ src/elflint src/strip.o
>> Segmentation fault
> When running under gdb, what is the backtrace of the crash?
>
> Thanks,
>
> Mark

huangying@Sleepygon:~/elf/elfutils_4$ src/elflint src/nm.o

Segmentation fault (core dumped)

huangying@Sleepygon:~/elf/elfutils_4$ gdb src/elflint

...

(gdb) bt
#0  convert_data (type=ELF_T_RELA, size=24912, data=1, eclass=, 
scn=0xaad3698f98) at elf_getdata.c:254
#1  __libelf_set_data_list_rdlock (scn=0xaad3698f98, wrlocked=) 
at elf_getdata.c:515
#2  0x00fff3862f14 in __elf_getdata_rdlock (scn=0xaad3698f98, 
data=) at elf_getdata.c:622
#3  0x00fff3862f54 in elf_getdata (scn=, data=) at elf_getdata.c:640
#4  0x00aaac571c9c in check_rela (ebl=0xaad369b120, ehdr=0xfffb9451b0, 
shdr=0xfffb945008, idx=) at elflint.c:1500
#5  0x00aaac574e40 in check_sections (ebl=0xaad369b120, ehdr=0xfffb9451b0) 
at elflint.c:4198
#6  0x00aaac5784ac in process_elf_file (only_one=, 
size=, fname=, suffix=, 
prefix=, elf=) at elflint.c:4842
#7  process_file (fd=, elf=, prefix=, suffix=, fname=, size=, 
only_one=) at elflint.c:241
#8  0x00aaac5688fc in main (argc=, argv=0xfffb9455d8) at 
elflint.c:174

...


    If I did not malloc to scn->data_base, would occur Segment fault when we 
want to operate this space "&scn->data_list.data.d". Because src/elflint use 
read-mmap method to map file.

    Show 10 lines of code "libelf/elf_getdata.c" starting at line 254:

huangying@Sleepygon:~/elf/elfutils_4$ cat libelf/elf_getdata.c | tail -n +254 | 
head -n 10
    for (int cnt = 0; cnt < nentries; cnt++)
  {
    Elf_Data_Scn *data_scn = (Elf_Data_Scn *) &scn->data_list.data.d;
    Elf64_Rela *value = &((Elf64_Rela *) data_scn->d.d_buf)[cnt];
    Elf64_Xword info = value->r_info;
    value->r_info = (((info & 0x) << 32)
       | ((info >> 56) & 0xff)
           | ((info >> 40) & 0xff00)
           | ((info >> 24) & 0xff)
           | ((info >> 8) & 0xff00));


    Show elflint map method in src/elflint.c:

    /* Create an `Elf' descriptor. */

    Elf *elf = elf_begin (fd, ELF_C_READ_MMAP, NULL);


Thanks,

Ying


Re: [PATCH 2/5] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

2023-07-24 Thread Ying Huang
Hi Mark,

>> diff --git a/libebl/eblreloctypecheck.c b/libebl/eblreloctypecheck.c
>> index 80e67ef7..e3c43944 100644
>> --- a/libebl/eblreloctypecheck.c
>> +++ b/libebl/eblreloctypecheck.c
>> @@ -32,10 +32,14 @@
>>  #endif
>>  
>>  #include 
>> -
>> +#include 
>>  
>>  bool
>>  ebl_reloc_type_check (Ebl *ebl, int reloc)
>>  {
>> -  return ebl != NULL ? ebl->reloc_type_check (reloc) : false;
>> +  int relocNew = reloc;
>> +  GElf_Ehdr ehdr;
>> +  if(ebl->elf->class == ELFCLASS64 && gelf_getehdr(ebl->elf, &ehdr) != NULL 
>> && ehdr.e_machine == EM_MIPS)
>> +relocNew = ELF64_MIPS_R_TYPE(reloc);
>> +  return ebl != NULL ? ebl->reloc_type_check (relocNew) : false;
>>  }
> This should not go into the generic ebl_reloc_type_check but has to be
> hooked so it uses a mips_reloc_type_check.
>
>> diff --git a/libebl/eblreloctypename.c b/libebl/eblreloctypename.c
>> index e53ec0c0..4276d8e3 100644
>> --- a/libebl/eblreloctypename.c
>> +++ b/libebl/eblreloctypename.c
>> @@ -33,14 +33,18 @@
>>  
>>  #include 
>>  #include 
>> -
>> +#include 
>>  
>>  const char *
>>  ebl_reloc_type_name (Ebl *ebl, int reloc, char *buf, size_t len)
>>  {
>>const char *res;
>> +  int relocNew = reloc;
>> +  GElf_Ehdr ehdr;
>> +  if(ebl->elf->class == ELFCLASS64 && gelf_getehdr(ebl->elf, &ehdr) != NULL 
>> && ehdr.e_machine == EM_MIPS)
>> +relocNew = ELF64_MIPS_R_TYPE(reloc);
>>  
>> -  res = ebl != NULL ? ebl->reloc_type_name (reloc, buf, len) : NULL;
>> +  res = ebl != NULL ? ebl->reloc_type_name (relocNew, buf, len) : NULL;
>>if (res == NULL)
>>  /* There are no generic relocation type names.  */
>>  res = "";
> Likewise for hooking reloc_type_name.
>
The function reloc_type_check and reloc_type_name were common hooks in file 
backends/common-reloc.c, so if we also need a new hook for mips and copy the 
check codes from common-reloc.c?

Thanks,

Ying


Re: [PATCH 2/5] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

2023-07-25 Thread Ying Huang
Hi Mark,

In file common-reloc.c, hook functions 
reloc_type_check/reloc_type_use/reloc_type_name have these codes:

#ifdef RELOC_TYPE_ID
  reloc = RELOC_TYPE_ID (reloc);
#endif

And the macro RELOC_TYPE_ID was defined in file backends/sparc_init.c:

/* In SPARC some relocations use the most significative 24 bits of the
   r_type field to encode a secondary addend.  Make sure the routines
   in common-reloc.c acknowledge this.  */
#define RELOC_TYPE_ID(type) ((type) & 0xff)

The contents of macro RELOC_TYPE_ID were same as ELF64_MIPS_R_TYPE(new added), 
so my view is did not add new hook for mips, if we can do like sparc?

Thanks,

Ying

在 2023/7/24 16:35, Ying Huang 写道:
> Hi Mark,
>
>>> diff --git a/libebl/eblreloctypecheck.c b/libebl/eblreloctypecheck.c
>>> index 80e67ef7..e3c43944 100644
>>> --- a/libebl/eblreloctypecheck.c
>>> +++ b/libebl/eblreloctypecheck.c
>>> @@ -32,10 +32,14 @@
>>>  #endif
>>>  
>>>  #include 
>>> -
>>> +#include 
>>>  
>>>  bool
>>>  ebl_reloc_type_check (Ebl *ebl, int reloc)
>>>  {
>>> -  return ebl != NULL ? ebl->reloc_type_check (reloc) : false;
>>> +  int relocNew = reloc;
>>> +  GElf_Ehdr ehdr;
>>> +  if(ebl->elf->class == ELFCLASS64 && gelf_getehdr(ebl->elf, &ehdr) != 
>>> NULL && ehdr.e_machine == EM_MIPS)
>>> +relocNew = ELF64_MIPS_R_TYPE(reloc);
>>> +  return ebl != NULL ? ebl->reloc_type_check (relocNew) : false;
>>>  }
>> This should not go into the generic ebl_reloc_type_check but has to be
>> hooked so it uses a mips_reloc_type_check.
>>
>>> diff --git a/libebl/eblreloctypename.c b/libebl/eblreloctypename.c
>>> index e53ec0c0..4276d8e3 100644
>>> --- a/libebl/eblreloctypename.c
>>> +++ b/libebl/eblreloctypename.c
>>> @@ -33,14 +33,18 @@
>>>  
>>>  #include 
>>>  #include 
>>> -
>>> +#include 
>>>  
>>>  const char *
>>>  ebl_reloc_type_name (Ebl *ebl, int reloc, char *buf, size_t len)
>>>  {
>>>const char *res;
>>> +  int relocNew = reloc;
>>> +  GElf_Ehdr ehdr;
>>> +  if(ebl->elf->class == ELFCLASS64 && gelf_getehdr(ebl->elf, &ehdr) != 
>>> NULL && ehdr.e_machine == EM_MIPS)
>>> +relocNew = ELF64_MIPS_R_TYPE(reloc);
>>>  
>>> -  res = ebl != NULL ? ebl->reloc_type_name (reloc, buf, len) : NULL;
>>> +  res = ebl != NULL ? ebl->reloc_type_name (relocNew, buf, len) : NULL;
>>>if (res == NULL)
>>>  /* There are no generic relocation type names.  */
>>>  res = "";
>> Likewise for hooking reloc_type_name.
>>
> The function reloc_type_check and reloc_type_name were common hooks in file 
> backends/common-reloc.c, so if we also need a new hook for mips and copy the 
> check codes from common-reloc.c?
>
> Thanks,
>
> Ying
>
>


Re: [PATCH 2/5] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

2023-07-26 Thread Ying Huang
Hi Mark,

Can we add a new file mips.h in backends, and move defines of 
ELF64_MIPS_R_TYPE/ELF64_MIPS_R_TYPE2/ELF64_MIPS_R_TYPE3 from elf.h to mips.h?

And rename the macro name ELF64_MIPS_R_TYPE to ELF64_MIPS_R_TYPE1 in mips.h? Or 
rename it directly in elf.h of glibc?

Thanks,

Ying

在 2023/7/25 16:15, Ying Huang 写道:
> Hi Mark,
>
> In file common-reloc.c, hook functions 
> reloc_type_check/reloc_type_use/reloc_type_name have these codes:
>
> #ifdef RELOC_TYPE_ID
>   reloc = RELOC_TYPE_ID (reloc);
> #endif
>
> And the macro RELOC_TYPE_ID was defined in file backends/sparc_init.c:
>
> /* In SPARC some relocations use the most significative 24 bits of the
>    r_type field to encode a secondary addend.  Make sure the routines
>    in common-reloc.c acknowledge this.  */
> #define RELOC_TYPE_ID(type) ((type) & 0xff)
>
> The contents of macro RELOC_TYPE_ID were same as ELF64_MIPS_R_TYPE(new 
> added), so my view is did not add new hook for mips, if we can do like sparc?
>
> Thanks,
>
> Ying
>
> 在 2023/7/24 16:35, Ying Huang 写道:
>> Hi Mark,
>>
>>>> diff --git a/libebl/eblreloctypecheck.c b/libebl/eblreloctypecheck.c
>>>> index 80e67ef7..e3c43944 100644
>>>> --- a/libebl/eblreloctypecheck.c
>>>> +++ b/libebl/eblreloctypecheck.c
>>>> @@ -32,10 +32,14 @@
>>>>  #endif
>>>>  
>>>>  #include 
>>>> -
>>>> +#include 
>>>>  
>>>>  bool
>>>>  ebl_reloc_type_check (Ebl *ebl, int reloc)
>>>>  {
>>>> -  return ebl != NULL ? ebl->reloc_type_check (reloc) : false;
>>>> +  int relocNew = reloc;
>>>> +  GElf_Ehdr ehdr;
>>>> +  if(ebl->elf->class == ELFCLASS64 && gelf_getehdr(ebl->elf, &ehdr) != 
>>>> NULL && ehdr.e_machine == EM_MIPS)
>>>> +relocNew = ELF64_MIPS_R_TYPE(reloc);
>>>> +  return ebl != NULL ? ebl->reloc_type_check (relocNew) : false;
>>>>  }
>>> This should not go into the generic ebl_reloc_type_check but has to be
>>> hooked so it uses a mips_reloc_type_check.
>>>
>>>> diff --git a/libebl/eblreloctypename.c b/libebl/eblreloctypename.c
>>>> index e53ec0c0..4276d8e3 100644
>>>> --- a/libebl/eblreloctypename.c
>>>> +++ b/libebl/eblreloctypename.c
>>>> @@ -33,14 +33,18 @@
>>>>  
>>>>  #include 
>>>>  #include 
>>>> -
>>>> +#include 
>>>>  
>>>>  const char *
>>>>  ebl_reloc_type_name (Ebl *ebl, int reloc, char *buf, size_t len)
>>>>  {
>>>>const char *res;
>>>> +  int relocNew = reloc;
>>>> +  GElf_Ehdr ehdr;
>>>> +  if(ebl->elf->class == ELFCLASS64 && gelf_getehdr(ebl->elf, &ehdr) != 
>>>> NULL && ehdr.e_machine == EM_MIPS)
>>>> +relocNew = ELF64_MIPS_R_TYPE(reloc);
>>>>  
>>>> -  res = ebl != NULL ? ebl->reloc_type_name (reloc, buf, len) : NULL;
>>>> +  res = ebl != NULL ? ebl->reloc_type_name (relocNew, buf, len) : NULL;
>>>>if (res == NULL)
>>>>  /* There are no generic relocation type names.  */
>>>>  res = "";
>>> Likewise for hooking reloc_type_name.
>>>
>> The function reloc_type_check and reloc_type_name were common hooks in file 
>> backends/common-reloc.c, so if we also need a new hook for mips and copy the 
>> check codes from common-reloc.c?
>>
>> Thanks,
>>
>> Ying
>>
>>


[PATCH] libelf: Sync elf.h from glibc

2023-10-13 Thread Ying Huang
From: Ying Huang 

MIPS add new ELF file header flags, new relocations and new section
type SHT_MIPS_ABIFLAGS.
---
 libelf/elf.h | 109 ++-
 1 file changed, 107 insertions(+), 2 deletions(-)

diff --git a/libelf/elf.h b/libelf/elf.h
index 9c51073f..7b4a8fe4 100644
--- a/libelf/elf.h
+++ b/libelf/elf.h
@@ -1685,11 +1685,25 @@ typedef struct
 #define EF_MIPS_PIC2 /* Contains PIC code.  */
 #define EF_MIPS_CPIC   4 /* Uses PIC calling sequence.  */
 #define EF_MIPS_XGOT   8
-#define EF_MIPS_64BIT_WHIRL16
+#define EF_MIPS_UCODE  16
 #define EF_MIPS_ABI2   32
 #define EF_MIPS_ABI_ON32   64
+#define EF_MIPS_OPTIONS_FIRST  0x0080 /* Process the .MIPS.options
+ section first by ld.  */
+#define EF_MIPS_32BITMODE  0x0100 /* Indicates code compiled for
+ a 64-bit machine in 32-bit
+ mode (regs are 32-bits
+ wide).  */
 #define EF_MIPS_FP64   512  /* Uses FP64 (12 callee-saved).  */
 #define EF_MIPS_NAN20081024  /* Uses IEEE 754-2008 NaN encoding.  */
+#define EF_MIPS_ARCH_ASE   0x0f00 /* Architectural Extensions
+ used by this file.  */
+#define EF_MIPS_ARCH_ASE_MDMX  0x0800 /* Use MDMX multimedia
+ extensions.  */
+#define EF_MIPS_ARCH_ASE_M16   0x0400 /* Use MIPS-16 ISA
+ extensions.  */
+#define EF_MIPS_ARCH_ASE_MICROMIPS 0x0200 /* Use MICROMIPS ISA
+ extensions.  */
 #define EF_MIPS_ARCH   0xf000 /* MIPS architecture level.  */
 
 /* Legal values for MIPS architecture level.  */
@@ -1703,6 +1717,38 @@ typedef struct
 #define EF_MIPS_ARCH_640x6000 /* MIPS64 code.  */
 #define EF_MIPS_ARCH_32R2  0x7000 /* MIPS32r2 code.  */
 #define EF_MIPS_ARCH_64R2  0x8000 /* MIPS64r2 code.  */
+#define EF_MIPS_ARCH_32R6  0x9000 /* MIPS32r6 code.  */
+#define EF_MIPS_ARCH_64R6  0xa000 /* MIPS64r6 code.  */
+#define EF_MIPS_ABI0xF000 /* The ABI of the file.  Also
+ see EF_MIPS_ABI2 above.  */
+#define EF_MIPS_ABI_O320x1000 /* The original o32 abi.  */
+#define EF_MIPS_ABI_O640x2000 /* O32 extended to work on
+ 64 bit architectures.  */
+#define EF_MIPS_ABI_EABI32 0x3000 /* EABI in 32 bit mode.  */
+#define EF_MIPS_ABI_EABI64 0x4000 /* EABI in 64 bit mode.  */
+#define EF_MIPS_MACH   0x00FF
+#define EF_MIPS_MACH_3900  0x0081
+#define EF_MIPS_MACH_4010  0x0082
+#define EF_MIPS_MACH_4100  0x0083
+#define EF_MIPS_MACH_ALLEGREX  0x0084
+#define EF_MIPS_MACH_4650  0x0085
+#define EF_MIPS_MACH_4120  0x0087
+#define EF_MIPS_MACH_4111  0x0088
+#define EF_MIPS_MACH_SB1   0x008a
+#define EF_MIPS_MACH_OCTEON0x008b
+#define EF_MIPS_MACH_XLR   0x008c
+#define EF_MIPS_MACH_OCTEON2   0x008d
+#define EF_MIPS_MACH_OCTEON3   0x008e
+#define EF_MIPS_MACH_5400  0x0091
+#define EF_MIPS_MACH_5900  0x0092
+#define EF_MIPS_MACH_IAMR2 0x0093
+#define EF_MIPS_MACH_5500  0x0098
+#define EF_MIPS_MACH_9000  0x0099
+#define EF_MIPS_MACH_LS2E  0x00A0
+#define EF_MIPS_MACH_LS2F  0x00A1
+#define EF_MIPS_MACH_GS464 0x00A2
+#define EF_MIPS_MACH_GS464E0x00A3
+#define EF_MIPS_MACH_GS264E0x00A4
 
 /* The following are unofficial names and should not be used.  */
 
@@ -1763,6 +1809,7 @@ typedef struct
 #define SHT_MIPS_EH_REGION 0x7027
 #define SHT_MIPS_XLATE_OLD 0x7028
 #define SHT_MIPS_PDR_EXCEPTION 0x7029
+#define SHT_MIPS_ABIFLAGS  0x702a
 #define SHT_MIPS_XHASH 0x702b
 
 /* Legal values for sh_flags field of Elf32_Shdr.  */
@@ -1931,10 +1978,68 @@ typedef struct
 #define R_MIPS_TLS_TPREL_HI16  49  /* TP-relative offset, high 16 bits */
 #define R_MIPS_TLS_TPREL_LO16  50  /* TP-relative offset, low 16 bits */
 #define R_MIPS_GLOB_DAT51
+#define R_MIPS_PC21_S2 60
+#define R_MIPS_PC26_S2 61
+#define R_MIPS_PC18_S3 62
+#define R_MIPS_PC19_S2 63
+#define R_MIPS_PCHI16  64
+#define R_MIPS_PCLO16  65
+#define R_MIPS16_26100
+#define R_MIPS16_GPREL 101
+#define R_MIPS16_GOT16 102
+#define R_MIPS16_CALL16103
+#define R_MIPS16_HI16  104
+#define R_MIPS16_LO16  105
+#define R_MIPS16_TLS_GD106
+#define R_MIPS16_TLS_LDM   107
+#define R_MIPS16_TLS_DTPREL_HI16   108
+#define

[PATCH v2 0/5] Add support for MIPS

2023-11-01 Thread Ying Huang
This is a series of modifications about MIPS.
Support src/readelf, strip, elflint, objdump related tools.

Pass all previous test cases that failed due to MIPS non-support.
The following are the test results on mips64el.
# TOTAL: 271
# PASS:  263
# SKIP:  8
# XFAIL: 0
# FAIL:  0
# XPASS: 0
# ERROR: 0


[PATCH v2 4/5] stack: Fix stack unwind failure on mips

2023-11-01 Thread Ying Huang
From: Ying Huang 

Add abi_cfi, set_initial_registers_tid, unwind on mips.
---
 backends/Makefile.am|  3 +-
 backends/mips_cfi.c | 68 +
 backends/mips_init.c|  4 ++
 backends/mips_initreg.c | 61 ++
 backends/mips_unwind.c  | 84 +
 5 files changed, 219 insertions(+), 1 deletion(-)
 create mode 100644 backends/mips_cfi.c
 create mode 100644 backends/mips_initreg.c
 create mode 100644 backends/mips_unwind.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index ad95526e..5e7b7f21 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -102,7 +102,8 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
loongarch_cfi.c \
 
 arc_SRCS = arc_init.c arc_symbol.c
 
-mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c
+mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c mips_initreg.c \
+   mips_cfi.c mips_unwind.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_cfi.c b/backends/mips_cfi.c
new file mode 100644
index ..64cee1a9
--- /dev/null
+++ b/backends/mips_cfi.c
@@ -0,0 +1,68 @@
+/* MIPS ABI-specified defaults for DWARF CFI.
+   Copyright (C) 2009 Red Hat, Inc.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+
+#define BACKEND mips_
+#include "libebl_CPU.h"
+
+int
+mips_abi_cfi (Ebl *ebl __attribute__ ((unused)), Dwarf_CIE *abi_info)
+{
+  static const uint8_t abi_cfi[] =
+{
+  DW_CFA_def_cfa, ULEB128_7 (31), ULEB128_7 (0),
+  /* Callee-saved regs.  */
+  DW_CFA_same_value, ULEB128_7 (16), /* s0 */
+  DW_CFA_same_value, ULEB128_7 (17), /* s1 */
+  DW_CFA_same_value, ULEB128_7 (18), /* s2 */
+  DW_CFA_same_value, ULEB128_7 (19), /* s3 */
+  DW_CFA_same_value, ULEB128_7 (20), /* s4 */
+  DW_CFA_same_value, ULEB128_7 (21), /* s5 */
+  DW_CFA_same_value, ULEB128_7 (22), /* s6 */
+  DW_CFA_same_value, ULEB128_7 (23), /* s7 */
+  DW_CFA_same_value, ULEB128_7 (28), /* gp */
+  DW_CFA_same_value, ULEB128_7 (29), /* sp */
+  DW_CFA_same_value, ULEB128_7 (30), /* fp */
+
+  DW_CFA_val_offset, ULEB128_7 (29), ULEB128_7 (0),
+};
+
+  abi_info->initial_instructions = abi_cfi;
+  abi_info->initial_instructions_end = &abi_cfi[sizeof abi_cfi];
+  abi_info->data_alignment_factor = 8;
+
+  abi_info->return_address_register = 31; /* %ra */
+
+  return 0;
+}
diff --git a/backends/mips_init.c b/backends/mips_init.c
index e883b7e4..a6ed8a47 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -58,5 +58,9 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, check_object_attribute);
   HOOK (eh, check_special_symbol);
   HOOK (eh, check_reloc_target_type);
+  HOOK (eh, set_initial_registers_tid);
+  HOOK (eh, abi_cfi);
+  HOOK (eh, unwind);
+  eh->frame_nregs = 71;
   return eh;
 }
diff --git a/backends/mips_initreg.c b/backends/mips_initreg.c
new file mode 100644
index ..87c879f5
--- /dev/null
+++ b/backends/mips_initreg.c
@@ -0,0 +1,61 @@
+/* Fetch live process registers from TID.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPO

[PATCH v2 1/5] strip: Adapt src/strip -o -f on mips

2023-11-01 Thread Ying Huang
From: Ying Huang 

In mips64 little-endian, r_info consists of four byte fields(contains
three reloc types) and a 32-bit symbol index. In order to adapt
GELF_R_SYM and GELF_R_TYPE, need convert raw data to get correct symbol
index and type.

  libelf/elf_getdata.c: Some eu-utils use read-mmap method to map file,
so we need to malloc and memcpy raw data to avoid segment fault. After
modification, the correct value are saved in the malloced memory not in
process address space.
  libelf/elf_updata.c: Because we converted the relocation info in mips
order when we call elf_getdata.c, so we need to convert the modified data
in original order bits before writing the data to the file.
---
 backends/Makefile.am|   6 +-
 backends/mips_init.c|  52 
 backends/mips_reloc.def |  93 
 backends/mips_symbol.c  |  63 +++
 libebl/eblopenbackend.c |   2 +
 libelf/elf_getdata.c| 132 +++-
 libelf/elf_update.c |  53 
 libelf/libelfP.h|   3 +
 8 files changed, 400 insertions(+), 4 deletions(-)
 create mode 100644 backends/mips_init.c
 create mode 100644 backends/mips_reloc.def
 create mode 100644 backends/mips_symbol.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index bbb2aac7..b946fd30 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -37,7 +37,7 @@ AM_CPPFLAGS += -I$(top_srcdir)/libebl -I$(top_srcdir)/libasm \
 noinst_LIBRARIES = libebl_backends.a libebl_backends_pic.a
 
 modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \
- m68k bpf riscv csky loongarch arc
+ m68k bpf riscv csky loongarch arc mips
 
 i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \
i386_retval.c i386_regs.c i386_auxv.c \
@@ -102,12 +102,14 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
loongarch_cfi.c \
 
 arc_SRCS = arc_init.c arc_symbol.c
 
+mips_SRCS = mips_init.c mips_symbol.c
+
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
$(aarch64_SRCS) $(sparc_SRCS) $(ppc_SRCS) \
$(ppc64_SRCS) $(s390_SRCS) \
$(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) $(csky_SRCS) 
\
-   $(loongarch_SRCS) $(arc_SRCS)
+   $(loongarch_SRCS) $(arc_SRCS) $(mips_SRCS)
 
 libebl_backends_pic_a_SOURCES =
 am_libebl_backends_pic_a_OBJECTS = $(libebl_backends_a_SOURCES:.c=.os)
diff --git a/backends/mips_init.c b/backends/mips_init.c
new file mode 100644
index ..e26da609
--- /dev/null
+++ b/backends/mips_init.c
@@ -0,0 +1,52 @@
+/* Initialization of MIPS specific backend library.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#define BACKENDmips_
+#define RELOC_PREFIX   R_MIPS_
+#include "libebl_CPU.h"
+#include "libelfP.h"
+
+#define RELOC_TYPE_ID(type) ((type) & 0xff)
+
+/* This defines the common reloc hooks based on mips_reloc.def.  */
+#include "common-reloc.c"
+
+Ebl *
+mips_init (Elf *elf __attribute__ ((unused)),
+  GElf_Half machine __attribute__ ((unused)),
+  Ebl *eh)
+{
+  /* We handle it.  */
+  mips_init_reloc (eh);
+  HOOK (eh, reloc_simple_type);
+  return eh;
+}
diff --git a/backends/mips_reloc.def b/backends/mips_reloc.def
new file mode 100644
index ..8cb66a54
--- /dev/null
+++ b/backends/mips_reloc.def
@@ -0,0 +1,93 @@
+/* List the relocation types for MIPS.  -*- C -*-
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+

[PATCH v2 3/5] elflint: adapt src/elflint --gnu src/nm on mips

2023-11-01 Thread Ying Huang
From: Ying Huang 

The errors were:
$ src/elflint --gnu src/nm
section [ 2] '.MIPS.options' contains unknown flag(s) 0x800
section [ 7] '.dynsym': symbol 165 (_DYNAMIC_LINKING): non-local section symbol
section [24] '.got' contains invalid processor-specific flag(s) 0x1000
section [25] '.sdata' contains invalid processor-specific flag(s) 0x1000
section [29] '.debug_aranges' has wrong type: expected PROGBITS, is MIPS_DWARF
section [30] '.debug_info' has wrong type: expected PROGBITS, is MIPS_DWARF
section [31] '.debug_abbrev' has wrong type: expected PROGBITS, is MIPS_DWARF
section [32] '.debug_line' has wrong type: expected PROGBITS, is MIPS_DWARF
section [33] '.debug_frame' has wrong type: expected PROGBITS, is MIPS_DWARF
section [34] '.debug_str' has wrong type: expected PROGBITS, is MIPS_DWARF
section [35] '.debug_loc' has wrong type: expected PROGBITS, is MIPS_DWARF
section [36] '.debug_ranges' has wrong type: expected PROGBITS, is MIPS_DWARF
section [38] '.symtab': symbol 785 (_gp): st_value out of bounds
section [38] '.symtab': symbol 910 (_fbss): st_value out of bounds
section [38] '.symtab': symbol 1051 (_DYNAMIC_LINKING): non-local section symbol

After fixing:
$ src/elflint --gnu src/nm
No errors
---
 backends/mips_init.c   |  3 +++
 backends/mips_symbol.c | 37 +
 src/elflint.c  | 26 +-
 3 files changed, 61 insertions(+), 5 deletions(-)

diff --git a/backends/mips_init.c b/backends/mips_init.c
index 905d97eb..e883b7e4 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -51,9 +51,12 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, section_type_name);
   HOOK (eh, machine_flag_check);
   HOOK (eh, machine_flag_name);
+  HOOK (eh, machine_section_flag_check);
   HOOK (eh, segment_type_name);
   HOOK (eh, dynamic_tag_check);
   HOOK (eh, dynamic_tag_name);
   HOOK (eh, check_object_attribute);
+  HOOK (eh, check_special_symbol);
+  HOOK (eh, check_reloc_target_type);
   return eh;
 }
diff --git a/backends/mips_symbol.c b/backends/mips_symbol.c
index 6418a01d..1e3d55c4 100644
--- a/backends/mips_symbol.c
+++ b/backends/mips_symbol.c
@@ -158,6 +158,43 @@ mips_section_type_name (int type,
   return NULL;
 }
 
+bool
+mips_check_reloc_target_type (Ebl *ebl __attribute__ ((unused)), Elf64_Word 
sh_type)
+{
+  return (sh_type == SHT_MIPS_DWARF);
+}
+
+/* Check whether given symbol's st_value and st_size are OK despite failing
+   normal checks.  */
+bool
+mips_check_special_symbol (Elf *elf,
+   const GElf_Sym *sym __attribute__ ((unused)),
+   const char *name __attribute__ ((unused)),
+   const GElf_Shdr *destshdr)
+{
+  size_t shstrndx;
+  if (elf_getshdrstrndx (elf, &shstrndx) != 0)
+return false;
+  const char *sname = elf_strptr (elf, shstrndx, destshdr->sh_name);
+  if (sname == NULL)
+return false;
+  return (strcmp (sname, ".got") == 0 || strcmp (sname, ".bss") == 0);
+}
+
+/* Check whether SHF_MASKPROC flags are valid.  */
+bool
+mips_machine_section_flag_check (GElf_Xword sh_flags)
+{
+  return ((sh_flags &~ (SHF_MIPS_GPREL |
+   SHF_MIPS_MERGE |
+   SHF_MIPS_ADDR |
+   SHF_MIPS_STRINGS |
+   SHF_MIPS_NOSTRIP |
+   SHF_MIPS_LOCAL |
+   SHF_MIPS_NAMES |
+   SHF_MIPS_NODUPE)) == 0);
+}
+
 /* Check whether machine flags are valid.  */
 bool
 mips_machine_flag_check (GElf_Word flags)
diff --git a/src/elflint.c b/src/elflint.c
index 864de710..092409a2 100644
--- a/src/elflint.c
+++ b/src/elflint.c
@@ -936,7 +936,9 @@ section [%2d] '%s': symbol %zu (%s): non-local symbol 
outside range described in
}
 
   if (GELF_ST_TYPE (sym->st_info) == STT_SECTION
- && GELF_ST_BIND (sym->st_info) != STB_LOCAL)
+ && GELF_ST_BIND (sym->st_info) != STB_LOCAL
+ && ehdr->e_machine != EM_MIPS
+ && strcmp (name, "_DYNAMIC_LINKING") != 0)
ERROR (_("\
 section [%2d] '%s': symbol %zu (%s): non-local section symbol\n"),
   idx, section_name (ebl, idx), cnt, name);
@@ -3828,6 +3830,10 @@ cannot get section header for section [%2zu] '%s': 
%s\n"),
&& ebl_bss_plt_p (ebl))
  good_type = SHT_NOBITS;
 
+   if (ehdr->e_machine == EM_MIPS
+   && (strstr(special_sections[s].name, ".debug") != NULL))
+ good_type = SHT_MIPS_DWARF;
+
/* In a debuginfo file, any normal section can be SHT_NOBITS.
 

[PATCH v2 2/5] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

2023-11-01 Thread Ying Huang
From: Ying Huang 

-h: support show Flags name
-S: support show mips related section type
-r: support show type of Relocation section
-w: can work and can show correct "strp" contents
-l: support show mips related program header entry type
-d: can show mips related Dynamic type name
-a: support show complete Object attribute section ".gnu.attributes"

Also add test/run-readelf-reloc.sh file to test new type2/type3 of
src/readelf -r.
---
 backends/Makefile.am   |   2 +-
 backends/mips_attrs.c  | 140 +
 backends/mips_init.c   |   7 +
 backends/mips_symbol.c | 571 +
 libelf/libelfP.h   |   1 +
 src/readelf.c  | 188 +---
 tests/Makefile.am  |   4 +-
 tests/run-readelf-reloc.sh |  42 +++
 8 files changed, 906 insertions(+), 49 deletions(-)
 create mode 100644 backends/mips_attrs.c
 create mode 100755 tests/run-readelf-reloc.sh

diff --git a/backends/Makefile.am b/backends/Makefile.am
index b946fd30..ad95526e 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -102,7 +102,7 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
loongarch_cfi.c \
 
 arc_SRCS = arc_init.c arc_symbol.c
 
-mips_SRCS = mips_init.c mips_symbol.c
+mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_attrs.c b/backends/mips_attrs.c
new file mode 100644
index ..950047c3
--- /dev/null
+++ b/backends/mips_attrs.c
@@ -0,0 +1,140 @@
+/* Object attribute tags for MIPS.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+#include 
+
+#define BACKEND mips_
+#include "libebl_CPU.h"
+
+#define KNOWN_VALUES(...) do   \
+  {\
+static const char *table[] = { __VA_ARGS__ };  \
+if (value < sizeof table / sizeof table[0])\
+  *value_name = table[value];  \
+  } while (0)
+
+//copy gnu attr tags from binutils-2.34/elfcpp/mips.h
+/* Object attribute tags.  */
+enum
+{
+  /* 0-3 are generic.  */
+
+  /* Floating-point ABI used by this object file.  */
+  Tag_GNU_MIPS_ABI_FP = 4,
+
+  /* MSA ABI used by this object file.  */
+  Tag_GNU_MIPS_ABI_MSA = 8,
+};
+
+/* Object attribute values.  */
+enum
+{
+  /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
+
+  /* Not tagged or not using any ABIs affected by the differences.  */
+  Val_GNU_MIPS_ABI_MSA_ANY = 0,
+
+  /* Using 128-bit MSA.  */
+  Val_GNU_MIPS_ABI_MSA_128 = 1,
+};
+
+/* Object attribute values.  */
+enum
+{
+  /* This is reserved for backward-compatibility with an earlier
+ implementation of the MIPS NaN2008 functionality.  */
+  Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
+};
+
+/* copy binutils-2.34/binutils/readelf.c display_mips_gnu_attribute */
+bool
+mips_check_object_attribute (Ebl *ebl __attribute__ ((unused)),
+   const char *vendor, int tag, uint64_t value,
+   const char **tag_name, const char **value_name)
+{
+  if (!strcmp (vendor, "gnu"))
+switch (tag)
+  {
+  case Tag_GNU_MIPS_ABI_FP:
+   *tag_name = "Tag_GNU_MIPS_ABI_FP";
+   switch (value)
+   {
+ case Val_GNU_MIPS_ABI_FP_ANY:
+   *value_name = "Hard or soft float";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_DOUBLE:
+   *value_name = "Hard float (double precision)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_SINGLE:
+   *value_name = "Hard float (single precision)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_SOFT:
+   *value_name = "Soft float";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_OLD_64:
+   *value_name = "Hard floa

[PATCH v2 5/5] backends: Add register_info, return_value_location, core_note function on mips

2023-11-01 Thread Ying Huang
From: Ying Huang 

---
 backends/Makefile.am |   3 +-
 backends/mips_corenote.c |  85 +
 backends/mips_init.c |   3 +
 backends/mips_regs.c | 135 +++
 backends/mips_retval.c   | 196 +++
 5 files changed, 421 insertions(+), 1 deletion(-)
 create mode 100644 backends/mips_corenote.c
 create mode 100644 backends/mips_regs.c
 create mode 100644 backends/mips_retval.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index 5e7b7f21..7c7f3351 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -103,7 +103,8 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
loongarch_cfi.c \
 arc_SRCS = arc_init.c arc_symbol.c
 
 mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c mips_initreg.c \
-   mips_cfi.c mips_unwind.c
+   mips_cfi.c mips_unwind.c mips_regs.c mips_retval.c \
+   mips_corenote.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_corenote.c b/backends/mips_corenote.c
new file mode 100644
index ..44e30e3e
--- /dev/null
+++ b/backends/mips_corenote.c
@@ -0,0 +1,85 @@
+/* MIPS specific core note handling.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define BACKENDmips_
+#include "libebl_CPU.h"
+
+#define BITS 64
+#ifndef BITS
+# define BITS  32
+#else
+# define BITS  64
+#endif
+
+#define PRSTATUS_REGS_SIZE (45 * (BITS / 8))
+static const Ebl_Register_Location prstatus_regs[] =
+  {
+{ .offset = 0, .regno = 0, .count = (BITS == 32 ? 40 : 34), .bits = BITS },
+{ .offset = BITS/8 * (BITS == 32 ? 41 : 35), .regno = (BITS == 32 ? 41 : 
35), .count = (BITS == 32 ? 4 : 10), .bits = BITS },
+  };
+
+#define PRSTATUS_REGSET_ITEMS  \
+  {\
+.name = "pc", .type = ELF_T_ADDR, .format = 'x',   \
+.offset = offsetof (struct EBLHOOK(prstatus), pr_reg) + ((BITS/8) * (BITS 
== 32 ? 40 : 34)),   \
+.group = "register",   \
+.pc_register = true
\
+  }
+
+#if BITS == 32
+# define ULONG uint32_t
+# define ALIGN_ULONG   4
+# define TYPE_ULONGELF_T_WORD
+#define TYPE_LONG  ELF_T_SWORD
+#else
+#define ULONG  uint64_t
+#define ALIGN_ULONG8
+#define TYPE_ULONG ELF_T_XWORD
+#define TYPE_LONG  ELF_T_SXWORD
+#endif
+#define PID_T  int32_t
+#defineUID_T   uint32_t
+#defineGID_T   uint32_t
+#define ALIGN_PID_T4
+#define ALIGN_UID_T4
+#define ALIGN_GID_T4
+#define TYPE_PID_T ELF_T_SWORD
+#define TYPE_UID_T ELF_T_WORD
+#define TYPE_GID_T ELF_T_WORD
+
+#include "linux-core-note.c"
diff --git a/backends/mips_init.c b/backends/mips_init.c
index a6ed8a47..e5617f0f 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -61,6 +61,9 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, set_initial_registers_tid);
   HOOK (eh, abi_cfi);
   HOOK (eh, unwind);
+  HOOK (eh, register_info);
+  HOOK (eh, return_value_location);
+  HOOK (eh, core_note);
   eh->frame_nregs = 71;
   return eh;
 }
diff --git a/backends/mips_regs.c b/backends/mips_regs.c
new file mode 100644
index ..28fe7cae
--- /dev/null
+++ b/backends/mips_regs.c
@@ -0,0 +1,135 @@
+/* Register names and numbers for mips DWARF.
+   Copyright (C) 2006 Red Hat, Inc.
+   Copyright (C) 2023 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can red

Re: [PATCH v2 0/5] Add support for MIPS

2023-11-08 Thread Ying Huang
Hi,

在 2023/11/3 19:56, Mark Wielaard 写道:
> Hi Yimg,
>
> On Thu, 2023-11-02 at 14:55 +0800, Ying Huang wrote:
>> This is a series of modifications about MIPS.
>> Support src/readelf, strip, elflint, objdump related tools.
> Thanks. What are the changes compared to v1?
> https://patchwork.sourceware.org/project/elfutils/list/?series=18813
>
>> Pass all previous test cases that failed due to MIPS non-support.
>> The following are the test results on mips64el.
>> # TOTAL: 271
>> # PASS:  263
>> # SKIP:  8
>> # XFAIL: 0
>> # FAIL:  0
>> # XPASS: 0
>> # ERROR: 0
> That looks pretty good. What distro/gcc/glibc/kernel was this against?
>
> Cheers,
>
> Mark

Debian GNU/Linux 11

gcc version 12.2.0

glibc  2.36-9

kernel version 5.10.0-22-loongson-3


Thanks,

Ying


Re: [PATCH v2 0/5] Add support for MIPS

2023-11-28 Thread Ying Huang
Ping


Thanks,

Ying


在 2023/11/9 11:00, Ying Huang 写道:
> Hi,
>
> 在 2023/11/3 19:56, Mark Wielaard 写道:
>> Hi Yimg,
>>
>> On Thu, 2023-11-02 at 14:55 +0800, Ying Huang wrote:
>>> This is a series of modifications about MIPS.
>>> Support src/readelf, strip, elflint, objdump related tools.
>> Thanks. What are the changes compared to v1?
>> https://patchwork.sourceware.org/project/elfutils/list/?series=18813
>>
>>> Pass all previous test cases that failed due to MIPS non-support.
>>> The following are the test results on mips64el.
>>> # TOTAL: 271
>>> # PASS:  263
>>> # SKIP:  8
>>> # XFAIL: 0
>>> # FAIL:  0
>>> # XPASS: 0
>>> # ERROR: 0
>> That looks pretty good. What distro/gcc/glibc/kernel was this against?
>>
>> Cheers,
>>
>> Mark
> Debian GNU/Linux 11
>
> gcc version 12.2.0
>
> glibc  2.36-9
>
> kernel version 5.10.0-22-loongson-3
>
>
> Thanks,
>
> Ying


Re: [PATCH v2 0/5] Add support for MIPS

2023-12-18 Thread Ying Huang
Ping


Thanks,

Ying


在 2023/11/29 15:40, Ying Huang 写道:
> Ping
>
>
> Thanks,
>
> Ying
>
>
> 在 2023/11/9 11:00, Ying Huang 写道:
>> Hi,
>>
>> 在 2023/11/3 19:56, Mark Wielaard 写道:
>>> Hi Yimg,
>>>
>>> On Thu, 2023-11-02 at 14:55 +0800, Ying Huang wrote:
>>>> This is a series of modifications about MIPS.
>>>> Support src/readelf, strip, elflint, objdump related tools.
>>> Thanks. What are the changes compared to v1?
>>> https://patchwork.sourceware.org/project/elfutils/list/?series=18813
>>>
>>>> Pass all previous test cases that failed due to MIPS non-support.
>>>> The following are the test results on mips64el.
>>>> # TOTAL: 271
>>>> # PASS:  263
>>>> # SKIP:  8
>>>> # XFAIL: 0
>>>> # FAIL:  0
>>>> # XPASS: 0
>>>> # ERROR: 0
>>> That looks pretty good. What distro/gcc/glibc/kernel was this against?
>>>
>>> Cheers,
>>>
>>> Mark
>> Debian GNU/Linux 11
>>
>> gcc version 12.2.0
>>
>> glibc  2.36-9
>>
>> kernel version 5.10.0-22-loongson-3
>>
>>
>> Thanks,
>>
>> Ying


Re: [PATCH v2 0/5] Add support for MIPS

2023-12-29 Thread Ying Huang
Ping


Thanks,

Ying.

> Pass all previous test cases that failed due to MIPS non-support.
> The following are the test results on mips64el.
> # TOTAL: 271
> # PASS:  263
> # SKIP:  8
> # XFAIL: 0
> # FAIL:  0
> # XPASS: 0
> # ERROR: 0
 That looks pretty good. What distro/gcc/glibc/kernel was this against?

 Cheers,

 Mark
>>> Debian GNU/Linux 11
>>>
>>> gcc version 12.2.0
>>>
>>> glibc  2.36-9
>>>
>>> kernel version 5.10.0-22-loongson-3
>>>
>>>
>>> Thanks,
>>>
>>> Ying


Re: [PATCH v2 0/5] Add support for MIPS

2024-01-23 Thread Ying Huang
Ping,

Thanks.


在 2023/11/9 11:00, Ying Huang 写道:
> Hi,
>
> 在 2023/11/3 19:56, Mark Wielaard 写道:
>> Hi Yimg,
>>
>> On Thu, 2023-11-02 at 14:55 +0800, Ying Huang wrote:
>>> This is a series of modifications about MIPS.
>>> Support src/readelf, strip, elflint, objdump related tools.
>> Thanks. What are the changes compared to v1?
>> https://patchwork.sourceware.org/project/elfutils/list/?series=18813
>>
>>> Pass all previous test cases that failed due to MIPS non-support.
>>> The following are the test results on mips64el.
>>> # TOTAL: 271
>>> # PASS:  263
>>> # SKIP:  8
>>> # XFAIL: 0
>>> # FAIL:  0
>>> # XPASS: 0
>>> # ERROR: 0
>> That looks pretty good. What distro/gcc/glibc/kernel was this against?
>>
>> Cheers,
>>
>> Mark
> Debian GNU/Linux 11
>
> gcc version 12.2.0
>
> glibc  2.36-9
>
> kernel version 5.10.0-22-loongson-3
>
>
> Thanks,
>
> Ying


Re: [PATCH v2 0/5] Add support for MIPS

2024-02-03 Thread Ying Huang
Hi Mark,

The email responded to the question you aksed last time about the test 
environment.   Patch v2 has modified all the questions you asked in the patch 
v1.

Could you help reivew it again when you have time? If you have any questions, 
please feel free to let me konw.

Thanks,

Ying


在 2024/1/23 16:21, Ying Huang 写道:
> Ping,
>
> Thanks.
>
>
> 在 2023/11/9 11:00, Ying Huang 写道:
>> Hi,
>>
>> 在 2023/11/3 19:56, Mark Wielaard 写道:
>>> Hi Yimg,
>>>
>>> On Thu, 2023-11-02 at 14:55 +0800, Ying Huang wrote:
>>>> This is a series of modifications about MIPS.
>>>> Support src/readelf, strip, elflint, objdump related tools.
>>> Thanks. What are the changes compared to v1?
>>> https://patchwork.sourceware.org/project/elfutils/list/?series=18813
>>>
>>>> Pass all previous test cases that failed due to MIPS non-support.
>>>> The following are the test results on mips64el.
>>>> # TOTAL: 271
>>>> # PASS:  263
>>>> # SKIP:  8
>>>> # XFAIL: 0
>>>> # FAIL:  0
>>>> # XPASS: 0
>>>> # ERROR: 0
>>> That looks pretty good. What distro/gcc/glibc/kernel was this against?
>>>
>>> Cheers,
>>>
>>> Mark
>> Debian GNU/Linux 11
>>
>> gcc version 12.2.0
>>
>> glibc  2.36-9
>>
>> kernel version 5.10.0-22-loongson-3
>>
>>
>> Thanks,
>>
>> Ying


Re: [PATCH v2 1/5] strip: Adapt src/strip -o -f on mips

2024-02-17 Thread Ying Huang
Hi  Mark,

在 2024/2/10 08:20, Mark Wielaard 写道:
> Hi Ying,
>
> Sorry I keep postponing this. I don't have access to a mips64le box,
> the cfarm only has 64bit big endian mips machines. But the part I am
> struggling with is the relocation data conversion needed in the
> mips64le case.
>
> On Fri, Nov 03, 2023 at 01:18:12PM +0100, Mark Wielaard wrote:
>> On Thu, 2023-11-02 at 14:55 +0800, Ying Huang wrote:
>>> In mips64 little-endian, r_info consists of four byte fields(contains
>>> three reloc types) and a 32-bit symbol index. In order to adapt
>>> GELF_R_SYM and GELF_R_TYPE, need convert raw data to get correct symbol
>>> index and type.
>> This part and the new backends hooks look OK.
> So to make progress could you split this part?  Just a patch that adds
> the initial mips backend (and the libebl and libelfP.h parts). And
> another that introduces the libelf/elf_update and elf_getdata parts?
OK, I would split it as you advised and submit patch v3.
> Also could you take a look at CONTRIBUTING
> https://sourceware.org/cgit/elfutils/tree/CONTRIBUTING
> And provide a Signed-off-by line if you can/agree with that?

OK.

>
> Which MIPS variant(s) have you tested this against?  Is it supposed to
> only work for mips64le? Or also maps64[be] and/or mips32 bits?

I had tested patch v2 on mips64el, mips32el/be, arm64, amd64, i386,  and did 
not produce new fail tests.

Only the part about 'the relocation data conversion' work for mips64el.

Thanks,

Ying


[PATCH v3 0/6] Add support for MIPS

2024-03-05 Thread Ying Huang
Pass all previous test cases that failed due to MIPS non-support.
The following are the test results on mips64el:
# TOTAL: 274
# PASS:  267
# SKIP:  7
# XFAIL: 0
# FAIL:  0
# XPASS: 0
# ERROR: 0


[PATCH v3 1/6] Support Mips architecture

2024-03-05 Thread Ying Huang
From: Ying Huang 

Signed-off-by: Ying Huang 
---
 backends/Makefile.am|   6 +-
 backends/mips_init.c|  52 
 backends/mips_reloc.def |  93 +++
 backends/mips_symbol.c  |  63 +
 libebl/eblopenbackend.c |   2 +
 libelf/libelfP.h|   3 +
 tests/libelf.h  | 541 
 7 files changed, 758 insertions(+), 2 deletions(-)
 create mode 100644 backends/mips_init.c
 create mode 100644 backends/mips_reloc.def
 create mode 100644 backends/mips_symbol.c
 create mode 100644 tests/libelf.h

diff --git a/backends/Makefile.am b/backends/Makefile.am
index bbb2aac7..b946fd30 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -37,7 +37,7 @@ AM_CPPFLAGS += -I$(top_srcdir)/libebl -I$(top_srcdir)/libasm \
 noinst_LIBRARIES = libebl_backends.a libebl_backends_pic.a
 
 modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \
- m68k bpf riscv csky loongarch arc
+ m68k bpf riscv csky loongarch arc mips
 
 i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \
i386_retval.c i386_regs.c i386_auxv.c \
@@ -102,12 +102,14 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
loongarch_cfi.c \
 
 arc_SRCS = arc_init.c arc_symbol.c
 
+mips_SRCS = mips_init.c mips_symbol.c
+
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
$(aarch64_SRCS) $(sparc_SRCS) $(ppc_SRCS) \
$(ppc64_SRCS) $(s390_SRCS) \
$(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) $(csky_SRCS) 
\
-   $(loongarch_SRCS) $(arc_SRCS)
+   $(loongarch_SRCS) $(arc_SRCS) $(mips_SRCS)
 
 libebl_backends_pic_a_SOURCES =
 am_libebl_backends_pic_a_OBJECTS = $(libebl_backends_a_SOURCES:.c=.os)
diff --git a/backends/mips_init.c b/backends/mips_init.c
new file mode 100644
index ..cedd08ca
--- /dev/null
+++ b/backends/mips_init.c
@@ -0,0 +1,52 @@
+/* Initialization of MIPS specific backend library.
+   Copyright (C) 2024 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#define BACKENDmips_
+#define RELOC_PREFIX   R_MIPS_
+#include "libebl_CPU.h"
+#include "libelfP.h"
+
+#define RELOC_TYPE_ID(type) ((type) & 0xff)
+
+/* This defines the common reloc hooks based on mips_reloc.def.  */
+#include "common-reloc.c"
+
+Ebl *
+mips_init (Elf *elf __attribute__ ((unused)),
+  GElf_Half machine __attribute__ ((unused)),
+  Ebl *eh)
+{
+  /* We handle it.  */
+  mips_init_reloc (eh);
+  HOOK (eh, reloc_simple_type);
+  return eh;
+}
diff --git a/backends/mips_reloc.def b/backends/mips_reloc.def
new file mode 100644
index ..5120980c
--- /dev/null
+++ b/backends/mips_reloc.def
@@ -0,0 +1,93 @@
+/* List the relocation types for MIPS.  -*- C -*-
+   Copyright (C) 2024 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+/* NAME, 

[PATCH v3 3/6] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

2024-03-05 Thread Ying Huang
From: Ying Huang 

-h: support show Flags name
-S: support show mips related section type
-r: support show type of Relocation section
-w: can work and can show correct "strp" contents
-l: support show mips related program header entry type
-d: can show mips related Dynamic type name
-a: support show complete Object attribute section ".gnu.attributes"

Also add test/run-readelf-reloc.sh file to test new type2/type3 of
src/readelf -r.

Signed-off-by: Ying Huang 
---
 backends/Makefile.am   |   2 +-
 backends/mips_attrs.c  | 140 +
 backends/mips_init.c   |   7 +
 backends/mips_symbol.c | 571 +
 libelf/libelfP.h   |   1 +
 src/readelf.c  | 188 +---
 tests/Makefile.am  |   5 +-
 tests/run-readelf-reloc.sh |  42 +++
 8 files changed, 907 insertions(+), 49 deletions(-)
 create mode 100644 backends/mips_attrs.c
 create mode 100755 tests/run-readelf-reloc.sh

diff --git a/backends/Makefile.am b/backends/Makefile.am
index b946fd30..ad95526e 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -102,7 +102,7 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
loongarch_cfi.c \
 
 arc_SRCS = arc_init.c arc_symbol.c
 
-mips_SRCS = mips_init.c mips_symbol.c
+mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_attrs.c b/backends/mips_attrs.c
new file mode 100644
index ..54fd3ce3
--- /dev/null
+++ b/backends/mips_attrs.c
@@ -0,0 +1,140 @@
+/* Object attribute tags for MIPS.
+   Copyright (C) 2024 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+#include 
+
+#define BACKEND mips_
+#include "libebl_CPU.h"
+
+#define KNOWN_VALUES(...) do   \
+  {\
+static const char *table[] = { __VA_ARGS__ };  \
+if (value < sizeof table / sizeof table[0])\
+  *value_name = table[value];  \
+  } while (0)
+
+//copy gnu attr tags from binutils-2.34/elfcpp/mips.h
+/* Object attribute tags.  */
+enum
+{
+  /* 0-3 are generic.  */
+
+  /* Floating-point ABI used by this object file.  */
+  Tag_GNU_MIPS_ABI_FP = 4,
+
+  /* MSA ABI used by this object file.  */
+  Tag_GNU_MIPS_ABI_MSA = 8,
+};
+
+/* Object attribute values.  */
+enum
+{
+  /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
+
+  /* Not tagged or not using any ABIs affected by the differences.  */
+  Val_GNU_MIPS_ABI_MSA_ANY = 0,
+
+  /* Using 128-bit MSA.  */
+  Val_GNU_MIPS_ABI_MSA_128 = 1,
+};
+
+/* Object attribute values.  */
+enum
+{
+  /* This is reserved for backward-compatibility with an earlier
+ implementation of the MIPS NaN2008 functionality.  */
+  Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
+};
+
+/* copy binutils-2.34/binutils/readelf.c display_mips_gnu_attribute */
+bool
+mips_check_object_attribute (Ebl *ebl __attribute__ ((unused)),
+   const char *vendor, int tag, uint64_t value,
+   const char **tag_name, const char **value_name)
+{
+  if (!strcmp (vendor, "gnu"))
+switch (tag)
+  {
+  case Tag_GNU_MIPS_ABI_FP:
+   *tag_name = "Tag_GNU_MIPS_ABI_FP";
+   switch (value)
+   {
+ case Val_GNU_MIPS_ABI_FP_ANY:
+   *value_name = "Hard or soft float";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_DOUBLE:
+   *value_name = "Hard float (double precision)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_SINGLE:
+   *value_name = "Hard float (single precision)";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_SOFT:
+   *value_name = "Soft float";
+   return true;
+ case Val_GNU_MIPS_ABI_FP_OLD_64:
+   *value

[PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-03-05 Thread Ying Huang
From: Ying Huang 

In mips64 little-endian, r_info consists of four byte fields(contains
three reloc types) and a 32-bit symbol index. In order to adapt
GELF_R_SYM and GELF_R_TYPE, need convert raw data to get correct symbol
index and type.

  libelf/elf_getdata.c: Some eu-utils use read-mmap method to map file,
so we need to malloc and memcpy raw data to avoid segment fault. After
modification, the correct value are saved in the malloced memory not in
process address space.
  libelf/elf_updata.c: Because we converted the relocation info in mips
order when we call elf_getdata.c, so we need to convert the modified data
in original order bits before writing the data to the file.

Signed-off-by: Ying Huang 
---
 libelf/elf_getdata.c | 132 ++-
 libelf/elf_update.c  |  53 +
 2 files changed, 183 insertions(+), 2 deletions(-)

diff --git a/libelf/elf_getdata.c b/libelf/elf_getdata.c
index 7c3ac043..942ba536 100644
--- a/libelf/elf_getdata.c
+++ b/libelf/elf_getdata.c
@@ -133,6 +133,119 @@ __libelf_data_type (GElf_Ehdr *ehdr, int sh_type, 
GElf_Xword align)
 }
 }
 
+/* Convert the data in the current section.  */
+static void
+convert_data_for_mips64el (Elf_Scn *scn, int eclass,
+ int data, size_t size, Elf_Type type)
+{
+  /* Do we need to convert the data and/or adjust for alignment?  */
+  if (data == MY_ELFDATA || type == ELF_T_BYTE)
+{
+  /* In order to adapt macro GELF_R_SYM and GELF_R_TYPE on mips64, need to 
convert
+   relocation info(raw data). Some eu-utils use read-mmap method to map 
file, so
+   we need to malloc and memcpy raw data to avoid segment fault. After 
modification,
+   the correct value are saved in the malloced memory not in process 
address space. */
+  scn->data_base = malloc (size);
+  if (scn->data_base == NULL)
+   {
+  __libelf_seterrno (ELF_E_NOMEM);
+ return;
+   }
+
+  /* The copy will be appropriately aligned for direct access.  */
+  memcpy (scn->data_base, scn->rawdata_base, size);
+}
+  else
+{
+  xfct_t fp;
+
+  scn->data_base = malloc (size);
+  if (scn->data_base == NULL)
+   {
+ __libelf_seterrno (ELF_E_NOMEM);
+ return;
+   }
+
+  /* Make sure the source is correctly aligned for the conversion
+function to directly access the data elements.  */
+  char *rawdata_source;
+  /* In order to adapt macro GELF_R_SYM and GELF_R_TYPE on mips64, need to 
convert
+   relocation info(raw data). Some eu-utils use read-mmap method to map 
file, so
+   we need to malloc and memcpy raw data to avoid segment fault. After 
modification,
+   the correct value are saved in the malloced memory not in process 
address space. */
+  rawdata_source = malloc (size);
+  if (rawdata_source == NULL)
+   {
+ __libelf_seterrno (ELF_E_NOMEM);
+ return;
+   }
+
+  /* The copy will be appropriately aligned for direct access.  */
+  memcpy (rawdata_source, scn->rawdata_base, size);
+
+  /* Get the conversion function.  */
+  fp = __elf_xfctstom[eclass - 1][type];
+
+  fp (scn->data_base, rawdata_source, size, 0);
+
+  if (rawdata_source != scn->rawdata_base)
+   free (rawdata_source);
+}
+
+  scn->data_list.data.d.d_buf = scn->data_base;
+  scn->data_list.data.d.d_size = size;
+  scn->data_list.data.d.d_type = type;
+  scn->data_list.data.d.d_off = scn->rawdata.d.d_off;
+  scn->data_list.data.d.d_align = scn->rawdata.d.d_align;
+  scn->data_list.data.d.d_version = scn->rawdata.d.d_version;
+
+  scn->data_list.data.s = scn;
+
+  /* In mips64 little-endian, r_info consists of four byte fields(contains
+ three reloc types) and a 32-bit symbol index. In order to adapt
+ GELF_R_SYM and GELF_R_TYPE, need to convert r_info to get correct symbol
+ index and type. */
+  /* references:
+ https://www.linux-mips.org/pub/linux/mips/doc/ABI/elf64-2.4.pdf
+ Page40 && Page41 */
+  GElf_Shdr shdr_mem;
+  GElf_Shdr *shdr = gelf_getshdr (scn, &shdr_mem);
+  if (shdr->sh_type == SHT_REL)
+{
+  size_t sh_entsize = gelf_fsize (scn->elf, ELF_T_REL, 1, EV_CURRENT);
+  int nentries = shdr->sh_size / sh_entsize;
+  for (int cnt = 0; cnt < nentries; ++cnt)
+   {
+ Elf_Data_Scn *data_scn = (Elf_Data_Scn *) &scn->data_list.data.d;
+ Elf64_Rel *value = &((Elf64_Rel *) data_scn->d.d_buf)[cnt];
+ Elf64_Xword info = value->r_info;
+ value->r_info = (((info & 0x) << 32)
+   | ((info >> 56) & 0xff)
+   | ((info >> 40) & 0xff00)
+   | ((info >> 24) & 0xff)
+   | ((info >> 8) & 0xff00));
+ ((Elf64_Rel *) data_scn->d.d_buf)[cnt] = *value;

[PATCH v3 4/6] elflint: adapt src/elflint --gnu src/nm on mips

2024-03-05 Thread Ying Huang
From: Ying Huang 

The errors were:
$ src/elflint --gnu src/nm
section [ 2] '.MIPS.options' contains unknown flag(s) 0x800
section [ 7] '.dynsym': symbol 165 (_DYNAMIC_LINKING): non-local section symbol
section [24] '.got' contains invalid processor-specific flag(s) 0x1000
section [25] '.sdata' contains invalid processor-specific flag(s) 0x1000
section [29] '.debug_aranges' has wrong type: expected PROGBITS, is MIPS_DWARF
section [30] '.debug_info' has wrong type: expected PROGBITS, is MIPS_DWARF
section [31] '.debug_abbrev' has wrong type: expected PROGBITS, is MIPS_DWARF
section [32] '.debug_line' has wrong type: expected PROGBITS, is MIPS_DWARF
section [33] '.debug_frame' has wrong type: expected PROGBITS, is MIPS_DWARF
section [34] '.debug_str' has wrong type: expected PROGBITS, is MIPS_DWARF
section [35] '.debug_loc' has wrong type: expected PROGBITS, is MIPS_DWARF
section [36] '.debug_ranges' has wrong type: expected PROGBITS, is MIPS_DWARF
section [38] '.symtab': symbol 785 (_gp): st_value out of bounds
section [38] '.symtab': symbol 910 (_fbss): st_value out of bounds
section [38] '.symtab': symbol 1051 (_DYNAMIC_LINKING): non-local section symbol

After fixing:
$ src/elflint --gnu src/nm
No errors

Signed-off-by: Ying Huang 
---
 backends/mips_init.c   |  3 +++
 backends/mips_symbol.c | 37 +
 src/elflint.c  | 26 +-
 3 files changed, 61 insertions(+), 5 deletions(-)

diff --git a/backends/mips_init.c b/backends/mips_init.c
index 6b9bd4c8..521e6e51 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -51,9 +51,12 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, section_type_name);
   HOOK (eh, machine_flag_check);
   HOOK (eh, machine_flag_name);
+  HOOK (eh, machine_section_flag_check);
   HOOK (eh, segment_type_name);
   HOOK (eh, dynamic_tag_check);
   HOOK (eh, dynamic_tag_name);
   HOOK (eh, check_object_attribute);
+  HOOK (eh, check_special_symbol);
+  HOOK (eh, check_reloc_target_type);
   return eh;
 }
diff --git a/backends/mips_symbol.c b/backends/mips_symbol.c
index 1545fc4b..af4b6e45 100644
--- a/backends/mips_symbol.c
+++ b/backends/mips_symbol.c
@@ -158,6 +158,43 @@ mips_section_type_name (int type,
   return NULL;
 }
 
+bool
+mips_check_reloc_target_type (Ebl *ebl __attribute__ ((unused)), Elf64_Word 
sh_type)
+{
+  return (sh_type == SHT_MIPS_DWARF);
+}
+
+/* Check whether given symbol's st_value and st_size are OK despite failing
+   normal checks.  */
+bool
+mips_check_special_symbol (Elf *elf,
+   const GElf_Sym *sym __attribute__ ((unused)),
+   const char *name __attribute__ ((unused)),
+   const GElf_Shdr *destshdr)
+{
+  size_t shstrndx;
+  if (elf_getshdrstrndx (elf, &shstrndx) != 0)
+return false;
+  const char *sname = elf_strptr (elf, shstrndx, destshdr->sh_name);
+  if (sname == NULL)
+return false;
+  return (strcmp (sname, ".got") == 0 || strcmp (sname, ".bss") == 0);
+}
+
+/* Check whether SHF_MASKPROC flags are valid.  */
+bool
+mips_machine_section_flag_check (GElf_Xword sh_flags)
+{
+  return ((sh_flags &~ (SHF_MIPS_GPREL |
+   SHF_MIPS_MERGE |
+   SHF_MIPS_ADDR |
+   SHF_MIPS_STRINGS |
+   SHF_MIPS_NOSTRIP |
+   SHF_MIPS_LOCAL |
+   SHF_MIPS_NAMES |
+   SHF_MIPS_NODUPE)) == 0);
+}
+
 /* Check whether machine flags are valid.  */
 bool
 mips_machine_flag_check (GElf_Word flags)
diff --git a/src/elflint.c b/src/elflint.c
index 864de710..092409a2 100644
--- a/src/elflint.c
+++ b/src/elflint.c
@@ -936,7 +936,9 @@ section [%2d] '%s': symbol %zu (%s): non-local symbol 
outside range described in
}
 
   if (GELF_ST_TYPE (sym->st_info) == STT_SECTION
- && GELF_ST_BIND (sym->st_info) != STB_LOCAL)
+ && GELF_ST_BIND (sym->st_info) != STB_LOCAL
+ && ehdr->e_machine != EM_MIPS
+ && strcmp (name, "_DYNAMIC_LINKING") != 0)
ERROR (_("\
 section [%2d] '%s': symbol %zu (%s): non-local section symbol\n"),
   idx, section_name (ebl, idx), cnt, name);
@@ -3828,6 +3830,10 @@ cannot get section header for section [%2zu] '%s': 
%s\n"),
&& ebl_bss_plt_p (ebl))
  good_type = SHT_NOBITS;
 
+   if (ehdr->e_machine == EM_MIPS
+   && (strstr(special_sections[s].name, ".debug") != NULL))
+ good_type = SHT_MIPS_DWARF;
+
/* In a debuginfo file, any normal section can be SHT_NOBITS.
 

[PATCH v3 5/6] stack: Fix stack unwind failure on mips

2024-03-05 Thread Ying Huang
From: Ying Huang 

Add abi_cfi, set_initial_registers_tid, unwind on mips.

Signed-off-by: Ying Huang 
---
 backends/Makefile.am|  3 +-
 backends/mips_cfi.c | 68 +
 backends/mips_init.c|  4 ++
 backends/mips_initreg.c | 61 ++
 backends/mips_unwind.c  | 84 +
 5 files changed, 219 insertions(+), 1 deletion(-)
 create mode 100644 backends/mips_cfi.c
 create mode 100644 backends/mips_initreg.c
 create mode 100644 backends/mips_unwind.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index ad95526e..5e7b7f21 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -102,7 +102,8 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
loongarch_cfi.c \
 
 arc_SRCS = arc_init.c arc_symbol.c
 
-mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c
+mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c mips_initreg.c \
+   mips_cfi.c mips_unwind.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_cfi.c b/backends/mips_cfi.c
new file mode 100644
index ..60cf8111
--- /dev/null
+++ b/backends/mips_cfi.c
@@ -0,0 +1,68 @@
+/* MIPS ABI-specified defaults for DWARF CFI.
+   Copyright (C) 2009 Red Hat, Inc.
+   Copyright (C) 2024 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+
+#define BACKEND mips_
+#include "libebl_CPU.h"
+
+int
+mips_abi_cfi (Ebl *ebl __attribute__ ((unused)), Dwarf_CIE *abi_info)
+{
+  static const uint8_t abi_cfi[] =
+{
+  DW_CFA_def_cfa, ULEB128_7 (31), ULEB128_7 (0),
+  /* Callee-saved regs.  */
+  DW_CFA_same_value, ULEB128_7 (16), /* s0 */
+  DW_CFA_same_value, ULEB128_7 (17), /* s1 */
+  DW_CFA_same_value, ULEB128_7 (18), /* s2 */
+  DW_CFA_same_value, ULEB128_7 (19), /* s3 */
+  DW_CFA_same_value, ULEB128_7 (20), /* s4 */
+  DW_CFA_same_value, ULEB128_7 (21), /* s5 */
+  DW_CFA_same_value, ULEB128_7 (22), /* s6 */
+  DW_CFA_same_value, ULEB128_7 (23), /* s7 */
+  DW_CFA_same_value, ULEB128_7 (28), /* gp */
+  DW_CFA_same_value, ULEB128_7 (29), /* sp */
+  DW_CFA_same_value, ULEB128_7 (30), /* fp */
+
+  DW_CFA_val_offset, ULEB128_7 (29), ULEB128_7 (0),
+};
+
+  abi_info->initial_instructions = abi_cfi;
+  abi_info->initial_instructions_end = &abi_cfi[sizeof abi_cfi];
+  abi_info->data_alignment_factor = 8;
+
+  abi_info->return_address_register = 31; /* %ra */
+
+  return 0;
+}
diff --git a/backends/mips_init.c b/backends/mips_init.c
index 521e6e51..1a2456b1 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -58,5 +58,9 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, check_object_attribute);
   HOOK (eh, check_special_symbol);
   HOOK (eh, check_reloc_target_type);
+  HOOK (eh, set_initial_registers_tid);
+  HOOK (eh, abi_cfi);
+  HOOK (eh, unwind);
+  eh->frame_nregs = 71;
   return eh;
 }
diff --git a/backends/mips_initreg.c b/backends/mips_initreg.c
new file mode 100644
index ..21e7dedb
--- /dev/null
+++ b/backends/mips_initreg.c
@@ -0,0 +1,61 @@
+/* Fetch live process registers from TID.
+   Copyright (C) 2024 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS

[PATCH v3 6/6] backends: Add register_info, return_value_location, core_note function on mips

2024-03-05 Thread Ying Huang
From: Ying Huang 

Signed-off-by: Ying Huang 
---
 backends/Makefile.am |   3 +-
 backends/mips_corenote.c |  85 +
 backends/mips_init.c |   3 +
 backends/mips_regs.c | 135 +++
 backends/mips_retval.c   | 196 +++
 5 files changed, 421 insertions(+), 1 deletion(-)
 create mode 100644 backends/mips_corenote.c
 create mode 100644 backends/mips_regs.c
 create mode 100644 backends/mips_retval.c

diff --git a/backends/Makefile.am b/backends/Makefile.am
index 5e7b7f21..7c7f3351 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -103,7 +103,8 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
loongarch_cfi.c \
 arc_SRCS = arc_init.c arc_symbol.c
 
 mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c mips_initreg.c \
-   mips_cfi.c mips_unwind.c
+   mips_cfi.c mips_unwind.c mips_regs.c mips_retval.c \
+   mips_corenote.c
 
 libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
$(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
diff --git a/backends/mips_corenote.c b/backends/mips_corenote.c
new file mode 100644
index ..aeadeb17
--- /dev/null
+++ b/backends/mips_corenote.c
@@ -0,0 +1,85 @@
+/* MIPS specific core note handling.
+   Copyright (C) 2024 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at
+   your option) any later version
+
+   or
+
+ * the GNU General Public License as published by the Free
+   Software Foundation; either version 2 of the License, or (at
+   your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include 
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define BACKENDmips_
+#include "libebl_CPU.h"
+
+#define BITS 64
+#ifndef BITS
+# define BITS  32
+#else
+# define BITS  64
+#endif
+
+#define PRSTATUS_REGS_SIZE (45 * (BITS / 8))
+static const Ebl_Register_Location prstatus_regs[] =
+  {
+{ .offset = 0, .regno = 0, .count = (BITS == 32 ? 40 : 34), .bits = BITS },
+{ .offset = BITS/8 * (BITS == 32 ? 41 : 35), .regno = (BITS == 32 ? 41 : 
35), .count = (BITS == 32 ? 4 : 10), .bits = BITS },
+  };
+
+#define PRSTATUS_REGSET_ITEMS  \
+  {\
+.name = "pc", .type = ELF_T_ADDR, .format = 'x',   \
+.offset = offsetof (struct EBLHOOK(prstatus), pr_reg) + ((BITS/8) * (BITS 
== 32 ? 40 : 34)),   \
+.group = "register",   \
+.pc_register = true
\
+  }
+
+#if BITS == 32
+# define ULONG uint32_t
+# define ALIGN_ULONG   4
+# define TYPE_ULONGELF_T_WORD
+#define TYPE_LONG  ELF_T_SWORD
+#else
+#define ULONG  uint64_t
+#define ALIGN_ULONG8
+#define TYPE_ULONG ELF_T_XWORD
+#define TYPE_LONG  ELF_T_SXWORD
+#endif
+#define PID_T  int32_t
+#defineUID_T   uint32_t
+#defineGID_T   uint32_t
+#define ALIGN_PID_T4
+#define ALIGN_UID_T4
+#define ALIGN_GID_T4
+#define TYPE_PID_T ELF_T_SWORD
+#define TYPE_UID_T ELF_T_WORD
+#define TYPE_GID_T ELF_T_WORD
+
+#include "linux-core-note.c"
diff --git a/backends/mips_init.c b/backends/mips_init.c
index 1a2456b1..711a934e 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -61,6 +61,9 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, set_initial_registers_tid);
   HOOK (eh, abi_cfi);
   HOOK (eh, unwind);
+  HOOK (eh, register_info);
+  HOOK (eh, return_value_location);
+  HOOK (eh, core_note);
   eh->frame_nregs = 71;
   return eh;
 }
diff --git a/backends/mips_regs.c b/backends/mips_regs.c
new file mode 100644
index ..4a1f8c50
--- /dev/null
+++ b/backends/mips_regs.c
@@ -0,0 +1,135 @@
+/* Register names and numbers for mips DWARF.
+   Copyright (C) 2006 Red Hat, Inc.
+   Copyright (C) 2024 CIP United Inc.
+   This file is part of elfutils.
+
+   This file is 

Re: [PATCH v3 1/6] Support Mips architecture

2024-03-11 Thread Ying Huang
Hi Mark,

Could you please review these patches, I have splited patch v2 1/5 to patch v3 
1/6 and 2/6.

Thanks,

Ying


在 2024/3/5 17:51, Ying Huang 写道:
> From: Ying Huang 
>
> Signed-off-by: Ying Huang 
> ---
>  backends/Makefile.am|   6 +-
>  backends/mips_init.c|  52 
>  backends/mips_reloc.def |  93 +++
>  backends/mips_symbol.c  |  63 +
>  libebl/eblopenbackend.c |   2 +
>  libelf/libelfP.h|   3 +
>  tests/libelf.h  | 541 
>  7 files changed, 758 insertions(+), 2 deletions(-)
>  create mode 100644 backends/mips_init.c
>  create mode 100644 backends/mips_reloc.def
>  create mode 100644 backends/mips_symbol.c
>  create mode 100644 tests/libelf.h
>
> diff --git a/backends/Makefile.am b/backends/Makefile.am
> index bbb2aac7..b946fd30 100644
> --- a/backends/Makefile.am
> +++ b/backends/Makefile.am
> @@ -37,7 +37,7 @@ AM_CPPFLAGS += -I$(top_srcdir)/libebl 
> -I$(top_srcdir)/libasm \
>  noinst_LIBRARIES = libebl_backends.a libebl_backends_pic.a
>  
>  modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \
> -   m68k bpf riscv csky loongarch arc
> +   m68k bpf riscv csky loongarch arc mips
>  
>  i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \
>   i386_retval.c i386_regs.c i386_auxv.c \
> @@ -102,12 +102,14 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
> loongarch_cfi.c \
>  
>  arc_SRCS = arc_init.c arc_symbol.c
>  
> +mips_SRCS = mips_init.c mips_symbol.c
> +
>  libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
>   $(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
>   $(aarch64_SRCS) $(sparc_SRCS) $(ppc_SRCS) \
>   $(ppc64_SRCS) $(s390_SRCS) \
>   $(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) $(csky_SRCS) 
> \
> - $(loongarch_SRCS) $(arc_SRCS)
> + $(loongarch_SRCS) $(arc_SRCS) $(mips_SRCS)
>  
>  libebl_backends_pic_a_SOURCES =
>  am_libebl_backends_pic_a_OBJECTS = $(libebl_backends_a_SOURCES:.c=.os)
> diff --git a/backends/mips_init.c b/backends/mips_init.c
> new file mode 100644
> index ..cedd08ca
> --- /dev/null
> +++ b/backends/mips_init.c
> @@ -0,0 +1,52 @@
> +/* Initialization of MIPS specific backend library.
> +   Copyright (C) 2024 CIP United Inc.
> +   This file is part of elfutils.
> +
> +   This file is free software; you can redistribute it and/or modify
> +   it under the terms of either
> +
> + * the GNU Lesser General Public License as published by the Free
> +   Software Foundation; either version 3 of the License, or (at
> +   your option) any later version
> +
> +   or
> +
> + * the GNU General Public License as published by the Free
> +   Software Foundation; either version 2 of the License, or (at
> +   your option) any later version
> +
> +   or both in parallel, as here.
> +
> +   elfutils is distributed in the hope that it will be useful, but
> +   WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +   General Public License for more details.
> +
> +   You should have received copies of the GNU General Public License and
> +   the GNU Lesser General Public License along with this program.  If
> +   not, see <http://www.gnu.org/licenses/>.  */
> +
> +#ifdef HAVE_CONFIG_H
> +# include 
> +#endif
> +
> +#define BACKEND  mips_
> +#define RELOC_PREFIX R_MIPS_
> +#include "libebl_CPU.h"
> +#include "libelfP.h"
> +
> +#define RELOC_TYPE_ID(type) ((type) & 0xff)
> +
> +/* This defines the common reloc hooks based on mips_reloc.def.  */
> +#include "common-reloc.c"
> +
> +Ebl *
> +mips_init (Elf *elf __attribute__ ((unused)),
> +GElf_Half machine __attribute__ ((unused)),
> +Ebl *eh)
> +{
> +  /* We handle it.  */
> +  mips_init_reloc (eh);
> +  HOOK (eh, reloc_simple_type);
> +  return eh;
> +}
> diff --git a/backends/mips_reloc.def b/backends/mips_reloc.def
> new file mode 100644
> index ..5120980c
> --- /dev/null
> +++ b/backends/mips_reloc.def
> @@ -0,0 +1,93 @@
> +/* List the relocation types for MIPS.  -*- C -*-
> +   Copyright (C) 2024 CIP United Inc.
> +   This file is part of elfutils.
> +
> +   This file is free software; you can redistribute it and/or modify
> +   it under the terms of either
> +
> + * the GNU Lesser General Public License as published by the Free
> +   Software Foundation; either version 3 of the License, or (at
> +  

Re: [PATCH v3 1/6] Support Mips architecture

2024-03-21 Thread Ying Huang
Ping,

Thanks.


在 2024/3/11 18:02, Ying Huang 写道:
> Hi Mark,
>
> Could you please review these patches, I have splited patch v2 1/5 to patch 
> v3 1/6 and 2/6.
>
> Thanks,
>
> Ying
>
>
> 在 2024/3/5 17:51, Ying Huang 写道:
>> From: Ying Huang 
>>
>> Signed-off-by: Ying Huang 
>> ---
>>  backends/Makefile.am|   6 +-
>>  backends/mips_init.c|  52 
>>  backends/mips_reloc.def |  93 +++
>>  backends/mips_symbol.c  |  63 +
>>  libebl/eblopenbackend.c |   2 +
>>  libelf/libelfP.h|   3 +
>>  tests/libelf.h  | 541 
>>  7 files changed, 758 insertions(+), 2 deletions(-)
>>  create mode 100644 backends/mips_init.c
>>  create mode 100644 backends/mips_reloc.def
>>  create mode 100644 backends/mips_symbol.c
>>  create mode 100644 tests/libelf.h
>>
>> diff --git a/backends/Makefile.am b/backends/Makefile.am
>> index bbb2aac7..b946fd30 100644
>> --- a/backends/Makefile.am
>> +++ b/backends/Makefile.am
>> @@ -37,7 +37,7 @@ AM_CPPFLAGS += -I$(top_srcdir)/libebl 
>> -I$(top_srcdir)/libasm \
>>  noinst_LIBRARIES = libebl_backends.a libebl_backends_pic.a
>>  
>>  modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \
>> -  m68k bpf riscv csky loongarch arc
>> +  m68k bpf riscv csky loongarch arc mips
>>  
>>  i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \
>>  i386_retval.c i386_regs.c i386_auxv.c \
>> @@ -102,12 +102,14 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
>> loongarch_cfi.c \
>>  
>>  arc_SRCS = arc_init.c arc_symbol.c
>>  
>> +mips_SRCS = mips_init.c mips_symbol.c
>> +
>>  libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
>>  $(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
>>  $(aarch64_SRCS) $(sparc_SRCS) $(ppc_SRCS) \
>>  $(ppc64_SRCS) $(s390_SRCS) \
>>  $(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) $(csky_SRCS) 
>> \
>> -$(loongarch_SRCS) $(arc_SRCS)
>> +$(loongarch_SRCS) $(arc_SRCS) $(mips_SRCS)
>>  
>>  libebl_backends_pic_a_SOURCES =
>>  am_libebl_backends_pic_a_OBJECTS = $(libebl_backends_a_SOURCES:.c=.os)
>> diff --git a/backends/mips_init.c b/backends/mips_init.c
>> new file mode 100644
>> index ..cedd08ca
>> --- /dev/null
>> +++ b/backends/mips_init.c
>> @@ -0,0 +1,52 @@
>> +/* Initialization of MIPS specific backend library.
>> +   Copyright (C) 2024 CIP United Inc.
>> +   This file is part of elfutils.
>> +
>> +   This file is free software; you can redistribute it and/or modify
>> +   it under the terms of either
>> +
>> + * the GNU Lesser General Public License as published by the Free
>> +   Software Foundation; either version 3 of the License, or (at
>> +   your option) any later version
>> +
>> +   or
>> +
>> + * the GNU General Public License as published by the Free
>> +   Software Foundation; either version 2 of the License, or (at
>> +   your option) any later version
>> +
>> +   or both in parallel, as here.
>> +
>> +   elfutils is distributed in the hope that it will be useful, but
>> +   WITHOUT ANY WARRANTY; without even the implied warranty of
>> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
>> +   General Public License for more details.
>> +
>> +   You should have received copies of the GNU General Public License and
>> +   the GNU Lesser General Public License along with this program.  If
>> +   not, see <http://www.gnu.org/licenses/>.  */
>> +
>> +#ifdef HAVE_CONFIG_H
>> +# include 
>> +#endif
>> +
>> +#define BACKEND mips_
>> +#define RELOC_PREFIXR_MIPS_
>> +#include "libebl_CPU.h"
>> +#include "libelfP.h"
>> +
>> +#define RELOC_TYPE_ID(type) ((type) & 0xff)
>> +
>> +/* This defines the common reloc hooks based on mips_reloc.def.  */
>> +#include "common-reloc.c"
>> +
>> +Ebl *
>> +mips_init (Elf *elf __attribute__ ((unused)),
>> +   GElf_Half machine __attribute__ ((unused)),
>> +   Ebl *eh)
>> +{
>> +  /* We handle it.  */
>> +  mips_init_reloc (eh);
>> +  HOOK (eh, reloc_simple_type);
>> +  return eh;
>> +}
>> diff --git a/backends/mips_reloc.def b/backends/mips_reloc.def
>> new file mode 100644
>

Re: [PATCH v3 1/6] Support Mips architecture

2024-03-29 Thread Ying Huang
Hi Mark,

Next time I send a patch, I will add ChangeLog entry in commit message and 
check the added file.

Thanks,

Ying


在 2024/3/29 08:18, Mark Wielaard 写道:
> Hi Ying,
>
> On Tue, Mar 05, 2024 at 05:51:17PM +0800, Ying Huang wrote:
>> From: Ying Huang 
>>
>> Signed-off-by: Ying Huang 
>> ---
>>  backends/Makefile.am|   6 +-
>>  backends/mips_init.c|  52 
>>  backends/mips_reloc.def |  93 +++
>>  backends/mips_symbol.c  |  63 +
>>  libebl/eblopenbackend.c |   2 +
>>  libelf/libelfP.h|   3 +
>>  tests/libelf.h  | 541 
> Note that this adds tests/libelf.h by accident.  I see how that could
> happen, because it should have been in .gitignore.  I posted a patch
> to do that:
> https://inbox.sourceware.org/elfutils-devel/20240328234308.1032110-1-m...@klomp.org/
>
> Besides that the patch looks fine. I did add a ChangeLog entry to the
> commit message. Pushed as attached.
>
> Thanks,
>
> Mark


Re: [PATCH v3 1/6] Support Mips architecture

2024-04-03 Thread Ying Huang
Hi Mark,

Could you help review some other patches?

Thanks,

Ying


在 2024/3/29 08:18, Mark Wielaard 写道:
> Hi Ying,
>
> On Tue, Mar 05, 2024 at 05:51:17PM +0800, Ying Huang wrote:
>> From: Ying Huang 
>>
>> Signed-off-by: Ying Huang 
>> ---
>>  backends/Makefile.am|   6 +-
>>  backends/mips_init.c|  52 
>>  backends/mips_reloc.def |  93 +++
>>  backends/mips_symbol.c  |  63 +
>>  libebl/eblopenbackend.c |   2 +
>>  libelf/libelfP.h|   3 +
>>  tests/libelf.h  | 541 
> Note that this adds tests/libelf.h by accident.  I see how that could
> happen, because it should have been in .gitignore.  I posted a patch
> to do that:
> https://inbox.sourceware.org/elfutils-devel/20240328234308.1032110-1-m...@klomp.org/
>
> Besides that the patch looks fine. I did add a ChangeLog entry to the
> commit message. Pushed as attached.
>
> Thanks,
>
> Mark


Re: [PATCH v3 5/6] stack: Fix stack unwind failure on mips

2024-04-17 Thread Ying Huang
Hi Mark,

> It would be helpful to see if you could come up with a testcase
> similar to the ones in tests/run-backtrace-core-.sh with
> tests/tests/backtrace..{exec,core}.bz2 so it can be tested from
> a non-MIPS setup (as opposed to the tests/run-backtrace-native.sh and
> tests/run-backtrace-native-core.sh tests).
>
> Thanks,
>
> Mark

I am glad to add a testcase and could you help review other patches?

Thanks,

Ying


Re: [PATCH v3 6/6] backends: Add register_info, return_value_location, core_note function on mips

2024-04-18 Thread Ying Huang
Hi Mark,

> So this only handles 64 BITS. I left it this way.  But it is a
> question about the whole series. MIPS has multiple abis, some 32, some
> 64 bits, some big and some little endian.  If I understand correctly
> this backend only handles the 64 bit little endian one?


Sorry, this was added for debugging, I forgot to delete it. I would modify it 
and submit again.

This backend not only support Mips64el, also support others.

>
> Again it would be nice if you could come up with non-native variants
> of the tests so the implementation can also be tested on non-MIPS
> arches. Specifically for tests/run-allregs.sh, tests/run-funcretval.sh
> and/or tests/run-readelf-mixed-corenote.sh.
>

OK, I would do it.

Thanks,

Ying


[PATCH] test: Add mips in run-allregs.sh and run-readelf-mixed-corenote.sh

2024-05-24 Thread Ying Huang
From: Ying Huang 

* backends/Makefile.am (mips_SRCS): Add mips64_corenote.c.
* backends/mips64_corenote.c: New file.
* backends/mips_corenote.c: Add fpregset.
* backends/mips_init.c: HOOK mips64_corenote.
* libebl/eblcorenotetypename.c: Add KNOWNSTYPE MIPS_FP_MODE MIPS_MSA.
* tests/run-allregs.sh: Add test for testfile-mips64-core.
* tests/run-readelf-mixed-corenote.sh: Likewise.
* tests/testfile-mips64-core.bz2: New file.
---
 backends/Makefile.am|   2 +-
 backends/mips64_corenote.c  |   2 +
 backends/mips_corenote.c|  29 +++--
 backends/mips_init.c|   7 +-
 libebl/eblcorenotetypename.c|   2 +
 tests/run-allregs.sh|  79 ++
 tests/run-readelf-mixed-corenote.sh |  97 
 tests/testfile-mips64-core.bz2  | Bin 0 -> 30891 bytes
 8 files changed, 211 insertions(+), 7 deletions(-)
 create mode 100644 backends/mips64_corenote.c
 create mode 100644 tests/testfile-mips64-core.bz2

diff --git a/backends/Makefile.am b/backends/Makefile.am
index 926464ae..4e00d01f 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -104,7 +104,7 @@ arc_SRCS = arc_init.c arc_symbol.c
 
 mips_SRCS = mips_init.c mips_symbol.c mips_initreg.c \
mips_cfi.c mips_unwind.c mips_regs.c mips_retval.c \
-   mips_corenote.c
+   mips_corenote.c mips64_corenote.c
 
 hexagon_SRCS = hexagon_init.c hexagon_symbol.c
 
diff --git a/backends/mips64_corenote.c b/backends/mips64_corenote.c
new file mode 100644
index ..f1186056
--- /dev/null
+++ b/backends/mips64_corenote.c
@@ -0,0 +1,2 @@
+#define BITS 64
+#include "mips_corenote.c"
diff --git a/backends/mips_corenote.c b/backends/mips_corenote.c
index aeadeb17..823add27 100644
--- a/backends/mips_corenote.c
+++ b/backends/mips_corenote.c
@@ -35,15 +35,14 @@
 #include 
 #include 
 #include 
-
-#define BACKENDmips_
 #include "libebl_CPU.h"
 
-#define BITS 64
 #ifndef BITS
-# define BITS  32
+# define BITS 32
+#define BACKENDmips_
 #else
-# define BITS  64
+# define BITS 64
+# define BACKEND mips64_
 #endif
 
 #define PRSTATUS_REGS_SIZE (45 * (BITS / 8))
@@ -61,6 +60,23 @@ static const Ebl_Register_Location prstatus_regs[] =
 .pc_register = true
\
   }
 
+static const Ebl_Register_Location mips_fpregset_regs[] =
+  {
+{ .offset = 0, .regno = 38, .count = 32, .bits = 64 }, /* fp0-fp31 */
+  };
+
+static const Ebl_Core_Item mips_fpregset_items[] =
+  {
+{
+  .name = "fcs", .type = ELF_T_WORD, .format = 'x',
+  .offset = 32 * 8, .group = "register"
+},
+{
+  .name = "fir", .type = ELF_T_WORD, .format = 'x',
+  .offset = 32 * 8 + 4, .group = "register"
+}
+  };
+
 #if BITS == 32
 # define ULONG uint32_t
 # define ALIGN_ULONG   4
@@ -82,4 +98,7 @@ static const Ebl_Register_Location prstatus_regs[] =
 #define TYPE_UID_T ELF_T_WORD
 #define TYPE_GID_T ELF_T_WORD
 
+#defineEXTRA_NOTES \
+  EXTRA_REGSET_ITEMS (NT_FPREGSET, 32 * 8 + 4 * 2, mips_fpregset_regs, 
mips_fpregset_items)
+
 #include "linux-core-note.c"
diff --git a/backends/mips_init.c b/backends/mips_init.c
index e7e4b287..6743e2e5 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -40,6 +40,8 @@
 /* This defines the common reloc hooks based on mips_reloc.def.  */
 #include "common-reloc.c"
 
+extern __typeof (EBLHOOK (core_note)) mips64_core_note attribute_hidden;
+
 Ebl *
 mips_init (Elf *elf __attribute__ ((unused)),
   GElf_Half machine __attribute__ ((unused)),
@@ -53,7 +55,10 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, unwind);
   HOOK (eh, register_info);
   HOOK (eh, return_value_location);
-  HOOK (eh, core_note);
+  if (eh->class == ELFCLASS64)
+eh->core_note = mips64_core_note;
+  else
+HOOK (eh, core_note);
   eh->frame_nregs = 71;
   return eh;
 }
diff --git a/libebl/eblcorenotetypename.c b/libebl/eblcorenotetypename.c
index 0e790d06..73f6e478 100644
--- a/libebl/eblcorenotetypename.c
+++ b/libebl/eblcorenotetypename.c
@@ -94,6 +94,8 @@ ebl_core_note_type_name (Ebl *ebl, uint32_t type, char *buf, 
size_t len)
KNOWNSTYPE (ARM_SYSTEM_CALL);
KNOWNSTYPE (SIGINFO);
KNOWNSTYPE (FILE);
+   KNOWNSTYPE (MIPS_FP_MODE);
+   KNOWNSTYPE (MIPS_MSA);
 #undef KNOWNSTYPE
 
  default:
diff --git a/tests/run-allregs.sh b/tests/run-allregs.sh
index 87b16c95..f8007efa 100755
--- a/tests/run-allregs.sh
+++ b/tests/run-allregs.sh
@@ -2904,4 +2904,83 @@ FPU registers:
 62: ft10 (ft10), float 64 bits
 63: ft11 (ft11), float 64 bits
 EOF
+
+# See run-readelf-mixed-corenote.sh for instructions to regenerate
+# this core file.
+regs_test testfile-mips64-core <<\EOF
+integer 

Re: [PATCH v3 3/6] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

2024-05-24 Thread Ying Huang
Hi Mark,

Could you help review these two patches 3/6 and 4/6, all have been modified 
according your previous review comments.

If OK, I would update and resubmit again with ChangeLog commit message because 
there seems to be a conflict in merge now.


Thanks,

Ying

 

在 2024/3/5 17:51, Ying Huang 写道:
> From: Ying Huang 
>
> -h: support show Flags name
> -S: support show mips related section type
> -r: support show type of Relocation section
> -w: can work and can show correct "strp" contents
> -l: support show mips related program header entry type
> -d: can show mips related Dynamic type name
> -a: support show complete Object attribute section ".gnu.attributes"
>
> Also add test/run-readelf-reloc.sh file to test new type2/type3 of
> src/readelf -r.
>
> Signed-off-by: Ying Huang 
> ---
>  backends/Makefile.am   |   2 +-
>  backends/mips_attrs.c  | 140 +
>  backends/mips_init.c   |   7 +
>  backends/mips_symbol.c | 571 +
>  libelf/libelfP.h   |   1 +
>  src/readelf.c  | 188 +---
>  tests/Makefile.am  |   5 +-
>  tests/run-readelf-reloc.sh |  42 +++
>  8 files changed, 907 insertions(+), 49 deletions(-)
>  create mode 100644 backends/mips_attrs.c
>  create mode 100755 tests/run-readelf-reloc.sh
>
> diff --git a/backends/Makefile.am b/backends/Makefile.am
> index b946fd30..ad95526e 100644
> --- a/backends/Makefile.am
> +++ b/backends/Makefile.am
> @@ -102,7 +102,7 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
> loongarch_cfi.c \
>  
>  arc_SRCS = arc_init.c arc_symbol.c
>  
> -mips_SRCS = mips_init.c mips_symbol.c
> +mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c
>  
>  libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
>   $(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
> diff --git a/backends/mips_attrs.c b/backends/mips_attrs.c
> new file mode 100644
> index ..54fd3ce3
> --- /dev/null
> +++ b/backends/mips_attrs.c
> @@ -0,0 +1,140 @@
> +/* Object attribute tags for MIPS.
> +   Copyright (C) 2024 CIP United Inc.
> +   This file is part of elfutils.
> +
> +   This file is free software; you can redistribute it and/or modify
> +   it under the terms of either
> +
> + * the GNU Lesser General Public License as published by the Free
> +   Software Foundation; either version 3 of the License, or (at
> +   your option) any later version
> +
> +   or
> +
> + * the GNU General Public License as published by the Free
> +   Software Foundation; either version 2 of the License, or (at
> +   your option) any later version
> +
> +   or both in parallel, as here.
> +
> +   elfutils is distributed in the hope that it will be useful, but
> +   WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +   General Public License for more details.
> +
> +   You should have received copies of the GNU General Public License and
> +   the GNU Lesser General Public License along with this program.  If
> +   not, see <http://www.gnu.org/licenses/>.  */
> +
> +#ifdef HAVE_CONFIG_H
> +# include 
> +#endif
> +
> +#include 
> +#include 
> +
> +#define BACKEND mips_
> +#include "libebl_CPU.h"
> +
> +#define KNOWN_VALUES(...) do \
> +  {  \
> +static const char *table[] = { __VA_ARGS__ };\
> +if (value < sizeof table / sizeof table[0])  \
> +  *value_name = table[value];\
> +  } while (0)
> +
> +//copy gnu attr tags from binutils-2.34/elfcpp/mips.h
> +/* Object attribute tags.  */
> +enum
> +{
> +  /* 0-3 are generic.  */
> +
> +  /* Floating-point ABI used by this object file.  */
> +  Tag_GNU_MIPS_ABI_FP = 4,
> +
> +  /* MSA ABI used by this object file.  */
> +  Tag_GNU_MIPS_ABI_MSA = 8,
> +};
> +
> +/* Object attribute values.  */
> +enum
> +{
> +  /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
> +
> +  /* Not tagged or not using any ABIs affected by the differences.  */
> +  Val_GNU_MIPS_ABI_MSA_ANY = 0,
> +
> +  /* Using 128-bit MSA.  */
> +  Val_GNU_MIPS_ABI_MSA_128 = 1,
> +};
> +
> +/* Object attribute values.  */
> +enum
> +{
> +  /* This is reserved for backward-compatibility with an earlier
> + implementation of the MIPS NaN2008 functionality.  */
> +  Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
> +};
> +
> +/* copy binutils-2.34/binutils/readelf.c display_mips_gnu_attribute */
> +bool
> +mips_check_object_attribute (Ebl *ebl __attribute__ ((un

Re: elfutils DWARF problem was: Re: Problem with BTF generation on mips64el

2024-06-11 Thread Ying Huang
Hi Mark,

Regarding the current questions, I have a few points that needed to be 
explained.


在 2024/6/11 21:07, Mark Wielaard 写道:
> Hi,
>
> Adding elfutils-devel to CC to keep everyone up to date on the state of
> the patches.
>
> On Mon, 2024-06-10 at 23:36 -0700, Tony Ambardar wrote:
>> On Mon, Jun 03, 2024 at 08:47:24PM -0700, Tony Ambardar wrote:
>>> On Mon, Jun 03, 2024 at 09:18:33PM +0200, Mark Wielaard wrote:
>>>> On Mon, Jun 03, 2024 at 02:40:45PM -0300, Arnaldo Carvalho de Melo wrote:
>>>>> Couldn't find a way to ask eu-readelf for more verbose output, where we
>>>>> could perhaps get some clue as to why it produces nothing while binutils
>>>>> readelf manages to grok it, Mark, do you know some other way to ask
>>>>> eu-readelf to produce more debug output?
>>>>>
>>>>> I'm unsure if the netdevsim.ko file was left in a semi encoded BTF state
>>>>> that then made eu-readelf to not be able to process it while pahole,
>>>>> that uses eltuils' libraries, was able to process the first two CUs for
>>>>> a kernel module and all the CUs for the vmlinux file :-\
>>>>>
>>>>> Mark, the whole thread is available at:
>>>>>
>>>>> https://lore.kernel.org/all/Zl3Zp5r9m6X_i_J4@x1/T/#u
>>>> I haven't looked at the vmlinux file. But for the .ko file the issue
>>>> is that the elfutils MIPS backend isn't complete. Specifically MIPS
>>>> relocations aren't recognized (and so cannot be applied). There are
>>>> some pending patches which try to fix that:
>>>>
>>>> https://patchwork.sourceware.org/project/elfutils/list/?series=31601
>>> Earlier in the thread, Hengqi Chen pointed out the latest elfutils backend
>>> work for MIPS, and I locally rebuilt elfutils and then pahole from their
>>> respective next/main branches. For elfutils, main (935ee131cf7c) includes
>>>
>>>   e259f126 Support Mips architecture
>>>   f2acb069 stack: Fix stack unwind failure on mips
>>>   db33cb0c backends: Add register_info, return_value_location, core_note 
>>> mips
>>>
>>> which partially applies the patchwork series but leaves out the support for
>>> readelf, strip, and elflint.
>>>
>>> I believe this means the vmlinux and .ko files I shared are OK, or is there
>>> more backend work needed for MIPS?
>>>
>>> The bits missing in eu-readelf would explain the blank output both Arnaldo
>>> and I see from "$ eu-readelf -winfo vmlinux". I tried rebuilding with the
>>> patchwork readelf patch locally but ran into merge conflicts.
>> A short update, starting with answering my own question.
>>
>> No, apparently the above commits *do not* complete the backend work. Ying
>> Huang submitted additional related patches since March 5: [1][2]
>>
>> strip: Adapt src/strip -o -f on mips
>> readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips
>> elflint: adapt src/elflint --gnu src/nm on mips
>> test: Add mips in run-allregs.sh and run-readelf-mixed-corenote.sh
>>
>> Despite the titles, these patches do include core backend changes for MIPS.
>> I resolved the various merge conflicts [3], rebuilt elfutils, and retested
>> kernel builds to now find:
>>
>>   - pahole is able to read DWARF[45] info and create .BTF for modules
>>   - resolve_btfids can successfully patch .BTF_ids in modules
>>   - kernel successfully loads modules with BTF and kfuncs (tested 6.6 LTS)
>>
>> Huzzah!
>>
>>
>> Ying:
>>
>> Thank you for developing these MIPS patches. In your view, are the MIPS
>> changes now complete, or do you plan further updates that might improve or
>> impact parsing DWARF debug/reloc info in apps like pahole?
>>
>>
>> Mark:
>>
>> Given that BTF usage on Linux/MIPS is basically broken without these
>> patches, could I request some of your review time for them to be merged? If
>> it's helpful, my branch [3] includes all patches with conflicts fixed, and
>> I also successfully ran the elfutils self-tests (including MIPS from Ying).
>> Please feel free to add for these patches:
>>
>> Tested-by: Tony Ambardar 
> Yes, I would very much like to integrate the rest of these patches. But
> I keep running out of time. The main issues were that, as you noticed,
> the patches mix backend and frontend tool changes a bit. 

The reason about the mixture and title is that only by fixing the acquisition 
of relocation in

Re: [PATCH] test: Add mips in run-allregs.sh and run-readelf-mixed-corenote.sh

2024-07-09 Thread Ying Huang
Ping


在 2024/5/24 17:41, Ying Huang 写道:
> From: Ying Huang 
>
> * backends/Makefile.am (mips_SRCS): Add mips64_corenote.c.
> * backends/mips64_corenote.c: New file.
> * backends/mips_corenote.c: Add fpregset.
> * backends/mips_init.c: HOOK mips64_corenote.
> * libebl/eblcorenotetypename.c: Add KNOWNSTYPE MIPS_FP_MODE MIPS_MSA.
> * tests/run-allregs.sh: Add test for testfile-mips64-core.
> * tests/run-readelf-mixed-corenote.sh: Likewise.
> * tests/testfile-mips64-core.bz2: New file.
> ---
>  backends/Makefile.am|   2 +-
>  backends/mips64_corenote.c  |   2 +
>  backends/mips_corenote.c|  29 +++--
>  backends/mips_init.c|   7 +-
>  libebl/eblcorenotetypename.c|   2 +
>  tests/run-allregs.sh|  79 ++
>  tests/run-readelf-mixed-corenote.sh |  97 
>  tests/testfile-mips64-core.bz2  | Bin 0 -> 30891 bytes
>  8 files changed, 211 insertions(+), 7 deletions(-)
>  create mode 100644 backends/mips64_corenote.c
>  create mode 100644 tests/testfile-mips64-core.bz2
>
> diff --git a/backends/Makefile.am b/backends/Makefile.am
> index 926464ae..4e00d01f 100644
> --- a/backends/Makefile.am
> +++ b/backends/Makefile.am
> @@ -104,7 +104,7 @@ arc_SRCS = arc_init.c arc_symbol.c
>  
>  mips_SRCS = mips_init.c mips_symbol.c mips_initreg.c \
>   mips_cfi.c mips_unwind.c mips_regs.c mips_retval.c \
> - mips_corenote.c
> + mips_corenote.c mips64_corenote.c
>  
>  hexagon_SRCS = hexagon_init.c hexagon_symbol.c
>  
> diff --git a/backends/mips64_corenote.c b/backends/mips64_corenote.c
> new file mode 100644
> index ..f1186056
> --- /dev/null
> +++ b/backends/mips64_corenote.c
> @@ -0,0 +1,2 @@
> +#define BITS 64
> +#include "mips_corenote.c"
> diff --git a/backends/mips_corenote.c b/backends/mips_corenote.c
> index aeadeb17..823add27 100644
> --- a/backends/mips_corenote.c
> +++ b/backends/mips_corenote.c
> @@ -35,15 +35,14 @@
>  #include 
>  #include 
>  #include 
> -
> -#define BACKEND  mips_
>  #include "libebl_CPU.h"
>  
> -#define BITS 64
>  #ifndef BITS
> -# define BITS32
> +# define BITS 32
> +#define BACKEND  mips_
>  #else
> -# define BITS64
> +# define BITS 64
> +# define BACKEND mips64_
>  #endif
>  
>  #define PRSTATUS_REGS_SIZE   (45 * (BITS / 8))
> @@ -61,6 +60,23 @@ static const Ebl_Register_Location prstatus_regs[] =
>  .pc_register = true  
> \
>}
>  
> +static const Ebl_Register_Location mips_fpregset_regs[] =
> +  {
> +{ .offset = 0, .regno = 38, .count = 32, .bits = 64 }, /* fp0-fp31 */
> +  };
> +
> +static const Ebl_Core_Item mips_fpregset_items[] =
> +  {
> +{
> +  .name = "fcs", .type = ELF_T_WORD, .format = 'x',
> +  .offset = 32 * 8, .group = "register"
> +},
> +{
> +  .name = "fir", .type = ELF_T_WORD, .format = 'x',
> +  .offset = 32 * 8 + 4, .group = "register"
> +}
> +  };
> +
>  #if BITS == 32
>  # define ULONG   uint32_t
>  # define ALIGN_ULONG 4
> @@ -82,4 +98,7 @@ static const Ebl_Register_Location prstatus_regs[] =
>  #define TYPE_UID_T   ELF_T_WORD
>  #define TYPE_GID_T   ELF_T_WORD
>  
> +#define  EXTRA_NOTES \
> +  EXTRA_REGSET_ITEMS (NT_FPREGSET, 32 * 8 + 4 * 2, mips_fpregset_regs, 
> mips_fpregset_items)
> +
>  #include "linux-core-note.c"
> diff --git a/backends/mips_init.c b/backends/mips_init.c
> index e7e4b287..6743e2e5 100644
> --- a/backends/mips_init.c
> +++ b/backends/mips_init.c
> @@ -40,6 +40,8 @@
>  /* This defines the common reloc hooks based on mips_reloc.def.  */
>  #include "common-reloc.c"
>  
> +extern __typeof (EBLHOOK (core_note)) mips64_core_note attribute_hidden;
> +
>  Ebl *
>  mips_init (Elf *elf __attribute__ ((unused)),
>  GElf_Half machine __attribute__ ((unused)),
> @@ -53,7 +55,10 @@ mips_init (Elf *elf __attribute__ ((unused)),
>HOOK (eh, unwind);
>HOOK (eh, register_info);
>HOOK (eh, return_value_location);
> -  HOOK (eh, core_note);
> +  if (eh->class == ELFCLASS64)
> +eh->core_note = mips64_core_note;
> +  else
> +HOOK (eh, core_note);
>eh->frame_nregs = 71;
>return eh;
>  }
> diff --git a/libebl/eblcorenotetypename.c b/libebl/eblcorenotetypename.c
> index 0e790d06..73f6e478 100644
> --- a/libebl/eblcorenotetypename.c
> +++ b/libebl/eblcorenotetypename.c
> @@ -94,6 +94,8 @@ ebl_cor

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-07-09 Thread Ying Huang
Sorry, the diff has some formatting issues. And the test results use the 
existing patches 2/6 3/6 4/6.

diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c index 
d695f659..fd974bdf 100644 --- a/libelf/gelf_getrela.c +++ 
b/libelf/gelf_getrela.c @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int 
ndx, GElf_Rela *dst) result = NULL; } else - result = memcpy (dst, 
&((Elf64_Rela *) data_scn->d.d_buf)[ndx], - sizeof (Elf64_Rela)); + { + result 
= memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx], + sizeof 
(Elf64_Rela)); + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = __gelf_getehdr_rdlock 
(scn->elf, &ehdr_mem); + if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
ehdr->e_ident[EI_DATA] == ELFDATA2LSB) + { + Elf64_Xword info = dst->r_info; + 
dst->r_info = (((info & 0x) << 32) + | ((info >> 56) & 0xff) + | ((info 
>> 40) & 0xff00) + | ((info >> 24) & 0xff) + | ((info >> 8) & 0xff00)); 
+ } + } } rwlock_unlock (scn->elf->lock); diff --git 
a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c index 
88252703..592d74b9 100644 --- a/libelf/gelf_update_rela.c +++
b/libelf/gelf_update_rela.c @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data *dst, 
int ndx, GElf_Rela *src) goto out; } - ((Elf64_Rela *) data_scn->d.d_buf)[ndx] 
= *src; + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = __gelf_getehdr_rdlock 
(scn->elf, &ehdr_mem); + GElf_Rela rela = *src; + if(ehdr != NULL && 
ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == ELFDATA2LSB) + { + 
Elf64_Xword info = rela.r_info; + rela.r_info = (info >> 32 + | ((info << 56) & 
0xff00) + | ((info << 40) & 0xff) + | ((info << 24) & 
0xff00) + | ((info << 8) & 0xff)); + } + + ((Elf64_Rela *) 
data_scn->d.d_buf)[ndx] = rela; } result = 1;

在 2024/7/10 10:37, Ying Huang 写道:
> Hi Mark,
>
> I have done tests on mips32 littele/big endian and mips64 little 
> endian(because now I did not have mips64 big endian lab).
>
> Attached are the test results and I compared them.
>
> This is the change I mentioned last time to replace file 
> libelf/elf_getdata.c. What do you think of this change?
>
> /*diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c index 
> d695f659..fd974bdf 100644 --- a/libelf/gelf_getrela.c +++ 
> b/libelf/gelf_getrela.c @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int 
> ndx, GElf_Rela *dst) result = NULL; } else - result = memcpy (dst, 
> &((Elf64_Rela *) data_scn->d.d_buf)[ndx], - sizeof (Elf64_Rela)); + { + 
> result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx], + sizeof 
> (Elf64_Rela)); + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = 
> __gelf_getehdr_rdlock (scn->elf, &ehdr_mem); + if(ehdr != NULL && 
> ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == ELFDATA2LSB) + { + 
> Elf64_Xword info = dst->r_info; + dst->r_info = (((info & 0x) << 32) 
> + | ((info >> 56) & 0xff) + | ((info >> 40) & 0xff00) + | ((info >> 24) & 
> 0xff) + | ((info >> 8) & 0xff00)); + } + } }*/ /*rwlock_unlock 
> (scn->elf->lock);*/
>
> /*diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c index 
> 88252703..592d74b9 100644 --- a/libelf/gelf_update_rela.c +++ 
> b/libelf/gelf_update_rela.c @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data 
> *dst, int ndx, GElf_Rela *src) goto out; } - ((Elf64_Rela *) 
> data_scn->d.d_buf)[ndx] = *src; + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = 
> __gelf_getehdr_rdlock (scn->elf, &ehdr_mem); + GElf_Rela rela = *src; + 
> if(ehdr != NULL && ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == 
> ELFDATA2LSB) + { + Elf64_Xword info = rela.r_info; + rela.r_info = (info >> 
> 32 + | ((info << 56) & 0xff00) + | ((info << 40) & 
> 0xff) + | ((info << 24) & 0xff00) + | ((info << 8) & 
> 0xff)); + } + + ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela; } 
> result = 1;*/
>
> 1. Target: mips64el-linux-gnuabi64
>
> huangying@Sleepygon:~/elf/elfutils_main$ cat mips64el_with_patch.log | grep 
> FAIL
> # XFAIL: 0
> # FAIL:  1
> FAIL: run-sysroot.sh
> FAIL run-sysroot.sh (exit status: 1)
>
> ---This failed test case is related to src/stack and was investigating.
>
> huangying@Sleepygon:~/elf/elfutils_main$ cat mips64el_without_patch.log | 
> grep FAIL
> # XFAIL: 0
> # FAIL:  7
> FAIL: run-strip-strmerge.sh
> FAIL run-strip-strmerge.sh (exit status: 1)
> FAIL: run-strip-reloc-self.sh
> FAIL run-strip-reloc-self.sh (exit status: 1)
> FAIL: run-elflint-self.sh
> FAIL run-elfli

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-07-09 Thread Ying Huang
diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c
index d695f659..fd974bdf 100644
--- a/libelf/gelf_getrela.c
+++ b/libelf/gelf_getrela.c
@@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int ndx, GElf_Rela *dst)
  result = NULL;
    }
   else
-   result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
-    sizeof (Elf64_Rela));
+   {
+ result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
+  sizeof (Elf64_Rela));
+ GElf_Ehdr ehdr_mem;
+ GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
+ if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
+   {
+ Elf64_Xword info = dst->r_info;
+ dst->r_info = (((info & 0x) << 32)
+  | ((info >> 56) & 0xff)
+  | ((info >> 40) & 0xff00)
+  | ((info >> 24) & 0xff)
+  | ((info >> 8) & 0xff00));
+   }
+    }
 }
 
   rwlock_unlock (scn->elf->lock);

diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c
index 88252703..592d74b9 100644
--- a/libelf/gelf_update_rela.c
+++ b/libelf/gelf_update_rela.c
@@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data *dst, int ndx, GElf_Rela *src)
  goto out;
    }
 
-  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = *src;
+  GElf_Ehdr ehdr_mem;
+  GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
+  GElf_Rela rela = *src;
+  if(ehdr != NULL && ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] 
== ELFDATA2LSB)
+    {
+ Elf64_Xword info = rela.r_info;
+ rela.r_info = (info >> 32
+   | ((info << 56) & 0xff00)
+   | ((info << 40) & 0xff)
+   | ((info << 24) & 0xff00)
+   | ((info << 8) & 0xff));
+   }
+
+  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela;
 }
 
   result = 1;


在 2024/7/10 10:37, Ying Huang 写道:
> Hi Mark,
>
> I have done tests on mips32 littele/big endian and mips64 little 
> endian(because now I did not have mips64 big endian lab).
>
> Attached are the test results and I compared them.
>
> This is the change I mentioned last time to replace file 
> libelf/elf_getdata.c. What do you think of this change?
>
> /*diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c index 
> d695f659..fd974bdf 100644 --- a/libelf/gelf_getrela.c +++ 
> b/libelf/gelf_getrela.c @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int 
> ndx, GElf_Rela *dst) result = NULL; } else - result = memcpy (dst, 
> &((Elf64_Rela *) data_scn->d.d_buf)[ndx], - sizeof (Elf64_Rela)); + { + 
> result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx], + sizeof 
> (Elf64_Rela)); + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = 
> __gelf_getehdr_rdlock (scn->elf, &ehdr_mem); + if(ehdr != NULL && 
> ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == ELFDATA2LSB) + { + 
> Elf64_Xword info = dst->r_info; + dst->r_info = (((info & 0x) << 32) 
> + | ((info >> 56) & 0xff) + | ((info >> 40) & 0xff00) + | ((info >> 24) & 
> 0xff) + | ((info >> 8) & 0xff00)); + } + } }*/ /*rwlock_unlock 
> (scn->elf->lock);*/
>
> /*diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c index 
> 88252703..592d74b9 100644 --- a/libelf/gelf_update_rela.c +++ 
> b/libelf/gelf_update_rela.c @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data 
> *dst, int ndx, GElf_Rela *src) goto out; } - ((Elf64_Rela *) 
> data_scn->d.d_buf)[ndx] = *src; + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = 
> __gelf_getehdr_rdlock (scn->elf, &ehdr_mem); + GElf_Rela rela = *src; + 
> if(ehdr != NULL && ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == 
> ELFDATA2LSB) + { + Elf64_Xword info = rela.r_info; + rela.r_info = (info >> 
> 32 + | ((info << 56) & 0xff00) + | ((info << 40) & 
> 0xff) + | ((info << 24) & 0xff00) + | ((info << 8) & 
> 0xff)); + } + + ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela; } 
> result = 1;*/
>
> 1. Target: mips64el-linux-gnuabi64
>
> huangying@Sleepygon:~/elf/elfutils_main$ cat mips64el_with_patch.log | grep 
> FAIL
> # XFAIL: 0
> # FAIL:  1
> FAIL: run-sysroot.sh
> FAIL run-sysroot.sh (exit status: 1)
>
> ---This failed test case is related to src/stack and was investigating.
>
> huangying@S

Re: [PATCH v2 3/3] tests: add test for eu-stack --sysroot

2024-07-14 Thread Ying Huang
Hi Aaron,

I update and do make check, the results are OK.

Thanks for your timely modification.

Ying

在 2024/7/12 23:38, Aaron Merey 写道:
> Hi Ying,
>
> On Wed, Jul 10, 2024 at 2:06 PM Aaron Merey  wrote:
>> On Wed, Jul 10, 2024 at 4:33 AM Ying Huang  
>> wrote:
>>> + testrun diff /tmp/tmp.bCCbATKu43/stack.out -
>>> + built_testrun diff /tmp/tmp.bCCbATKu43/stack.out -
>>> + 
>>> LD_LIBRARY_PATH=/home/huangying/elf/elfutils_main/libdw:/home/huangying/elf/elfutils_main/backends:/home/huangying/elf/elfutils_main/libelf:/home/huangying/elf/elfutils_main/libasm:/home/huangying/elf/elfutils_main/debuginfod
>>> + diff /tmp/tmp.bCCbATKu43/stack.out -
>>> 4,5c4,5
>>> < #1  0xe5663f20
>>> < #2  0xe5667a98
>>> ---
>>>> #1  0xe5663f20 kill_shell
>>>> #2  0xe5667a98 termsig_handler.part.0
>>> + rm -rf -- /tmp/tmp.bCCbATKu43
>>> FAIL run-sysroot.sh (exit status: 1)
>>>
>>>
>>> There are two lines where the function name cannot be parsed.
>> I took a look at this but I'm still not sure what's going on.  I ran
>> the run-sysroot.sh testcase by hand on the extracted contents of
>> testfile-sysroot.tar.bz2.  eu-stack's /proc/PID/fd contained the
>> correct binaries located under the sysroot.  The testcase passes
>> on my Fedora 40 x86_64 machine as well as on all elfutils buildbots.
>>
>> It's also strange that those two particular stack frames from
>> /bin/bash are missing the function name yet the other /bin/bash
>> frames include proper function names.
>>
>> I'll look into this some more.
> This issue turned out to be related to .gnu_debugdata.  The 2 missing
> symbols you reported are contained in this section.  It's LZMA-compressed
> so if elfutils isn't built with LZMA support then the section isn't read.
>
> I did some testing on Debian 6.1.94-1 (2024-06-21) x86_64. LZMA/xz wasn't
> pre-installed and I was able to reproduce the test failure.  I pushed a
> commit (39e962f063b5e) that modifies run-sysroot.sh to remove these two
> frames from the backtrace being tested, so that the result doesn't depend
> on LZMA support.
>
> Aaron
>


Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-07-29 Thread Ying Huang
Ping


Thanks,

Ying


在 2024/7/10 10:37, Ying Huang 写道:
> Hi Mark,
>
> I have done tests on mips32 littele/big endian and mips64 little 
> endian(because now I did not have mips64 big endian lab).
>
> Attached are the test results and I compared them.
>
> This is the change I mentioned last time to replace file 
> libelf/elf_getdata.c. What do you think of this change?
>
> /*diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c index 
> d695f659..fd974bdf 100644 --- a/libelf/gelf_getrela.c +++ 
> b/libelf/gelf_getrela.c @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int 
> ndx, GElf_Rela *dst) result = NULL; } else - result = memcpy (dst, 
> &((Elf64_Rela *) data_scn->d.d_buf)[ndx], - sizeof (Elf64_Rela)); + { + 
> result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx], + sizeof 
> (Elf64_Rela)); + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = 
> __gelf_getehdr_rdlock (scn->elf, &ehdr_mem); + if(ehdr != NULL && 
> ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == ELFDATA2LSB) + { + 
> Elf64_Xword info = dst->r_info; + dst->r_info = (((info & 0x) << 32) 
> + | ((info >> 56) & 0xff) + | ((info >> 40) & 0xff00) + | ((info >> 24) & 
> 0xff) + | ((info >> 8) & 0xff00)); + } + } }*/ /*rwlock_unlock 
> (scn->elf->lock);*/
>
> /*diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c index 
> 88252703..592d74b9 100644 --- a/libelf/gelf_update_rela.c +++ 
> b/libelf/gelf_update_rela.c @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data 
> *dst, int ndx, GElf_Rela *src) goto out; } - ((Elf64_Rela *) 
> data_scn->d.d_buf)[ndx] = *src; + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = 
> __gelf_getehdr_rdlock (scn->elf, &ehdr_mem); + GElf_Rela rela = *src; + 
> if(ehdr != NULL && ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == 
> ELFDATA2LSB) + { + Elf64_Xword info = rela.r_info; + rela.r_info = (info >> 
> 32 + | ((info << 56) & 0xff00) + | ((info << 40) & 
> 0xff) + | ((info << 24) & 0xff00) + | ((info << 8) & 
> 0xff)); + } + + ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela; } 
> result = 1;*/
>
> 1. Target: mips64el-linux-gnuabi64
>
> huangying@Sleepygon:~/elf/elfutils_main$ cat mips64el_with_patch.log | grep 
> FAIL
> # XFAIL: 0
> # FAIL:  1
> FAIL: run-sysroot.sh
> FAIL run-sysroot.sh (exit status: 1)
>
> ---This failed test case is related to src/stack and was investigating.
>
> huangying@Sleepygon:~/elf/elfutils_main$ cat mips64el_without_patch.log | 
> grep FAIL
> # XFAIL: 0
> # FAIL:  7
> FAIL: run-strip-strmerge.sh
> FAIL run-strip-strmerge.sh (exit status: 1)
> FAIL: run-strip-reloc-self.sh
> FAIL run-strip-reloc-self.sh (exit status: 1)
> FAIL: run-elflint-self.sh
> FAIL run-elflint-self.sh (exit status: 1)
> FAIL: run-varlocs-self.sh
> FAIL run-varlocs-self.sh (exit status: 1)
> FAIL: run-exprlocs-self.sh
> FAIL run-exprlocs-self.sh (exit status: 1)
> FAIL: run-reverse-sections-self.sh
> FAIL run-reverse-sections-self.sh (exit status: 1)
> FAIL: run-sysroot.sh
> FAIL run-sysroot.sh (exit status: 1)
>
>
> 2. Target: mipsel-linux-gnu:
>
> root@debian-sid-mipsel:~/elfutils_6# cat mips32el_with_patch.log | grep FAIL
> # XFAIL: 0
> # FAIL:  10
> FAIL: run-bug1-test.sh
> FAIL run-bug1-test.sh (exit status: 1)
> FAIL: run-backtrace-native.sh
> FAIL run-backtrace-native.sh (exit status: 1)
> FAIL: run-backtrace-dwarf.sh
> FAIL run-backtrace-dwarf.sh (exit status: 1)
> FAIL: run-backtrace-native-core.sh
> FAIL run-backtrace-native-core.sh (exit status: 1)
> FAIL: run-deleted.sh
> FAIL run-deleted.sh (exit status: 1)
> FAIL: elfstrtab
> FAIL elfstrtab (exit status: 1)
> FAIL: dwfl-proc-attach
> FAIL dwfl-proc-attach (exit status: 255)
> FAIL: emptyfile
> FAIL emptyfile (exit status: 1)
> FAIL: run-copyadd-sections.sh
> FAIL run-copyadd-sections.sh (exit status: 1)
> FAIL: run-sysroot.sh
> FAIL run-sysroot.sh (exit status: 1)
>
> These failed test cases are because the docker container does not 
> support some features.
>
> root@debian-sid-mipsel:~/elfutils_6# cat mips32el_without_patch.log | grep 
> FAIL
> # XFAIL: 0
> # FAIL:  14
> *FAIL: run-strip-strmerge.sh
> FAIL run-strip-strmerge.sh (exit status: 1)
> FAIL: run-strip-reloc-self.sh
> FAIL run-strip-reloc-self.sh (exit status: 1)
> FAIL: run-elflint-self.sh
> FAIL run-elflint-self.sh (exit status: 1)*
> FAIL: run-bug1-test.sh
> FAIL run-bug1-test.sh (exit status: 1)
> FAIL: run-backtrace-native.sh
> FAIL run-backtrace-native.sh (exit status: 1)
> FAIL: run-ba

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-08-12 Thread Ying Huang
Ping


Thanks,

Ying

在 2024/7/29 17:56, Ying Huang 写道:
> Ping
>
>
> Thanks,
>
> Ying
>
>
> 在 2024/7/10 10:37, Ying Huang 写道:
>> Hi Mark,
>>
>> I have done tests on mips32 littele/big endian and mips64 little 
>> endian(because now I did not have mips64 big endian lab).
>>
>> Attached are the test results and I compared them.
>>
>> This is the change I mentioned last time to replace file 
>> libelf/elf_getdata.c. What do you think of this change?
>>
>> /*diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c index 
>> d695f659..fd974bdf 100644 --- a/libelf/gelf_getrela.c +++ 
>> b/libelf/gelf_getrela.c @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int 
>> ndx, GElf_Rela *dst) result = NULL; } else - result = memcpy (dst, 
>> &((Elf64_Rela *) data_scn->d.d_buf)[ndx], - sizeof (Elf64_Rela)); + { + 
>> result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx], + sizeof 
>> (Elf64_Rela)); + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = 
>> __gelf_getehdr_rdlock (scn->elf, &ehdr_mem); + if(ehdr != NULL && 
>> ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == ELFDATA2LSB) + { + 
>> Elf64_Xword info = dst->r_info; + dst->r_info = (((info & 0x) << 32) 
>> + | ((info >> 56) & 0xff) + | ((info >> 40) & 0xff00) + | ((info >> 24) & 
>> 0xff) + | ((info >> 8) & 0xff00)); + } + } }*/ /*rwlock_unlock 
>> (scn->elf->lock);*/
>>
>> /*diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c index 
>> 88252703..592d74b9 100644 --- a/libelf/gelf_update_rela.c +++ 
>> b/libelf/gelf_update_rela.c @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data 
>> *dst, int ndx, GElf_Rela *src) goto out; } - ((Elf64_Rela *) 
>> data_scn->d.d_buf)[ndx] = *src; + GElf_Ehdr ehdr_mem; + GElf_Ehdr *ehdr = 
>> __gelf_getehdr_rdlock (scn->elf, &ehdr_mem); + GElf_Rela rela = *src; + 
>> if(ehdr != NULL && ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] == 
>> ELFDATA2LSB) + { + Elf64_Xword info = rela.r_info; + rela.r_info = (info >> 
>> 32 + | ((info << 56) & 0xff00) + | ((info << 40) & 
>> 0xff) + | ((info << 24) & 0xff00) + | ((info << 8) & 
>> 0xff)); + } + + ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela; } 
>> result = 1;*/
>>
>> 1. Target: mips64el-linux-gnuabi64
>>
>> huangying@Sleepygon:~/elf/elfutils_main$ cat mips64el_with_patch.log | grep 
>> FAIL
>> # XFAIL: 0
>> # FAIL:  1
>> FAIL: run-sysroot.sh
>> FAIL run-sysroot.sh (exit status: 1)
>>
>> ---This failed test case is related to src/stack and was investigating.
>>
>> huangying@Sleepygon:~/elf/elfutils_main$ cat mips64el_without_patch.log | 
>> grep FAIL
>> # XFAIL: 0
>> # FAIL:  7
>> FAIL: run-strip-strmerge.sh
>> FAIL run-strip-strmerge.sh (exit status: 1)
>> FAIL: run-strip-reloc-self.sh
>> FAIL run-strip-reloc-self.sh (exit status: 1)
>> FAIL: run-elflint-self.sh
>> FAIL run-elflint-self.sh (exit status: 1)
>> FAIL: run-varlocs-self.sh
>> FAIL run-varlocs-self.sh (exit status: 1)
>> FAIL: run-exprlocs-self.sh
>> FAIL run-exprlocs-self.sh (exit status: 1)
>> FAIL: run-reverse-sections-self.sh
>> FAIL run-reverse-sections-self.sh (exit status: 1)
>> FAIL: run-sysroot.sh
>> FAIL run-sysroot.sh (exit status: 1)
>>
>>
>> 2. Target: mipsel-linux-gnu:
>>
>> root@debian-sid-mipsel:~/elfutils_6# cat mips32el_with_patch.log | grep FAIL
>> # XFAIL: 0
>> # FAIL:  10
>> FAIL: run-bug1-test.sh
>> FAIL run-bug1-test.sh (exit status: 1)
>> FAIL: run-backtrace-native.sh
>> FAIL run-backtrace-native.sh (exit status: 1)
>> FAIL: run-backtrace-dwarf.sh
>> FAIL run-backtrace-dwarf.sh (exit status: 1)
>> FAIL: run-backtrace-native-core.sh
>> FAIL run-backtrace-native-core.sh (exit status: 1)
>> FAIL: run-deleted.sh
>> FAIL run-deleted.sh (exit status: 1)
>> FAIL: elfstrtab
>> FAIL elfstrtab (exit status: 1)
>> FAIL: dwfl-proc-attach
>> FAIL dwfl-proc-attach (exit status: 255)
>> FAIL: emptyfile
>> FAIL emptyfile (exit status: 1)
>> FAIL: run-copyadd-sections.sh
>> FAIL run-copyadd-sections.sh (exit status: 1)
>> FAIL: run-sysroot.sh
>> FAIL run-sysroot.sh (exit status: 1)
>>
>> These failed test cases are because the docker container does not 
>> support some features.
>>
>> root@debian-sid-mipsel:~/elfutils_6# cat mips32el_w

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-08-30 Thread Ying Huang
Hi Mark,

What can I do to process these patches?

If you did not accept changes in current patch, how about the following changes 
method?

diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c
index d695f659..fd974bdf 100644
--- a/libelf/gelf_getrela.c
+++ b/libelf/gelf_getrela.c
@@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int ndx, GElf_Rela *dst)
  result = NULL;
    }
   else
-   result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
-    sizeof (Elf64_Rela));
+   {
+ result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
+  sizeof (Elf64_Rela));
+ GElf_Ehdr ehdr_mem;
+ GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
+ if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
+   {
+ Elf64_Xword info = dst->r_info;
+ dst->r_info = (((info & 0x) << 32)
+  | ((info >> 56) & 0xff)
+  | ((info >> 40) & 0xff00)
+  | ((info >> 24) & 0xff)
+  | ((info >> 8) & 0xff00));
+   }
+    }
 }
 
   rwlock_unlock (scn->elf->lock);

diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c
index 88252703..592d74b9 100644
--- a/libelf/gelf_update_rela.c
+++ b/libelf/gelf_update_rela.c
@@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data *dst, int ndx, GElf_Rela *src)
  goto out;
    }
 
-  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = *src;
+  GElf_Ehdr ehdr_mem;
+  GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
+  GElf_Rela rela = *src;
+  if(ehdr != NULL && ehdr->e_machine == EM_MIPS && ehdr->e_ident[EI_DATA] 
== ELFDATA2LSB)
+    {
+ Elf64_Xword info = rela.r_info;
+ rela.r_info = (info >> 32
+   | ((info << 56) & 0xff00)
+   | ((info << 40) & 0xff)
+   | ((info << 24) & 0xff00)
+   | ((info << 8) & 0xff));
+   }
+
+  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela;
 }
 
   result = 1;


If you have any other questions, please let me know.


Thanks,

Ying

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-09-14 Thread Ying Huang
Ping


Thanks,

Ying


在 2024/8/30 17:04, Ying Huang 写道:
> Hi Mark,
>
> What can I do to process these patches?
>
> If you did not accept changes in current patch, how about the following 
> changes method?
>
> diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c
> index d695f659..fd974bdf 100644
> --- a/libelf/gelf_getrela.c
> +++ b/libelf/gelf_getrela.c
> @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int ndx, GElf_Rela *dst)
>   result = NULL;
>     }
>    else
> -   result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
> -    sizeof (Elf64_Rela));
> +   {
> + result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
> +  sizeof (Elf64_Rela));
> + GElf_Ehdr ehdr_mem;
> + GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
> + if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
> +   {
> + Elf64_Xword info = dst->r_info;
> + dst->r_info = (((info & 0x) << 32)
> +  | ((info >> 56) & 0xff)
> +  | ((info >> 40) & 0xff00)
> +  | ((info >> 24) & 0xff)
> +  | ((info >> 8) & 0xff00));
> +   }
> +    }
>  }
>  
>    rwlock_unlock (scn->elf->lock);
>
> diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c
> index 88252703..592d74b9 100644
> --- a/libelf/gelf_update_rela.c
> +++ b/libelf/gelf_update_rela.c
> @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data *dst, int ndx, GElf_Rela *src)
>   goto out;
>     }
>  
> -  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = *src;
> +  GElf_Ehdr ehdr_mem;
> +  GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
> +  GElf_Rela rela = *src;
> +  if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
> +    {
> + Elf64_Xword info = rela.r_info;
> + rela.r_info = (info >> 32
> +   | ((info << 56) & 0xff00)
> +   | ((info << 40) & 0xff)
> +   | ((info << 24) & 0xff00)
> +   | ((info << 8) & 0xff));
> +   }
> +
> +  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela;
>  }
>  
>    result = 1;
>
>
> If you have any other questions, please let me know.
>
>
> Thanks,
>
> Ying
>

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-10-12 Thread Ying Huang
Ping


Thanks,

Ying


在 2024/9/27 17:52, Ying Huang 写道:
> Ping
>
>
> Thanks,
>
> Ying
>
>
> 在 2024/9/14 17:45, Ying Huang 写道:
>> Ping
>>
>>
>> Thanks,
>>
>> Ying
>>
>>
>> 在 2024/8/30 17:04, Ying Huang 写道:
>>> Hi Mark,
>>>
>>> What can I do to process these patches?
>>>
>>> If you did not accept changes in current patch, how about the following 
>>> changes method?
>>>
>>> diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c
>>> index d695f659..fd974bdf 100644
>>> --- a/libelf/gelf_getrela.c
>>> +++ b/libelf/gelf_getrela.c
>>> @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int ndx, GElf_Rela *dst)
>>>   result = NULL;
>>>     }
>>>    else
>>> -   result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
>>> -    sizeof (Elf64_Rela));
>>> +   {
>>> + result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
>>> +  sizeof (Elf64_Rela));
>>> + GElf_Ehdr ehdr_mem;
>>> + GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
>>> + if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
>>> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
>>> +   {
>>> + Elf64_Xword info = dst->r_info;
>>> + dst->r_info = (((info & 0x) << 32)
>>> +  | ((info >> 56) & 0xff)
>>> +  | ((info >> 40) & 0xff00)
>>> +  | ((info >> 24) & 0xff)
>>> +  | ((info >> 8) & 0xff00));
>>> +   }
>>> +    }
>>>  }
>>>  
>>>    rwlock_unlock (scn->elf->lock);
>>>
>>> diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c
>>> index 88252703..592d74b9 100644
>>> --- a/libelf/gelf_update_rela.c
>>> +++ b/libelf/gelf_update_rela.c
>>> @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data *dst, int ndx, GElf_Rela *src)
>>>   goto out;
>>>     }
>>>  
>>> -  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = *src;
>>> +  GElf_Ehdr ehdr_mem;
>>> +  GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
>>> +  GElf_Rela rela = *src;
>>> +  if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
>>> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
>>> +    {
>>> + Elf64_Xword info = rela.r_info;
>>> + rela.r_info = (info >> 32
>>> +   | ((info << 56) & 0xff00)
>>> +   | ((info << 40) & 0xff)
>>> +   | ((info << 24) & 0xff00)
>>> +   | ((info << 8) & 0xff));
>>> +   }
>>> +
>>> +  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela;
>>>  }
>>>  
>>>    result = 1;
>>>
>>>
>>> If you have any other questions, please let me know.
>>>
>>>
>>> Thanks,
>>>
>>> Ying
>>>

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-11-01 Thread Ying Huang
Ping


Thanks,

Ying

在 2024/10/12 17:40, Ying Huang 写道:
> Ping
>
>
> Thanks,
>
> Ying
>
>
> 在 2024/9/27 17:52, Ying Huang 写道:
>> Ping
>>
>>
>> Thanks,
>>
>> Ying
>>
>>
>> 在 2024/9/14 17:45, Ying Huang 写道:
>>> Ping
>>>
>>>
>>> Thanks,
>>>
>>> Ying
>>>
>>>
>>> 在 2024/8/30 17:04, Ying Huang 写道:
>>>> Hi Mark,
>>>>
>>>> What can I do to process these patches?
>>>>
>>>> If you did not accept changes in current patch, how about the following 
>>>> changes method?
>>>>
>>>> diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c
>>>> index d695f659..fd974bdf 100644
>>>> --- a/libelf/gelf_getrela.c
>>>> +++ b/libelf/gelf_getrela.c
>>>> @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int ndx, GElf_Rela *dst)
>>>>   result = NULL;
>>>>     }
>>>>    else
>>>> -   result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
>>>> -    sizeof (Elf64_Rela));
>>>> +   {
>>>> + result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
>>>> +  sizeof (Elf64_Rela));
>>>> + GElf_Ehdr ehdr_mem;
>>>> + GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
>>>> + if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
>>>> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
>>>> +   {
>>>> + Elf64_Xword info = dst->r_info;
>>>> + dst->r_info = (((info & 0x) << 32)
>>>> +  | ((info >> 56) & 0xff)
>>>> +  | ((info >> 40) & 0xff00)
>>>> +  | ((info >> 24) & 0xff)
>>>> +  | ((info >> 8) & 0xff00));
>>>> +   }
>>>> +    }
>>>>  }
>>>>  
>>>>    rwlock_unlock (scn->elf->lock);
>>>>
>>>> diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c
>>>> index 88252703..592d74b9 100644
>>>> --- a/libelf/gelf_update_rela.c
>>>> +++ b/libelf/gelf_update_rela.c
>>>> @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data *dst, int ndx, GElf_Rela 
>>>> *src)
>>>>   goto out;
>>>>     }
>>>>  
>>>> -  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = *src;
>>>> +  GElf_Ehdr ehdr_mem;
>>>> +  GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
>>>> +  GElf_Rela rela = *src;
>>>> +  if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
>>>> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
>>>> +    {
>>>> + Elf64_Xword info = rela.r_info;
>>>> + rela.r_info = (info >> 32
>>>> +   | ((info << 56) & 0xff00)
>>>> +   | ((info << 40) & 0xff)
>>>> +   | ((info << 24) & 0xff00)
>>>> +   | ((info << 8) & 0xff));
>>>> +   }
>>>> +
>>>> +  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela;
>>>>  }
>>>>  
>>>>    result = 1;
>>>>
>>>>
>>>> If you have any other questions, please let me know.
>>>>
>>>>
>>>> Thanks,
>>>>
>>>> Ying
>>>>

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-09-27 Thread Ying Huang
Ping


Thanks,

Ying


在 2024/9/14 17:45, Ying Huang 写道:
> Ping
>
>
> Thanks,
>
> Ying
>
>
> 在 2024/8/30 17:04, Ying Huang 写道:
>> Hi Mark,
>>
>> What can I do to process these patches?
>>
>> If you did not accept changes in current patch, how about the following 
>> changes method?
>>
>> diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c
>> index d695f659..fd974bdf 100644
>> --- a/libelf/gelf_getrela.c
>> +++ b/libelf/gelf_getrela.c
>> @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int ndx, GElf_Rela *dst)
>>   result = NULL;
>>     }
>>    else
>> -   result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
>> -    sizeof (Elf64_Rela));
>> +   {
>> + result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
>> +  sizeof (Elf64_Rela));
>> + GElf_Ehdr ehdr_mem;
>> + GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
>> + if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
>> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
>> +   {
>> + Elf64_Xword info = dst->r_info;
>> + dst->r_info = (((info & 0x) << 32)
>> +  | ((info >> 56) & 0xff)
>> +  | ((info >> 40) & 0xff00)
>> +  | ((info >> 24) & 0xff)
>> +  | ((info >> 8) & 0xff00));
>> +   }
>> +    }
>>  }
>>  
>>    rwlock_unlock (scn->elf->lock);
>>
>> diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c
>> index 88252703..592d74b9 100644
>> --- a/libelf/gelf_update_rela.c
>> +++ b/libelf/gelf_update_rela.c
>> @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data *dst, int ndx, GElf_Rela *src)
>>   goto out;
>>     }
>>  
>> -  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = *src;
>> +  GElf_Ehdr ehdr_mem;
>> +  GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
>> +  GElf_Rela rela = *src;
>> +  if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
>> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
>> +    {
>> + Elf64_Xword info = rela.r_info;
>> + rela.r_info = (info >> 32
>> +   | ((info << 56) & 0xff00)
>> +   | ((info << 40) & 0xff)
>> +   | ((info << 24) & 0xff00)
>> +   | ((info << 8) & 0xff));
>> +   }
>> +
>> +  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela;
>>  }
>>  
>>    result = 1;
>>
>>
>> If you have any other questions, please let me know.
>>
>>
>> Thanks,
>>
>> Ying
>>

Re: [PATCH v3 2/6] strip: Adapt src/strip -o -f on mips

2024-12-12 Thread Ying Huang
Ping


Thanks,

Ying


在 2024/11/1 16:58, Ying Huang 写道:
> Ping
>
>
> Thanks,
>
> Ying
>
> 在 2024/10/12 17:40, Ying Huang 写道:
>> Ping
>>
>>
>> Thanks,
>>
>> Ying
>>
>>
>> 在 2024/9/27 17:52, Ying Huang 写道:
>>> Ping
>>>
>>>
>>> Thanks,
>>>
>>> Ying
>>>
>>>
>>> 在 2024/9/14 17:45, Ying Huang 写道:
>>>> Ping
>>>>
>>>>
>>>> Thanks,
>>>>
>>>> Ying
>>>>
>>>>
>>>> 在 2024/8/30 17:04, Ying Huang 写道:
>>>>> Hi Mark,
>>>>>
>>>>> What can I do to process these patches?
>>>>>
>>>>> If you did not accept changes in current patch, how about the following 
>>>>> changes method?
>>>>>
>>>>> diff --git a/libelf/gelf_getrela.c b/libelf/gelf_getrela.c
>>>>> index d695f659..fd974bdf 100644
>>>>> --- a/libelf/gelf_getrela.c
>>>>> +++ b/libelf/gelf_getrela.c
>>>>> @@ -90,8 +90,21 @@ gelf_getrela (Elf_Data *data, int ndx, GElf_Rela *dst)
>>>>>   result = NULL;
>>>>>     }
>>>>>    else
>>>>> -   result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
>>>>> -    sizeof (Elf64_Rela));
>>>>> +   {
>>>>> + result = memcpy (dst, &((Elf64_Rela *) data_scn->d.d_buf)[ndx],
>>>>> +  sizeof (Elf64_Rela));
>>>>> + GElf_Ehdr ehdr_mem;
>>>>> + GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
>>>>> + if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
>>>>> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
>>>>> +   {
>>>>> + Elf64_Xword info = dst->r_info;
>>>>> + dst->r_info = (((info & 0x) << 32)
>>>>> +  | ((info >> 56) & 0xff)
>>>>> +  | ((info >> 40) & 0xff00)
>>>>> +  | ((info >> 24) & 0xff)
>>>>> +  | ((info >> 8) & 0xff00));
>>>>> +   }
>>>>> +    }
>>>>>  }
>>>>>  
>>>>>    rwlock_unlock (scn->elf->lock);
>>>>>
>>>>> diff --git a/libelf/gelf_update_rela.c b/libelf/gelf_update_rela.c
>>>>> index 88252703..592d74b9 100644
>>>>> --- a/libelf/gelf_update_rela.c
>>>>> +++ b/libelf/gelf_update_rela.c
>>>>> @@ -96,7 +96,20 @@ gelf_update_rela (Elf_Data *dst, int ndx, GElf_Rela 
>>>>> *src)
>>>>>   goto out;
>>>>>     }
>>>>>  
>>>>> -  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = *src;
>>>>> +  GElf_Ehdr ehdr_mem;
>>>>> +  GElf_Ehdr *ehdr = __gelf_getehdr_rdlock (scn->elf, &ehdr_mem);
>>>>> +  GElf_Rela rela = *src;
>>>>> +  if(ehdr != NULL && ehdr->e_machine == EM_MIPS && 
>>>>> ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
>>>>> +    {
>>>>> + Elf64_Xword info = rela.r_info;
>>>>> + rela.r_info = (info >> 32
>>>>> +   | ((info << 56) & 0xff00)
>>>>> +   | ((info << 40) & 0xff)
>>>>> +   | ((info << 24) & 0xff00)
>>>>> +   | ((info << 8) & 0xff));
>>>>> +   }
>>>>> +
>>>>> +  ((Elf64_Rela *) data_scn->d.d_buf)[ndx] = rela;
>>>>>  }
>>>>>  
>>>>>    result = 1;
>>>>>
>>>>>
>>>>> If you have any other questions, please let me know.
>>>>>
>>>>>
>>>>> Thanks,
>>>>>
>>>>> Ying
>>>>>