[PATCH] test: Add mips in run-allregs.sh and run-readelf-mixed-corenote.sh

[Ying Huang]

From: Ying Huang 

* backends/Makefile.am (mips_SRCS): Add mips64_corenote.c.
* backends/mips64_corenote.c: New file.
* backends/mips_corenote.c: Add fpregset.
* backends/mips_init.c: HOOK mips64_corenote.
* libebl/eblcorenotetypename.c: Add KNOWNSTYPE MIPS_FP_MODE MIPS_MSA.
* tests/run-allregs.sh: Add test for testfile-mips64-core.
* tests/run-readelf-mixed-corenote.sh: Likewise.
* tests/testfile-mips64-core.bz2: New file.
---
 backends/Makefile.am|   2 +-
 backends/mips64_corenote.c  |   2 +
 backends/mips_corenote.c|  29 +++--
 backends/mips_init.c|   7 +-
 libebl/eblcorenotetypename.c|   2 +
 tests/run-allregs.sh|  79 ++
 tests/run-readelf-mixed-corenote.sh |  97 
 tests/testfile-mips64-core.bz2  | Bin 0 -> 30891 bytes
 8 files changed, 211 insertions(+), 7 deletions(-)
 create mode 100644 backends/mips64_corenote.c
 create mode 100644 tests/testfile-mips64-core.bz2

diff --git a/backends/Makefile.am b/backends/Makefile.am
index 926464ae..4e00d01f 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -104,7 +104,7 @@ arc_SRCS = arc_init.c arc_symbol.c
 
 mips_SRCS = mips_init.c mips_symbol.c mips_initreg.c \
mips_cfi.c mips_unwind.c mips_regs.c mips_retval.c \
-   mips_corenote.c
+   mips_corenote.c mips64_corenote.c
 
 hexagon_SRCS = hexagon_init.c hexagon_symbol.c
 
diff --git a/backends/mips64_corenote.c b/backends/mips64_corenote.c
new file mode 100644
index ..f1186056
--- /dev/null
+++ b/backends/mips64_corenote.c
@@ -0,0 +1,2 @@
+#define BITS 64
+#include "mips_corenote.c"
diff --git a/backends/mips_corenote.c b/backends/mips_corenote.c
index aeadeb17..823add27 100644
--- a/backends/mips_corenote.c
+++ b/backends/mips_corenote.c
@@ -35,15 +35,14 @@
 #include 
 #include 
 #include 
-
-#define BACKENDmips_
 #include "libebl_CPU.h"
 
-#define BITS 64
 #ifndef BITS
-# define BITS  32
+# define BITS 32
+#define BACKENDmips_
 #else
-# define BITS  64
+# define BITS 64
+# define BACKEND mips64_
 #endif
 
 #define PRSTATUS_REGS_SIZE (45 * (BITS / 8))
@@ -61,6 +60,23 @@ static const Ebl_Register_Location prstatus_regs[] =
 .pc_register = true
\
   }
 
+static const Ebl_Register_Location mips_fpregset_regs[] =
+  {
+{ .offset = 0, .regno = 38, .count = 32, .bits = 64 }, /* fp0-fp31 */
+  };
+
+static const Ebl_Core_Item mips_fpregset_items[] =
+  {
+{
+  .name = "fcs", .type = ELF_T_WORD, .format = 'x',
+  .offset = 32 * 8, .group = "register"
+},
+{
+  .name = "fir", .type = ELF_T_WORD, .format = 'x',
+  .offset = 32 * 8 + 4, .group = "register"
+}
+  };
+
 #if BITS == 32
 # define ULONG uint32_t
 # define ALIGN_ULONG   4
@@ -82,4 +98,7 @@ static const Ebl_Register_Location prstatus_regs[] =
 #define TYPE_UID_T ELF_T_WORD
 #define TYPE_GID_T ELF_T_WORD
 
+#defineEXTRA_NOTES \
+  EXTRA_REGSET_ITEMS (NT_FPREGSET, 32 * 8 + 4 * 2, mips_fpregset_regs, 
mips_fpregset_items)
+
 #include "linux-core-note.c"
diff --git a/backends/mips_init.c b/backends/mips_init.c
index e7e4b287..6743e2e5 100644
--- a/backends/mips_init.c
+++ b/backends/mips_init.c
@@ -40,6 +40,8 @@
 /* This defines the common reloc hooks based on mips_reloc.def.  */
 #include "common-reloc.c"
 
+extern __typeof (EBLHOOK (core_note)) mips64_core_note attribute_hidden;
+
 Ebl *
 mips_init (Elf *elf __attribute__ ((unused)),
   GElf_Half machine __attribute__ ((unused)),
@@ -53,7 +55,10 @@ mips_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, unwind);
   HOOK (eh, register_info);
   HOOK (eh, return_value_location);
-  HOOK (eh, core_note);
+  if (eh->class == ELFCLASS64)
+eh->core_note = mips64_core_note;
+  else
+HOOK (eh, core_note);
   eh->frame_nregs = 71;
   return eh;
 }
diff --git a/libebl/eblcorenotetypename.c b/libebl/eblcorenotetypename.c
index 0e790d06..73f6e478 100644
--- a/libebl/eblcorenotetypename.c
+++ b/libebl/eblcorenotetypename.c
@@ -94,6 +94,8 @@ ebl_core_note_type_name (Ebl *ebl, uint32_t type, char *buf, 
size_t len)
KNOWNSTYPE (ARM_SYSTEM_CALL);
KNOWNSTYPE (SIGINFO);
KNOWNSTYPE (FILE);
+   KNOWNSTYPE (MIPS_FP_MODE);
+   KNOWNSTYPE (MIPS_MSA);
 #undef KNOWNSTYPE
 
  default:
diff --git a/tests/run-allregs.sh b/tests/run-allregs.sh
index 87b16c95..f8007efa 100755
--- a/tests/run-allregs.sh
+++ b/tests/run-allregs.sh
@@ -2904,4 +2904,83 @@ FPU registers:
 62: ft10 (ft10), float 64 bits
 63: ft11 (ft11), float 64 bits
 EOF
+
+# See run-readelf-mixed-corenote.sh for instructions to regenerate
+# this core file.
+regs_test testfile-mips64-core <<\EOF
+integer registers:
+ 0: $0 (0), signed 32 bits
+ 1: $1 (1), signed 32 bits
+ 2: $2 (2), signed 32 bits
+

Re: [PATCH v3 3/6] readelf: Adapt src/readelf -h/-S/-r/-w/-l/-d/-a on mips

[Ying Huang]

Hi Mark,

Could you help review these two patches 3/6 and 4/6, all have been modified 
according your previous review comments.

If OK, I would update and resubmit again with ChangeLog commit message because 
there seems to be a conflict in merge now.


Thanks,

Ying

 

在 2024/3/5 17:51, Ying Huang 写道:
> From: Ying Huang 
>
> -h: support show Flags name
> -S: support show mips related section type
> -r: support show type of Relocation section
> -w: can work and can show correct "strp" contents
> -l: support show mips related program header entry type
> -d: can show mips related Dynamic type name
> -a: support show complete Object attribute section ".gnu.attributes"
>
> Also add test/run-readelf-reloc.sh file to test new type2/type3 of
> src/readelf -r.
>
> Signed-off-by: Ying Huang 
> ---
>  backends/Makefile.am   |   2 +-
>  backends/mips_attrs.c  | 140 +
>  backends/mips_init.c   |   7 +
>  backends/mips_symbol.c | 571 +
>  libelf/libelfP.h   |   1 +
>  src/readelf.c  | 188 +---
>  tests/Makefile.am  |   5 +-
>  tests/run-readelf-reloc.sh |  42 +++
>  8 files changed, 907 insertions(+), 49 deletions(-)
>  create mode 100644 backends/mips_attrs.c
>  create mode 100755 tests/run-readelf-reloc.sh
>
> diff --git a/backends/Makefile.am b/backends/Makefile.am
> index b946fd30..ad95526e 100644
> --- a/backends/Makefile.am
> +++ b/backends/Makefile.am
> @@ -102,7 +102,7 @@ loongarch_SRCS = loongarch_init.c loongarch_symbol.c 
> loongarch_cfi.c \
>  
>  arc_SRCS = arc_init.c arc_symbol.c
>  
> -mips_SRCS = mips_init.c mips_symbol.c
> +mips_SRCS = mips_init.c mips_symbol.c mips_attrs.c
>  
>  libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \
>   $(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \
> diff --git a/backends/mips_attrs.c b/backends/mips_attrs.c
> new file mode 100644
> index ..54fd3ce3
> --- /dev/null
> +++ b/backends/mips_attrs.c
> @@ -0,0 +1,140 @@
> +/* Object attribute tags for MIPS.
> +   Copyright (C) 2024 CIP United Inc.
> +   This file is part of elfutils.
> +
> +   This file is free software; you can redistribute it and/or modify
> +   it under the terms of either
> +
> + * the GNU Lesser General Public License as published by the Free
> +   Software Foundation; either version 3 of the License, or (at
> +   your option) any later version
> +
> +   or
> +
> + * the GNU General Public License as published by the Free
> +   Software Foundation; either version 2 of the License, or (at
> +   your option) any later version
> +
> +   or both in parallel, as here.
> +
> +   elfutils is distributed in the hope that it will be useful, but
> +   WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +   General Public License for more details.
> +
> +   You should have received copies of the GNU General Public License and
> +   the GNU Lesser General Public License along with this program.  If
> +   not, see .  */
> +
> +#ifdef HAVE_CONFIG_H
> +# include 
> +#endif
> +
> +#include 
> +#include 
> +
> +#define BACKEND mips_
> +#include "libebl_CPU.h"
> +
> +#define KNOWN_VALUES(...) do \
> +  {  \
> +static const char *table[] = { __VA_ARGS__ };\
> +if (value < sizeof table / sizeof table[0])  \
> +  *value_name = table[value];\
> +  } while (0)
> +
> +//copy gnu attr tags from binutils-2.34/elfcpp/mips.h
> +/* Object attribute tags.  */
> +enum
> +{
> +  /* 0-3 are generic.  */
> +
> +  /* Floating-point ABI used by this object file.  */
> +  Tag_GNU_MIPS_ABI_FP = 4,
> +
> +  /* MSA ABI used by this object file.  */
> +  Tag_GNU_MIPS_ABI_MSA = 8,
> +};
> +
> +/* Object attribute values.  */
> +enum
> +{
> +  /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
> +
> +  /* Not tagged or not using any ABIs affected by the differences.  */
> +  Val_GNU_MIPS_ABI_MSA_ANY = 0,
> +
> +  /* Using 128-bit MSA.  */
> +  Val_GNU_MIPS_ABI_MSA_128 = 1,
> +};
> +
> +/* Object attribute values.  */
> +enum
> +{
> +  /* This is reserved for backward-compatibility with an earlier
> + implementation of the MIPS NaN2008 functionality.  */
> +  Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
> +};
> +
> +/* copy binutils-2.34/binutils/readelf.c display_mips_gnu_attribute */
> +bool
> +mips_check_object_attribute (Ebl *ebl __attribute__ ((unused)),
> + const char *vendor, int tag, uint64_t value,
> + const char **tag_name, const char **value_name)
> +{
> +  if (!strcmp (vendor, "gnu"))
> +switch (tag)
> +  {
> +  case Tag_GNU_MIPS_ABI_FP:
> + *tag_name = "Tag_GNU_MIPS_ABI_FP";
> + switch (value)
> + {
> +   case Val_GNU_MIPS_ABI_FP_ANY:
> + *value_name = "Hard or soft float";