Re: [PATCH] ppc64: Add HTM SPRs support to readelf

2017-08-15 Thread Gustavo Romero
Dear Mark,

On 25-07-2017 07:34, Mark Wielaard wrote:
> On Mon, Jul 24, 2017 at 05:50:36PM -0300, Gustavo Romero wrote:
>> I'll ping it next week and follow-up. Thanks!
> 
> Thanks. I pushed you commit to master already.
> Lets make sure to resync glibc elf.h next week.

Thank you so much for waiting the elf.h update at glibc side :-)

For the records, it was pushed today: http://tinyurl.com/ydgl28f4

Regards,
Gustavo



Re: [PATCH] ppc64: Add HTM SPRs support to readelf

2017-08-15 Thread Mark Wielaard
Hi Gustavo,

On Tue, Aug 15, 2017 at 11:23:37AM -0300, Gustavo Romero wrote:
> On 25-07-2017 07:34, Mark Wielaard wrote:
> > On Mon, Jul 24, 2017 at 05:50:36PM -0300, Gustavo Romero wrote:
> >> I'll ping it next week and follow-up. Thanks!
> > 
> > Thanks. I pushed you commit to master already.
> > Lets make sure to resync glibc elf.h next week.
> 
> Thank you so much for waiting the elf.h update at glibc side :-)
> 
> For the records, it was pushed today: http://tinyurl.com/ydgl28f4

Thanks for following up.
I resynced our elf.h from glibc just now.

Cheers,

Mark
>From 6d2e7e7100429df3d548251e9685a1eb7bb434cb Mon Sep 17 00:00:00 2001
From: Mark Wielaard 
Date: Tue, 15 Aug 2017 22:43:01 +0200
Subject: [PATCH] libelf: Sync elf.h from glibc.

Add new powerpc note descriptors.

Signed-off-by: Mark Wielaard 
---
 libelf/ChangeLog |  4 +++
 libelf/elf.h | 96 ++--
 2 files changed, 97 insertions(+), 3 deletions(-)

diff --git a/libelf/ChangeLog b/libelf/ChangeLog
index b17e1c5e..436b8880 100644
--- a/libelf/ChangeLog
+++ b/libelf/ChangeLog
@@ -1,3 +1,7 @@
+2017-08-15  Mark Wielaard  
+
+   * elf.h: Update from glibc. Add new powerpc note descriptors.
+
 2017-07-19  Gustavo Romero 
 
* elf.h: Add known type in notes segment descriptor for HTM SPRs.
diff --git a/libelf/elf.h b/libelf/elf.h
index fa35203d..84a71260 100644
--- a/libelf/elf.h
+++ b/libelf/elf.h
@@ -1,5 +1,5 @@
 /* This file defines standard ELF types, structures, and macros.
-   Copyright (C) 1995-2016 Free Software Foundation, Inc.
+   Copyright (C) 1995-2017 Free Software Foundation, Inc.
This file is part of the GNU C Library.
 
The GNU C Library is free software; you can redistribute it and/or
@@ -762,8 +762,23 @@ typedef struct
 #define NT_PPC_VMX 0x100   /* PowerPC Altivec/VMX registers */
 #define NT_PPC_SPE 0x101   /* PowerPC SPE/EVR registers */
 #define NT_PPC_VSX 0x102   /* PowerPC VSX registers */
+#define NT_PPC_TAR 0x103   /* Target Address Register */
+#define NT_PPC_PPR 0x104   /* Program Priority Register */
+#define NT_PPC_DSCR0x105   /* Data Stream Control Register */
+#define NT_PPC_EBB 0x106   /* Event Based Branch Registers */
+#define NT_PPC_PMU 0x107   /* Performance Monitor Registers */
+#define NT_PPC_TM_CGPR 0x108   /* TM checkpointed GPR Registers */
+#define NT_PPC_TM_CFPR 0x109   /* TM checkpointed FPR Registers */
+#define NT_PPC_TM_CVMX 0x10a   /* TM checkpointed VMX Registers */
+#define NT_PPC_TM_CVSX 0x10b   /* TM checkpointed VSX Registers */
+#define NT_PPC_TM_SPR  0x10c   /* TM Special Purpose Registers */
+#define NT_PPC_TM_CTAR 0x10d   /* TM checkpointed Target Address
+  Register */
+#define NT_PPC_TM_CPPR 0x10e   /* TM checkpointed Program Priority
+  Register */
+#define NT_PPC_TM_CDSCR0x10f   /* TM checkpointed Data Stream 
Control
+  Register */
 #define NT_386_TLS 0x200   /* i386 TLS slots (struct user_desc) */
-#define NT_PPC_TM_SPR  0x10c   /* PowerPC HW Transactional Memory SPRs 
*/
 #define NT_386_IOPERM  0x201   /* x86 io permission bitmap (1=deny) */
 #define NT_X86_XSTATE  0x202   /* x86 extended state using xsave */
 #define NT_S390_HIGH_GPRS  0x300   /* s390 upper register halves */
@@ -1171,6 +1186,18 @@ typedef struct
 #define AT_L2_CACHESHAPE   36
 #define AT_L3_CACHESHAPE   37
 
+/* Shapes of the caches, with more room to describe them.
+   *GEOMETRY are comprised of cache line size in bytes in the bottom 16 bits
+   and the cache associativity in the next 16 bits.  */
+#define AT_L1I_CACHESIZE   40
+#define AT_L1I_CACHEGEOMETRY   41
+#define AT_L1D_CACHESIZE   42
+#define AT_L1D_CACHEGEOMETRY   43
+#define AT_L2_CACHESIZE44
+#define AT_L2_CACHEGEOMETRY45
+#define AT_L3_CACHESIZE46
+#define AT_L3_CACHEGEOMETRY47
+
 /* Note section contents.  Each entry in the note section begins with
a header of a fixed form.  */
 
@@ -2533,9 +2560,10 @@ enum
 #define DT_PPC64_OPT   (DT_LOPROC + 3)
 #define DT_PPC64_NUM4
 
-/* PowerPC64 specific values for the DT_PPC64_OPT Dyn entry.  */
+/* PowerPC64 specific bits in the DT_PPC64_OPT Dyn entry.  */
 #define PPC64_OPT_TLS  1
 #define PPC64_OPT_MULTI_TOC2
+#define PPC64_OPT_LOCALENTRY   4
 
 /* PowerPC64 specific values for the Elf64_Sym st_other field.  */
 #define STO_PPC64_LOCAL_BIT5
@@ -3683,6 +3711,68 @@ enum
 #define R_BPF_NONE 0   /* No reloc */
 #define R_BPF_MAP_FD   1   /* Map fd to pointer */
 
+/* Imagination Meta specific relocations. */
+
+#define R_METAG_HIADDR16   0
+#define R_METAG_LOADDR16   1
+#define R_METAG_ADDR32 2