[PATCH] drm: unify crtc,connector,encoder,fb debug printing

2010-07-15 Thread gli...@freedesktop.org
From: Jerome Glisse 

Unify debug printing so it easier to track what's happening
while debugging.

Signed-off-by: Jerome Glisse 
---
 drivers/gpu/drm/drm_crtc.c|   20 +++--
 drivers/gpu/drm/drm_crtc_helper.c |   44 
 2 files changed, 42 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 57cea01..b5802cf 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1126,7 +1126,7 @@ int drm_mode_getresources(struct drm_device *dev, void 
*data,
if (file_priv->master->minor->type == DRM_MINOR_CONTROL) {
list_for_each_entry(crtc, &dev->mode_config.crtc_list,
head) {
-   DRM_DEBUG_KMS("CRTC ID is %d\n", crtc->base.id);
+   DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
if (put_user(crtc->base.id, crtc_id + copied)) {
ret = -EFAULT;
goto out;
@@ -1154,8 +1154,8 @@ int drm_mode_getresources(struct drm_device *dev, void 
*data,
list_for_each_entry(encoder,
&dev->mode_config.encoder_list,
head) {
-   DRM_DEBUG_KMS("ENCODER ID is %d\n",
- encoder->base.id);
+   DRM_DEBUG_KMS("[ENCODER:%d:%s]\n", 
encoder->base.id,
+   drm_get_encoder_name(encoder));
if (put_user(encoder->base.id, encoder_id +
 copied)) {
ret = -EFAULT;
@@ -1185,8 +1185,9 @@ int drm_mode_getresources(struct drm_device *dev, void 
*data,
list_for_each_entry(connector,
&dev->mode_config.connector_list,
head) {
-   DRM_DEBUG_KMS("CONNECTOR ID is %d\n",
- connector->base.id);
+   DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
+   connector->base.id,
+   drm_get_connector_name(connector));
if (put_user(connector->base.id,
 connector_id + copied)) {
ret = -EFAULT;
@@ -1209,7 +1210,7 @@ int drm_mode_getresources(struct drm_device *dev, void 
*data,
}
card_res->count_connectors = connector_count;

-   DRM_DEBUG_KMS("Counted %d %d %d\n", card_res->count_crtcs,
+   DRM_DEBUG_KMS("CRTC[%d] CONNECTORS[%d] ENCODERS[%d]\n", 
card_res->count_crtcs,
  card_res->count_connectors, card_res->count_encoders);

 out:
@@ -1312,7 +1313,7 @@ int drm_mode_getconnector(struct drm_device *dev, void 
*data,

memset(&u_mode, 0, sizeof(struct drm_mode_modeinfo));

-   DRM_DEBUG_KMS("connector id %d:\n", out_resp->connector_id);
+   DRM_DEBUG_KMS("[CONNECTOR:%d:?]\n", out_resp->connector_id);

mutex_lock(&dev->mode_config.mutex);

@@ -1493,6 +1494,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
goto out;
}
crtc = obj_to_crtc(obj);
+   DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);

if (crtc_req->mode_valid) {
/* If we have a mode we need a framebuffer. */
@@ -1569,6 +1571,9 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
goto out;
}
connector = obj_to_connector(obj);
+   DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
+   connector->base.id,
+   drm_get_connector_name(connector));

connector_set[i] = connector;
}
@@ -1684,6 +1689,7 @@ int drm_mode_addfb(struct drm_device *dev,

r->fb_id = fb->base.id;
list_add(&fb->filp_head, &file_priv->fbs);
+   DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);

 out:
mutex_unlock(&dev->mode_config.mutex);
diff --git a/drivers/gpu/drm/drm_crtc_helper.c 
b/drivers/gpu/drm/drm_crtc_helper.c
index 9b2a541..ead6d32 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -86,7 +86,8 @@ int drm_helper_probe_single_connector_modes(struct 
drm_connector *connector,
int count = 0;
int mode_flags = 0;

-   DRM_DEBUG_KMS("%s\n", drm_get_connector_name(connector));
+   DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
+   drm_get_connector_name(connector));
/* set all modes to the unverified st

[PATCH] agp: use scratch page on memory remove and at GATT creation

2010-04-20 Thread gli...@freedesktop.org
From: Jerome Glisse 

Convert most AGP chipset to use scratch page as default entries.
This help avoiding GPU querying 0 address and trigger computer
fault. With KMS and memory manager we bind/unbind AGP memory
constantly and it seems that some GPU are still doing AGP
traffic even after GPU report being idle with the memory segment.

Tested (radeon GPU KMS + Xorg + compiz + glxgears + quake3) on :
- SIS 1039:0001 & 1039:0003
- Intel 865 8086:2571

Compile tested for other bridges

Signed-off-by: Jerome Glisse 
Cc: stable 
---
 drivers/char/agp/ali-agp.c  |1 +
 drivers/char/agp/amd-k7-agp.c   |9 +
 drivers/char/agp/amd64-agp.c|1 +
 drivers/char/agp/ati-agp.c  |8 
 drivers/char/agp/intel-agp.c|   30 +++---
 drivers/char/agp/nvidia-agp.c   |1 +
 drivers/char/agp/sis-agp.c  |1 +
 drivers/char/agp/uninorth-agp.c |   13 ++---
 drivers/char/agp/via-agp.c  |2 ++
 9 files changed, 60 insertions(+), 6 deletions(-)

diff --git a/drivers/char/agp/ali-agp.c b/drivers/char/agp/ali-agp.c
index d2ce68f..fd79351 100644
--- a/drivers/char/agp/ali-agp.c
+++ b/drivers/char/agp/ali-agp.c
@@ -204,6 +204,7 @@ static const struct agp_bridge_driver ali_generic_bridge = {
.aperture_sizes = ali_generic_sizes,
.size_type  = U32_APER_SIZE,
.num_aperture_sizes = 7,
+   .needs_scratch_page = true,
.configure  = ali_configure,
.fetch_size = ali_fetch_size,
.cleanup= ali_cleanup,
diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c
index 73dbf40..cf4dc4c 100644
--- a/drivers/char/agp/amd-k7-agp.c
+++ b/drivers/char/agp/amd-k7-agp.c
@@ -142,6 +142,7 @@ static int amd_create_gatt_table(struct agp_bridge_data 
*bridge)
 {
struct aper_size_info_lvl2 *value;
struct amd_page_map page_dir;
+   unsigned long __iomem *cur_gatt;
unsigned long addr;
int retval;
u32 temp;
@@ -178,6 +179,13 @@ static int amd_create_gatt_table(struct agp_bridge_data 
*bridge)
readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr));/* PCI 
Posting. */
}

+   for (i = 0; i < value->num_entries; i++) {
+   addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
+   cur_gatt = GET_GATT(addr);
+   writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
+   readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
+   }
+
return 0;
 }

@@ -375,6 +383,7 @@ static const struct agp_bridge_driver amd_irongate_driver = 
{
.aperture_sizes = amd_irongate_sizes,
.size_type  = LVL2_APER_SIZE,
.num_aperture_sizes = 7,
+   .needs_scratch_page = true,
.configure  = amd_irongate_configure,
.fetch_size = amd_irongate_fetch_size,
.cleanup= amd_irongate_cleanup,
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c
index fd50ead..73703b1 100644
--- a/drivers/char/agp/amd64-agp.c
+++ b/drivers/char/agp/amd64-agp.c
@@ -210,6 +210,7 @@ static const struct agp_bridge_driver amd_8151_driver = {
.aperture_sizes = amd_8151_sizes,
.size_type  = U32_APER_SIZE,
.num_aperture_sizes = 7,
+   .needs_scratch_page = true,
.configure  = amd_8151_configure,
.fetch_size = amd64_fetch_size,
.cleanup= amd64_cleanup,
diff --git a/drivers/char/agp/ati-agp.c b/drivers/char/agp/ati-agp.c
index 3b2ecbe..dc30e22 100644
--- a/drivers/char/agp/ati-agp.c
+++ b/drivers/char/agp/ati-agp.c
@@ -341,6 +341,7 @@ static int ati_create_gatt_table(struct agp_bridge_data 
*bridge)
 {
struct aper_size_info_lvl2 *value;
struct ati_page_map page_dir;
+   unsigned long __iomem *cur_gatt;
unsigned long addr;
int retval;
u32 temp;
@@ -395,6 +396,12 @@ static int ati_create_gatt_table(struct agp_bridge_data 
*bridge)
readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr));/* PCI 
Posting. */
}

+   for (i = 0; i < value->num_entries; i++) {
+   addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
+   cur_gatt = GET_GATT(addr);
+   writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
+   }
+
return 0;
 }

@@ -415,6 +422,7 @@ static const struct agp_bridge_driver ati_generic_bridge = {
.aperture_sizes = ati_generic_sizes,
.size_type  = LVL2_APER_SIZE,
.num_aperture_sizes = 7,
+   .needs_scratch_page = true,
.configure  = ati_configure,
.fetch_size = ati_fetch_size,
.cleanup= ati_cleanup,
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index b78

[PATCH] agp: use scratch page on memory remove and at GATT creation V2

2010-04-20 Thread gli...@freedesktop.org
From: Jerome Glisse 

Convert most AGP chipset to use scratch page as default entries.
This help avoiding GPU querying 0 address and trigger computer
fault. With KMS and memory manager we bind/unbind AGP memory
constantly and it seems that some GPU are still doing AGP
traffic even after GPU report being idle with the memory segment.

Tested (radeon GPU KMS + Xorg + compiz + glxgears + quake3) on :
- SIS 1039:0001 & 1039:0003
- Intel 865 8086:2571

Compile tested for other bridges

V2 enable scratch page on uninorth

Signed-off-by: Jerome Glisse 
Cc: stable 
---
 drivers/char/agp/ali-agp.c  |1 +
 drivers/char/agp/amd-k7-agp.c   |9 +
 drivers/char/agp/amd64-agp.c|1 +
 drivers/char/agp/ati-agp.c  |8 
 drivers/char/agp/intel-agp.c|   30 +++---
 drivers/char/agp/nvidia-agp.c   |1 +
 drivers/char/agp/sis-agp.c  |1 +
 drivers/char/agp/uninorth-agp.c |   14 +++---
 drivers/char/agp/via-agp.c  |2 ++
 9 files changed, 61 insertions(+), 6 deletions(-)

diff --git a/drivers/char/agp/ali-agp.c b/drivers/char/agp/ali-agp.c
index d2ce68f..fd79351 100644
--- a/drivers/char/agp/ali-agp.c
+++ b/drivers/char/agp/ali-agp.c
@@ -204,6 +204,7 @@ static const struct agp_bridge_driver ali_generic_bridge = {
.aperture_sizes = ali_generic_sizes,
.size_type  = U32_APER_SIZE,
.num_aperture_sizes = 7,
+   .needs_scratch_page = true,
.configure  = ali_configure,
.fetch_size = ali_fetch_size,
.cleanup= ali_cleanup,
diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c
index 73dbf40..cf4dc4c 100644
--- a/drivers/char/agp/amd-k7-agp.c
+++ b/drivers/char/agp/amd-k7-agp.c
@@ -142,6 +142,7 @@ static int amd_create_gatt_table(struct agp_bridge_data 
*bridge)
 {
struct aper_size_info_lvl2 *value;
struct amd_page_map page_dir;
+   unsigned long __iomem *cur_gatt;
unsigned long addr;
int retval;
u32 temp;
@@ -178,6 +179,13 @@ static int amd_create_gatt_table(struct agp_bridge_data 
*bridge)
readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr));/* PCI 
Posting. */
}

+   for (i = 0; i < value->num_entries; i++) {
+   addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
+   cur_gatt = GET_GATT(addr);
+   writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
+   readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
+   }
+
return 0;
 }

@@ -375,6 +383,7 @@ static const struct agp_bridge_driver amd_irongate_driver = 
{
.aperture_sizes = amd_irongate_sizes,
.size_type  = LVL2_APER_SIZE,
.num_aperture_sizes = 7,
+   .needs_scratch_page = true,
.configure  = amd_irongate_configure,
.fetch_size = amd_irongate_fetch_size,
.cleanup= amd_irongate_cleanup,
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c
index fd50ead..73703b1 100644
--- a/drivers/char/agp/amd64-agp.c
+++ b/drivers/char/agp/amd64-agp.c
@@ -210,6 +210,7 @@ static const struct agp_bridge_driver amd_8151_driver = {
.aperture_sizes = amd_8151_sizes,
.size_type  = U32_APER_SIZE,
.num_aperture_sizes = 7,
+   .needs_scratch_page = true,
.configure  = amd_8151_configure,
.fetch_size = amd64_fetch_size,
.cleanup= amd64_cleanup,
diff --git a/drivers/char/agp/ati-agp.c b/drivers/char/agp/ati-agp.c
index 3b2ecbe..dc30e22 100644
--- a/drivers/char/agp/ati-agp.c
+++ b/drivers/char/agp/ati-agp.c
@@ -341,6 +341,7 @@ static int ati_create_gatt_table(struct agp_bridge_data 
*bridge)
 {
struct aper_size_info_lvl2 *value;
struct ati_page_map page_dir;
+   unsigned long __iomem *cur_gatt;
unsigned long addr;
int retval;
u32 temp;
@@ -395,6 +396,12 @@ static int ati_create_gatt_table(struct agp_bridge_data 
*bridge)
readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr));/* PCI 
Posting. */
}

+   for (i = 0; i < value->num_entries; i++) {
+   addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
+   cur_gatt = GET_GATT(addr);
+   writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
+   }
+
return 0;
 }

@@ -415,6 +422,7 @@ static const struct agp_bridge_driver ati_generic_bridge = {
.aperture_sizes = ati_generic_sizes,
.size_type  = LVL2_APER_SIZE,
.num_aperture_sizes = 7,
+   .needs_scratch_page = true,
.configure  = ati_configure,
.fetch_size = ati_fetch_size,
.cleanup= ati_cleanup,
diff --git a/drivers/char/agp/intel-agp.c b/d

[PATCH] drm/radeon/kms: avoid corner case issue with unmappable vram

2010-08-10 Thread gli...@freedesktop.org
From: Jerome Glisse 

We should not allocate any object into unmappable vram if we
have no means to access them which on all GPU means having the
CP running and on newer GPU having the blit utility working.

This patch limit the vram allocation to visible vram until
we have acceleration up and running.

Note that it's more than unlikely that we run into any issue
related to that as when acceleration is not woring userspace
should allocate any object in vram beside front buffer which
should fit in visible vram.

Signed-off-by: Jerome Glisse 
---
 drivers/gpu/drm/radeon/evergreen.c |1 +
 drivers/gpu/drm/radeon/r100.c  |3 +++
 drivers/gpu/drm/radeon/r600.c  |2 ++
 drivers/gpu/drm/radeon/r600_blit_kms.c |2 ++
 drivers/gpu/drm/radeon/radeon.h|1 +
 drivers/gpu/drm/radeon/radeon_object.c |2 +-
 drivers/gpu/drm/radeon/rs600.c |1 +
 drivers/gpu/drm/radeon/rs690.c |1 +
 drivers/gpu/drm/radeon/rv770.c |1 +
 9 files changed, 13 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen.c 
b/drivers/gpu/drm/radeon/evergreen.c
index 957d506..4243344 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1359,6 +1359,7 @@ int evergreen_mc_init(struct radeon_device *rdev)
rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
rdev->mc.visible_vram_size = rdev->mc.aper_size;
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
r600_vram_gtt_location(rdev, &rdev->mc);
radeon_update_bandwidth_info(rdev);

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index e817a0b..4be71ba 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1030,6 +1030,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned 
ring_size)
return r;
}
rdev->cp.ready = true;
+   rdev->mc.active_vram_size = rdev->mc.mc_vram_size;
return 0;
 }

@@ -1047,6 +1048,7 @@ void r100_cp_fini(struct radeon_device *rdev)
 void r100_cp_disable(struct radeon_device *rdev)
 {
/* Disable ring */
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
rdev->cp.ready = false;
WREG32(RADEON_CP_CSQ_MODE, 0);
WREG32(RADEON_CP_CSQ_CNTL, 0);
@@ -2306,6 +2308,7 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
/* FIXME we don't use the second aperture yet when we could use it */
if (rdev->mc.visible_vram_size > rdev->mc.aper_size)
rdev->mc.visible_vram_size = rdev->mc.aper_size;
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE);
if (rdev->flags & RADEON_IS_IGP) {
uint32_t tom;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index d0ebae9..acc71f2 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1248,6 +1248,7 @@ int r600_mc_init(struct radeon_device *rdev)
rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
rdev->mc.visible_vram_size = rdev->mc.aper_size;
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
r600_vram_gtt_location(rdev, &rdev->mc);

if (rdev->flags & RADEON_IS_IGP) {
@@ -1917,6 +1918,7 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, 
u32 v)
  */
 void r600_cp_stop(struct radeon_device *rdev)
 {
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
 }

diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c 
b/drivers/gpu/drm/radeon/r600_blit_kms.c
index d13622a..c7caa6e 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -507,6 +507,7 @@ int r600_blit_init(struct radeon_device *rdev)
memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4);
radeon_bo_kunmap(rdev->r600_blit.shader_obj);
radeon_bo_unreserve(rdev->r600_blit.shader_obj);
+   rdev->mc.active_vram_size = rdev->mc.mc_vram_size;
return 0;
 }

@@ -514,6 +515,7 @@ void r600_blit_fini(struct radeon_device *rdev)
 {
int r;

+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
if (rdev->r600_blit.shader_obj == NULL)
return;
/* If we can't reserve the bo, unref should be enough to destroy
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 3cd1c47..feeac20 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -344,6 +344,7 @@ struct radeon_mc {
 * about vram size near mc fb location */
u64 mc_vram_size;
u64 visible_vram_size;
+   u64 active_vram_size;
 

[PATCH] drm/radeon/kms: avoid corner case issue with unmappable vram V2

2010-08-10 Thread gli...@freedesktop.org
From: Jerome Glisse 

We should not allocate any object into unmappable vram if we
have no means to access them which on all GPU means having the
CP running and on newer GPU having the blit utility working.

This patch limit the vram allocation to visible vram until
we have acceleration up and running.

Note that it's more than unlikely that we run into any issue
related to that as when acceleration is not woring userspace
should allocate any object in vram beside front buffer which
should fit in visible vram.

V2 use real_vram_size as mc_vram_size could be bigger than
   the actual amount of vram

Signed-off-by: Jerome Glisse 
---
 drivers/gpu/drm/radeon/evergreen.c |1 +
 drivers/gpu/drm/radeon/r100.c  |3 +++
 drivers/gpu/drm/radeon/r600.c  |2 ++
 drivers/gpu/drm/radeon/r600_blit_kms.c |2 ++
 drivers/gpu/drm/radeon/radeon.h|1 +
 drivers/gpu/drm/radeon/radeon_object.c |2 +-
 drivers/gpu/drm/radeon/rs600.c |1 +
 drivers/gpu/drm/radeon/rs690.c |1 +
 drivers/gpu/drm/radeon/rv770.c |1 +
 9 files changed, 13 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen.c 
b/drivers/gpu/drm/radeon/evergreen.c
index 957d506..4243344 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1359,6 +1359,7 @@ int evergreen_mc_init(struct radeon_device *rdev)
rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
rdev->mc.visible_vram_size = rdev->mc.aper_size;
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
r600_vram_gtt_location(rdev, &rdev->mc);
radeon_update_bandwidth_info(rdev);

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index e817a0b..566c1e5 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1030,6 +1030,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned 
ring_size)
return r;
}
rdev->cp.ready = true;
+   rdev->mc.active_vram_size = rdev->mc.real_vram_size;
return 0;
 }

@@ -1047,6 +1048,7 @@ void r100_cp_fini(struct radeon_device *rdev)
 void r100_cp_disable(struct radeon_device *rdev)
 {
/* Disable ring */
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
rdev->cp.ready = false;
WREG32(RADEON_CP_CSQ_MODE, 0);
WREG32(RADEON_CP_CSQ_CNTL, 0);
@@ -2306,6 +2308,7 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
/* FIXME we don't use the second aperture yet when we could use it */
if (rdev->mc.visible_vram_size > rdev->mc.aper_size)
rdev->mc.visible_vram_size = rdev->mc.aper_size;
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE);
if (rdev->flags & RADEON_IS_IGP) {
uint32_t tom;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index d0ebae9..acc71f2 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1248,6 +1248,7 @@ int r600_mc_init(struct radeon_device *rdev)
rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
rdev->mc.visible_vram_size = rdev->mc.aper_size;
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
r600_vram_gtt_location(rdev, &rdev->mc);

if (rdev->flags & RADEON_IS_IGP) {
@@ -1917,6 +1918,7 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, 
u32 v)
  */
 void r600_cp_stop(struct radeon_device *rdev)
 {
+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
 }

diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c 
b/drivers/gpu/drm/radeon/r600_blit_kms.c
index d13622a..968ff3a 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -507,6 +507,7 @@ int r600_blit_init(struct radeon_device *rdev)
memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4);
radeon_bo_kunmap(rdev->r600_blit.shader_obj);
radeon_bo_unreserve(rdev->r600_blit.shader_obj);
+   rdev->mc.active_vram_size = rdev->mc.real_vram_size;
return 0;
 }

@@ -514,6 +515,7 @@ void r600_blit_fini(struct radeon_device *rdev)
 {
int r;

+   rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
if (rdev->r600_blit.shader_obj == NULL)
return;
/* If we can't reserve the bo, unref should be enough to destroy
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 3cd1c47..feeac20 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -344,6 +344,7 @@ struct radeon_mc {
 * about vram size near mc fb location */
u64 mc_vram_size;
u