[rtems-tools PATCH] record: Allow to compile with recent llvm version.

2019-12-17 Thread list
From: Christian Mauderer 

It seems that the API for symbolizeCode changed between llvm8 and llvm9.
This patch uses the same adaption that is used for the llvm-symbolizer
tool in llvm commit b2c4b8bded3ff2efaaebe0d8b33c65116f9ef8de.
---
 trace/record/record-main-lttng.cc | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/trace/record/record-main-lttng.cc 
b/trace/record/record-main-lttng.cc
index f37106b284..c84f40b14d 100644
--- a/trace/record/record-main-lttng.cc
+++ b/trace/record/record-main-lttng.cc
@@ -323,7 +323,12 @@ LTTNGClient::AddressToLineMap::iterator 
LTTNGClient::ResolveAddress(
 const ClientItem& item) {
 #ifdef HAVE_LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZE_H
   if (resolve_address_) {
-auto res_or_err = symbolizer_.symbolizeCode(elf_file_, item.data);
+auto res_or_err = symbolizer_.symbolizeCode(elf_file_,
+#if LLVM_VERSION_MAJOR >= 9
+  {item.data, llvm::object::SectionedAddress::UndefSection});
+#else
+  item.data);
+#endif
 
 if (res_or_err) {
   auto info = res_or_err.get();
-- 
2.24.0

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[rtems-tools] record does not compile with llvm9

2019-12-17 Thread list
Hello,

if I try to compile the rtems-tools on my Arch Linux system with a llvm
library version 9 I get the error at the end of the mail. It seems that
the API for symbolizeCode changed between version 8 and 9 of llvm.

I created a patch (see follow up mail) that uses the same adaption like
in llvm-symbolizer.cpp in the official llvm sources:

https://github.com/llvm/llvm-project/commit/b2c4b8bded3ff2efaaebe0d8b33c65116f9ef8de#diff-50901f5ee3b98d3dd5cab7c8edf984faR216

It compiles on llvm9 but I didn't test it on llvm7 or 8. Beneath that
it's an untested change.

Best regards

Christian


Error message:

[240/255] Compiling trace/record/record-client.c
[241/255] Compiling trace/record/record-main-lttng.cc
[242/255] Compiling trace/record/record-text.c
[243/255] Compiling trace/record/record-client-base.cc
[244/255] Linking build/rtemstoolkit/librld.a
[245/255] Linking build/linkers/rtems-ld
[246/255] Linking build/linkers/rtems-addr2line
[247/255] Linking build/tester/covoar/libccovoar.a
[248/255] Linking build/linkers/rtems-ra
[249/255] Linking build/tester/covoar/trace-converter
../trace/record/record-main-lttng.cc: In member function 'std::map > >::iterator 
LTTNGClient::ResolveAddress(const ClientItem&)':
../trace/record/record-main-lttng.cc:329:69: error: no matching function for 
call to 'llvm::symbolize::LLVMSymbolizer::symbolizeCode(std::string&, const 
uint64_t&)'
  329 | auto res_or_err = symbolizer_.symbolizeCode(elf_file_, item.data);
  | ^
In file included from ../trace/record/record-main-lttng.cc:45:
/usr/include/llvm/DebugInfo/Symbolize/Symbolize.h:55:24: note: candidate: 
'llvm::Expected 
llvm::symbolize::LLVMSymbolizer::symbolizeCode(const llvm::object::ObjectFile&, 
llvm::object::SectionedAddress)'
   55 |   Expected symbolizeCode(const ObjectFile &Obj,
  |^
/usr/include/llvm/DebugInfo/Symbolize/Symbolize.h:55:56: note:   no known 
conversion for argument 1 from 'std::string' {aka 
'std::__cxx11::basic_string'} to 'const llvm::object::ObjectFile&'
   55 |   Expected symbolizeCode(const ObjectFile &Obj,
  |  ~~^~~
/usr/include/llvm/DebugInfo/Symbolize/Symbolize.h:57:24: note: candidate: 
'llvm::Expected 
llvm::symbolize::LLVMSymbolizer::symbolizeCode(const string&, 
llvm::object::SectionedAddress)'
   57 |   Expected symbolizeCode(const std::string &ModuleName,
  |^
/usr/include/llvm/DebugInfo/Symbolize/Symbolize.h:58:63: note:   no known 
conversion for argument 2 from 'const uint64_t' {aka 'const long unsigned int'} 
to 'llvm::object::SectionedAddress'
   58 |  object::SectionedAddress 
ModuleOffset);
  |  
~^~~~



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[PATCH 1/2] bsps/arm: Define index of the workspace entry.

2019-12-27 Thread list
From: Christian Mauderer 

The imx BSP contained a hack to change the workspace entry of the MMU
table. This makes the used define visible for other BSPs too so that the
same hack can be used for example in raspberry pi too.
---
 bsps/arm/imx/start/bspstarthooks.c| 9 -
 bsps/arm/include/bsp/arm-cp15-start.h | 2 ++
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/bsps/arm/imx/start/bspstarthooks.c 
b/bsps/arm/imx/start/bspstarthooks.c
index f4c5350a52..30e03dd788 100644
--- a/bsps/arm/imx/start/bspstarthooks.c
+++ b/bsps/arm/imx/start/bspstarthooks.c
@@ -24,8 +24,6 @@
 
 #include 
 
-#define WORKSPACE_ENTRY_INDEX 8
-
 BSP_START_DATA_SECTION static arm_cp15_start_section_config
 imx_mmu_config_table[] = {
   ARMV7_CP15_START_DEFAULT_SECTIONS,
@@ -68,7 +66,8 @@ BSP_START_TEXT_SECTION static void setup_mmu_and_cache(void)
 size -= 4;
   }
 
-  imx_mmu_config_table[WORKSPACE_ENTRY_INDEX].end = begin + size;
+  imx_mmu_config_table[ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX].end =
+begin + size;
 }
   }
 
@@ -112,8 +111,8 @@ void bsp_work_area_initialize(void)
   uintptr_t begin;
   uintptr_t end;
 
-  begin = imx_mmu_config_table[WORKSPACE_ENTRY_INDEX].begin;
-  end = imx_mmu_config_table[WORKSPACE_ENTRY_INDEX].end;
+  begin = imx_mmu_config_table[ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX].begin;
+  end = imx_mmu_config_table[ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX].end;
 
   bsp_work_area_initialize_default((void *) begin, end - begin);
 }
diff --git a/bsps/arm/include/bsp/arm-cp15-start.h 
b/bsps/arm/include/bsp/arm-cp15-start.h
index 220423fefe..c4686fbbd4 100644
--- a/bsps/arm/include/bsp/arm-cp15-start.h
+++ b/bsps/arm/include/bsp/arm-cp15-start.h
@@ -95,6 +95,8 @@ typedef struct {
 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
   }
 
+#define ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX 8
+
 BSP_START_DATA_SECTION extern const arm_cp15_start_section_config
   arm_cp15_start_mmu_config_table[];
 
-- 
2.24.1

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[PATCH 2/2] bsp/raspberrypi: Fix size of work area.

2019-12-27 Thread list
-.flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
-  }, {
-.begin = RPI_PERIPHERAL_BASE,
-.end =   RPI_PERIPHERAL_BASE + RPI_PERIPHERAL_SIZE,
-.flags = ARMV7_MMU_DEVICE
-  }
-#if (BSP_IS_RPI2 == 1)
-  /* Core local peripherals area - timer, mailboxes */
-  , {
-.begin = BCM2836_CORE_LOCAL_PERIPH_BASE,
-.end =   BCM2836_CORE_LOCAL_PERIPH_BASE + BCM2836_CORE_LOCAL_PERIPH_SIZE,
-.flags = ARMV7_MMU_DEVICE
-  }
-#endif
-};
-
-const size_t arm_cp15_start_mmu_config_table_size =
-  RTEMS_ARRAY_SIZE(arm_cp15_start_mmu_config_table);
diff --git a/c/src/lib/libbsp/arm/raspberrypi/Makefile.am 
b/c/src/lib/libbsp/arm/raspberrypi/Makefile.am
index 11a22f89e3..5326deb8a3 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/Makefile.am
+++ b/c/src/lib/libbsp/arm/raspberrypi/Makefile.am
@@ -49,7 +49,6 @@ librtemsbsp_a_SOURCES += 
../../../../../../bsps/arm/shared/cp15/arm-cp15-set-ttb
 # Startup
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/arm/raspberrypi/start/bspstart.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/raspberrypi/start/cmdline.c
-librtemsbsp_a_SOURCES += 
../../../../../../bsps/arm/raspberrypi/start/bspgetworkarea.c
 if HAS_SMP
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/raspberrypi/start/bspsmp.c
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/arm/raspberrypi/start/bspsmp_init.c
@@ -105,9 +104,6 @@ librtemsbsp_a_SOURCES += 
../../../../../../bsps/arm/shared/cache/cache-v7ar-disa
 # Start hooks
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/arm/raspberrypi/start/bspstarthooks.c
 
-# LIBMM
-librtemsbsp_a_SOURCES += 
../../../../../../bsps/arm/raspberrypi/start/mm_config_table.c
-
 ###
 #  Special Rules  #
 ###
-- 
2.24.1

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[PATCH 0/2] bsp/raspberrypi: Fix bug regarding SDRAM size.

2019-12-27 Thread list
Hello,

like mentioned here:

https://lists.rtems.org/pipermail/devel/2019-December/056581.html

there is a problem with adapting the work area based on the raspberrys
SDRAM size. The patch set fixes bugs when getting the size of the SDRAM
and uses a method simmilar to the one in the imx BSP to adapt the MMU
table.

I tested it on an old Pi1 and a Pi2 (loaded via a debugger - I still
have problems loading it via an image on the Pi2).

Best regards

Christian


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[PATCH 0/1] dev/sc16is752: Add name space for field names.

2018-08-15 Thread list
Hello,

this patch should fix https://devel.rtems.org/ticket/3501. Note that I
didn't test it yet because I have some trouble building a tool chain on
my home PC. If no one is faster, I'll try it either if I manage to get a
working tool chain or on Monday when I'm back at work.

Best regards

Christian



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[PATCH] dev/sc16is752: Add name space for field names.

2018-08-15 Thread list
t *ctx = (sc16is752_context *)base;
 
   if (len > 0) {
-ctx->ier |= IER_THR;
+ctx->ier |= SC16IS752_IER_THR;
 len = MIN(len, 32);
 ctx->tx_in_progress = (uint8_t)len;
 write_reg(ctx, SC16IS752_THR, (const uint8_t *)&buf[0], len);
 write_reg(ctx, SC16IS752_IER, &ctx->ier, 1);
   } else {
 ctx->tx_in_progress = 0;
-ctx->ier &= ~IER_THR;
+ctx->ier &= ~SC16IS752_IER_THR;
 write_reg(ctx, SC16IS752_IER, &ctx->ier, 1);
   }
 }
@@ -286,22 +289,22 @@ static void sc16is752_get_modem_bits(sc16is752_context 
*ctx, int *bits)
   read_reg(ctx, SC16IS752_MSR, &msr, 1);
   read_reg(ctx, SC16IS752_MCR, &mcr, 1);
 
-  if (msr & MSR_CTS) {
+  if (msr & SC16IS752_MSR_CTS) {
 *bits |= TIOCM_CTS;
   }
-  if (msr & MSR_DSR) {
+  if (msr & SC16IS752_MSR_DSR) {
 *bits |= TIOCM_DSR;
   }
-  if (msr & MSR_RI) {
+  if (msr & SC16IS752_MSR_RI) {
 *bits |= TIOCM_RI;
   }
-  if (msr & MSR_CD) {
+  if (msr & SC16IS752_MSR_CD) {
 *bits |= TIOCM_CD;
   }
-  if ((mcr & MCR_DTR) == 0) {
+  if ((mcr & SC16IS752_MCR_DTR) == 0) {
 *bits |= TIOCM_DTR;
   }
-  if ((mcr & MCR_RTS) == 0) {
+  if ((mcr & SC16IS752_MCR_RTS) == 0) {
 *bits |= TIOCM_RTS;
   }
 }
@@ -316,29 +319,29 @@ static void sc16is752_set_modem_bits(
 
   if (bits != NULL) {
 if ((*bits & TIOCM_DTR) == 0) {
-  mcr |= MCR_DTR;
+  mcr |= SC16IS752_MCR_DTR;
 } else {
-  mcr &= ~MCR_DTR;
+  mcr &= ~SC16IS752_MCR_DTR;
 }
 
 if ((*bits & TIOCM_RTS) == 0) {
-  mcr |= MCR_RTS;
+  mcr |= SC16IS752_MCR_RTS;
 } else {
-  mcr &= ~MCR_RTS;
+  mcr &= ~SC16IS752_MCR_RTS;
 }
   }
 
   if ((set & TIOCM_DTR) != 0) {
-mcr &= ~MCR_DTR;
+mcr &= ~SC16IS752_MCR_DTR;
   }
   if ((set & TIOCM_RTS) != 0) {
-mcr &= ~MCR_RTS;
+mcr &= ~SC16IS752_MCR_RTS;
   }
   if ((clear & TIOCM_DTR) != 0) {
-mcr |= MCR_DTR;
+mcr |= SC16IS752_MCR_DTR;
   }
   if ((clear & TIOCM_RTS) != 0) {
-mcr |= MCR_RTS;
+mcr |= SC16IS752_MCR_RTS;
   }
 
   write_reg(ctx, SC16IS752_MCR, &mcr, 1);
@@ -416,11 +419,11 @@ void sc16is752_interrupt_handler(void *arg)
   read_2_reg(ctx, SC16IS752_IIR, SC16IS752_RXLVL, data);
   iir = data[0];
 
-  if ((iir & IIR_TX_INTERRUPT) != 0 && ctx->tx_in_progress > 0) {
+  if ((iir & SC16IS752_IIR_TX_INTERRUPT) != 0 && ctx->tx_in_progress > 0) {
 rtems_termios_dequeue_characters(ctx->tty, ctx->tx_in_progress);
   }
 
-  if ((iir & IIR_RX_INTERRUPT) != 0) {
+  if ((iir & SC16IS752_IIR_RX_INTERRUPT) != 0) {
 uint8_t buf[SC16IS752_FIFO_DEPTH];
 uint8_t rxlvl = data[1];
 
-- 
2.18.0

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[PATCH] bsp/beagle: Partial re-write of I2C driver.

2019-06-24 Thread list
o;
-  uint32_t current_msg_todo;
-  uint8_t *current_msg_byte;
-  uint32_t current_todo;
-  bool read;
-  bool hold;
-  rtems_id task_id;
-  rtems_vector_number irq;
-  uint32_t input_clock;
-  uint32_t already_transferred;
-} bbb_i2c_bus;
-
 int am335x_i2c_bus_register(
   const char *bus_path,
   uintptr_t   register_base,
-  uint32_tinput_clock,
+  uint32_tinput_clock, /* FIXME: Unused. Left for compatibility. */
   rtems_vector_number irq
 );
 
diff --git a/bsps/arm/include/libcpu/am335x.h b/bsps/arm/include/libcpu/am335x.h
index a78cbd028d..b69c822d62 100644
--- a/bsps/arm/include/libcpu/am335x.h
+++ b/bsps/arm/include/libcpu/am335x.h
@@ -664,6 +664,9 @@
 #define AM335X_I2C_CON_MST   (0x0400u)
 #define AM335X_I2C_CON_STB   (0x0800u)
 #define AM335X_I2C_SYSC_AUTOIDLE   (0x0001u)
+#define AM335X_I2C_SYSC_SRST   (0x0002u)
+#define AM335X_I2C_SYSC_ENAWAKEUP  (0x0004u)
+#define AM335X_I2C_SYSS_RDONE  (0x0001u)
 
 /*I2C0 module clock registers*/
 #define AM335X_CM_WKUP_CONTROL_CLKCTRL   (0x4)
@@ -686,29 +689,39 @@
 #define AM335X_CM_PER_CONTROL_CLKCTRL_IDLEST   (0x0003u)
 
 
+#define AM335X_I2C_BUF_TXTRSH_SHIFT (0)
+#define AM335X_I2C_BUF_TXTRSH_MASK  (0x003Fu)
+#define AM335X_I2C_BUF_TXTRSH(X)(((X) << AM335X_I2C_BUF_TXTRSH_SHIFT) \
+ & AM335X_I2C_BUF_TXTRSH_MASK)
+#define AM335X_I2C_BUF_TXFIFO_CLR   (0x0040u)
+#define AM335X_I2C_BUF_RXTRSH_SHIFT (8)
+#define AM335X_I2C_BUF_RXTRSH_MASK  (0x3F00u)
+#define AM335X_I2C_BUF_RXTRSH(X)(((X) << AM335X_I2C_BUF_RXTRSH_SHIFT) \
+ & AM335X_I2C_BUF_RXTRSH_MASK)
+#define AM335X_I2C_BUF_RXFIFO_CLR   (0x4000u)
+
 /* I2C status Register */
+#define AM335X_I2C_IRQSTATUS_AL   (1 << 0)
 #define AM335X_I2C_IRQSTATUS_NACK (1 << 1)
-#define AM335X_I2C_IRQSTATUS_ROVR (1 << 11)
-#define AM335X_I2C_IRQSTATUS_AL   (1<<0)
 #define AM335X_I2C_IRQSTATUS_ARDY (1 << 2)
 #define AM335X_I2C_IRQSTATUS_RRDY (1 << 3)
 #define AM335X_I2C_IRQSTATUS_XRDY (1 << 4)
-#define AM335X_I2C_IRQSTATUS_XUDF (1 << 10)
-#define AM335X_I2C_BUF_TXFIFO_CLR   (0x0040u)
-#define AM335X_I2C_BUF_RXFIFO_CLR   (0x4000u)
-#define AM335X_I2C_IRQSTATUS_AAS  (1 << 9)
-#define AM335X_I2C_IRQSTATUS_BF  (1 << 8)
+#define AM335X_I2C_IRQSTATUS_GC   (1 << 5)
 #define AM335X_I2C_IRQSTATUS_STC  (1 << 6)
-#define AM335X_I2C_IRQSTATUS_GC (1 << 5)
-#define AM335X_I2C_IRQSTATUS_XDR (1 << 14)
-#define AM335X_I2C_IRQSTATUS_RDR (1 << 13)
+#define AM335X_I2C_IRQSTATUS_AERR (1 << 7)
+#define AM335X_I2C_IRQSTATUS_BF   (1 << 8)
+#define AM335X_I2C_IRQSTATUS_AAS  (1 << 9)
+#define AM335X_I2C_IRQSTATUS_XUDF (1 << 10)
+#define AM335X_I2C_IRQSTATUS_ROVR (1 << 11)
+#define AM335X_I2C_IRQSTATUS_BB   (1 << 12)
+#define AM335X_I2C_IRQSTATUS_RDR  (1 << 13)
+#define AM335X_I2C_IRQSTATUS_XDR  (1 << 14)
 
 #define AM335X_I2C_INT_RECV_READY AM335X_I2C_IRQSTATUS_RRDY
 #define AM335X_I2C_CON_STOP  (0x0002u)
 #define AM335X_I2C_CON_START (0x0001u)
 #define AM335X_I2C_CFG_MST_RX AM335X_I2C_CON_MST
 #define AM335X_I2C_CFG_MST_TX  (AM335X_I2C_CON_TRX | AM335X_I2C_CON_MST)
-#define AM335X_I2C_IRQSTATUS_RAW_BB   (0x1000u)
 #define AM335X_CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L4_GCLK 
(0x0020u)
 #define AM335X_I2C_INT_STOP_CONDITION AM335X_I2C_IRQSTATUS_BF
 
-- 
2.21.0

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[PATCH] bsps/beagle: Remove dead code from GPIO.

2019-07-30 Thread list
,   /* GPIO2[17] */
-CONF_NOT_DEFINED, /* GPIO2[18] */
-CONF_NOT_DEFINED, /* GPIO2[19] */
-CONF_NOT_DEFINED, /* GPIO2[20] */
-CONF_NOT_DEFINED, /* GPIO2[21] */
-AM335X_CONF_LCD_VSYNC,/* GPIO2[22] */
-AM335X_CONF_LCD_HSYNC,/* GPIO2[23] */
-AM335X_CONF_LCD_PCLK, /* GPIO2[24] */
-AM335X_CONF_LCD_AC_BIAS_EN/* GPIO2[25] */ },
-
-  /* GPIO Module 3 */
-  { CONF_NOT_DEFINED, /* GPIO3[0] */
-CONF_NOT_DEFINED, /* GPIO3[1] */
-CONF_NOT_DEFINED, /* GPIO3[2] */
-CONF_NOT_DEFINED, /* GPIO3[3] */
-CONF_NOT_DEFINED, /* GPIO3[4] */
-CONF_NOT_DEFINED, /* GPIO3[5] */
-CONF_NOT_DEFINED, /* GPIO3[6] */
-CONF_NOT_DEFINED, /* GPIO3[7] */
-CONF_NOT_DEFINED, /* GPIO3[8] */
-CONF_NOT_DEFINED, /* GPIO3[9] */
-CONF_NOT_DEFINED, /* GPIO3[10] */
-CONF_NOT_DEFINED, /* GPIO3[11] */
-CONF_NOT_DEFINED, /* GPIO3[12] */
-CONF_NOT_DEFINED, /* GPIO3[13] */
-AM335X_CONF_MCASP0_ACLKX, /* GPIO3[14] */
-AM335X_CONF_MCASP0_FSX,   /* GPIO3[15] */
-AM335X_CONF_MCASP0_AXR0,  /* GPIO3[16] */
-AM335X_CONF_MCASP0_AHCLKR,/* GPIO3[17] */
-CONF_NOT_DEFINED, /* GPIO3[18] */
-AM335X_CONF_MCASP0_FSR,   /* GPIO3[19] */
-CONF_NOT_DEFINED, /* GPIO3[20] */
-AM335X_CONF_MCASP0_AHCLKX /* GPIO3[21] */ }
-};
-
-/* Get the address of Base Register + Offset for pad config */
-uint32_t static inline bbb_conf_reg(uint32_t bank, uint32_t pin)
-{
-  return (AM335X_PADCONF_BASE + gpio_pad_conf[bank][pin]);
-}
-
 /* Get the value of Base Register + Offset */
 uint32_t static inline bbb_reg(uint32_t bank, uint32_t reg)
 {
-- 
2.22.0

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