date:20230410

Re: [PATCH] README for raspberry pi 4 AArch64 BSP

2023-04-10 Thread Noor Aman

Thanks for the suggestions,

I'll wait for a few days to receive a confirmation or so and after that,
I'll update the documentation instead of adding a README to RTEMS if
required.

Thanks,

On Sun, Apr 9, 2023, 10:39 PM Karel Gardas  wrote:

>
> Hi,
>
> nice patch. I'm not sure if I'm right here, but I've thought the idea is
> to get rid of BSPs specific README files and move all the information
> into the RTEMS user docs. If I'm right, then it would be great if you
> merge your changes to the doc you already pointed out:
>
>
> https://docs.rtems.org/branches/master/user/bsps/bsps-aarch64.html#raspberry-pi-4b
>
> If you would like to work on that, then please clone the docs repo from
> here: git://git.rtems.org/rtems-docs.git
>
> and edit user/bsps/aarch64/raspberrypi4.rst file
>
> You will also need to have some tools installed in order to work on
> that, it is well described in the first paragraph here:
> https://docs.rtems.org/
>
> If you are unsure, wait for official deny or confirmation of the info
> provided by me...
>
> Thanks,
> Karel
>
> On 4/9/23 09:53, Mohd Noor Aman wrote:
> > The readme file includes all links and steps for setting up developping
> > environment for the raspberry pi 4. Added cheap JTAG adapters list which
> are
> > tried and tested. Links for references for raspberry pi 4 are also added.
> > ---
> >   bsps/aarch64/raspberrypi/README | 86 +
> >   1 file changed, 86 insertions(+)
> >   create mode 100644 bsps/aarch64/raspberrypi/README
> >
> > diff --git a/bsps/aarch64/raspberrypi/README
> b/bsps/aarch64/raspberrypi/README
> > new file mode 100644
> > index 00..9c6465fd5e
> > --- /dev/null
> > +++ b/bsps/aarch64/raspberrypi/README
> > @@ -0,0 +1,86 @@
> > +BSP for the Raspberry Pi aarch64 ArmV8 board
> > +
> > +It currently supports the following peripheral:
> > +-- Console using the PL011 UART0 Raspberry Pi 4 has 6 UARTs, 5 PL011
> based and 1
> > +   miniuart based. Only PL011 UART0 is supported. No support for
> Mini-UART. The
> > +   console driver only works with polled mode right now.
> > +
> > +-- The clock driver uses the ARM Generic Timer.
> > +
> > +-- GIC-400 is compatible with gicv2 headers and is supported by bsp
> > +
> > +
> > +How to boot: Steps on how to boot RTEMS on raspberry pi 4B is given
> here.
> > +
> > +
> https://docs.rtems.org/branches/master/user/bsps/bsps-aarch64.html#raspberry-pi-4b
> > +
> > +
> > +To do list: It would be nice to get support in the BSP for the
> following:
> > +-- SD card
> > +-- SPI
> > +-- I2C
> > +-- GPIO
> > +-- Graphics console
> > +-- Sound
> > +
> > +
> > +JTAG debugging: OpenOCD supports bcm2711 as a target. Many interfaces
> are
> > +supported to work with bcm2711. A few of them which I have tested
> personally
> > +are.
> > +
> > +FT232H: Nice and cheap adapter which supports SPI, I2C JTAG using MPSSE
> engine.
> > +It can either be used as a UART-to-USB or JTAG adapter at a time.
> > +
> > +Esp-prog: its just a FT2232H breakout board which can connect using
> FT2232H
> > +derivatives cfg
> > +
> > +Raspberry Pi SBC: Yes, you can use a raspberry pi to debug another
> raspberry pi
> > +
> > +Raspberry Pi Pico: As of now, openocd support for Raspberry pi Pico is
> under
> > +review, in the meantime you can just build forked version of OpenOCD,
> and use
> > +pico-dirtyJTAG.uf2 for raspberry pi pico.
> > +https://sourceforge.net/u/phdussud/openocd
> > +https://github.com/phdussud/pico-dirtyJtag
> > +
> > +Some of the interfaces which I have not used personally but can most
> probably be
> > +used are:
> > +
> > +FT2XXXH series :  They are of same family as FT232H, just have
> different amount
> > +of MPSSE engine, Which determines how many many protocols can be ran
> > +simultaneously.
> > +
> > +BeagleBone Black: It can be used with OpenOCDs am335xgpio drivers to be
> used as
> > +JTAG/SWD programmer
> > +
> > +Almost every SBC with GPIO: It can be used by openOCD through libgpiod
> library
> > +
> > +
> > +Openocd compilation steps for Raspberry pi:
> > +
> > +git clone http://openocd.zylin.com/openocd
> > +cd openocd
> > +./bootstrap
> > +./configure --enable-sysfsgpio --enable-bcm2835gpio
> > +make -j$(nproc)
> > +
> > +
> > +Credits and links:
> > +
> > +  A bare metal example which includes examples for interrupts, SMP,
> bluetooth
> > +  https://github.com/isometimes/rpi4-osdev/
> > +
> > +  A Raspberry pi 4 port for RT-Thread which support Ethernet, mailbox
> and UARTs
> > +
> https://github.com/RT-Thread/rt-thread/tree/master/bsp/raspberry-pi/raspi4-64
> > +
> > +  Vxworks is a Real-Time OS which has a public SDK for development,not
> open
> > +  source. The steps for booting Vxworks is given here.
> > +
> https://labs.windriver.com/downloads/wrsdk-vxworks7-docs/2203/README_raspberrypi4b.html
> > +
> > +  s-matyukevich has done a great job for baremetal examples for
> raspberry pi 3B,
> > +  and rhythm16 port all that code for raspb

Re: [PATCH v3 1/3] bsps/microblaze: Allow copying FDT from U-Boot

2023-04-10 Thread Chris Johns

On 10/4/2023 1:47 pm, Alex White wrote:
>  .../microblaze_invalidate_dcache_range.S  | 104 ++

Why not provide the RTEMS cache API and use that?

Chris
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Re: Motorola PowerPC asm warning

2023-04-10 Thread Chris Johns



On 9/4/2023 1:26 am, Joel Sherrill wrote:
> 
> 
> On Fri, Apr 7, 2023, 6:55 PM Joel Sherrill  > wrote:
> 
> 
> 
> On Fri, Apr 7, 2023, 5:54 PM Chris Johns  > wrote:
> 
> Hi
> 
> Building the motorola_powerpc BSPs I noticed this warning:
> 
> ../../../bsps/powerpc/shared/exceptions/ppc_exc.S: Assembler messages:
> ../../../bsps/powerpc/shared/exceptions/ppc_exc.S:132: Warning: 
> invalid
> register
> expression
> ../../../bsps/powerpc/shared/exceptions/ppc_exc.S:135: Warning: 
> invalid
> register
> expression
> 
> 
> https://git.rtems.org/rtems/tree/bsps/powerpc/shared/exceptions/ppc_exc.S#n132
>  
> 
> 
> Can someone with an understanding of the PowerPC processors please
> comment if
> this is an issue or how we can remove the warning?
> 
> 
> It's from something in the macro. Any chance of a cut down of the
> preprocessed output and command it fails with?
> 
> 
> With that, we can compare the PPC model being compiled against with the
> instructions and registers. 
> 
> If it is Book E for an old PPC model, I don't think they will work since Book 
> E
> is way newer.

There are 3 machine flags used to build the file in the motorola_powerpc:

 -mcpu=603e
 -mcpu=604
 -mcpu=7400

and all have the warning. This is the command line for the mvme2100 BSP:

powerpc-rtems6-gcc -MMD -mcpu=603e -DASM -g \
  -Icpukit/include -I../../../cpukit/include \
  -Icpukit/score/cpu/powerpc/include \
  -I../../../cpukit/score/cpu/powerpc/include \
  -Ibsps/include -I../../../bsps/include -Ibsps/powerpc/include \
  -I../../../bsps/powerpc/include \
  -Ibsps/powerpc/motorola_powerpc/include \
  -I../../../bsps/powerpc/motorola_powerpc/include \
  ../../../bsps/powerpc/shared/exceptions/ppc_exc.S -c \
  -obsps/powerpc/shared/exceptions/ppc_exc.S.46.o

The warning is from the WRAP assembler macro:

https://git.rtems.org/rtems/tree/bsps/powerpc/shared/exceptions/ppc_exc_asm_macros.h#n730

The instruction in the TEST_LOCK_ assembler macro that is generating the 
warning is:

https://git.rtems.org/rtems/tree/bsps/powerpc/shared/exceptions/ppc_exc_asm_macros.h#n242

If I comment this instruction the warning goes away. The assembled object file
shows the instruction as:

06ac :
 6ac:   4e 52 11 02 crandc  4*cr4+eq,4*cr4+eq,eq

The pre-processed code is:

TEST_LOCK_crit_done_\_FLVR:
 crandc ((4)*4+2), ((4)*4+2), ((cr0)*4+2)

And in this case FLVR is bookE_crit. I have no idea what is happening in the 
code.

Chris
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[PATCH 1/2] bsps/motorola_powerpc: Change defines from BSP names to avoid clash

2023-04-10 Thread chrisj

From: Chris Johns 

- Change mvme2100 to mot_pcc_mvme2100 to avoid clashing with the
  RTEMS_BSP value for the BSP. You cannot have a define that is the
  BSP name.
---
 bsps/mips/include/bsp/i8259.h  |  4 ++--
 bsps/powerpc/motorola_powerpc/include/bsp.h|  6 +++---
 bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h  |  2 +-
 bsps/powerpc/motorola_powerpc/include/bsp/irq.h|  2 +-
 bsps/powerpc/motorola_powerpc/start/bspreset.c |  2 +-
 bsps/powerpc/motorola_powerpc/start/bspstart.c | 10 +-
 bsps/powerpc/motorola_powerpc/start/motorola.c |  2 +-
 bsps/powerpc/shared/irq/irq_init.c |  6 +++---
 bsps/powerpc/shared/pci/detect_raven_bridge.c  |  2 +-
 bsps/powerpc/shared/rtc/todcfg.c   |  6 +++---
 .../bsps/powerpc/motorola_powerpc/optmvme2100.yml  |  2 +-
 .../bsps/powerpc/motorola_powerpc/optmvme2307.yml  |  2 +-
 .../bsps/powerpc/motorola_powerpc/optmvme2700.yml  |  2 +-
 13 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/bsps/mips/include/bsp/i8259.h b/bsps/mips/include/bsp/i8259.h
index 1a947829b0..29e3853874 100644
--- a/bsps/mips/include/bsp/i8259.h
+++ b/bsps/mips/include/bsp/i8259.h
@@ -37,7 +37,7 @@
  * @{
  */
 
-#if 1 
+#if 1
 #define ISA8259_M_ELCR 0x4d0
 #define ISA8259_S_ELCR 0x4d1
 #endif
@@ -169,7 +169,7 @@ extern "C" {
 
 /** @} */
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define BSP_DEC21143_IRQ(BSP_PCI_IRQ_LOWEST_OFFSET + 1)
 #define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ   (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
 #define BSP_PCMIP_TYPE1_SLOT1_IRQ   (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp.h 
b/bsps/powerpc/motorola_powerpc/include/bsp.h
index db0995fa5c..d44bcd5cff 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp.h
@@ -89,7 +89,7 @@ extern "C" {
  */
 
 /* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define_IO_BASECHRP_ISA_IO_BASE
 #define_ISA_MEM_BASE   CHRP_ISA_MEM_BASE
 /* address of our ram on the PCI bus   */
@@ -154,7 +154,7 @@ extern "C" {
  *  find out what it is which is VERY different from other Motorola boards.
  */
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e1)
 /* #define BSP_UART_IOBASE_COM1 (0xffe1) */
 #define BSP_OPEN_PIC_BASE_OFFSET 0x4
@@ -169,7 +169,7 @@ extern "C" {
 #define BSP_VGA_IOBASE   ((_IO_BASE)+0x3c0)
 #endif
 
-#if defined(mvme2300) || defined(mvme2307) || defined(mvme2700)
+#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700)
 #define MVME_HAS_DEC21140
 #endif
 #endif
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h 
b/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
index 9b355819f1..9e57730d60 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
@@ -66,7 +66,7 @@
  * available and unused!
  */
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define _VME_A32_WIN0_ON_PCI  0x9000
 #define _VME_A24_ON_PCI  0x9f00
 #define _VME_A16_ON_PCI  0x9fff
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp/irq.h 
b/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
index fea2859c3e..74bda323eb 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
@@ -133,7 +133,7 @@ extern "C" {
 #define BSP_PCI_ISA_BRIDGE_IRQ (BSP_PCI_IRQ0)
 #endif
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 #define BSP_DEC21143_IRQ(BSP_PCI_IRQ_LOWEST_OFFSET + 1)
 #define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ   (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
 #define BSP_PCMIP_TYPE1_SLOT1_IRQ   (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
diff --git a/bsps/powerpc/motorola_powerpc/start/bspreset.c 
b/bsps/powerpc/motorola_powerpc/start/bspreset.c
index 0931badae4..d0af42284f 100644
--- a/bsps/powerpc/motorola_powerpc/start/bspreset.c
+++ b/bsps/powerpc/motorola_powerpc/start/bspreset.c
@@ -16,7 +16,7 @@ void bsp_reset(void)
   CPU_print_stack();
   /* shutdown and reboot */
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
   *(unsigned char*)0xffe0 |= 0x80;
 #else
/* Memory-mapped Port 92 PIB device access
diff --git a/bsps/powerpc/motorola_powerpc/start/bspstart.c 
b/bsps/powerpc/motorola_powerpc/start/bspstart.c
index a781297565..894cf9d73d 100644
--- a/bsps/powerpc/motorola_powerpc/start/bspstart.c
+++ b/bsps/powerpc/motorola_powerpc/start/bspstart.c
@@ -109,7 +109,7 @@ char *save_boot_params(
   return loaderParam;
 }
 
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
 unsigned int EUMBBAR;
 
 /*
@@ -130,7 +130,7 @@ uint32_t _CPU_Counter_frequency(void)
 
 stat

[PATCH 2/2] bsps/powerpc: Fix warnings with PPC_SPECIAL_PURPOSE_REGISTER

2023-04-10 Thread chrisj

From: Chris Johns 

---
 bsps/powerpc/include/libcpu/powerpc-utility.h | 40 +++
 .../powerpc/shared/exceptions/ppc_exc_print.c | 25 +++-
 2 files changed, 38 insertions(+), 27 deletions(-)

diff --git a/bsps/powerpc/include/libcpu/powerpc-utility.h 
b/bsps/powerpc/include/libcpu/powerpc-utility.h
index 922e5d2407..fb831c9fa8 100644
--- a/bsps/powerpc/include/libcpu/powerpc-utility.h
+++ b/bsps/powerpc/include/libcpu/powerpc-utility.h
@@ -577,15 +577,11 @@ static inline void ppc_set_decrementer_register(uint32_t 
dec)
  *
  * @note This macro uses a GNU C extension.
  */
-#define PPC_SPECIAL_PURPOSE_REGISTER(spr) \
-  ({ \
-uint32_t val; \
-__asm__ volatile (\
-  "mfspr %0, " PPC_STRINGOF(spr) \
-  : "=r" (val) \
-); \
-val;\
-  } )
+#define PPC_SPECIAL_PURPOSE_REGISTER(spr, val) \
+  __asm__ volatile (\
+"mfspr %0, " PPC_STRINGOF(spr) \
+: "=r" (val) \
+  )
 
 /**
  * @brief Sets the Special Purpose Register with number @a spr to the value in
@@ -612,7 +608,7 @@ static inline void ppc_set_decrementer_register(uint32_t 
dec)
 uint32_t val; \
 uint32_t mybits = bits; \
 _ISR_Local_disable(level); \
-val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \
+PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \
 val |= mybits; \
 PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
 _ISR_Local_enable(level); \
@@ -632,7 +628,7 @@ static inline void ppc_set_decrementer_register(uint32_t 
dec)
 uint32_t mybits = bits; \
 uint32_t mymask = mask; \
 _ISR_Local_disable(level); \
-val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \
+PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \
 val &= ~mymask; \
 val |= mybits; \
 PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
@@ -651,7 +647,7 @@ static inline void ppc_set_decrementer_register(uint32_t 
dec)
 uint32_t val; \
 uint32_t mybits = bits; \
 _ISR_Local_disable(level); \
-val = PPC_SPECIAL_PURPOSE_REGISTER(spr); \
+PPC_SPECIAL_PURPOSE_REGISTER(spr, val); \
 val &= ~mybits; \
 PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val); \
 _ISR_Local_enable(level); \
@@ -790,7 +786,9 @@ static inline void ppc_set_time_base(uint32_t val)
 
 static inline uint32_t ppc_time_base_upper(void)
 {
-  return PPC_SPECIAL_PURPOSE_REGISTER(TBRU);
+  uint32_t val;
+  PPC_SPECIAL_PURPOSE_REGISTER(TBRU, val);
+  return val;
 }
 
 static inline void ppc_set_time_base_upper(uint32_t val)
@@ -810,12 +808,16 @@ static inline void ppc_set_time_base_64(uint64_t val)
 
 static inline uint32_t ppc_alternate_time_base(void)
 {
-  return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBL);
+  uint32_t val;
+  PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBL, val);
+  return val;
 }
 
 static inline uint32_t ppc_alternate_time_base_upper(void)
 {
-  return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBU);
+  uint32_t val;
+  PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_ATBU, val);
+  return val;
 }
 
 static inline uint64_t ppc_alternate_time_base_64(void)
@@ -835,7 +837,9 @@ static inline uint64_t ppc_alternate_time_base_64(void)
 
 static inline uint32_t ppc_processor_id(void)
 {
-  return PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_PIR);
+  uint32_t val;
+  PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_PIR, val);
+  return val;
 }
 
 static inline void ppc_set_processor_id(uint32_t val)
@@ -845,7 +849,9 @@ static inline void ppc_set_processor_id(uint32_t val)
 
 static inline uint32_t ppc_fsl_system_version(void)
 {
-  return PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_SVR);
+  uint32_t val;
+  PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_SVR, val);
+  return val;
 }
 
 static inline uint32_t ppc_fsl_system_version_cid(uint32_t svr)
diff --git a/bsps/powerpc/shared/exceptions/ppc_exc_print.c 
b/bsps/powerpc/shared/exceptions/ppc_exc_print.c
index e4fcc73cb1..ff231beff9 100644
--- a/bsps/powerpc/shared/exceptions/ppc_exc_print.c
+++ b/bsps/powerpc/shared/exceptions/ppc_exc_print.c
@@ -42,18 +42,23 @@ typedef struct LRFrameRec_ {
 
 static uint32_t ppc_exc_get_DAR_dflt(void)
 {
-  if (ppc_cpu_is_60x())
-return PPC_SPECIAL_PURPOSE_REGISTER(PPC_DAR);
-  else
+  uint32_t val;
+  if (ppc_cpu_is_60x()) {
+PPC_SPECIAL_PURPOSE_REGISTER(PPC_DAR, val);
+return val;
+  } else {
 switch (ppc_cpu_is_bookE()) {
   default:
 break;
   case PPC_BOOKE_STD:
   case PPC_BOOKE_E500:
-return PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_DEAR);
+PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_DEAR, val);
+return val;
   case PPC_BOOKE_405:
-return PPC_SPECIAL_PURPOSE_REGISTER(PPC405_DEAR);
+PPC_SPECIAL_PURPOSE_REGISTER(PPC405_DEAR, val);
+return val;
 }
+  }
   return 0xdeadbeef;
 }
 
@@ -170,13 +175,13 @@ void _CPU_Exception_frame_print(const CPU_Exception_frame 
*excPtr)
 printk(" %s = 0x%08" PRIx32 "\n", reg, ppc_exc_get_DAR());
   }
   if (ppc_cpu_is_bookE()) {
-unsigned esr, mcsr;
+uint32_t esr, mcsr;
 if (ppc_cpu_is_bookE() == PPC_BOOKE_405) {
-  esr  = PPC_SPECIAL_PURPOSE_REGISTER(PPC405_ESR);
-

[PATCH] gdb-common: Fix the python-config library parsing

2023-04-10 Thread chrisj

From: Chris Johns 

Closes #4894
---
 source-builder/config/gdb-common-1.cfg | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/source-builder/config/gdb-common-1.cfg 
b/source-builder/config/gdb-common-1.cfg
index a52e64d..0fea334 100644
--- a/source-builder/config/gdb-common-1.cfg
+++ b/source-builder/config/gdb-common-1.cfg
@@ -109,8 +109,8 @@
   %define gdb-host-libs -L '%{host_ldflags}'
 %endif
 %if %{gdb-python-config} != %{nil}
-  %define gdb-python-lib-filter awk 'BEGIN{FS=" 
"}/python/{for(i=1;ihttp://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH] README for raspberry pi 4 AArch64 BSP

Re: [PATCH v3 1/3] bsps/microblaze: Allow copying FDT from U-Boot

Re: Motorola PowerPC asm warning

[PATCH 1/2] bsps/motorola_powerpc: Change defines from BSP names to avoid clash

[PATCH 2/2] bsps/powerpc: Fix warnings with PPC_SPECIAL_PURPOSE_REGISTER

[PATCH] gdb-common: Fix the python-config library parsing

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