Re:GMP error when building aarch64-rtems-gcc on Mingw64

2022-04-01 Thread jameszxj 
It has been there for a while. It is caused by the gmp configure parameter 
(in gcc/makefile.in line 12644 )


I change "--host=none-${host_vendor}-${host_os} 
--target=none-${host_vendor}-${host_os}"
to "--host=${host_alias} --target=${host_alias}", the building succeeds.
  


-- Original --
From:   
 "Ryan Long"

http://lists.rtems.org/mailman/listinfo/devel
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Re:[PATCH] fix _mkdir parameter error.[RSB]

2022-04-01 Thread zhengxiaojun 
It is a RSB pacth. 
git send-eamil has no information about it.


-- Original --
From:   
 "zhengxiaojun" 
   
http://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH] fix _mkdir parameter error.[RSB]

2022-04-01 Thread Joel Sherrill 
Chris should comment on this technically.

My concern is that the < and > in this patch were converted to HTML.
I do not believe this will apply. I think your email client converted it
from ASCII to HTML.

On Fri, Apr 1, 2022 at 4:25 AM zhengxiaojun  wrote:

> It is a RSB pacth. 
> git send-eamil has no information about it.
>
>
> -- Original --
> From:
>   "zhengxiaojun"
> <
> james...@gmail.com>;
> Date: Fri, Apr 1, 2022 11:41 AM
> To: "devel" Cc: "zhengxiaojun" Subject: [PATCH] fix _mkdir parameter error.
>
>
>
> Signed-off-by: zhengxiaojun  ---
> tester/covoar/ReportsBase.cc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tester/covoar/ReportsBase.cc b/tester/covoar/ReportsBase.cc
> index 0fb9ce0..eb56c4f 100644
> --- a/tester/covoar/ReportsBase.cc
> +++ b/tester/covoar/ReportsBase.cc
> @@ -65,7 +65,7 @@ void ReportsBase::OpenFile(
>
>  // Create the output directory if it does not already exist
> #ifdef _WIN32
> -  sc = _mkdir( symbolSetOutputDirectory );
> +  sc = _mkdir( symbolSetOutputDirectory.c_str() );
> #else
>  sc = mkdir( symbolSetOutputDirectory.c_str(), 0755 );
> #endif
> --
> 2.35.1
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Re: GMP error when building aarch64-rtems-gcc on Mingw64

2022-04-01 Thread Joel Sherrill 
On Fri, Apr 1, 2022 at 3:37 AM jameszxj  wrote:

> It has been there for a while. It is caused by the gmp
> configure parameter (in gcc/makefile.in line 12644 )
>

So the patch you posted fixes this?

This should be the ticket https://devel.rtems.org/ticket/4208

Ryan.. the patch he posted got turned into HTML and can't be applied. Can
you try to make the change and verify it.

https://lists.rtems.org/pipermail/devel/2022-April/071042.html

Please give him authorship credit when you commit it.

>
>
> I change "--host=none-${host_vendor}-${host_os}
> --target=none-${host_vendor}-${host_os}"
> to "--host=${host_alias} --target=${host_alias}", the
> building succeeds.
>   
>
>
> -- Original --
> From:
>   "Ryan Long"
>   <
> ryan.l...@oarcorp.com>;
> Date: Tue, Mar 22, 2022 05:33 AM
> To: "devel"
> Subject: GMP error when building aarch64-rtems-gcc on Mingw64
>
>
>
> While building gcc, arg3nexwm1 fails. The error follows
>
> In file included from ../../../gnu-mirror-gcc-348fb9d/gmp/gmp-impl.h:146,
> 
> from fib_table.c:4:
> ../fib_table.h:4:1: warning: data definition has no type or storage class
>     4 | Error, error, this data is for 32 bits
>   | ^
> ../fib_table.h:4:1: warning: type defaults to 'int' in declaration of
> 'Error' [-Wimplicit-int]
> ../fib_table.h:4:8: warning: type defaults to 'int' in declaration of
> 'error' [-Wimplicit-int]
>     4 | Error, error, this data is for 32 bits
>   |   
> ^
> ../fib_table.h:4:20: error: expected '=', ',', ';', 'asm' or
> '__attribute__' before 'data'
>     4 | Error, error, this data is for 32 bits
>  
> |   
> ^~~~
> fib_table.c:7:1: warning: data definition has no type or storage class
>     7 | Error, error, this data is for 32 bits
>   | ^
> fib_table.c:7:1: warning: type defaults to 'int' in declaration of
> 'Error' [-Wimplicit-int]
> fib_table.c:7:8: warning: type defaults to 'int' in declaration of
> 'error' [-Wimplicit-int]
>     7 | Error, error, this data is for 32 bits
>   |   
> ^
> fib_table.c:7:20: error: expected '=', ',', ';', 'asm' or
> '__attribute__' before 'data'
>     7 | Error, error, this data is for 32 bits
>  
> |   
> ^~~~
>
> This is due to GMP_NUMB_BITS not being equal to 32. Has anyone
> encountered this?
>
> Thanks,
>
> Ryan
>
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[PATCH 01/14] bsp/stm32h7: add spec file for the STM32H7B3I-DK BSP variant

2022-04-01 Thread Karel Gardas 
---
 .../build/bsps/arm/stm32h7/bspstm32h7b3i-dk.yml | 17 +
 1 file changed, 17 insertions(+)
 create mode 100644 spec/build/bsps/arm/stm32h7/bspstm32h7b3i-dk.yml

diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7b3i-dk.yml 
b/spec/build/bsps/arm/stm32h7/bspstm32h7b3i-dk.yml
new file mode 100644
index 00..b33bf99826
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/bspstm32h7b3i-dk.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: stm32h7b3i-dk
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2022 Karel Gardas 
+cppflags: []
+enabled-by: true
+family: stm32h7
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+source: []
+type: build
-- 
2.25.1

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[PATCH 02/14] bsp/stm32h7: add power supply configuration

2022-04-01 Thread Karel Gardas 
---
 bsps/arm/stm32h7/start/bspstarthooks.c   |  2 +-
 spec/build/bsps/arm/stm32h7/grp.yml  |  2 ++
 spec/build/bsps/arm/stm32h7/optpwrsupply.yml | 19 +++
 3 files changed, 22 insertions(+), 1 deletion(-)
 create mode 100644 spec/build/bsps/arm/stm32h7/optpwrsupply.yml

diff --git a/bsps/arm/stm32h7/start/bspstarthooks.c 
b/bsps/arm/stm32h7/start/bspstarthooks.c
index dcd4b0bef2..ef26af5eba 100644
--- a/bsps/arm/stm32h7/start/bspstarthooks.c
+++ b/bsps/arm/stm32h7/start/bspstarthooks.c
@@ -43,7 +43,7 @@ void HAL_MspInit(void)
 
 static void init_power(void)
 {
-  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+  HAL_PWREx_ConfigSupply(STM32H7_PWR_SUPPLY);
   __HAL_PWR_VOLTAGESCALING_CONFIG(stm32h7_config_pwr_regulator_voltagescaling);
 
   while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {
diff --git a/spec/build/bsps/arm/stm32h7/grp.yml 
b/spec/build/bsps/arm/stm32h7/grp.yml
index 5e26a3e072..7b001e3701 100644
--- a/spec/build/bsps/arm/stm32h7/grp.yml
+++ b/spec/build/bsps/arm/stm32h7/grp.yml
@@ -79,6 +79,8 @@ links:
   uid: optmemsrambackupsz
 - role: build-dependency
   uid: optprintkinstance
+- role: build-dependency
+  uid: optpwrsupply
 - role: build-dependency
   uid: optusart3gpiopins
 - role: build-dependency
diff --git a/spec/build/bsps/arm/stm32h7/optpwrsupply.yml 
b/spec/build/bsps/arm/stm32h7/optpwrsupply.yml
new file mode 100644
index 00..d7eeb63906
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optpwrsupply.yml
@@ -0,0 +1,19 @@
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+default: PWR_LDO_SUPPLY
+default-by-variant:
+- value: PWR_DIRECT_SMPS_SUPPLY
+  variants:
+  - arm/stm32h7b3i-dk
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_PWR_SUPPLY
+description: |
+  Board power supply mechanism configuration. WARNING: wrong configuration 
here may result in your board being unaccessible using ST-Link interface! 
Please consult board datasheet for more information about various power supply 
options and about how to fix possible misconfiguration.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2022 Karel Gardas 
-- 
2.25.1

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[PATCH 03/14] bsp/stm32h7: disable UART 5, 7, 8, 9 and USART 3, 6, 10 for STM32H7B3I-DK BSP

2022-04-01 Thread Karel Gardas 
---
 spec/build/bsps/arm/stm32h7/optenuart5.yml   | 5 -
 spec/build/bsps/arm/stm32h7/optenuart7.yml   | 5 -
 spec/build/bsps/arm/stm32h7/optenuart8.yml   | 5 -
 spec/build/bsps/arm/stm32h7/optenuart9.yml   | 5 -
 spec/build/bsps/arm/stm32h7/optenusart10.yml | 5 -
 spec/build/bsps/arm/stm32h7/optenusart3.yml  | 5 -
 spec/build/bsps/arm/stm32h7/optenusart6.yml  | 5 -
 7 files changed, 28 insertions(+), 7 deletions(-)

diff --git a/spec/build/bsps/arm/stm32h7/optenuart5.yml 
b/spec/build/bsps/arm/stm32h7/optenuart5.yml
index f124d72113..413f9447b8 100644
--- a/spec/build/bsps/arm/stm32h7/optenuart5.yml
+++ b/spec/build/bsps/arm/stm32h7/optenuart5.yml
@@ -3,7 +3,10 @@ actions:
 - define-condition: null
 build-type: option
 default: true
-default-by-variant: []
+default-by-variant:
+- value: false
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optenuart7.yml 
b/spec/build/bsps/arm/stm32h7/optenuart7.yml
index 7310cef713..c9884fcb46 100644
--- a/spec/build/bsps/arm/stm32h7/optenuart7.yml
+++ b/spec/build/bsps/arm/stm32h7/optenuart7.yml
@@ -3,7 +3,10 @@ actions:
 - define-condition: null
 build-type: option
 default: true
-default-by-variant: []
+default-by-variant:
+- value: false
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optenuart8.yml 
b/spec/build/bsps/arm/stm32h7/optenuart8.yml
index f0407f6510..593f736970 100644
--- a/spec/build/bsps/arm/stm32h7/optenuart8.yml
+++ b/spec/build/bsps/arm/stm32h7/optenuart8.yml
@@ -3,7 +3,10 @@ actions:
 - define-condition: null
 build-type: option
 default: true
-default-by-variant: []
+default-by-variant:
+- value: false
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optenuart9.yml 
b/spec/build/bsps/arm/stm32h7/optenuart9.yml
index 1a3ef49459..596aae59ef 100644
--- a/spec/build/bsps/arm/stm32h7/optenuart9.yml
+++ b/spec/build/bsps/arm/stm32h7/optenuart9.yml
@@ -3,7 +3,10 @@ actions:
 - define-condition: null
 build-type: option
 default: true
-default-by-variant: []
+default-by-variant:
+- value: false
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optenusart10.yml 
b/spec/build/bsps/arm/stm32h7/optenusart10.yml
index 659d1a96b6..d5c5a1906e 100644
--- a/spec/build/bsps/arm/stm32h7/optenusart10.yml
+++ b/spec/build/bsps/arm/stm32h7/optenusart10.yml
@@ -3,7 +3,10 @@ actions:
 - define-condition: null
 build-type: option
 default: true
-default-by-variant: []
+default-by-variant:
+- value: false
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optenusart3.yml 
b/spec/build/bsps/arm/stm32h7/optenusart3.yml
index 09e673ff7f..f74ea31fa3 100644
--- a/spec/build/bsps/arm/stm32h7/optenusart3.yml
+++ b/spec/build/bsps/arm/stm32h7/optenusart3.yml
@@ -3,7 +3,10 @@ actions:
 - define-condition: null
 build-type: option
 default: true
-default-by-variant: []
+default-by-variant:
+- value: false
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optenusart6.yml 
b/spec/build/bsps/arm/stm32h7/optenusart6.yml
index e6524fd40d..51791b56cd 100644
--- a/spec/build/bsps/arm/stm32h7/optenusart6.yml
+++ b/spec/build/bsps/arm/stm32h7/optenusart6.yml
@@ -3,7 +3,10 @@ actions:
 - define-condition: null
 build-type: option
 default: true
-default-by-variant: []
+default-by-variant:
+- value: false
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
-- 
2.25.1

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[PATCH 04/14] bsp/stm32h7: add configuration for USART1 GPIO pins, registers and alternate function

2022-04-01 Thread Karel Gardas 
---
 bsps/arm/stm32h7/console/console-usart1-cfg.c |  8 +---
 spec/build/bsps/arm/stm32h7/grp.yml   |  6 ++
 .../arm/stm32h7/optusart1alternatefunc.yml| 19 +++
 .../bsps/arm/stm32h7/optusart1gpiopins.yml| 19 +++
 .../bsps/arm/stm32h7/optusart1gpioregs.yml| 19 +++
 5 files changed, 68 insertions(+), 3 deletions(-)
 create mode 100644 spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml
 create mode 100644 spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml
 create mode 100644 spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml

diff --git a/bsps/arm/stm32h7/console/console-usart1-cfg.c 
b/bsps/arm/stm32h7/console/console-usart1-cfg.c
index 47c13b2f54..d64d91ab30 100644
--- a/bsps/arm/stm32h7/console/console-usart1-cfg.c
+++ b/bsps/arm/stm32h7/console/console-usart1-cfg.c
@@ -31,15 +31,17 @@
 
 #include 
 
+#include 
+
 const stm32h7_uart_config stm32h7_usart1_config = {
   .gpio = {
-.regs = GPIOB,
+.regs = STM32H7_USART1_GPIO_REGS,
 .config = {
-  .Pin = GPIO_PIN_14 | GPIO_PIN_15,
+  .Pin = STM32H7_USART1_GPIO_PINS,
   .Mode = GPIO_MODE_AF_PP,
   .Pull = GPIO_NOPULL,
   .Speed = GPIO_SPEED_FREQ_LOW,
-  .Alternate = GPIO_AF4_USART1
+  .Alternate = STM32H7_USART1_ALT_FUNC
 }
   },
   .irq = USART1_IRQn,
diff --git a/spec/build/bsps/arm/stm32h7/grp.yml 
b/spec/build/bsps/arm/stm32h7/grp.yml
index 7b001e3701..e3b44d9593 100644
--- a/spec/build/bsps/arm/stm32h7/grp.yml
+++ b/spec/build/bsps/arm/stm32h7/grp.yml
@@ -81,6 +81,12 @@ links:
   uid: optprintkinstance
 - role: build-dependency
   uid: optpwrsupply
+- role: build-dependency
+  uid: optusart1gpiopins
+- role: build-dependency
+  uid: optusart1gpioregs
+- role: build-dependency
+  uid: optusart1alternatefunc
 - role: build-dependency
   uid: optusart3gpiopins
 - role: build-dependency
diff --git a/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml 
b/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml
new file mode 100644
index 00..049ed6a3ac
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml
@@ -0,0 +1,19 @@
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+default: GPIO_AF4_USART1
+default-by-variant:
+- value: GPIO_AF7_USART1
+  variants:
+  - arm/stm32h7b3i-dk
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_USART1_ALT_FUNC
+description: |
+  Alternate function mapping for the USART1 pin configuration.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2022 Karel Gardas 
diff --git a/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml 
b/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml
new file mode 100644
index 00..1580ded243
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml
@@ -0,0 +1,19 @@
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+default: ( GPIO_PIN_14 | GPIO_PIN_15 )
+default-by-variant:
+- value: ( GPIO_PIN_9 | GPIO_PIN_10 )
+  variants:
+  - arm/stm32h7b3i-dk
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_USART1_GPIO_PINS
+description: |
+  GPIO pins used for the USART1 pin configuration.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021-22 embedded brains GmbH (http://www.embedded-brains.de)
diff --git a/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml 
b/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml
new file mode 100644
index 00..46d10616bb
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml
@@ -0,0 +1,19 @@
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+default: GPIOD
+default-by-variant:
+- value: GPIOA
+  variants:
+  - arm/stm32h7b3i-dk
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_USART1_GPIO_REGS
+description: |
+  GPIO registers used for the USART1 pin configuration.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
-- 
2.25.1

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[PATCH 06/14] bsp/stm32h7: HSE clock value configuration for STM32H7B3I-DK BSP variant

2022-04-01 Thread Karel Gardas 
---
 spec/build/bsps/arm/stm32h7/opthse.yml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/spec/build/bsps/arm/stm32h7/opthse.yml 
b/spec/build/bsps/arm/stm32h7/opthse.yml
index 51366932e1..e5feef1114 100644
--- a/spec/build/bsps/arm/stm32h7/opthse.yml
+++ b/spec/build/bsps/arm/stm32h7/opthse.yml
@@ -9,6 +9,9 @@ default-by-variant:
 - value: 800
   variants:
   - arm/nucleo-h743zi
+- value: 2400
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
-- 
2.25.1

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[PATCH 05/14] bsp/stm32h7: add flash latency configuration

2022-04-01 Thread Karel Gardas 
---
 bsps/arm/stm32h7/start/stm32h7-config-fls.c   |  2 +-
 spec/build/bsps/arm/stm32h7/grp.yml   |  2 ++
 .../bsps/arm/stm32h7/optmemflashlatency.yml   | 19 +++
 3 files changed, 22 insertions(+), 1 deletion(-)
 create mode 100644 spec/build/bsps/arm/stm32h7/optmemflashlatency.yml

diff --git a/bsps/arm/stm32h7/start/stm32h7-config-fls.c 
b/bsps/arm/stm32h7/start/stm32h7-config-fls.c
index f2d10d2410..9fe056f24d 100644
--- a/bsps/arm/stm32h7/start/stm32h7-config-fls.c
+++ b/bsps/arm/stm32h7/start/stm32h7-config-fls.c
@@ -31,4 +31,4 @@
 
 #include 
 
-const uint32_t stm32h7_config_flash_latency = FLASH_LATENCY_4;
+const uint32_t stm32h7_config_flash_latency = STM32H7_FLASH_LATENCY;
diff --git a/spec/build/bsps/arm/stm32h7/grp.yml 
b/spec/build/bsps/arm/stm32h7/grp.yml
index e3b44d9593..7cb8f698cc 100644
--- a/spec/build/bsps/arm/stm32h7/grp.yml
+++ b/spec/build/bsps/arm/stm32h7/grp.yml
@@ -49,6 +49,8 @@ links:
   uid: optmemdtcmsz
 - role: build-dependency
   uid: optmemflashsz
+- role: build-dependency
+  uid: optmemflashlatency
 - role: build-dependency
   uid: optmemitcmsz
 - role: build-dependency
diff --git a/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml 
b/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml
new file mode 100644
index 00..cf5422acb6
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml
@@ -0,0 +1,19 @@
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+default: FLASH_LATENCY_4
+default-by-variant:
+- value: FLASH_LATENCY_6
+  variants:
+  - arm/stm32h7b3i-dk
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_FLASH_LATENCY
+description: |
+  Internal Flash latency
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2022 Karel Gardas 
-- 
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[PATCH 11/14] bsp/stm32h7: configure oscillator for STM32H7B3xxQ (e.g. STM32H7B3I-DK BSP)

2022-04-01 Thread Karel Gardas 
---
 bsps/arm/stm32h7/start/stm32h7-config-osc.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/bsps/arm/stm32h7/start/stm32h7-config-osc.c 
b/bsps/arm/stm32h7/start/stm32h7-config-osc.c
index b639c7ca36..f790201e5a 100644
--- a/bsps/arm/stm32h7/start/stm32h7-config-osc.c
+++ b/bsps/arm/stm32h7/start/stm32h7-config-osc.c
@@ -32,6 +32,22 @@
 #include 
 
 const RCC_OscInitTypeDef stm32h7_config_oscillator = {
+#ifdef STM32H7B3xxQ
+  .OscillatorType = RCC_OSCILLATORTYPE_HSE,
+  .HSEState = RCC_HSE_ON,
+  .HSIState = RCC_HSI_OFF,
+  .CSIState = RCC_CSI_OFF,
+  .PLL.PLLState = RCC_PLL_ON,
+  .PLL.PLLSource = RCC_PLLSOURCE_HSE,
+  .PLL.PLLM = 12,
+  .PLL.PLLN = 280,
+  .PLL.PLLFRACN = 0,
+  .PLL.PLLP = 2,
+  .PLL.PLLR = 2,
+  .PLL.PLLQ = 2,
+  .PLL.PLLVCOSEL = RCC_PLL1VCOWIDE,
+  .PLL.PLLRGE = RCC_PLL1VCIRANGE_1,
+#else
   .OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
 | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI48,
   .HSEState = RCC_HSE_ON,
@@ -49,4 +65,5 @@ const RCC_OscInitTypeDef stm32h7_config_oscillator = {
   .PLL.PLLRGE = RCC_PLL1VCIRANGE_2,
   .PLL.PLLVCOSEL = RCC_PLL1VCOWIDE,
   .PLL.PLLFRACN = 0
+#endif
 };
-- 
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[PATCH 07/14] bsp/stm32h7: configure S(D)RAM values for STM32H7B3I-DK BSP variant

2022-04-01 Thread Karel Gardas 
Caveat: SDRAM 1 is completely disabled for now.
---
 spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml  | 5 -
 spec/build/bsps/arm/stm32h7/optmemsram1sz.yml   | 5 -
 spec/build/bsps/arm/stm32h7/optmemsram2sz.yml   | 5 -
 spec/build/bsps/arm/stm32h7/optmemsram3sz.yml   | 5 -
 spec/build/bsps/arm/stm32h7/optmemsram4sz.yml   | 5 -
 spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml | 5 -
 6 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml 
b/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml
index 11228ddb92..b748d7d3f7 100644
--- a/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml
@@ -3,7 +3,10 @@ actions:
 - env-assign: null
 build-type: option
 default: 33554432
-default-by-variant: []
+default-by-variant:
+- value: 0
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{:#010x}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml 
b/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml
index 01e9dbe1cc..8e071f0939 100644
--- a/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml
@@ -3,7 +3,10 @@ actions:
 - env-assign: null
 build-type: option
 default: 0x2
-default-by-variant: []
+default-by-variant:
+- value: 0x1
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{:#010x}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml 
b/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml
index 2a4890730a..782d7ba58c 100644
--- a/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml
@@ -3,7 +3,10 @@ actions:
 - env-assign: null
 build-type: option
 default: 0x2
-default-by-variant: []
+default-by-variant:
+- value: 0x1
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{:#010x}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml 
b/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml
index eca335fd81..a4cd8c4eda 100644
--- a/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml
@@ -3,7 +3,10 @@ actions:
 - env-assign: null
 build-type: option
 default: 0x8000
-default-by-variant: []
+default-by-variant:
+- value: 0x0
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{:#010x}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml 
b/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml
index cda2e722a4..9749bdfc6a 100644
--- a/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml
@@ -3,7 +3,10 @@ actions:
 - env-assign: null
 build-type: option
 default: 0x1
-default-by-variant: []
+default-by-variant:
+- value: 0x8000
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{:#010x}'
 links: []
diff --git a/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml 
b/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml
index 9cb05540b7..89e116c1de 100644
--- a/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml
+++ b/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml
@@ -3,7 +3,10 @@ actions:
 - env-assign: null
 build-type: option
 default: 0x8
-default-by-variant: []
+default-by-variant:
+- value: 0xA
+  variants:
+  - arm/stm32h7b3i-dk
 enabled-by: true
 format: '{:#010x}'
 links: []
-- 
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[PATCH 12/14] bsp/stm32h7: configure peripheral clocks for STM32H7B3xxQ (e.g. STM32H7B3I-DK BSP)

2022-04-01 Thread Karel Gardas 
---
 bsps/arm/stm32h7/start/stm32h7-config-per.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/bsps/arm/stm32h7/start/stm32h7-config-per.c 
b/bsps/arm/stm32h7/start/stm32h7-config-per.c
index 79aa1494dd..ce6370d3d0 100644
--- a/bsps/arm/stm32h7/start/stm32h7-config-per.c
+++ b/bsps/arm/stm32h7/start/stm32h7-config-per.c
@@ -32,6 +32,22 @@
 #include 
 
 const RCC_PeriphCLKInitTypeDef stm32h7_config_peripheral_clocks = {
+#ifdef STM32H7B3xxQ
+  /* for stm32h7b3i-dk BSP we provide only minimalistic peripheral
+ configuration just to make available U(S)ARTs working */
+  .PeriphClockSelection = RCC_PERIPHCLK_USART3
+| RCC_PERIPHCLK_USART1,
+  .PLL2.PLL2M = 24,
+  .PLL2.PLL2N = 200,
+  .PLL2.PLL2P = 0,
+  .PLL2.PLL2Q = 2,
+  .PLL2.PLL2R = 0,
+  .PLL2.PLL2RGE = RCC_PLL2VCIRANGE_2,
+  .PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM,
+  .PLL2.PLL2FRACN = 0,
+  .Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1,
+  .Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2,
+#else
   .PeriphClockSelection = RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_USART3
 | RCC_PERIPHCLK_FDCAN | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1
 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_FMC | RCC_PERIPHCLK_RNG,
@@ -59,4 +75,5 @@ const RCC_PeriphCLKInitTypeDef 
stm32h7_config_peripheral_clocks = {
   .UsbClockSelection = RCC_USBCLKSOURCE_PLL3,
   .RTCClockSelection = RCC_RTCCLKSOURCE_LSE,
   .RngClockSelection = RCC_RNGCLKSOURCE_HSI48
+#endif
 };
-- 
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[PATCH 13/14] bsp/stm32h7: properly ifdef all unsupported features in start -hal file while compiling for STM32H7B3I-DK BSP

2022-04-01 Thread Karel Gardas 
---
 bsps/arm/stm32h7/start/stm32h7-hal.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/bsps/arm/stm32h7/start/stm32h7-hal.c 
b/bsps/arm/stm32h7/start/stm32h7-hal.c
index d042a5b8c9..ecd8e4218a 100644
--- a/bsps/arm/stm32h7/start/stm32h7-hal.c
+++ b/bsps/arm/stm32h7/start/stm32h7-hal.c
@@ -132,13 +132,23 @@ static const stm32h7_clk_info stm32h7_clk[] = {
   [STM32H7_MODULE_USART10] = { NULL, 0 },
 #endif
   [STM32H7_MODULE_RNG] = { &RCC->AHB2ENR, RCC_AHB2ENR_RNGEN },
+#ifdef RCC_AHB1ENR_ETH1MACEN
   [STM32H7_MODULE_ETH1MAC] = { &RCC->AHB1ENR, RCC_AHB1ENR_ETH1MACEN },
+#endif
+#ifdef RCC_AHB1ENR_ETH1TXEN
   [STM32H7_MODULE_ETH1TX] = { &RCC->AHB1ENR, RCC_AHB1ENR_ETH1TXEN },
+#endif
+#ifdef RCC_AHB1ENR_ETH1RXEN
   [STM32H7_MODULE_ETH1RX] = { &RCC->AHB1ENR, RCC_AHB1ENR_ETH1RXEN },
+#endif
   [STM32H7_MODULE_USB1_OTG] = { &RCC->AHB1ENR, RCC_AHB1ENR_USB1OTGHSEN },
   [STM32H7_MODULE_USB1_OTG_ULPI] = { &RCC->AHB1ENR, 
RCC_AHB1ENR_USB1OTGHSULPIEN },
+#ifdef RCC_AHB1ENR_USB20TGHSEN
   [STM32H7_MODULE_USB2_OTG] = { &RCC->AHB1ENR, RCC_AHB1ENR_USB2OTGHSEN },
+#endif
+#ifdef RCC_AHB1ENR_USB20TGHSULPIEN
   [STM32H7_MODULE_USB2_OTG_ULPI] = { &RCC->AHB1ENR, 
RCC_AHB1ENR_USB2OTGHSULPIEN },
+#endif
   [STM32H7_MODULE_SDMMC1] = { &RCC->AHB3ENR, RCC_AHB3ENR_SDMMC1EN },
   [STM32H7_MODULE_SDMMC2] = { &RCC->AHB2ENR, RCC_AHB2ENR_SDMMC2EN },
 };
@@ -205,13 +215,23 @@ static const stm32h7_clk_info stm32h7_clk_low_power[] = {
   [STM32H7_MODULE_USART10] = { NULL, 0 },
 #endif
   [STM32H7_MODULE_RNG] = { &RCC->AHB2LPENR, RCC_AHB2LPENR_RNGLPEN },
+#ifdef RCC_AHB1LPENR_ETH1MACLPEN
   [STM32H7_MODULE_ETH1MAC] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_ETH1MACLPEN },
+#endif
+#ifdef RCC_AHB1LPENR_ETH1TXLPEN
   [STM32H7_MODULE_ETH1TX] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_ETH1TXLPEN },
+#endif
+#ifdef RCC_AHB1LPENR_ETH1RXLPEN
   [STM32H7_MODULE_ETH1RX] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_ETH1RXLPEN },
+#endif
   [STM32H7_MODULE_USB1_OTG] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_USB1OTGHSLPEN },
   [STM32H7_MODULE_USB1_OTG_ULPI] = { &RCC->AHB1LPENR, 
RCC_AHB1LPENR_USB1OTGHSULPILPEN },
+#ifdef RCC_AHB1LPENR_USB2OTGHSLPEN
   [STM32H7_MODULE_USB2_OTG] = { &RCC->AHB1LPENR, RCC_AHB1LPENR_USB2OTGHSLPEN },
+#endif
+#ifdef RCC_AHB1LPENR_USB2OTGHSULPILPEN
   [STM32H7_MODULE_USB2_OTG_ULPI] = { &RCC->AHB1LPENR, 
RCC_AHB1LPENR_USB2OTGHSULPILPEN },
+#endif
   [STM32H7_MODULE_SDMMC1] = { &RCC->AHB3LPENR, RCC_AHB3LPENR_SDMMC1LPEN },
   [STM32H7_MODULE_SDMMC2] = { &RCC->AHB2LPENR, RCC_AHB2LPENR_SDMMC2LPEN },
 };
-- 
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[PATCH 08/14] bsp/stm32h7: use appropriate STM32H7B3xxQ define for STM32H7B3I-DK BSP variant

2022-04-01 Thread Karel Gardas 
---
 spec/build/bsps/arm/stm32h7/optvariant.yml | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/spec/build/bsps/arm/stm32h7/optvariant.yml 
b/spec/build/bsps/arm/stm32h7/optvariant.yml
index 586fa2052b..5d77ece120 100644
--- a/spec/build/bsps/arm/stm32h7/optvariant.yml
+++ b/spec/build/bsps/arm/stm32h7/optvariant.yml
@@ -13,7 +13,10 @@ actions:
 conf.define_cond(value, True)
 build-type: option
 default: STM32H743xx
-default-by-variant: []
+default-by-variant:
+- value: STM32H7B3xxQ
+  variants:
+- arm/stm32h7b3i-dk
 enabled-by: true
 format: '{}'
 links: []
-- 
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[PATCH 09/14] bsp/stm32h7: disable ethernet for STM32H7B3I-DK BSP variant

2022-04-01 Thread Karel Gardas 
Note: the ethernet port is not presented on the board anyway.
---
 bsps/arm/stm32h7/start/stm32h7-hal-eth.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c 
b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
index b9dac6d7f9..5fc75f0147 100644
--- a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
+++ b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
@@ -33,6 +33,8 @@
 
 #include 
 
+#ifndef STM32H7B3xxQ
+
 static const stm32h7_gpio_config gpiog = {
   .regs = GPIOG,
   .config = {
@@ -94,3 +96,5 @@ HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
   stm32h7_gpio_init(&gpiob);
 #endif
 }
+
+#endif
-- 
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[PATCH 14/14] bsp/stm32h7: bring all required changes into system_stm32h7xx for STM32H7B3I-DK BSP variant

2022-04-01 Thread Karel Gardas 
The changes provided here are a result of a merge from various examples
system_stm32h7xx.c files provided by STMicroelectronics for the STM32H7B3I-DK
board with the original RTEMS file provided for the STM32H743I-EVAL2 board.
---
 bsps/arm/stm32h7/start/system_stm32h7xx.c | 51 +++
 1 file changed, 44 insertions(+), 7 deletions(-)

diff --git a/bsps/arm/stm32h7/start/system_stm32h7xx.c 
b/bsps/arm/stm32h7/start/system_stm32h7xx.c
index 092d853720..1f0fd04dab 100644
--- a/bsps/arm/stm32h7/start/system_stm32h7xx.c
+++ b/bsps/arm/stm32h7/start/system_stm32h7xx.c
@@ -51,7 +51,11 @@
 #include 
 #endif /* __rtems__ */
 #if !defined  (HSE_VALUE)
+#ifdef STM32H7B3xxQ
+#define HSE_VALUE((uint32_t)2400) /*!< Value of the External 
oscillator in Hz */
+#else
 #define HSE_VALUE((uint32_t)2500) /*!< Value of the External 
oscillator in Hz */
+#endif
 #endif /* HSE_VALUE */
 
 #if !defined  (CSI_VALUE)
@@ -147,9 +151,9 @@
   */
 void SystemInit (void)
 {
-#if defined (DATA_IN_D2_SRAM)
+#if defined (DATA_IN_D2_SRAM) || defined (DATA_IN_CD_AHB_SRAM)
  __IO uint32_t tmpreg;
-#endif /* DATA_IN_D2_SRAM */
+#endif /* DATA_IN_D2_SRAM || DATA_IN_CD_AHB_SRAM */
 
   /* FPU settings 
*/
   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
@@ -184,6 +188,26 @@ void SystemInit (void)
   /* Reset SRDCFGR register */
   RCC->SRDCFGR = 0x;
 #endif
+#ifdef STM32H7B3xxQ
+  /* Reset PLLCKSELR register */
+  RCC->PLLCKSELR = 0x02020200;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x01FF;
+  /* Reset PLL1DIVR register */
+  RCC->PLL1DIVR = 0x01010280;
+  /* Reset PLL1FRACR register */
+  RCC->PLL1FRACR = 0x;
+
+  /* Reset PLL2DIVR register */
+  RCC->PLL2DIVR = 0x01010280;
+
+  /* Reset PLL2FRACR register */
+
+  RCC->PLL2FRACR = 0x;
+  /* Reset PLL3DIVR register */
+  RCC->PLL3DIVR = 0x01010280;
+#else
   /* Reset PLLCKSELR register */
   RCC->PLLCKSELR = 0x;
 
@@ -202,7 +226,7 @@ void SystemInit (void)
   RCC->PLL2FRACR = 0x;
   /* Reset PLL3DIVR register */
   RCC->PLL3DIVR = 0x;
-
+#endif
   /* Reset PLL3FRACR register */
   RCC->PLL3FRACR = 0x;
 
@@ -222,25 +246,34 @@ void SystemInit (void)
   }
 #endif
 
-#ifndef __rtems__
 #if defined (DATA_IN_D2_SRAM)
   /* in case of initialized data in D2 SRAM (AHB SRAM) , enable the D2 SRAM 
clock (AHB SRAM clock) */
 #if defined(RCC_AHB2ENR_D2SRAM3EN)
   RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | 
RCC_AHB2ENR_D2SRAM3EN);
 #elif defined(RCC_AHB2ENR_D2SRAM2EN)
   RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN);
+#elif DATA_IN_CD_AHB_SRAM
+  /* in case of initialized data in CD AHB SRAM, enable the CD AHB SRAM clock 
*/
+  RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN);
 #else
   RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN);
 #endif /* RCC_AHB2ENR_D2SRAM3EN */
-
+#endif /* DATA_IN_D2_SRAM */
+#ifndef __rtems__
   tmpreg = RCC->AHB2ENR;
   (void) tmpreg;
-#endif /* DATA_IN_D2_SRAM */
 #else /* __rtems__ */
-  RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | 
RCC_AHB2ENR_D2SRAM3EN);
   RCC->AHB2ENR;
 #endif /* __rtems__ */
 
+#ifdef STM32H7B3xxQ
+/*
+   * Disable the FMC bank1 (enabled after reset).
+   * This, prevents CPU speculation access on this bank which blocks the use 
of FMC during
+   * 24us. During this time the others FMC master (such as LTDC) cannot use it!
+   */
+  FMC_Bank1_R->BTCR[0] = 0x30D2;
+#endif
 #ifndef __rtems__
 #if defined(DUAL_CORE) && defined(CORE_CM4)
   /* Configure the Vector Table location add offset address for cortex-M4 
--*/
@@ -254,7 +287,11 @@ void SystemInit (void)
 
   /* Configure the Vector Table location add offset address for cortex-M7 
--*/
 #ifdef VECT_TAB_SRAM
+#ifdef STM32H7B3xxQ
+  SCB->VTOR = CD_AXISRAM1_BASE  | VECT_TAB_OFFSET; /* Vector Table Relocation 
in Internal CD AXI-RAM */
+#else
   SCB->VTOR = D1_AXISRAM_BASE  | VECT_TAB_OFFSET; /* Vector Table Relocation 
in Internal AXI-RAM */
+#endif
 #else
   SCB->VTOR = FLASH_BANK1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation 
in Internal FLASH */
 #endif
-- 
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[PATCH 10/14] bsp/stm32h7: configure AHB clock divider for STM32H7B3xxQ (e.g. STM32H7B3I-DK BSP)

2022-04-01 Thread Karel Gardas 
---
 bsps/arm/stm32h7/start/stm32h7-config-clk.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/bsps/arm/stm32h7/start/stm32h7-config-clk.c 
b/bsps/arm/stm32h7/start/stm32h7-config-clk.c
index 3e7c930201..4c25241b99 100644
--- a/bsps/arm/stm32h7/start/stm32h7-config-clk.c
+++ b/bsps/arm/stm32h7/start/stm32h7-config-clk.c
@@ -37,7 +37,11 @@ const RCC_ClkInitTypeDef stm32h7_config_clocks = {
 | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1,
   .SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK,
   .SYSCLKDivider = RCC_SYSCLK_DIV1,
+#ifdef STM32H7B3xxQ
+  .AHBCLKDivider = RCC_HCLK_DIV1,
+#else
   .AHBCLKDivider = RCC_HCLK_DIV2,
+#endif
   .APB3CLKDivider = RCC_APB3_DIV2,
   .APB1CLKDivider = RCC_APB1_DIV2,
   .APB2CLKDivider = RCC_APB2_DIV2,
-- 
2.25.1

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Re: [PATCH] add STM32H7 BSP variant to support STM32H7B3I-DK board

2022-04-01 Thread Karel Gardas 



Hello Sebastian,

I've tried my best in splitting patch into smaller relevant chunks. 
Hopefully this time you will find it more appealing for merge.


Please let me know if there is still anything I shall do.

Thanks!
Karel

On 2/7/22 07:39, Sebastian Huber wrote:

Hello Karel,


[...]



Could you please split up the patch into smaller pieces which only 
affect a specific area. This helps during a git bisect.




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Re: [PATCH] add STM32H7 BSP variant to support STM32H7B3I-DK board

2022-04-01 Thread Sebastian Huber 

Hello Karel,

On 01/04/2022 18:25, Karel Gardas wrote:


I've tried my best in splitting patch into smaller relevant chunks. 
Hopefully this time you will find it more appealing for merge.


Please let me know if there is still anything I shall do.


the patch set looks good, I will integrate it on Monday if there are no 
other comments over the weekend.


The issues on Github with respect to the STMicroelectronics licensing 
ended up on a TODO list.


Best regards,
Sebastian

--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
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Re: [PATCH] add STM32H7 BSP variant to support STM32H7B3I-DK board

2022-04-01 Thread Joel Sherrill 
On Fri, Apr 1, 2022 at 11:28 AM Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:

> Hello Karel,
>
> On 01/04/2022 18:25, Karel Gardas wrote:
> >
> > I've tried my best in splitting patch into smaller relevant chunks.
> > Hopefully this time you will find it more appealing for merge.
> >
> > Please let me know if there is still anything I shall do.
>
> the patch set looks good, I will integrate it on Monday if there are no
> other comments over the weekend.
>

I'll defer to you two on this.


>
> The issues on Github with respect to the STMicroelectronics licensing
> ended up on a TODO list.
>

Is this in reference to their Ultimate Liberty License? Is the TODO item
to get clarification from them? Hopefully change it?

--joel


>
> Best regards,
> Sebastian
>
> --
> embedded brains GmbH
> Herr Sebastian HUBER
> Dornierstr. 4
> 82178 Puchheim
> Germany
> email: sebastian.hu...@embedded-brains.de
> phone: +49-89-18 94 741 - 16
> fax:   +49-89-18 94 741 - 08
>
> Registergericht: Amtsgericht München
> Registernummer: HRB 157899
> Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
> Unsere Datenschutzerklärung finden Sie hier:
> https://embedded-brains.de/datenschutzerklaerung/
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Re: [PATCH] add STM32H7 BSP variant to support STM32H7B3I-DK board

2022-04-01 Thread Karel Gardas 

On 4/1/22 18:45, Joel Sherrill wrote:

The issues on Github with respect to the STMicroelectronics licensing
ended up on a TODO list.


Is this in reference to their Ultimate Liberty License? Is the TODO item
to get clarification from them? Hopefully change it?


No, this is a reference to Sebastian's submitted issues on 
STMicroelectronics github projects we're using as a STM32 HAL:


https://github.com/STMicroelectronics/STM32CubeH7/issues/205
https://github.com/STMicroelectronics/stm32h7xx_hal_driver/issues/21

Karel

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Re: GMP error when building aarch64-rtems-gcc on Mingw64

2022-04-01 Thread zhengxiaojun 
> On Fri, Apr 1, 2022 at 3:37 AM jameszxj  wrote:
> It has been there for a while. It is caused by the gmp 
configure parameter (in gcc/makefile.in line 12644 )
> 
> So the patch you posted fixes this?

Sorry for making you confuse. That patch fixed a rtems-tools error.

Send a patch file as attachment is accepted?

> 
> This should be the ticket https://devel.rtems.org/ticket/4208
> 
> Ryan.. the patch he posted got turned into HTML and can't be applied. Can
> you try to make the change and verify it. 
> 

I am not sure it is the right/good way to fix this, so I do not send a patch.

> https://lists.rtems.org/pipermail/devel/2022-April/071042.html
> 
> Please give him authorship credit when you commit it. 
> 
> 
> 
> devel mailing list
> devel@rtems.org
> http://lists.rtems.org/mailman/listinfo/devel
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[PATCH] Update email address of Fernando Ruiz Casas to

2022-04-01 Thread Joel Sherrill 
This was requested to be executed prior to relicensing to BSD-2.
---
 cpukit/include/rtems/pty.h| 11 +++
 cpukit/include/rtems/shell.h  | 11 +--
 cpukit/include/rtems/telnetd.h| 12 
 cpukit/libcsupport/src/chroot.c   | 10 +-
 cpukit/libcsupport/src/getgrent.c |  2 +-
 cpukit/libcsupport/src/getgrnam.c |  2 +-
 cpukit/libcsupport/src/getpwent.c |  2 +-
 cpukit/libcsupport/src/privateenv.c   |  2 +-
 cpukit/libcsupport/src/pwdgrp.c   |  2 +-
 cpukit/libmisc/shell/cat_file.c   | 12 +++-
 cpukit/libmisc/shell/cmds.c   | 12 +++-
 cpukit/libmisc/shell/login_check.c|  1 -
 cpukit/libmisc/shell/main_alias.c | 12 +++-
 cpukit/libmisc/shell/main_blksync.c   | 12 +++-
 cpukit/libmisc/shell/main_cat.c   | 12 +++-
 cpukit/libmisc/shell/main_cd.c| 12 +++-
 cpukit/libmisc/shell/main_chdir.c | 12 +++-
 cpukit/libmisc/shell/main_chmod.c | 12 +++-
 cpukit/libmisc/shell/main_chroot.c| 12 +++-
 cpukit/libmisc/shell/main_date.c  | 15 ---
 cpukit/libmisc/shell/main_dir.c   | 12 +++-
 cpukit/libmisc/shell/main_exit.c  | 12 +++-
 cpukit/libmisc/shell/main_id.c| 12 +++-
 cpukit/libmisc/shell/main_logoff.c| 12 +++-
 cpukit/libmisc/shell/main_mdump.c | 12 +++-
 cpukit/libmisc/shell/main_medit.c | 12 +++-
 cpukit/libmisc/shell/main_mfill.c | 12 +++-
 cpukit/libmisc/shell/main_mkdir.c | 12 +++-
 cpukit/libmisc/shell/main_mmove.c | 12 +++-
 cpukit/libmisc/shell/main_mount.c | 12 +++-
 cpukit/libmisc/shell/main_mount_nfs.c | 12 +++-
 cpukit/libmisc/shell/main_pwd.c   | 12 +++-
 cpukit/libmisc/shell/main_rmdir.c | 12 +++-
 cpukit/libmisc/shell/main_tty.c   | 12 +++-
 cpukit/libmisc/shell/main_umask.c | 12 +++-
 cpukit/libmisc/shell/main_unmount.c   | 12 +++-
 cpukit/libmisc/shell/main_whoami.c| 12 +++-
 cpukit/libmisc/shell/shell.c  | 14 +++---
 cpukit/libmisc/shell/shell_cmdset.c   | 13 +++--
 cpukit/libmisc/shell/write_file.c | 14 +++---
 cpukit/telnetd/README | 11 ---
 cpukit/telnetd/pty.c  | 11 +++
 cpukit/telnetd/telnetd.c  | 17 -
 43 files changed, 260 insertions(+), 202 deletions(-)

diff --git a/cpukit/include/rtems/pty.h b/cpukit/include/rtems/pty.h
index 94b66d63c4..46d07602b4 100644
--- a/cpukit/include/rtems/pty.h
+++ b/cpukit/include/rtems/pty.h
@@ -1,8 +1,11 @@
+/**
+ * @file
+ * 
+ * @brief /dev/ptyXX  (A first version for pseudo-terminals)
+ */
+
 /*
- * /dev/ptyXX  (A first version for pseudo-terminals)
- *
- *  Author: Fernando RUIZ CASAS (fernando.r...@ctv.es)
- *  May 2001
+ * Copyright (c) 2001 Fernando Ruiz Casas 
  *
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
diff --git a/cpukit/include/rtems/shell.h b/cpukit/include/rtems/shell.h
index d705dcb0a7..58d0c515b3 100644
--- a/cpukit/include/rtems/shell.h
+++ b/cpukit/include/rtems/shell.h
@@ -5,13 +5,12 @@
  */
 
 /*
- *  Author:
+ * Copyright (c) 2001 Fernando Ruiz Casas 
  *
- *   WORK: fernando.r...@ctv.es
- *   HOME: cor...@fernando-ruiz.com
- *
- *   Thanks at:
- *Chris Johns
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ * 
  */
 
 #ifndef __RTEMS_SHELL_H__
diff --git a/cpukit/include/rtems/telnetd.h b/cpukit/include/rtems/telnetd.h
index 325872b633..86ec1f0eb5 100644
--- a/cpukit/include/rtems/telnetd.h
+++ b/cpukit/include/rtems/telnetd.h
@@ -1,8 +1,12 @@
+/**
+ * @file
+ * 
+ * @brief Telnet Daemon Interface
+ */
+
 /*
- *  Original Author: Fernando RUIZ CASAS (fernando.r...@ctv.es)
- *  May 2001
- *  Reworked by Till Straumann and .h overhauled by Joel Sherrill.
- *
+ * Copyright (c) 2001 Fernando Ruiz Casas 
+ * Reworked by Till Straumann and .h overhauled by Joel Sherrill.
  * Copyright (c) 2009 embedded brains GmbH and others.
  *
  * The license and distribution terms for this file may be
diff --git a/cpukit/libcsupport/src/chroot.c b/cpukit/libcsupport/src/chroot.c
index fc0f3f92ed..ca4c46f5a8 100644
--- a/cpukit/libcsupport/src/chroot.c
+++ b/cpukit/libcsupport/src/chroot.c
@@ -9,13 +9,13 @@
  */
 
 /*
- *  Author: fernando.r...@ctv.es
+ * Copyright (c) 2001 Fernando Ruiz Casas 
  *
- *  COPYRIGHT (c) 1989-2008.
- *  On-Line Applications Research Corporation (OAR).
+ * COPYRIGHT (c) 1989-2008.
+ * On-Line Applications Research Corporation (OAR).
  *
- *  Modifications to support reference counting in the file system are
- *  Copyright (c) 2012 embedded brains GmbH.
+ * Modifications to support reference counting in the file

Re: [PATCH] add STM32H7 BSP variant to support STM32H7B3I-DK board

2022-04-01 Thread Karel Gardas 

On 4/1/22 18:28, Sebastian Huber wrote:

Hello Karel,

On 01/04/2022 18:25, Karel Gardas wrote:


I've tried my best in splitting patch into smaller relevant chunks. 
Hopefully this time you will find it more appealing for merge.


Please let me know if there is still anything I shall do.


the patch set looks good, I will integrate it on Monday if there are no 
other comments over the weekend.


Would be great! Thanks!

The issues on Github with respect to the STMicroelectronics licensing 
ended up on a TODO list.


Indeed, nice move with the issues btw. Anyway, I'm afraid if those are 
to be solved, ST will solve that with next release commits in both 
projects -- which puts are few months into the future if they keep their 
cadence. So, let's be patient about it...


Thanks,
Karel
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[Patch] fix a rtems-tools compiler error in MinGW

2022-04-01 Thread zhengxiaojun 
Hi, this patch file fixed a rtems-tools compiler error in MinGW. Last mail, I 
made a wrong format, so I resend it as a attachment.
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