Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board.
Update #3785.
Signed-off-by: Pragnesh Patel
---
Changes in v3:
- Remove bsps/riscv/frdme310arty/ directory and added support for
Freedom FE310 soc in common bsps/riscv/riscv/ directory
- Added #define RISCV_ENABLE_FRDME310ARTY_SUPPORT in configure.ac
to enable support for FE310
- Change the RISCV_RAM_REGION_SIZE to 256 MB for riscv
Changes in v2:
bsps/riscv/frdme310arty/btimer/btimer.c
- Remove the read_csr() function from btimer.c
- Remove CONFIG_BTIMER_RISCV_GET_MCYCLES macro to get time in
microseconds
bsps/riscv/frdme310arty/clock/clockdrv.c
bsps/riscv/riscv/clock/clockdrv.c
- Delete both files and Add bsps/riscv/shared/clock/clockdrv.c
- riscv_clock_get_timebase_frequency(): Get timebase-frequency from
cpus or cpu@0 devicetree node because riscv uses "cpus" node and
frdme310arty uses "cpu@0" node to look for timebase-frequency
- Remove rtems_counter_initialize_converter() and
rtems_timecounter_simple_install() functions
bsps/riscv/frdme310arty/include/bsp/riscv.h
- Remove unused frdme310arty_l2c_base;
bsps/riscv/frdme310arty/start/bsp_fatal_halt.c
bsps/riscv/riscv/start/bsp_fatal_halt.c
- Delete this file and Add bsps/riscv/shared/start/bsp_fatal_halt.c
bsps/riscv/frdme310arty/start/bspstart.c
- Remove unused function riscv_get_node_byname()
bsps/riscv/frdme310arty/start/linkcmds.in
- Use @RISCV_RAM_REGION_BEGIN@ and @RISCV_RAM_REGION_SIZE@ instead of
hard coded values
c/src/lib/libbsp/riscv/frdme310arty/Makefile.am
- librtemsbsp_a_SOURCES -> bsps/riscv/shared/start/bsp_fatal_halt.c
- librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c
c/src/lib/libbsp/riscv/frdme310arty/configure.ac
- change RISCV_RAM_REGION_SIZE to default 256MiB
bsps/riscv/riscv/irq/irq.c
- Delete this irq.c and it will now use bsps/riscv/shared/irq/irq.c
c/src/lib/libbsp/riscv/riscv/Makefile.am
- librtemsbsp_a_SOURCES -> bsps/riscv/shared/start/bsp_fatal_halt.c
- librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c
- librtemsbsp_a_SOURCES -> bsps/riscv/shared/irq/irq.c
bsps/include/bsp/fatal.h | 3 +-
bsps/riscv/riscv/clock/clockdrv.c | 16 ++--
bsps/riscv/riscv/console/console-config.c | 57 +
bsps/riscv/riscv/console/fe310-uart.c | 100 +++
bsps/riscv/riscv/dts/frdme310arty.dts | 130 ++
bsps/riscv/riscv/include/bsp/fe310-uart.h | 42 ++
bsps/riscv/riscv/include/bsp/riscv.h | 4 +
bsps/riscv/riscv/start/bspstart.c | 52
c/src/lib/libbsp/riscv/riscv/Makefile.am | 8 ++
c/src/lib/libbsp/riscv/riscv/configure.ac | 7 +-
10 files changed, 411 insertions(+), 8 deletions(-)
create mode 100644 bsps/riscv/riscv/console/fe310-uart.c
create mode 100644 bsps/riscv/riscv/dts/frdme310arty.dts
create mode 100644 bsps/riscv/riscv/include/bsp/fe310-uart.h
diff --git a/bsps/include/bsp/fatal.h b/bsps/include/bsp/fatal.h
index fae5461..3f8e1eb 100644
--- a/bsps/include/bsp/fatal.h
+++ b/bsps/include/bsp/fatal.h
@@ -152,7 +152,8 @@ typedef enum {
RISCV_FATAL_INVALID_PLIC_NDEV_IN_DEVICE_TREE,
RISCV_FATAL_TOO_LARGE_PLIC_NDEV_IN_DEVICE_TREE,
RISCV_FATAL_INVALID_INTERRUPT_AFFINITY,
- RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE
+ RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE,
+ RISCV_FATAL_NO_TLCLOCK_FREQUENCY_IN_DEVICE_TREE
} bsp_fatal_code;
RTEMS_NO_RETURN static inline void
diff --git a/bsps/riscv/riscv/clock/clockdrv.c
b/bsps/riscv/riscv/clock/clockdrv.c
index 7e6034d..7f32dcf 100644
--- a/bsps/riscv/riscv/clock/clockdrv.c
+++ b/bsps/riscv/riscv/clock/clockdrv.c
@@ -130,15 +130,21 @@ static uint32_t riscv_clock_get_timecount(struct
timecounter *base)
static uint32_t riscv_clock_get_timebase_frequency(const void *fdt)
{
int node;
- const uint32_t *val;
- int len;
+ fdt32_t *val;
+ int len=0;
node = fdt_path_offset(fdt, "/cpus");
- val = fdt_getprop(fdt, node, "timebase-frequency", &len);
+
+ val = (fdt32_t *) fdt_getprop(fdt, node, "timebase-frequency", &len);
+
if (val == NULL || len < 4) {
-bsp_fatal(RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE);
- }
+int cpu0 = fdt_subnode_offset(fdt, node, "cpu@0");
+val = (fdt32_t *) fdt_getprop(fdt, cpu0, "timebase-frequency", &len);
+if (val == NULL || len < 4) {
+ bsp_fatal(RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE);
+}
+ }
return fdt32_to_cpu(*val);
}
diff --git a/bsps/riscv/riscv/console/console-config.c
b/bsps/riscv/riscv/console/console-config.c
index 464b4b0..8a3472d 100644
--- a/bsps/riscv/riscv/console/console-config.c
+++ b/bsps/riscv/riscv/console/console-config.c
@@ -28,6 +28,11 @@
#include
#include
+#if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0
+#include
+fe310_uart_context driver_context;
+#endif
+
#if RISCV_ENABLE_HTIF_SUPPORT != 0
