Re: covoar SIGKILL Investigation
On 15/8/18 2:47 am, Joel Sherrill wrote:
>
> Ideas appreciated on how to debug this enough to find
> the cause.
>
Does the attached patch help?
Chris
diff --git a/tester/covoar/ExecutableInfo.cc b/tester/covoar/ExecutableInfo.cc
index 0a629b7..d93860b 100644
--- a/tester/covoar/ExecutableInfo.cc
+++ b/tester/covoar/ExecutableInfo.cc
@@ -37,27 +37,36 @@ namespace Coverage {
executable.open();
executable.begin();
executable.load_symbols(symbols);
+
debug.begin(executable.elf());
debug.load_debug();
debug.load_functions();
-for (auto& cu : debug.get_cus()) {
- for (auto& func : cu.get_functions()) {
-if (func.has_machine_code() && (!func.is_inlined() ||
func.is_external())) {
- createCoverageMap (cu.name(), func.name(),
- func.pc_low(), func.pc_high());
+try {
+ for (auto& cu : debug.get_cus()) {
+for (auto& func : cu.get_functions()) {
+ if (func.has_machine_code() && (!func.is_inlined() ||
func.is_external())) {
+createCoverageMap (cu.name(), func.name(),
+ func.pc_low(), func.pc_high());
+ }
}
}
+} catch (...) {
+ debug.end();
+ executable.end();
+ executable.close();
+ throw;
}
- }
- ExecutableInfo::~ExecutableInfo()
- {
debug.end();
executable.end();
executable.close();
}
+ ExecutableInfo::~ExecutableInfo()
+ {
+ }
+
void ExecutableInfo::dumpCoverageMaps( void ) {
ExecutableInfo::CoverageMaps::iterator itr;
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[PATCH 0/1] dev/sc16is752: Add name space for field names.
Hello, this patch should fix https://devel.rtems.org/ticket/3501. Note that I didn't test it yet because I have some trouble building a tool chain on my home PC. If no one is faster, I'll try it either if I manage to get a working tool chain or on Monday when I'm back at work. Best regards Christian ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH] dev/sc16is752: Add name space for field names.
From: Christian Mauderer
The field names for the registers generated a name collision (MSR_RI on
the power pc). This patch adds a SC16IS752_ prefix for all field names.
Closes #3501.
---
cpukit/dev/serial/sc16is752-regs.h | 108 ++---
cpukit/dev/serial/sc16is752.c | 85 ---
2 files changed, 98 insertions(+), 95 deletions(-)
diff --git a/cpukit/dev/serial/sc16is752-regs.h
b/cpukit/dev/serial/sc16is752-regs.h
index 21d425a118..b07e489a3e 100644
--- a/cpukit/dev/serial/sc16is752-regs.h
+++ b/cpukit/dev/serial/sc16is752-regs.h
@@ -52,76 +52,76 @@ extern "C" {
#define SC16IS752_XOFF2 0x7
/* FCR */
-#define FCR_FIFO_EN0x01
-#define FCR_RX_FIFO_RST0x02
-#define FCR_TX_FIFO_RST0x04
-#define FCR_TX_FIFO_TRG_8 0x00
-#define FCR_TX_FIFO_TRG_16 0x10
-#define FCR_TX_FIFO_TRG_32 0x20
-#define FCR_TX_FIFO_TRG_56 0x30
-#define FCR_RX_FIFO_TRG_8 0x00
-#define FCR_RX_FIFO_TRG_16 0x40
-#define FCR_RX_FIFO_TRG_56 0x80
-#define FCR_RX_FIFO_TRG_60 0xc0
+#define SC16IS752_FCR_FIFO_EN0x01
+#define SC16IS752_FCR_RX_FIFO_RST0x02
+#define SC16IS752_FCR_TX_FIFO_RST0x04
+#define SC16IS752_FCR_TX_FIFO_TRG_8 0x00
+#define SC16IS752_FCR_TX_FIFO_TRG_16 0x10
+#define SC16IS752_FCR_TX_FIFO_TRG_32 0x20
+#define SC16IS752_FCR_TX_FIFO_TRG_56 0x30
+#define SC16IS752_FCR_RX_FIFO_TRG_8 0x00
+#define SC16IS752_FCR_RX_FIFO_TRG_16 0x40
+#define SC16IS752_FCR_RX_FIFO_TRG_56 0x80
+#define SC16IS752_FCR_RX_FIFO_TRG_60 0xc0
/* EFCR */
-#define EFCR_RS485_ENABLE (1u << 0)
-#define EFCR_RX_DISABLE (1u << 1)
-#define EFCR_TX_DISABLE (1u << 2)
+#define SC16IS752_EFCR_RS485_ENABLE (1u << 0)
+#define SC16IS752_EFCR_RX_DISABLE (1u << 1)
+#define SC16IS752_EFCR_TX_DISABLE (1u << 2)
/* IER */
-#define IER_RHR (1u << 0)
-#define IER_THR (1u << 1)
-#define IER_RECEIVE_LINE_STATUS (1u << 2)
-#define IER_MODEM_STATUS (1u << 3)
-#define IER_SLEEP_MODE (1u << 4)
-#define IER_XOFF (1u << 5)
-#define IER_RTS (1u << 6)
-#define IER_CTS (1u << 7)
+#define SC16IS752_IER_RHR (1u << 0)
+#define SC16IS752_IER_THR (1u << 1)
+#define SC16IS752_IER_RECEIVE_LINE_STATUS (1u << 2)
+#define SC16IS752_IER_MODEM_STATUS (1u << 3)
+#define SC16IS752_IER_SLEEP_MODE (1u << 4)
+#define SC16IS752_IER_XOFF (1u << 5)
+#define SC16IS752_IER_RTS (1u << 6)
+#define SC16IS752_IER_CTS (1u << 7)
/* IIR */
-#define IIR_TX_INTERRUPT (1u << 1)
-#define IIR_RX_INTERRUPT (1u << 2)
+#define SC16IS752_IIR_TX_INTERRUPT (1u << 1)
+#define SC16IS752_IIR_RX_INTERRUPT (1u << 2)
/* LCR */
-#define LCR_CHRL_5_BIT (0u << 1) | (0u << 0)
-#define LCR_CHRL_6_BIT (0u << 1) | (1u << 0)
-#define LCR_CHRL_7_BIT (1u << 1) | (0u << 0)
-#define LCR_CHRL_8_BIT (1u << 1) | (1u << 0)
-#define LCR_2_STOP_BIT (1u << 2)
-#define LCR_SET_PARITY (1u << 3)
-#define LCR_EVEN_PARITY (1u << 4)
-#define LCR_ENABLE_DIVISOR (1u << 7)
+#define SC16IS752_LCR_CHRL_5_BIT (0u << 1) | (0u << 0)
+#define SC16IS752_LCR_CHRL_6_BIT (0u << 1) | (1u << 0)
+#define SC16IS752_LCR_CHRL_7_BIT (1u << 1) | (0u << 0)
+#define SC16IS752_LCR_CHRL_8_BIT (1u << 1) | (1u << 0)
+#define SC16IS752_LCR_2_STOP_BIT (1u << 2)
+#define SC16IS752_LCR_SET_PARITY (1u << 3)
+#define SC16IS752_LCR_EVEN_PARITY (1u << 4)
+#define SC16IS752_LCR_ENABLE_DIVISOR (1u << 7)
/* LSR */
-#define LSR_TXEMPTY (1u << 5)
-#define LSR_RXRDY (1u << 0)
-#define LSR_ERROR_BITS (7u << 2)
+#define SC16IS752_LSR_TXEMPTY (1u << 5)
+#define SC16IS752_LSR_RXRDY (1u << 0)
+#define SC16IS752_LSR_ERROR_BITS (7u << 2)
/* MCR */
-#define MCR_DTR (1u << 0)
-#define MCR_RTS (1u << 1)
-#define MCR_TCR_TLR (1u << 2)
-#define MCR_LOOPBACK(1u << 4)
-#define MCR_XON_ANY (1u << 5)
-#define MCR_IRDA_ENABLE (1u << 6)
-#define MCR_PRESCALE_NEEDED (1u << 7)
+#define SC16IS752_MCR_DTR (1u << 0)
+#define SC16IS752_MCR_RTS (1u << 1)
+#define SC16IS752_MCR_TCR_TLR (1u << 2)
+#define SC16IS752_MCR_LOOPBACK(1u << 4)
+#define SC16IS752_MCR_XON_ANY (1u << 5)
+#define SC16IS752_MCR_IRDA_ENABLE (1u << 6)
+#define SC16IS752_MCR_PRESCALE_NEEDED (1u << 7)
/* MSR */
-#define MSR_dCTS (1u << 0)
-#define MSR_dDSR (1u << 1)
-#define MSR_dRI (1u << 2)
-#define MSR_dCD (1u << 3)
-#define MSR_CTS (1u << 4)
-#define MSR_DSR (1u << 5)
-#define MSR_RI (1u << 6)
-#define MSR_CD (1u << 7)
+#define SC16IS752_MSR_dCTS (1u << 0)
+#define SC16IS752_MSR_dDSR (1u << 1)
+#define SC16IS752_MSR_dRI (1u << 2)
+#define SC16IS752_MSR_dCD (1u << 3)
+#define SC16IS752_MSR_CTS (1u << 4)
+#define SC16IS752_MSR_DSR (1u << 5)
+#define SC16IS752_MSR_RI (1u << 6)
+#define SC16IS752_MSR_CD (1u << 7)
/* EFR */
-#define EFR_ENHANCED_FUNC_ENABLE (1u << 4)
-#define EFR_SPECIAL_CHAR_DETECT (1u << 5)
-#define EFR_RTS_FLOW_CTRL_EN (1u << 6)
-#define EFR_CTS_FLOW_CTRL_EN (1u << 7)
+#define SC16IS752_EFR_ENHANCED_FUNC_ENABLE (1u << 4)
+#define SC16IS752_EFR_SPECIAL_CHAR_DETECT (1u << 5)
+#define SC16IS752_EFR_RTS_FLOW_CTRL_EN (1u <<
Re: git.rtems.org LetsEncrypt TLS certificate expired
FYI: https://docs.rtems.org has an expired certificate too. On Wed, Aug 15, 2018 at 3:30 PM, Amaan Cheval wrote: > The HTTPS certificate for https://git.rtems.org has expired (~15 > minutes ago). Are the auto-renewal scripts failing? ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH] Tests for inttypes methods
---
testsuites/psxtests/Makefile.am| 12 ++
testsuites/psxtests/configure.ac | 1 +
testsuites/psxtests/psxinttypes01/init.c | 122 +
.../psxtests/psxinttypes01/psxinttypes01.scn | 27 +
4 files changed, 162 insertions(+)
create mode 100644 testsuites/psxtests/psxinttypes01/init.c
create mode 100644 testsuites/psxtests/psxinttypes01/psxinttypes01.scn
diff --git a/testsuites/psxtests/Makefile.am b/testsuites/psxtests/Makefile.am
index 2a18d54..274f02a 100644
--- a/testsuites/psxtests/Makefile.am
+++ b/testsuites/psxtests/Makefile.am
@@ -15,6 +15,18 @@ psx_lib =
support_includes = -I$(top_srcdir)/../support/include
if HAS_POSIX
+if TEST_psxinttypes01
+psx_tests += psxinttypes01
+psx_screens += psxinttypes01/psxinttypes01.scn
+psxinttypes01_SOURCES = psxinttypes01/init.c psxinttypes01/inttypes.h
+psxinttypes01_CPPFLAGS = $(AM_CPPFLAGS) \
+ $(TEST_FLAGS_psxinttypes01) \
+ $(support_includes) \
+ -I$(top_srcdir)/include
+endif
+endif
+
+if HAS_POSIX
if TEST_psx01
psx_tests += psx01
psx01_SOURCES = psx01/init.c psx01/task.c psx01/system.h \
diff --git a/testsuites/psxtests/configure.ac b/testsuites/psxtests/configure.ac
index cdd6ee7..85559e4 100644
--- a/testsuites/psxtests/configure.ac
+++ b/testsuites/psxtests/configure.ac
@@ -91,6 +91,7 @@ RTEMS_TEST_CHECK([psxid01])
RTEMS_TEST_CHECK([psximfs01])
RTEMS_TEST_CHECK([psximfs02])
RTEMS_TEST_CHECK([psxintrcritical01])
+RTEMS_TEST_CHECK([psxinttypes01])
RTEMS_TEST_CHECK([psxitimer])
RTEMS_TEST_CHECK([psxkey01])
RTEMS_TEST_CHECK([psxkey02])
diff --git a/testsuites/psxtests/psxinttypes01/init.c
b/testsuites/psxtests/psxinttypes01/init.c
new file mode 100644
index 000..2af2f71
--- /dev/null
+++ b/testsuites/psxtests/psxinttypes01/init.c
@@ -0,0 +1,122 @@
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+const char rtems_test_name[] = "PSXINTTYPE 01";
+
+/* forward declarations to avoid warnings */
+rtems_task Init(rtems_task_argument ignored);
+
+rtems_task Init(rtems_task_argument ignored)
+{
+ int base = 10;
+ char *nptr1= "123abc";
+ char *endptr1 = NULL;
+ wchar_t *nptr2= L"-123junk";
+ wchar_t *endptr2 = NULL;
+ intmax_t status1;
+ uintmax_t status2;
+
+
+ TEST_BEGIN();
+
+ puts( "\nChecking invalid base value" );
+ rtems_test_assert(base != 0 || (base >=2 && base <= 36));
+
+ /*Test for strtoimax */
+ puts( "Strtoimax Testcases" );
+ puts( "Generating Status" );
+ status1 = strtoimax( nptr1, &endptr1, base );
+
+ rtems_test_assert( status1 != 0);
+ rtems_test_assert( base != EINVAL);
+
+ puts( "Checking Garbage end of endptr" );
+ rtems_test_assert( *endptr1 != '\0' );
+
+ puts( "Checking Underflow Case" );
+ rtems_test_assert( status1 >= INTMAX_MIN );
+
+ puts( "Checking Overflow Case" );
+ rtems_test_assert( status1 <= INTMAX_MAX ) ;
+
+ printf( "status = %jd \n" , status1 );
+
+ /*Test for strtoumax */
+ puts( "Strtoumax Testcases" );
+ puts( "Generating Status" );
+ status2 = strtoumax( nptr1, &endptr1, base );
+
+ rtems_test_assert( status2 != 0);
+ rtems_test_assert( base != EINVAL);
+
+ puts( "Checking Garbage end of endptr" );
+ rtems_test_assert( *endptr1 != '\0' );
+
+ puts( "Checking Overflow Case" );
+ rtems_test_assert( status2 <= UINTMAX_MAX );
+
+ printf( "status = %ju \n", status2 );
+
+ /*Test for wcstoimax */
+ puts( "\nWcstoimax Testcases" );
+ puts( "Generating Status" );
+ status1 = wcstoimax( nptr2, &endptr2, base );
+
+ rtems_test_assert( status1 != 0);
+ rtems_test_assert( base != EINVAL);
+
+ puts( "Checking Garbage end of endptr" );
+ rtems_test_assert( *endptr2 != '\0' );
+
+ puts( "Checking Underflow Case" );
+ rtems_test_assert( status1 >= INTMAX_MIN );
+
+ puts( "Checking Overflow Case" );
+ rtems_test_assert( status1 <= INTMAX_MAX ) ;
+
+ printf( "status = %jd \n", status1 );
+
+ /*Test for wcstoumax */
+ puts( "\nwcstoumax Testcases" );
+ puts( "Generating Status" );
+ status2 = wcstoumax( nptr2, &endptr2, base );
+
+ rtems_test_assert( status2 != 0);
+ rtems_test_assert( base != EINVAL);
+
+ puts( "Checking Garbage end of endptr" );
+ rtems_test_assert( *endptr2 != '\0' );
+
+ puts( "Checking Overflow Case" );
+ rtems_test_assert( status2 <= UINTMAX_MAX );
+
+ printf( "status = %" PRIuMAX, status2 );
+
+
+ TEST_END();
+ rtems_test_exit(0);
+
+}
+
+/* NOTICE: the clock driver is explicitly disabled */
+
+#define CONFIGURE_APPLICATION_DOES_NOT_NEED_CLOCK_DRIVER
+#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
+
+#define CONFIGURE_MAXIMUM_TASKS1
+
+#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
+
+#define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
+
+#define CONFIGURE_INIT
+#include
diff --git a/testsuites/psxtests/psxinttypes01/psxinttypes01.s
Re: [PATCH] dev/sc16is752: Add name space for field names.
Thanks Christian! This does indeed resolve the warning on psim so it should
be ok on all other powerpc BSPs. I will build all powerpc BSPs to double
check and then push.
--joel
On Wed, Aug 15, 2018 at 5:26 AM, wrote:
> From: Christian Mauderer
>
> The field names for the registers generated a name collision (MSR_RI on
> the power pc). This patch adds a SC16IS752_ prefix for all field names.
>
> Closes #3501.
> ---
> cpukit/dev/serial/sc16is752-regs.h | 108 ++---
> cpukit/dev/serial/sc16is752.c | 85 ---
> 2 files changed, 98 insertions(+), 95 deletions(-)
>
> diff --git a/cpukit/dev/serial/sc16is752-regs.h
> b/cpukit/dev/serial/sc16is752-regs.h
> index 21d425a118..b07e489a3e 100644
> --- a/cpukit/dev/serial/sc16is752-regs.h
> +++ b/cpukit/dev/serial/sc16is752-regs.h
> @@ -52,76 +52,76 @@ extern "C" {
> #define SC16IS752_XOFF2 0x7
>
> /* FCR */
> -#define FCR_FIFO_EN0x01
> -#define FCR_RX_FIFO_RST0x02
> -#define FCR_TX_FIFO_RST0x04
> -#define FCR_TX_FIFO_TRG_8 0x00
> -#define FCR_TX_FIFO_TRG_16 0x10
> -#define FCR_TX_FIFO_TRG_32 0x20
> -#define FCR_TX_FIFO_TRG_56 0x30
> -#define FCR_RX_FIFO_TRG_8 0x00
> -#define FCR_RX_FIFO_TRG_16 0x40
> -#define FCR_RX_FIFO_TRG_56 0x80
> -#define FCR_RX_FIFO_TRG_60 0xc0
> +#define SC16IS752_FCR_FIFO_EN0x01
> +#define SC16IS752_FCR_RX_FIFO_RST0x02
> +#define SC16IS752_FCR_TX_FIFO_RST0x04
> +#define SC16IS752_FCR_TX_FIFO_TRG_8 0x00
> +#define SC16IS752_FCR_TX_FIFO_TRG_16 0x10
> +#define SC16IS752_FCR_TX_FIFO_TRG_32 0x20
> +#define SC16IS752_FCR_TX_FIFO_TRG_56 0x30
> +#define SC16IS752_FCR_RX_FIFO_TRG_8 0x00
> +#define SC16IS752_FCR_RX_FIFO_TRG_16 0x40
> +#define SC16IS752_FCR_RX_FIFO_TRG_56 0x80
> +#define SC16IS752_FCR_RX_FIFO_TRG_60 0xc0
>
> /* EFCR */
> -#define EFCR_RS485_ENABLE (1u << 0)
> -#define EFCR_RX_DISABLE (1u << 1)
> -#define EFCR_TX_DISABLE (1u << 2)
> +#define SC16IS752_EFCR_RS485_ENABLE (1u << 0)
> +#define SC16IS752_EFCR_RX_DISABLE (1u << 1)
> +#define SC16IS752_EFCR_TX_DISABLE (1u << 2)
>
> /* IER */
> -#define IER_RHR (1u << 0)
> -#define IER_THR (1u << 1)
> -#define IER_RECEIVE_LINE_STATUS (1u << 2)
> -#define IER_MODEM_STATUS (1u << 3)
> -#define IER_SLEEP_MODE (1u << 4)
> -#define IER_XOFF (1u << 5)
> -#define IER_RTS (1u << 6)
> -#define IER_CTS (1u << 7)
> +#define SC16IS752_IER_RHR (1u << 0)
> +#define SC16IS752_IER_THR (1u << 1)
> +#define SC16IS752_IER_RECEIVE_LINE_STATUS (1u << 2)
> +#define SC16IS752_IER_MODEM_STATUS (1u << 3)
> +#define SC16IS752_IER_SLEEP_MODE (1u << 4)
> +#define SC16IS752_IER_XOFF (1u << 5)
> +#define SC16IS752_IER_RTS (1u << 6)
> +#define SC16IS752_IER_CTS (1u << 7)
>
> /* IIR */
> -#define IIR_TX_INTERRUPT (1u << 1)
> -#define IIR_RX_INTERRUPT (1u << 2)
> +#define SC16IS752_IIR_TX_INTERRUPT (1u << 1)
> +#define SC16IS752_IIR_RX_INTERRUPT (1u << 2)
>
> /* LCR */
> -#define LCR_CHRL_5_BIT (0u << 1) | (0u << 0)
> -#define LCR_CHRL_6_BIT (0u << 1) | (1u << 0)
> -#define LCR_CHRL_7_BIT (1u << 1) | (0u << 0)
> -#define LCR_CHRL_8_BIT (1u << 1) | (1u << 0)
> -#define LCR_2_STOP_BIT (1u << 2)
> -#define LCR_SET_PARITY (1u << 3)
> -#define LCR_EVEN_PARITY (1u << 4)
> -#define LCR_ENABLE_DIVISOR (1u << 7)
> +#define SC16IS752_LCR_CHRL_5_BIT (0u << 1) | (0u << 0)
> +#define SC16IS752_LCR_CHRL_6_BIT (0u << 1) | (1u << 0)
> +#define SC16IS752_LCR_CHRL_7_BIT (1u << 1) | (0u << 0)
> +#define SC16IS752_LCR_CHRL_8_BIT (1u << 1) | (1u << 0)
> +#define SC16IS752_LCR_2_STOP_BIT (1u << 2)
> +#define SC16IS752_LCR_SET_PARITY (1u << 3)
> +#define SC16IS752_LCR_EVEN_PARITY (1u << 4)
> +#define SC16IS752_LCR_ENABLE_DIVISOR (1u << 7)
>
> /* LSR */
> -#define LSR_TXEMPTY (1u << 5)
> -#define LSR_RXRDY (1u << 0)
> -#define LSR_ERROR_BITS (7u << 2)
> +#define SC16IS752_LSR_TXEMPTY (1u << 5)
> +#define SC16IS752_LSR_RXRDY (1u << 0)
> +#define SC16IS752_LSR_ERROR_BITS (7u << 2)
>
> /* MCR */
> -#define MCR_DTR (1u << 0)
> -#define MCR_RTS (1u << 1)
> -#define MCR_TCR_TLR (1u << 2)
> -#define MCR_LOOPBACK(1u << 4)
> -#define MCR_XON_ANY (1u << 5)
> -#define MCR_IRDA_ENABLE (1u << 6)
> -#define MCR_PRESCALE_NEEDED (1u << 7)
> +#define SC16IS752_MCR_DTR (1u << 0)
> +#define SC16IS752_MCR_RTS (1u << 1)
> +#define SC16IS752_MCR_TCR_TLR (1u << 2)
> +#define SC16IS752_MCR_LOOPBACK(1u << 4)
> +#define SC16IS752_MCR_XON_ANY (1u << 5)
> +#define SC16IS752_MCR_IRDA_ENABLE (1u << 6)
> +#define SC16IS752_MCR_PRESCALE_NEEDED (1u << 7)
>
> /* MSR */
> -#define MSR_dCTS (1u << 0)
> -#define MSR_dDSR (1u << 1)
> -#define MSR_dRI (1u << 2)
> -#define MSR_dCD (1u << 3)
> -#define MSR_CTS (1u << 4)
> -#define MSR_DSR (1u << 5)
> -#define MSR_RI (1u << 6)
> -#define MSR_CD (1u << 7)
> +#define SC16IS752_MSR_dCTS (1u << 0)
> +#define SC16IS752_MSR_dDSR (1u << 1)
> +#define SC16IS752_MSR_dRI (1u << 2)
> +#define SC16IS752_MSR_dCD (1u << 3)
> +#define SC16IS752_MS
Re: Disable libnetwork on Epiphany?
On Tue, Aug 14, 2018 at 4:26 AM, Hesham Almatary wrote: > On Tue, Aug 14, 2018 at 10:17 AM, Joel Sherrill wrote: > > > > > > On Tue, Aug 14, 2018, 2:51 AM Hesham Almatary > > wrote: > >> > >> AFAIR, I've never tried epiphany with networking. The cores are > >> supposed to be accelerators, so the ARM core can offload some > >> processing to it. > >> > >> P.S. aren't we gonna make Epiphany obsolete? The discussion was > >> raised by Sebastian before to remove Epiphany support. > > > > > > I recalled or1k and not epiphany. > Yes you're right > And FWIW the epiphany bsp builder configuration is building networking and I don't think it should. I couldn't find the magic syntax to tell it not to try since it already is noted as excluding smp. Any ideas on that? I am hoping it doesn't take Chris to step in. :) > >> > >> > >> > >> > >> On Tue, Aug 14, 2018 at 12:20 AM, Joel Sherrill wrote: > >> > Hi > >> > > >> > When you build with --enable-network on epiphany, it fails. Is it > >> > even reasonable to think it should build or be deployable? > >> > > >> > If not, I would like to force it disabled. > >> > > >> > Thoughts? > >> > > >> > --joel > >> > >> > >> > >> -- > >> Hesham > > > > -- > Hesham > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Flight Software Workshop Abstracts and Registration
Hi The Flight Software Workshop is being held this year December 3-6 at the Southwest Research Institute in San Antonio, Texas. The website is: http://flightsoftware.jhuapl.edu/ This is a presentation only conference but the deadline for submissions is Monday. Important Dates: Abstracts Submission Deadline: Monday, August 20th, 2018 Acceptance Notification: Monday, October 1st, 2018 Presentations Deadline: Friday, November 16th, 2018 Workshop: December 3-6, 2018 Registration is now open. Previous presentations and video is online at the website posted above. If you want to learn about the flight software on the Parker Solar Probe, there is a great presentation on it. :) OAR Corporation has been a sponsor of this conference for multiple years and I personally can't recommend it highly enough. It is a very technically interesting event in the space software community. --joel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: git.rtems.org LetsEncrypt TLS certificate expired
On 15/8/18 11:19 pm, Amaan Cheval wrote: > FYI: https://docs.rtems.org has an expired certificate too. > > On Wed, Aug 15, 2018 at 3:30 PM, Amaan Cheval wrote: >> The HTTPS certificate for https://git.rtems.org has expired (~15 >> minutes ago). Are the auto-renewal scripts failing? Thank you for the notice. Amar has resolved this issue. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Disable libnetwork on Epiphany?
> On 16 Aug 2018, at 3:31 am, Joel Sherrill wrote: >> On Tue, Aug 14, 2018 at 4:26 AM, Hesham Almatary >> wrote: >> On Tue, Aug 14, 2018 at 10:17 AM, Joel Sherrill wrote: >> > >> > >> > On Tue, Aug 14, 2018, 2:51 AM Hesham Almatary >> > wrote: >> >> >> >> AFAIR, I've never tried epiphany with networking. The cores are >> >> supposed to be accelerators, so the ARM core can offload some >> >> processing to it. >> >> >> >> P.S. aren't we gonna make Epiphany obsolete? The discussion was >> >> raised by Sebastian before to remove Epiphany support. >> > >> > >> > I recalled or1k and not epiphany. >> Yes you're right > > And FWIW the epiphany bsp builder configuration is building networking > and I don't think it should. I couldn't find the magic syntax to tell it not > to > try since it already is noted as excluding smp. > > Any ideas on that? I am hoping it doesn't take Chris to step in. :) I think there is a ticket. Chris___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
