want to contribute to project
Hello sir,
I am Vijay K. Banerjee , a 2nd year student of Computer Science and
Engineering from India .
I have knowledge of C/C++ and very much interested in contributing to the
project .
I have done the initial hello world task .
Please guide me in selecting a project and doing further study to progress
towards contributing .
Thanks
Vijay K.
P.S: I have attached the patch file
From c200a01cd9606c54b6106ba09386cc1afa086cd9 Mon Sep 17 00:00:00 2001
From: thelunatic
Date: Tue, 23 Jan 2018 14:46:51 +0530
Subject: [PATCH] vijay's hello world
---
testsuites/samples/hello/hello.scn | 6 --
testsuites/samples/hello/init.c| 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/testsuites/samples/hello/hello.scn b/testsuites/samples/hello/hello.scn
index d9e92d81d5..86048befcc 100644
--- a/testsuites/samples/hello/hello.scn
+++ b/testsuites/samples/hello/hello.scn
@@ -1,3 +1,5 @@
-*** HELLO WORLD TEST ***
+***Vijay's HELLO WORLD TEST ***
Hello World
-*** END OF HELLO WORLD TEST ***
+This is Vijay Kumar Banerjee
+
+*** END OF Vijay's HELLO WORLD TEST ***
diff --git a/testsuites/samples/hello/init.c b/testsuites/samples/hello/init.c
index 34ded37c55..530aeef11c 100644
--- a/testsuites/samples/hello/init.c
+++ b/testsuites/samples/hello/init.c
@@ -23,6 +23,7 @@ static rtems_task Init(
rtems_print_printer_fprintf_putc(&rtems_test_printer);
TEST_BEGIN();
printf( "Hello World\n" );
+ printf("This is Vijay Kumar Banerjee");
TEST_END();
rtems_test_exit( 0 );
}
--
2.14.3
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Re: want to contribute to project
On Wed, Feb 21, 2018 at 8:44 AM, Vijay Kumar Banerjee < vijaykumar9...@gmail.com> wrote: > Hello sir, > > I am Vijay K. Banerjee , a 2nd year student of Computer Science and > Engineering from India . > I have knowledge of C/C++ and very much interested in contributing to the > project . > I have done the initial hello world task . > Good work. Two things left to do. Send myself or Gedare Bloom a screenshot of the modified hello world running. And add yourself to the table here: https://devel.rtems.org/wiki/GSoC/2018 > Please guide me in selecting a project and doing further study to > progress towards contributing . > What are you interested in and what is your experience? We have a handful of high priority projects this year we would like to see progress on. This is almost certainly not the full list and we are always up for ideas. + Make Eclipse Target Interaction work with RTEMS ( https://www.eclipse.org/tcf/) + Improvements to our coverage reporting. GCOV validation and covoar reporting improvements + wifi integration improvements + aarch64 port + x86_64 port / non-legacy PC BSP - This project is large so we would need to work with whoever wants to tackle it to find the best subset for GSoC. Others will pipe up with ideas. --joel > > Thanks > Vijay K. > > P.S: I have attached the patch file > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 2/2] score/cpu/powerpc/include/rtems/score/powerpc.h: Fix typo
--- cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h b/cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h index 88ee002..2cd82ea 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h @@ -1,7 +1,7 @@ /** * @file * - * @brief IBM/Motorola Power Pc Definitions + * @brief IBM/Motorola PowerPC Definitions * * This file contains definitions for the IBM/Motorola PowerPC * family members. -- 1.8.3.1 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH v3 3/3] Rework i386 Paravirtualization to have paravirt.h
---
cpukit/score/cpu/i386/cpu.c| 2 +-
cpukit/score/cpu/i386/include/rtems/score/cpu.h| 2 +-
.../cpu/i386/include/rtems/score/interrupts.h | 2 +-
.../score/cpu/i386/include/rtems/score/paravirt.h | 63 ++
cpukit/score/cpu/i386/include/rtems/score/types.h | 3 ++
5 files changed, 69 insertions(+), 3 deletions(-)
create mode 100644 cpukit/score/cpu/i386/include/rtems/score/paravirt.h
diff --git a/cpukit/score/cpu/i386/cpu.c b/cpukit/score/cpu/i386/cpu.c
index c9434f7..a16718a 100644
--- a/cpukit/score/cpu/i386/cpu.c
+++ b/cpukit/score/cpu/i386/cpu.c
@@ -199,7 +199,7 @@ uint32_t _CPU_ISR_Get_level( void )
{
uint32_t level;
-#if !defined(RTEMS_PARAVIRT)
+#if !defined(CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE)
i386_get_interrupt_level( level );
#else
level = i386_get_interrupt_level();
diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpu.h
b/cpukit/score/cpu/i386/include/rtems/score/cpu.h
index f78149c..f1ed932 100644
--- a/cpukit/score/cpu/i386/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/include/rtems/score/cpu.h
@@ -381,7 +381,7 @@ extern Context_Control_fp _CPU_Null_fp_context;
* + set a particular level
*/
-#if !defined(RTEMS_PARAVIRT)
+#if !defined(CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE)
#define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level )
#define _CPU_ISR_Enable( _level ) i386_enable_interrupts( _level )
diff --git a/cpukit/score/cpu/i386/include/rtems/score/interrupts.h
b/cpukit/score/cpu/i386/include/rtems/score/interrupts.h
index 3a7971c..c47176a 100644
--- a/cpukit/score/cpu/i386/include/rtems/score/interrupts.h
+++ b/cpukit/score/cpu/i386/include/rtems/score/interrupts.h
@@ -33,7 +33,7 @@ typedef int (*rtems_raw_irq_is_enabled) (const struct
__rtems_raw_irq_connect_d
*
*/
/**@{**/
-#if !defined(RTEMS_PARAVIRT)
+#if !defined(CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE)
#define i386_disable_interrupts( _level ) \
{ \
__asm__ volatile ( "pushf ; \
diff --git a/cpukit/score/cpu/i386/include/rtems/score/paravirt.h
b/cpukit/score/cpu/i386/include/rtems/score/paravirt.h
new file mode 100644
index 000..788ffed
--- /dev/null
+++ b/cpukit/score/cpu/i386/include/rtems/score/paravirt.h
@@ -0,0 +1,63 @@
+/**
+ * @file
+ *
+ * @brief i386 Paravirtualization Definitions
+ *
+ * This include file contains definitions pertaining to paravirtualization
+ * of the i386 port.
+ */
+
+/*
+ * COPYRIGHT (c) 2018.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may in
+ * the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+
+#ifndef RTEMS_PARAVIRT
+#error "This file should only be included with paravirtualization is enabled."
+#endif
+
+#ifndef _RTEMS_SCORE_PARAVIRT_H
+#define _RTEMS_SCORE_PARAVIRT_H
+
+/**
+ * @defgroup Paravirti386 Paravirtualization i386 Support
+ *
+ * @ingroup Score
+ *
+ * This handler encapulates the functionality (primarily conditional
+ * feature defines) related to paravirtualization on the i386.
+ *
+ * Paravirtualization on the i386 makes the following assumptions:
+ *
+ * - RTEMS executes in user space
+ * - Interrupt enable/disable support using the MSR must be disabled
+ * and replaced with BSP provided methods which are adapted to the
+ * hosting environment.
+ */
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !ASM */
+
+/**
+ * In a paravirtualized environment, RTEMS executes in user space
+ * and cannot disable/enable external exceptions (e.g. interrupts).
+ * The BSP which acts as an adapter to the hosting environment will
+ * provide the interrupt enable/disable methods.
+ */
+#define CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE
+
+#endif
diff --git a/cpukit/score/cpu/i386/include/rtems/score/types.h
b/cpukit/score/cpu/i386/include/rtems/score/types.h
index 00555d4..75414c4 100644
--- a/cpukit/score/cpu/i386/include/rtems/score/types.h
+++ b/cpukit/score/cpu/i386/include/rtems/score/types.h
@@ -20,6 +20,9 @@
#define _RTEMS_SCORE_TYPES_H
#include
+#if defined(RTEMS_PARAVIRT)
+#include
+#endif
#ifndef ASM
--
1.8.3.1
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[PATCH 0/3] v3 - Paravirtualization Patch Series
Hi This patch series reworks the ARM and PowerPC support addition as well as reworks the i386 paravirtualization support based on Chris Johns' suggestion. He suggested adding a rtems/score/paravirt.h for each architecture and using derived feature macros instead of RTEMS_PARAVIRT directly. This has the nice side-effect of paravirt.h documenting what the paravirtualization environment is for each architecture as well as precisely the purpose of each introduced conditional compilation. Sorry about all the email. Jennifer made a typo in her email address and git send-email didn't complain about it until it got to that patch. --joel Jennifer Averett (1): Add PowerPC paravirtualization support Joel Sherrill (2): Add ARM Paravirtualization support Rework i386 Paravirtualization to have paravirt.h c/src/lib/libcpu/powerpc/new-exceptions/cpu.c | 10 ++- c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S | 16 + cpukit/score/cpu/arm/cpu_asm.S | 5 +- cpukit/score/cpu/arm/include/rtems/score/cpu.h | 6 ++ .../score/cpu/arm/include/rtems/score/paravirt.h | 75 ++ cpukit/score/cpu/arm/include/rtems/score/types.h | 3 + cpukit/score/cpu/i386/cpu.c| 2 +- cpukit/score/cpu/i386/include/rtems/score/cpu.h| 2 +- .../cpu/i386/include/rtems/score/interrupts.h | 2 +- .../score/cpu/i386/include/rtems/score/paravirt.h | 63 ++ cpukit/score/cpu/i386/include/rtems/score/types.h | 3 + .../cpu/powerpc/include/rtems/powerpc/registers.h | 7 ++ cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 9 +++ .../cpu/powerpc/include/rtems/score/paravirt.h | 74 + .../score/cpu/powerpc/include/rtems/score/types.h | 3 + 15 files changed, 273 insertions(+), 7 deletions(-) create mode 100644 cpukit/score/cpu/arm/include/rtems/score/paravirt.h create mode 100644 cpukit/score/cpu/i386/include/rtems/score/paravirt.h create mode 100644 cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h -- 1.8.3.1 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 0/3] v2 - Paravirtualization Patch Series
Hi This patch series reworks the ARM and PowerPC support addition as well as reworks the i386 paravirtualization support based on Chris Johns' suggestion. He suggested adding a rtems/score/paravirt.h for each architecture and using derived feature macros instead of RTEMS_PARAVIRT directly. This has the nice side-effect of paravirt.h documenting what the paravirtualization environment is for each architecture as well as precisely the purpose of each introduced conditional compilation. --joel Jennifer Averett (1): Add PowerPC paravirtualization support Joel Sherrill (2): Add ARM Paravirtualization support Rework i386 Paravirtualization to have paravirt.h c/src/lib/libcpu/powerpc/new-exceptions/cpu.c | 10 ++- c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S | 16 + cpukit/score/cpu/arm/cpu_asm.S | 5 +- cpukit/score/cpu/arm/include/rtems/score/cpu.h | 6 ++ .../score/cpu/arm/include/rtems/score/paravirt.h | 75 ++ cpukit/score/cpu/arm/include/rtems/score/types.h | 3 + cpukit/score/cpu/i386/cpu.c| 2 +- cpukit/score/cpu/i386/include/rtems/score/cpu.h| 2 +- .../cpu/i386/include/rtems/score/interrupts.h | 2 +- .../score/cpu/i386/include/rtems/score/paravirt.h | 63 ++ cpukit/score/cpu/i386/include/rtems/score/types.h | 3 + .../cpu/powerpc/include/rtems/powerpc/registers.h | 7 ++ cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 9 +++ .../cpu/powerpc/include/rtems/score/paravirt.h | 74 + .../score/cpu/powerpc/include/rtems/score/types.h | 3 + 15 files changed, 273 insertions(+), 7 deletions(-) create mode 100644 cpukit/score/cpu/arm/include/rtems/score/paravirt.h create mode 100644 cpukit/score/cpu/i386/include/rtems/score/paravirt.h create mode 100644 cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h -- 1.8.3.1 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 0/3] Paravirtualization Patch Series
Hi This patch series reworks the ARM and PowerPC support addition as well as reworks the i386 paravirtualization support based on Chris Johns' suggestion. He suggested adding a rtems/score/paravirt.h for each architecture and using derived feature macros instead of RTEMS_PARAVIRT directly. This has the nice side-effect of paravirt.h documenting what the paravirtualization environment is for each architecture as well as precisely the purpose of each introduced conditional compilation. --joel Jennifer Averett (1): Add PowerPC paravirtualization support Joel Sherrill (2): Add ARM Paravirtualization support Rework i386 Paravirtualization to have paravirt.h c/src/lib/libcpu/powerpc/new-exceptions/cpu.c | 10 ++- c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S | 16 + cpukit/score/cpu/arm/cpu_asm.S | 5 +- cpukit/score/cpu/arm/include/rtems/score/cpu.h | 6 ++ .../score/cpu/arm/include/rtems/score/paravirt.h | 75 ++ cpukit/score/cpu/arm/include/rtems/score/types.h | 3 + cpukit/score/cpu/i386/cpu.c| 2 +- cpukit/score/cpu/i386/include/rtems/score/cpu.h| 2 +- .../cpu/i386/include/rtems/score/interrupts.h | 2 +- .../score/cpu/i386/include/rtems/score/paravirt.h | 63 ++ cpukit/score/cpu/i386/include/rtems/score/types.h | 3 + .../cpu/powerpc/include/rtems/powerpc/registers.h | 7 ++ cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 9 +++ .../cpu/powerpc/include/rtems/score/paravirt.h | 74 + .../score/cpu/powerpc/include/rtems/score/types.h | 3 + 15 files changed, 273 insertions(+), 7 deletions(-) create mode 100644 cpukit/score/cpu/arm/include/rtems/score/paravirt.h create mode 100644 cpukit/score/cpu/i386/include/rtems/score/paravirt.h create mode 100644 cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h -- 1.8.3.1 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH v3 1/3] Add PowerPC paravirtualization support
Cannot read or write MSR when executing in user mode. This
is used when RTEMS_PARAVIRT is defined.
Provide alternate methods to disable/enable interrupts
Closes #3306.
---
c/src/lib/libcpu/powerpc/new-exceptions/cpu.c | 10 ++-
c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S | 16 +
.../cpu/powerpc/include/rtems/powerpc/registers.h | 7 ++
cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 9 +++
.../cpu/powerpc/include/rtems/score/paravirt.h | 74 ++
.../score/cpu/powerpc/include/rtems/score/types.h | 3 +
6 files changed, 116 insertions(+), 3 deletions(-)
create mode 100644 cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
index ae5065d..4017962 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
@@ -64,7 +64,7 @@ void _CPU_Context_Initialize(
)
{
ppc_context *the_ppc_context;
- uint32_t msr_value;
+ uint32_t msr_value = 0;
uintptr_t sp;
uintptr_t stack_alignment;
@@ -75,10 +75,11 @@ void _CPU_Context_Initialize(
sp = (uintptr_t) memset((void *) sp, 0, PPC_MINIMUM_STACK_FRAME_SIZE);
- _CPU_MSR_GET( msr_value );
-
the_ppc_context = ppc_get_context( the_context );
+#if !defined(CPU_POWERPC_DISABLE_MSR_ACCESS)
+ _CPU_MSR_GET( msr_value );
+
/*
* Setting the interrupt mask here is not strictly necessary
* since the IRQ level will be established from _Thread_Handler()
@@ -113,7 +114,10 @@ void _CPU_Context_Initialize(
#ifdef PPC_MULTILIB_ALTIVEC
msr_value |= MSR_VE;
+#endif
+#endif /* END CPU_POWERPC_DISABLE_MSR_ACCESS */
+#ifdef PPC_MULTILIB_ALTIVEC
the_ppc_context->vrsave = 0;
#endif
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
b/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
index cdbf403..18d5575 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
@@ -128,12 +128,15 @@ PROC (_CPU_Context_save_fp):
/* A FP context switch may occur in an ISR or exception handler when the FPU
is not
* available. Therefore, we must explicitely enable it here!
*/
+#if !defined(CPU_POWERPC_DISABLE_MSR_ACCESS)
mfmsr r4
andi. r5,r4,MSR_FP
bne 1f
ori r5,r4,MSR_FP
mtmsr r5
isync
+#endif /* END CPU_POWERPC_DISABLE_MSR_ACCESS */
+
1:
lwz r3, 0(r3)
STF f0, FP_0(r3)
@@ -170,9 +173,12 @@ PROC (_CPU_Context_save_fp):
STF f31, FP_31(r3)
mffsf2
STF f2, FP_FPSCR(r3)
+#if !defined(CPU_POWERPC_DISABLE_MSR_ACCESS)
bne 1f
mtmsr r4
isync
+#endif /* END CPU_POWERPC_DISABLE_MSR_ACCESS */
+
1:
blr
@@ -196,12 +202,15 @@ PROC (_CPU_Context_restore_fp):
/* A FP context switch may occur in an ISR or exception handler when the FPU
is not
* available. Therefore, we must explicitely enable it here!
*/
+#if !defined(CPU_POWERPC_DISABLE_MSR_ACCESS)
mfmsr r4
andi. r5,r4,MSR_FP
bne 1f
ori r5,r4,MSR_FP
mtmsr r5
isync
+#endif /* END CPU_POWERPC_DISABLE_MSR_ACCESS */
+
1:
LDF f2, FP_FPSCR(r3)
mtfsf 255, f2
@@ -238,8 +247,11 @@ PROC (_CPU_Context_restore_fp):
LDF f30, FP_30(r3)
LDF f31, FP_31(r3)
bne 1f
+#if !defined(CPU_POWERPC_DISABLE_MSR_ACCESS)
mtmsr r4
isync
+#endif /* END CPU_POWERPC_DISABLE_MSR_ACCESS */
+
1:
blr
#endif /* PPC_HAS_FPU == 1 */
@@ -266,7 +278,9 @@ PROC (_CPU_Context_switch):
/* Save context to r3 */
GET_SELF_CPU_CONTROLr12
+#if !defined(CPU_POWERPC_DISABLE_MSR_ACCESS)
mfmsr r6
+#endif /* END CPU_POWERPC_DISABLE_MSR_ACCESS */
mfcrr7
mflrr8
lwz r11, PER_CPU_ISR_DISPATCH_DISABLE(r12)
@@ -529,7 +543,9 @@ restore_context:
mtlrr8
mtcrr7
+#if !defined(CPU_POWERPC_DISABLE_MSR_ACCESS)
mtmsr r6
+#endif /* END CPU_POWERPC_DISABLE_MSR_ACCESS */
stw r11, PER_CPU_ISR_DISPATCH_DISABLE(r12)
#ifdef BSP_USE_SYNC_IN_CONTEXT_SWITCH
diff --git a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
index 4d93503..5a92009 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
@@ -672,6 +672,7 @@ extern "C" {
*
* A one bit means that this bit should be cleared.
*/
+#if !defined(CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE)
extern char _PPC_INTERRUPT_DISABLE_MASK[];
static inline uint32_t ppc_interrupt_get_disable_mask( void )
@@ -734,6 +735,12 @@ static inline void ppc_interrupt_flash( uint32_t level )
: "r" (level)
);
}
+#else
+uint32_t ppc_interrupt_get_disable_mask( void );
+uint32_t ppc_interrupt_
[PATCH 1/2] powerpc/include/rtems/score/types.h: Remove unused ppc_isr
---
cpukit/score/cpu/powerpc/include/rtems/score/types.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/types.h
b/cpukit/score/cpu/powerpc/include/rtems/score/types.h
index cdab302..38f7a9d 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/score/types.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/score/types.h
@@ -51,8 +51,6 @@ extern "C" {
/** Type that can store a 32-bit integer or a pointer. */
typedef uintptr_t CPU_Uint32ptr;
-typedef void ppc_isr;
-
#ifdef __cplusplus
}
#endif
--
1.8.3.1
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[PATCH v3 2/3] Add ARM Paravirtualization support
Closes #3305.
---
cpukit/score/cpu/arm/cpu_asm.S | 5 +-
cpukit/score/cpu/arm/include/rtems/score/cpu.h | 6 ++
.../score/cpu/arm/include/rtems/score/paravirt.h | 75 ++
cpukit/score/cpu/arm/include/rtems/score/types.h | 3 +
4 files changed, 88 insertions(+), 1 deletion(-)
create mode 100644 cpukit/score/cpu/arm/include/rtems/score/paravirt.h
diff --git a/cpukit/score/cpu/arm/cpu_asm.S b/cpukit/score/cpu/arm/cpu_asm.S
index f58b99d..214e67d 100644
--- a/cpukit/score/cpu/arm/cpu_asm.S
+++ b/cpukit/score/cpu/arm/cpu_asm.S
@@ -111,9 +111,12 @@ DEFINE_FUNCTION_ARM(_CPU_Context_switch)
#endif
#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
+ #if defined(CPU_ARM_USE_USER_ACCESSIBLE_THREAD_ID_REGISTER)
+ mcr p15, 0, r3, c13, c0, 2
+ #else
mcr p15, 0, r3, c13, c0, 3
+ #endif
#endif
-
str r4, [r2, #PER_CPU_ISR_DISPATCH_DISABLE]
/* In ARMv5T and above the load of PC is an interworking branch */
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h
b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
index 05e236c..4b52d6d 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
@@ -297,6 +297,11 @@ static inline void
_ARM_Instruction_synchronization_barrier( void )
#endif
}
+#if defined(CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE)
+uint32_t arm_interrupt_disable( void );
+void arm_interrupt_enable( uint32_t level );
+void arm_interrupt_flash( uint32_t level );
+#else
static inline uint32_t arm_interrupt_disable( void )
{
uint32_t level;
@@ -387,6 +392,7 @@ static inline void arm_interrupt_flash( uint32_t level )
);
#endif
}
+#endif /* !CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE */
#define _CPU_ISR_Disable( _isr_cookie ) \
do { \
diff --git a/cpukit/score/cpu/arm/include/rtems/score/paravirt.h
b/cpukit/score/cpu/arm/include/rtems/score/paravirt.h
new file mode 100644
index 000..fc3d276
--- /dev/null
+++ b/cpukit/score/cpu/arm/include/rtems/score/paravirt.h
@@ -0,0 +1,75 @@
+/**
+ * @file
+ *
+ * @brief ARM Paravirtualization Definitions
+ *
+ * This include file contains definitions pertaining to paravirtualization
+ * of the ARM port.
+ */
+
+/*
+ * COPYRIGHT (c) 2018.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may in
+ * the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+
+#ifndef RTEMS_PARAVIRT
+#error "This file should only be included with paravirtualization is enabled."
+#endif
+
+#ifndef _RTEMS_SCORE_PARAVIRT_H
+#define _RTEMS_SCORE_PARAVIRT_H
+
+/**
+ * @defgroup ParavirtARM Paravirtualization ARM Support
+ *
+ * @ingroup Score
+ *
+ * This handler encapulates the functionality (primarily conditional
+ * feature defines) related to paravirtualization on the ARM.
+ *
+ * Paravirtualization on the ARM makes the following assumptions:
+ *
+ * - RTEMS executes in user space
+ * - Interrupt enable/disable support using the MSR must be disabled
+ * and replaced with BSP provided methods which are adapted to the
+ * hosting environment.
+ */
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !ASM */
+
+/**
+ * In a paravirtualized environment, RTEMS executes in user space
+ * and cannot disable/enable external exceptions (e.g. interrupts).
+ * The BSP which acts as an adapter to the hosting environment will
+ * provide the interrupt enable/disable methods.
+ */
+#define CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE
+
+/**
+ * In a paravirtualized environment, RTEMS executes in user space
+ * and cannot write to the the Thread ID register which is normally
+ * used. CP15 C13 has three variants of a Thread ID register.
+ *
+ * - Opcode_2 = 2: This register is both user and privileged R/W accessible.
+ * - Opcode_2 = 3: This register is user read-only and privileged
+ * R/W accessible.
+ * - Opcode_2 = 4: This register is privileged R/W accessible only.
+ */
+#define CPU_ARM_USE_USER_ACCESSIBLE_THREAD_ID_REGISTER
+
+#endif
diff --git a/cpukit/score/cpu/arm/include/rtems/score/types.h
b/cpukit/score/cpu/arm/include/rtems/score/types.h
index 37a56df..8518891 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/types.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/types.h
@@ -21,6 +21,9 @@
#define _RTEMS_SCORE_TYPES_H
#include
+#if defined(RTEMS_PARAVIRT)
+#include
+#endif
#ifndef ASM
--
1.8.3.1
___
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http://lists.rtems.org/mailman/listinfo/devel
Re: RSB valid status check (was: Contribute to project)
Sir, I request you to please guide me whether I have done the task correctly or not and if something more is to be modified in this. If this is done correctly, please tell me how should I proceed further for the memory management project, which I was discussing earlier. Thanks and Regards Abhinav Jain On Feb 20, 2018 10:17 PM, "Abhinav Jain" wrote: > Sir, > > I have tried to incorporate the changes suggested by you. > I request you to please check the new patch file and guide me if some more > improvement is needed to be done. > > Thanks and Regards > Abhinav Jain > > > > On Tue, Feb 20, 2018 at 8:27 PM, Abhinav Jain > wrote: > >> Sir, >> >> I will edit the current patch accordingly and will take care of this in >> the future. >> >> Thanks and Regards >> Abhinav Jain >> >> On Tue, Feb 20, 2018 at 7:31 PM, Gedare Bloom wrote: >> >>> Oops, I should read my mail better. Thanks for breaking this out Chris. >>> Abhinav, >>> >>> On Tue, Feb 20, 2018 at 1:12 AM, Abhinav Jain >>> wrote: >>> > Sir, >>> > >>> > I have attached the patch file with this mail. I have tried to follow >>> all >>> > the conventions that were listed in the User Git page. I request you to >>> > please check and guide me whether I have done it correctly or not or >>> whether >>> > something more is to be done. >>> > >>> I won't comment on the code, I'll let Chris do that. However, this >>> patch has a few issues that should be addressed. >>> 1. Use line breaks in your commit message. About 70-80 characters per >>> line max, please. >>> 2. The "short message" can omit "function added to", basically all >>> patches add some code, so this is a bit redundant. You can just say >>> "Check the validity ..." >>> 3. The commit message should use "Closes #." somewhere, usually in >>> the end of the commit, if it is fixing/closing a ticket. >>> 4. The commit message may be less verbose, if the extra details about >>> the change are already in the ticket. >>> 5. Avoid adding extra white spaces randomly, e.g. hunk #2 of the >>> patch, and avoid introducing white space new lines where one exists, >>> creating 2 blank lines in a row. >>> 6. You may like to try to get git-send-email to work for you. It is a >>> little nicer for submitting patches to mailing list. >>> https://devel.rtems.org/wiki/Developer/Git/Users#Configuring >>> git-send-emailtouseGMail >>> >>> -Gedare >>> >>> > Thanks and Regards >>> > Abhinav Jain >>> > >>> > On Tue, Feb 20, 2018 at 4:13 AM, Chris Johns wrote: >>> >> >>> >> On 19/02/2018 21:19, Abhinav Jain wrote: >>> >> > I have made the changes suggested by you in the code and hopefully, >>> the >>> >> > issue >>> >> > will be resolved as if the .git file is not found in the directory, >>> the >>> >> > process >>> >> > will not go ahead and hence the wrong git repository will not be >>> >> > changed. >>> >> >>> >> Excellent. Please post for review. >>> >> >>> >> > I request to please guide me whether anything more is to be done in >>> the >>> >> > code or >>> >> > should I proceed with a pull request. >>> >> >>> >> I assume you mean a github pull request. RTEMS uses patches sent to >>> this >>> >> list >>> >> for review. The top page of the Wiki has a section called RTEMS >>> Developer >>> >> Information and in that section are links to User Git access and >>> >> submitting >>> >> patches. You can also attach the patch to the ticket. >>> >> >>> >> Chris >>> > >>> > >>> >> >> > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 0/3] v3 - Paravirtualization Patch Series
- Am 21. Feb 2018 um 21:07 schrieb joel j...@rtems.org: > Hi > > This patch series reworks the ARM and PowerPC support addition > as well as reworks the i386 paravirtualization support based > on Chris Johns' suggestion. He suggested adding a > rtems/score/paravirt.h for each architecture This is not what you are doing. You added one rtems/score/paravirt.h for all architectures. > and using > derived feature macros instead of RTEMS_PARAVIRT directly. > This has the nice side-effect of paravirt.h documenting > what the paravirtualization environment is for each > architecture as well as precisely the purpose of each > introduced conditional compilation. This new rtems/score/paravirt.h is completely against the current score/cpu/* structure. Architecture-specific stuff should not be aggregated in one file, instead the existing architecture-specific cpu.h, etc. files should be used. Architecture-specific names should use an ARCH_ or _Arch prefix and not CPU_ARCH or _CPU_Arch. This CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE is an architecture-specific implementation detail which doesn't propagate to generic files, e.g. rtems/score/isrlevel.h, so it should not be introduced from my point of view. I don't think it is worth to add a rtems/score/paravirt.h for each architecture. The changes introduced by RTEMS_PARAVIRT are too small to justify this. I am also not sure if you can encapsulate this in one header in all cases. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 0/3] v3 - Paravirtualization Patch Series
- Am 22. Feb 2018 um 3:25 schrieb Sebastian Huber sebastian.hu...@embedded-brains.de: > - Am 21. Feb 2018 um 21:07 schrieb joel j...@rtems.org: > >> Hi >> >> This patch series reworks the ARM and PowerPC support addition >> as well as reworks the i386 paravirtualization support based >> on Chris Johns' suggestion. He suggested adding a >> rtems/score/paravirt.h for each architecture > > This is not what you are doing. You added one rtems/score/paravirt.h for all > architectures. Sorry, I did misread the patches. I have currently only a web based e-mail client. >> and using >> derived feature macros instead of RTEMS_PARAVIRT directly. >> This has the nice side-effect of paravirt.h documenting >> what the paravirtualization environment is for each >> architecture as well as precisely the purpose of each >> introduced conditional compilation. > > This new rtems/score/paravirt.h is completely against the current score/cpu/* > structure. Architecture-specific stuff should not be aggregated in one file, > instead the existing architecture-specific cpu.h, etc. files should be used. Please ignore this. > > Architecture-specific names should use an ARCH_ or _Arch prefix and not > CPU_ARCH > or _CPU_Arch. > > This > > CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE > > is an architecture-specific implementation detail which doesn't propagate to > generic files, e.g. rtems/score/isrlevel.h, so it should not be introduced > from > my point of view. > > I don't think it is worth to add a rtems/score/paravirt.h for each > architecture. > The changes introduced by RTEMS_PARAVIRT are too small to justify this. I am > also not sure if you can encapsulate this in one header in all cases. Please don't ignore this. In addition, this +#endif /* END CPU_POWERPC_DISABLE_MSR_ACCESS */ style is a bit odd. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH v3 2/3] Add ARM Paravirtualization support
- Am 21. Feb 2018 um 21:07 schrieb joel j...@rtems.org: > Closes #3305. > --- > cpukit/score/cpu/arm/cpu_asm.S | 5 +- > cpukit/score/cpu/arm/include/rtems/score/cpu.h | 6 ++ > .../score/cpu/arm/include/rtems/score/paravirt.h | 75 ++ > cpukit/score/cpu/arm/include/rtems/score/types.h | 3 + > 4 files changed, 88 insertions(+), 1 deletion(-) > create mode 100644 cpukit/score/cpu/arm/include/rtems/score/paravirt.h > > diff --git a/cpukit/score/cpu/arm/cpu_asm.S b/cpukit/score/cpu/arm/cpu_asm.S > index f58b99d..214e67d 100644 > --- a/cpukit/score/cpu/arm/cpu_asm.S > +++ b/cpukit/score/cpu/arm/cpu_asm.S > @@ -111,9 +111,12 @@ DEFINE_FUNCTION_ARM(_CPU_Context_switch) > #endif > > #ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER > + #if defined(CPU_ARM_USE_USER_ACCESSIBLE_THREAD_ID_REGISTER) > + mcr p15, 0, r3, c13, c0, 2 > + #else > mcr p15, 0, r3, c13, c0, 3 > + #endif > #endif > - Why remove this line? > str r4, [r2, #PER_CPU_ISR_DISPATCH_DISABLE] > > /* In ARMv5T and above the load of PC is an interworking branch */ [...] > +/** > + * In a paravirtualized environment, RTEMS executes in user space > + * and cannot write to the the Thread ID register which is normally > + * used. CP15 C13 has three variants of a Thread ID register. > + * > + * - Opcode_2 = 2: This register is both user and privileged R/W accessible. > + * - Opcode_2 = 3: This register is user read-only and privileged > + * R/W accessible. > + * - Opcode_2 = 4: This register is privileged R/W accessible only. > + */ > +#define CPU_ARM_USE_USER_ACCESSIBLE_THREAD_ID_REGISTER How did you convince GCC that it should use the TPIDRURW? ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 0/3] v3 - Paravirtualization Patch Series
On 22/02/2018 13:37, Sebastian Huber wrote: >> >> Architecture-specific names should use an ARCH_ or _Arch prefix and not >> CPU_ARCH >> or _CPU_Arch. >> >> This >> >> CPU_DISABLE_INLINE_ISR_DISABLE_ENABLE >> >> is an architecture-specific implementation detail which doesn't propagate to >> generic files, e.g. rtems/score/isrlevel.h, so it should not be introduced >> from >> my point of view. >> >> I don't think it is worth to add a rtems/score/paravirt.h for each >> architecture. >> The changes introduced by RTEMS_PARAVIRT are too small to justify this. I am >> also not sure if you can encapsulate this in one header in all cases. > > Please don't ignore this. > I felt spreading the RTEMS_PARAVIRT across the code was hiding the reason in some cases. When I reviewed the v2 patches I felt changes in a specific area needed more information to aid long term maintenance. For example look at the ARM thread id register. It is clear what is happening and if that change flows out to other parts of the system it is clear what is happening if there is a dependence on that register. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
