[PATCH] score: Simplify SMP get lowest scheduled
There is no need to pass in the order relation since the scheduled
threads reside on an already ordered chain. The caller will decide what
to do with the lowest scheduled thread.
---
.../score/include/rtems/score/schedulersmpimpl.h | 11 +++-
cpukit/score/src/scheduleredfsmp.c | 5 ++--
cpukit/score/src/schedulerpriorityaffinitysmp.c| 30 +-
3 files changed, 18 insertions(+), 28 deletions(-)
diff --git a/cpukit/score/include/rtems/score/schedulersmpimpl.h
b/cpukit/score/include/rtems/score/schedulersmpimpl.h
index 3afa6b2a0c..3194ee39a0 100644
--- a/cpukit/score/include/rtems/score/schedulersmpimpl.h
+++ b/cpukit/score/include/rtems/score/schedulersmpimpl.h
@@ -286,8 +286,7 @@ typedef Scheduler_Node *( *Scheduler_SMP_Get_highest_ready
)(
typedef Scheduler_Node *( *Scheduler_SMP_Get_lowest_scheduled )(
Scheduler_Context *context,
- Scheduler_Node*filter,
- Chain_Node_order order
+ Scheduler_Node*filter
);
typedef void ( *Scheduler_SMP_Extract )(
@@ -615,8 +614,7 @@ static inline Thread_Control *_Scheduler_SMP_Preempt(
static inline Scheduler_Node *_Scheduler_SMP_Get_lowest_scheduled(
Scheduler_Context *context,
- Scheduler_Node*filter,
- Chain_Node_order order
+ Scheduler_Node*filter
)
{
Scheduler_SMP_Context *self = _Scheduler_SMP_Get_self( context );
@@ -625,7 +623,6 @@ static inline Scheduler_Node
*_Scheduler_SMP_Get_lowest_scheduled(
(Scheduler_Node *) _Chain_Last( scheduled );
(void) filter;
- (void) order;
_Assert( &lowest_scheduled->Node.Chain != _Chain_Tail( scheduled ) );
_Assert(
@@ -725,7 +722,7 @@ static inline bool _Scheduler_SMP_Enqueue_ordered(
boolneeds_help;
Scheduler_Node *lowest_scheduled;
- lowest_scheduled = ( *get_lowest_scheduled )( context, node, order );
+ lowest_scheduled = ( *get_lowest_scheduled )( context, node );
if ( ( *order )( &node->Node.Chain, &lowest_scheduled->Node.Chain ) ) {
_Scheduler_SMP_Enqueue_to_scheduled(
@@ -1207,7 +1204,7 @@ static inline bool _Scheduler_SMP_Ask_for_help(
ISR_lock_Context lock_context;
bool success;
- lowest_scheduled = ( *get_lowest_scheduled )( context, node, order );
+ lowest_scheduled = ( *get_lowest_scheduled )( context, node );
_Thread_Scheduler_acquire_critical( thread, &lock_context );
diff --git a/cpukit/score/src/scheduleredfsmp.c
b/cpukit/score/src/scheduleredfsmp.c
index bd6ce82068..3a1b1a934e 100644
--- a/cpukit/score/src/scheduleredfsmp.c
+++ b/cpukit/score/src/scheduleredfsmp.c
@@ -226,8 +226,7 @@ static inline Scheduler_EDF_SMP_Node
*_Scheduler_EDF_SMP_Get_scheduled(
static inline Scheduler_Node *_Scheduler_EDF_SMP_Get_lowest_scheduled(
Scheduler_Context *context,
- Scheduler_Node*filter_base,
- Chain_Node_order order
+ Scheduler_Node*filter_base
)
{
Scheduler_EDF_SMP_Node *filter;
@@ -249,7 +248,7 @@ static inline Scheduler_Node
*_Scheduler_EDF_SMP_Get_lowest_scheduled(
}
}
- return _Scheduler_SMP_Get_lowest_scheduled( context, filter_base, order );
+ return _Scheduler_SMP_Get_lowest_scheduled( context, filter_base );
}
static inline void _Scheduler_EDF_SMP_Insert_ready(
diff --git a/cpukit/score/src/schedulerpriorityaffinitysmp.c
b/cpukit/score/src/schedulerpriorityaffinitysmp.c
index 03db3e9a26..6caf00c3a0 100644
--- a/cpukit/score/src/schedulerpriorityaffinitysmp.c
+++ b/cpukit/score/src/schedulerpriorityaffinitysmp.c
@@ -210,8 +210,7 @@ void _Scheduler_priority_affinity_SMP_Block(
*/
static Scheduler_Node * _Scheduler_priority_affinity_SMP_Get_lowest_scheduled(
Scheduler_Context *context,
- Scheduler_Node*filter_base,
- Chain_Node_order order
+ Scheduler_Node*filter_base
)
{
Scheduler_SMP_Context *self = _Scheduler_SMP_Get_self( context );
@@ -230,20 +229,6 @@ static Scheduler_Node *
_Scheduler_priority_affinity_SMP_Get_lowest_scheduled(
node = (Scheduler_priority_affinity_SMP_Node *) chain_node;
-/*
- * If we didn't find a thread which is of equal or lower importance
- * than filter thread is, then we can't schedule the filter thread
- * to execute.
- */
-if (
- (*order)(
-&node->Base.Base.Base.Node.Chain,
-&filter->Base.Base.Base.Node.Chain
- )
-) {
- break;
-}
-
/* cpu_index is the processor number thread is executing on */
thread = _Scheduler_Node_get_owner( &node->Base.Base.Base );
cpu_index = _Per_CPU_Get_index( _Thread_Get_CPU( thread ) );
@@ -309,8 +294,7 @@ static void
_Scheduler_priority_affinity_SMP_Check_for_migrations(
lowest_scheduled =
_Scheduler_priority_affinity_SMP_Get_lowest_scheduled(
context,
-highest_ready,
-_Scheduler_SMP_Insert_priority_lifo_order
+highest_ready
);
/*
@@ -322,9 +306,19 @@ static void
_Scheduler_priority_affinity_SMP_Check_for_migrations(
* considering affinity. But now we have to consid
[PATCH] posix: Fix pthread_create() with user stack
In case the user provides a stack with address and size, then do not
alter the stack size.
Close #3211.
---
cpukit/posix/src/pthreadcreate.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/cpukit/posix/src/pthreadcreate.c b/cpukit/posix/src/pthreadcreate.c
index 2315b7f5ee..5a8cf2d7fb 100644
--- a/cpukit/posix/src/pthreadcreate.c
+++ b/cpukit/posix/src/pthreadcreate.c
@@ -77,6 +77,7 @@ int pthread_create(
const POSIX_API_Control*executing_api;
int schedpolicy = SCHED_RR;
struct sched_param schedparam;
+ size_t stacksize;
Objects_Namename;
int error;
ISR_lock_Contextlock_context;
@@ -96,8 +97,15 @@ int pthread_create(
* NOTE: If the user provides the stack we will let it drop below
*twice the minimum.
*/
- if ( the_attr->stackaddr && !_Stack_Is_enough(the_attr->stacksize) )
-return EINVAL;
+ if ( the_attr->stackaddr != NULL ) {
+if ( !_Stack_Is_enough(the_attr->stacksize) ) {
+ return EINVAL;
+}
+
+stacksize = the_attr->stacksize;
+ } else {
+stacksize = _POSIX_Threads_Ensure_minimum_stack( the_attr->stacksize );
+ }
#if 0
int cputime_clock_allowed; /* see time.h */
@@ -200,7 +208,7 @@ int pthread_create(
the_thread,
scheduler,
the_attr->stackaddr,
-_POSIX_Threads_Ensure_minimum_stack(the_attr->stacksize),
+stacksize,
is_fp,
core_normal_prio,
true, /* preemptible */
--
2.12.3
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[PATCH 2/2] sptests/spscheduler01: Test POSIX set/get affinity
---
testsuites/sptests/spscheduler01/init.c| 120 +
testsuites/sptests/spscheduler01/spscheduler01.doc | 2 +
2 files changed, 99 insertions(+), 23 deletions(-)
diff --git a/testsuites/sptests/spscheduler01/init.c
b/testsuites/sptests/spscheduler01/init.c
index cbdc92ca25..c7e5518c57 100644
--- a/testsuites/sptests/spscheduler01/init.c
+++ b/testsuites/sptests/spscheduler01/init.c
@@ -16,10 +16,15 @@
#include "config.h"
#endif
+#define _GNU_SOURCE
+
#include
#include
+#include
#include
+#include
+#include
#include "tmacros.h"
@@ -29,12 +34,83 @@ const char rtems_test_name[] = "SPSCHEDULER 1";
#define RED rtems_build_name('r', 'e', 'd', ' ')
+#define BIG_NUM_CPUS (2 * CHAR_BIT * sizeof(cpu_set_t))
+
static const rtems_id invalid_id = 1;
static rtems_id master_id;
static rtems_id sema_id;
+static void assert_eno(rtems_status_code sc, int eno)
+{
+ switch (sc) {
+case RTEMS_SUCCESSFUL:
+ rtems_test_assert(eno == 0);
+ break;
+case RTEMS_INVALID_ADDRESS:
+ rtems_test_assert(eno == EFAULT);
+ break;
+case RTEMS_INVALID_ID:
+ rtems_test_assert(eno == ESRCH);
+ break;
+case RTEMS_INVALID_NUMBER:
+ rtems_test_assert(eno == EINVAL);
+ break;
+default:
+ rtems_test_assert(0);
+ }
+}
+
+static rtems_status_code task_get_affinity(
+ rtems_id id,
+ size_t cpusetsize,
+ cpu_set_t *cpuset
+)
+{
+ rtems_status_code sc;
+ int eno;
+ cpu_set_t *cpusetbig;
+
+ sc = rtems_task_get_affinity(id, cpusetsize, cpuset);
+
+ if (cpuset != NULL) {
+cpusetbig = CPU_ALLOC(BIG_NUM_CPUS);
+rtems_test_assert(cpusetbig != NULL);
+
+memcpy(cpusetbig, cpuset, cpusetsize);
+ } else {
+cpusetbig = NULL;
+ }
+
+ eno = pthread_getaffinity_np(id, cpusetsize, cpusetbig);
+
+ if (cpuset != NULL) {
+rtems_test_assert(CPU_EQUAL_S(cpusetsize, cpusetbig, cpuset));
+CPU_FREE(cpusetbig);
+ }
+
+ assert_eno(sc, eno);
+
+ return sc;
+}
+
+static rtems_status_code task_set_affinity(
+ rtems_id id,
+ size_t cpusetsize,
+ const cpu_set_t *cpuset
+)
+{
+ rtems_status_code sc;
+ int eno;
+
+ sc = rtems_task_set_affinity(id, cpusetsize, cpuset);
+ eno = pthread_setaffinity_np(id, cpusetsize, cpuset);
+ assert_eno(sc, eno);
+
+ return sc;
+}
+
static void test_task_get_set_affinity(void)
{
rtems_id self_id = rtems_task_self();
@@ -43,8 +119,7 @@ static void test_task_get_set_affinity(void)
cpu_set_t cpusetone;
cpu_set_t cpusetall;
cpu_set_t cpuset;
- size_t big = 2 * CHAR_BIT * sizeof(cpu_set_t);
- size_t cpusetbigsize = CPU_ALLOC_SIZE(big);
+ size_t cpusetbigsize = CPU_ALLOC_SIZE(BIG_NUM_CPUS);
cpu_set_t *cpusetbigone;
cpu_set_t *cpusetbig;
@@ -63,66 +138,66 @@ static void test_task_get_set_affinity(void)
);
rtems_test_assert(sc == RTEMS_SUCCESSFUL);
- sc = rtems_task_get_affinity(RTEMS_SELF, sizeof(cpuset), NULL);
+ sc = task_get_affinity(RTEMS_SELF, sizeof(cpuset), NULL);
rtems_test_assert(sc == RTEMS_INVALID_ADDRESS);
- sc = rtems_task_set_affinity(RTEMS_SELF, sizeof(cpuset), NULL);
+ sc = task_set_affinity(RTEMS_SELF, sizeof(cpuset), NULL);
rtems_test_assert(sc == RTEMS_INVALID_ADDRESS);
- sc = rtems_task_get_affinity(RTEMS_SELF, 0, &cpuset);
+ sc = task_get_affinity(RTEMS_SELF, 0, &cpuset);
rtems_test_assert(sc == RTEMS_INVALID_NUMBER);
- sc = rtems_task_set_affinity(RTEMS_SELF, 0, &cpuset);
+ sc = task_set_affinity(RTEMS_SELF, 0, &cpuset);
rtems_test_assert(sc == RTEMS_INVALID_NUMBER);
- sc = rtems_task_get_affinity(invalid_id, sizeof(cpuset), &cpuset);
+ sc = task_get_affinity(invalid_id, sizeof(cpuset), &cpuset);
rtems_test_assert(sc == RTEMS_INVALID_ID);
- sc = rtems_task_set_affinity(invalid_id, sizeof(cpuset), &cpuset);
+ sc = task_set_affinity(invalid_id, sizeof(cpuset), &cpuset);
rtems_test_assert(sc == RTEMS_INVALID_ID);
- sc = rtems_task_get_affinity(RTEMS_SELF, sizeof(cpuset), &cpuset);
+ sc = task_get_affinity(RTEMS_SELF, sizeof(cpuset), &cpuset);
rtems_test_assert(sc == RTEMS_SUCCESSFUL);
rtems_test_assert(CPU_EQUAL(&cpuset, &cpusetone));
- sc = rtems_task_set_affinity(RTEMS_SELF, sizeof(cpuset), &cpuset);
+ sc = task_set_affinity(RTEMS_SELF, sizeof(cpuset), &cpuset);
rtems_test_assert(sc == RTEMS_SUCCESSFUL);
- sc = rtems_task_set_affinity(self_id, sizeof(cpuset), &cpuset);
+ sc = task_set_affinity(self_id, sizeof(cpuset), &cpuset);
rtems_test_assert(sc == RTEMS_SUCCESSFUL);
- sc = rtems_task_set_affinity(task_id, sizeof(cpuset), &cpuset);
+ sc = task_set_affinity(task_id, sizeof(cpuset), &cpuset);
rtems_test_assert(sc == RTEMS_SUCCESSFUL);
- sc = rtems_task_get_affinity(task_id, sizeof(cpuset), &cpuset);
+ sc = task_get_affinity(task_id, sizeof(cpuset), &cpuset);
rtems_test_assert(sc == RTEMS_SUCCESSFUL);
rtems_test_assert(CPU_EQUAL(&cpuset, &cpusetone));
- sc = rtems_task_set_affinity(RTEMS_SELF, sizeof(cpusetall), &cpusetall);
+ sc = ta
[PATCH 1/2] score: Fix _Scheduler_Set_affinity()
---
cpukit/score/src/scheduleredfsmp.c | 9 -
cpukit/score/src/schedulersetaffinity.c | 7 +++
testsuites/sptests/spscheduler01/init.c | 13 -
3 files changed, 23 insertions(+), 6 deletions(-)
diff --git a/cpukit/score/src/scheduleredfsmp.c
b/cpukit/score/src/scheduleredfsmp.c
index 3a1b1a934e..82255b0f95 100644
--- a/cpukit/score/src/scheduleredfsmp.c
+++ b/cpukit/score/src/scheduleredfsmp.c
@@ -753,19 +753,18 @@ bool _Scheduler_EDF_SMP_Set_affinity(
{
Scheduler_Context *context;
Processor_mask a;
- Processor_mask b;
+ uint32_t count;
uint32_t rqi;
context = _Scheduler_Get_context( scheduler );
_Processor_mask_And( &a, &context->Processors, affinity );
+ count = _Processor_mask_Count( &a );
- if ( _Processor_mask_Count( &a ) == 0 ) {
+ if ( count == 0 ) {
return false;
}
- _Processor_mask_And( &b, &_SMP_Online_processors, affinity );
-
- if ( _Processor_mask_Count( &b ) == _SMP_Processor_count ) {
+ if ( count == _SMP_Processor_count ) {
rqi = 0;
} else {
rqi = _Processor_mask_Find_last_set( &a );
diff --git a/cpukit/score/src/schedulersetaffinity.c
b/cpukit/score/src/schedulersetaffinity.c
index 3d354800b2..00d1a8b207 100644
--- a/cpukit/score/src/schedulersetaffinity.c
+++ b/cpukit/score/src/schedulersetaffinity.c
@@ -36,6 +36,13 @@ bool _Scheduler_Set_affinity(
return false;
}
+ /*
+ * Reduce affinity set to the online processors to be in line with
+ * _Thread_Initialize() which sets the default affinity to the set of online
+ * processors.
+ */
+ _Processor_mask_And( &affinity, &_SMP_Online_processors, &affinity );
+
scheduler = _Thread_Scheduler_get_home( the_thread );
_Scheduler_Acquire_critical( scheduler, &lock_context );
diff --git a/testsuites/sptests/spscheduler01/init.c
b/testsuites/sptests/spscheduler01/init.c
index 9840a3ebc4..cbdc92ca25 100644
--- a/testsuites/sptests/spscheduler01/init.c
+++ b/testsuites/sptests/spscheduler01/init.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014, 2016 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2014, 2017 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
@@ -41,6 +41,7 @@ static void test_task_get_set_affinity(void)
rtems_id task_id;
rtems_status_code sc;
cpu_set_t cpusetone;
+ cpu_set_t cpusetall;
cpu_set_t cpuset;
size_t big = 2 * CHAR_BIT * sizeof(cpu_set_t);
size_t cpusetbigsize = CPU_ALLOC_SIZE(big);
@@ -50,6 +51,8 @@ static void test_task_get_set_affinity(void)
CPU_ZERO(&cpusetone);
CPU_SET(0, &cpusetone);
+ CPU_FILL(&cpusetall);
+
sc = rtems_task_create(
rtems_build_name('T', 'A', 'S', 'K'),
2,
@@ -97,6 +100,14 @@ static void test_task_get_set_affinity(void)
rtems_test_assert(CPU_EQUAL(&cpuset, &cpusetone));
+ sc = rtems_task_set_affinity(RTEMS_SELF, sizeof(cpusetall), &cpusetall);
+ rtems_test_assert(sc == RTEMS_SUCCESSFUL);
+
+ sc = rtems_task_get_affinity(task_id, sizeof(cpuset), &cpuset);
+ rtems_test_assert(sc == RTEMS_SUCCESSFUL);
+
+ rtems_test_assert(CPU_EQUAL(&cpuset, &cpusetone));
+
cpusetbigone = CPU_ALLOC(big);
rtems_test_assert(cpusetbigone != NULL);
--
2.12.3
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Re: [PATCH 4/4] bsp: Add new riscv_generic bsp v3
On 27/10/17 01:45, Hesham Almatary wrote:
+static void riscv_generic_clock_at_tick(void)
+{
+ REG(MTIME_MM) = 0;
+ REG(MTIMECMP_MM) = TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
+
+ cpu_counter_ticks += TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT * 1;
+}
+
Instead of setting the MM to 0, can't you increment the CMP_MM at each
clock tick? This would make MM to a free running counter for easier
timecounter and CPU counter support.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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Re: [PATCH 4/4] bsp: Add new riscv_generic bsp v3
On 27/10/17 01:45, Hesham Almatary wrote: +#define REG(x) (*((volatile uint32_t *) (x))) +#define BIT(n) (1 << (n)) + +#define MTIME_MM0x0200bff8 +#define MTIMECMP_MM 0x02004000 This stuff should better not be in . -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 1/4] Add riscv32 to autotools files v3
Patch set v3 looks all right from my point of view. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 4/4] bsp: Add new riscv64_generic bsp
symlink riscv_generic -> riscv64_generic
Update #3109
---
.../riscv_generic/make/custom/riscv64_generic.cfg | 7 ++
c/src/lib/libbsp/riscv64/Makefile.am | 14
c/src/lib/libbsp/riscv64/acinclude.m4 | 10 +++
c/src/lib/libbsp/riscv64/configure.ac | 19 +
c/src/lib/libbsp/riscv64/riscv64_generic | 1 +
.../libbsp/riscv64/shared/include/linker-symbols.h | 81 ++
6 files changed, 132 insertions(+)
create mode 100644
c/src/lib/libbsp/riscv32/riscv_generic/make/custom/riscv64_generic.cfg
create mode 100644 c/src/lib/libbsp/riscv64/Makefile.am
create mode 100644 c/src/lib/libbsp/riscv64/acinclude.m4
create mode 100644 c/src/lib/libbsp/riscv64/configure.ac
create mode 12 c/src/lib/libbsp/riscv64/riscv64_generic
create mode 100644 c/src/lib/libbsp/riscv64/shared/include/linker-symbols.h
diff --git
a/c/src/lib/libbsp/riscv32/riscv_generic/make/custom/riscv64_generic.cfg
b/c/src/lib/libbsp/riscv32/riscv_generic/make/custom/riscv64_generic.cfg
new file mode 100644
index 000..e2925c2
--- /dev/null
+++ b/c/src/lib/libbsp/riscv32/riscv_generic/make/custom/riscv64_generic.cfg
@@ -0,0 +1,7 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv64
+
+CPU_CFLAGS = -mcmodel=medany
+
+CFLAGS_OPTIMIZE_V ?= -O0 -g
diff --git a/c/src/lib/libbsp/riscv64/Makefile.am
b/c/src/lib/libbsp/riscv64/Makefile.am
new file mode 100644
index 000..9c319b6
--- /dev/null
+++ b/c/src/lib/libbsp/riscv64/Makefile.am
@@ -0,0 +1,14 @@
+ACLOCAL_AMFLAGS = -I ../../../aclocal
+## Descend into the @RTEMS_BSP_FAMILY@ directory
+## Currently, the shared directory is not explicitly
+## added but it is present in the source tree.
+
+
+_SUBDIRS = @RTEMS_BSP_FAMILY@
+
+include_bspdir = $(includedir)/bsp
+include_bsp_HEADERS = shared/include/linker-symbols.h
+
+include $(srcdir)/preinstall.am
+include $(top_srcdir)/../../../automake/subdirs.am
+include $(top_srcdir)/../../../automake/local.am
diff --git a/c/src/lib/libbsp/riscv64/acinclude.m4
b/c/src/lib/libbsp/riscv64/acinclude.m4
new file mode 100644
index 000..9982df9
--- /dev/null
+++ b/c/src/lib/libbsp/riscv64/acinclude.m4
@@ -0,0 +1,10 @@
+# RTEMS_CHECK_BSPDIR(RTEMS_BSP_FAMILY)
+AC_DEFUN([RTEMS_CHECK_BSPDIR],
+[
+ case "$1" in
+ riscv64_generic )
+AC_CONFIG_SUBDIRS([riscv64_generic]);;
+ *)
+AC_MSG_ERROR([Invalid BSP]);;
+ esac
+])
diff --git a/c/src/lib/libbsp/riscv64/configure.ac
b/c/src/lib/libbsp/riscv64/configure.ac
new file mode 100644
index 000..bcd91b9
--- /dev/null
+++ b/c/src/lib/libbsp/riscv64/configure.ac
@@ -0,0 +1,19 @@
+# Process this file with autoconf to produce a configure script.
+
+AC_PREREQ([2.69])
+AC_INIT([rtems-c-src-lib-libbsp-riscv64],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+AC_CONFIG_SRCDIR([../riscv64])
+RTEMS_TOP(../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define foreign subdir-objects 1.12.2])
+AM_MAINTAINER_MODE
+
+RTEMS_ENV_RTEMSBSP
+RTEMS_PROJECT_ROOT
+
+RTEMS_CHECK_BSPDIR([$RTEMS_BSP_FAMILY])
+
+# Explicitly list all Makefiles here
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT
diff --git a/c/src/lib/libbsp/riscv64/riscv64_generic
b/c/src/lib/libbsp/riscv64/riscv64_generic
new file mode 12
index 000..835d65d
--- /dev/null
+++ b/c/src/lib/libbsp/riscv64/riscv64_generic
@@ -0,0 +1 @@
+../riscv32/riscv_generic
\ No newline at end of file
diff --git a/c/src/lib/libbsp/riscv64/shared/include/linker-symbols.h
b/c/src/lib/libbsp/riscv64/shared/include/linker-symbols.h
new file mode 100644
index 000..a4b03f5
--- /dev/null
+++ b/c/src/lib/libbsp/riscv64/shared/include/linker-symbols.h
@@ -0,0 +1,81 @@
+#ifndef LIBBSP_RISCV_SHARED_LINKER_SYMBOLS_H
+#define LIBBSP_RISCV_SHARED_LINKER_SYMBOLS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup riscv_linker Linker Support
+ *
+ * @ingroup riscv_shared
+ *
+ * @brief Linker support.
+ *
+ * @{
+ */
+
+#ifndef ASM
+#define LINKER_SYMBOL(sym) extern char sym [];
+#else
+#define LINKER_SYMBOL(sym) .extern sym
+#endif
+
+LINKER_SYMBOL(bsp_section_start_begin)
+LINKER_SYMBOL(bsp_section_start_end)
+LINKER_SYMBOL(bsp_section_start_size)
+
+LINKER_SYMBOL(bsp_section_vector_begin)
+LINKER_SYMBOL(bsp_section_vector_end)
+LINKER_SYMBOL(bsp_section_vector_size)
+
+LINKER_SYMBOL(bsp_section_text_begin)
+LINKER_SYMBOL(bsp_section_text_end)
+LINKER_SYMBOL(bsp_section_text_size)
+LINKER_SYMBOL(bsp_section_text_load_begin)
+LINKER_SYMBOL(bsp_section_text_load_end)
+
+LINKER_SYMBOL(bsp_section_rodata_begin)
+LINKER_SYMBOL(bsp_section_rodata_end)
+LINKER_SYMBOL(bsp_section_rodata_size)
+LINKER_SYMBOL(bsp_section_rodata_load_begin)
+LINKER_SYMBOL(bsp_section_rodata_load_end)
+
+LINKER_SYMBOL(bsp_section_data_begin)
+LINKER_SYMBOL(bsp_section_data_end)
+LINKER_SYMBOL(bsp_section_data_size)
+LINKER_SYMBOL(bsp_section_data_load_begin)
+LINKER_SYMBOL(bsp_section_data_load_end)
+
+LINKER_SYMBOL(bsp_section_bss_begin)
+LINKER_SYMBOL(bsp_section_bs
[PATCH 3/4] bsp: Generalize riscv_generic BSP to work for riscv64
Update #3109
---
c/src/lib/libbsp/riscv32/riscv_generic/include/bsp.h| 6 +++---
c/src/lib/libbsp/riscv32/riscv_generic/start/start.S| 10 --
c/src/lib/libbsp/riscv32/riscv_generic/startup/linkcmds | 10 ++
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/include/bsp.h
b/c/src/lib/libbsp/riscv32/riscv_generic/include/bsp.h
index 99fe958..79f359a 100644
--- a/c/src/lib/libbsp/riscv32/riscv_generic/include/bsp.h
+++ b/c/src/lib/libbsp/riscv32/riscv_generic/include/bsp.h
@@ -60,11 +60,11 @@ extern "C" {
* @{
*/
-#define REG(x) (*((volatile uint32_t *) (x)))
+#define REG(x) (*((volatile unsigned long *) (x)))
#define BIT(n) (1 << (n))
-#define MTIME_MM0x0200bff8
-#define MTIMECMP_MM 0x02004000
+#define MTIME_MM0x0200bff8
+#define MTIMECMP_MM 0x02004000
#ifdef __cplusplus
}
diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/start/start.S
b/c/src/lib/libbsp/riscv32/riscv_generic/start/start.S
index 692afe5..ccefb81 100644
--- a/c/src/lib/libbsp/riscv32/riscv_generic/start/start.S
+++ b/c/src/lib/libbsp/riscv32/riscv_generic/start/start.S
@@ -28,11 +28,9 @@
*/
#include
#include
+#include
#include
-# define LREG lw
-# define SREG sw
-
EXTERN(bsp_section_bss_begin)
EXTERN(bsp_section_bss_end)
EXTERN(ISR_Handler)
@@ -90,8 +88,8 @@ SYM(_start):
_loop_clear_bss:
bge t0, t1, _end_clear_bss
- swx0, 0(t0)
- addi t0, t0, 4
+ SREGx0, 0(t0)
+ addi t0, t0, CPU_SIZEOF_POINTER
j _loop_clear_bss
_end_clear_bss:
@@ -101,7 +99,7 @@ _end_clear_bss:
j boot_card
- .align 2
+ .align 4
bsp_start_vector_table_begin:
.word _RISCV_Exception_default /* User int */
.word _RISCV_Exception_default /* Supervisor int */
diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/startup/linkcmds
b/c/src/lib/libbsp/riscv32/riscv_generic/startup/linkcmds
index 0ed37ad..eda1030 100644
--- a/c/src/lib/libbsp/riscv32/riscv_generic/startup/linkcmds
+++ b/c/src/lib/libbsp/riscv32/riscv_generic/startup/linkcmds
@@ -33,14 +33,13 @@
* SUCH DAMAGE.
*/
-OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv")
OUTPUT_ARCH (riscv)
ENTRY (_start)
MEMORY
{
- RAM: ORIGIN = 0x8000, LENGTH = 0x1000
+ RAM: ORIGIN = 0x1000, LENGTH = 0x1000
}
REGION_ALIAS ("REGION_VECTOR", RAM);
@@ -68,9 +67,9 @@ bsp_section_xbarrier_align = DEFINED
(bsp_section_xbarrier_align) ? bsp_section
bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ?
bsp_section_robarrier_align : 1;
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ?
bsp_section_rwbarrier_align : 1;
-bsp_stack_align = DEFINED (bsp_stack_align) ? bsp_stack_align : 8;
+bsp_stack_align = DEFINED (bsp_stack_align) ? bsp_stack_align : 16;
-bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size :
1024;
+bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size :
4096;
bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
_bsp_processor_count = DEFINED (_bsp_processor_count) ? _bsp_processor_count :
1;
@@ -110,6 +109,7 @@ SECTIONS {
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
+*(.gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
} > REGION_TEXT AT > REGION_TEXT_LOAD
.init : {
@@ -132,6 +132,7 @@ SECTIONS {
. = ALIGN(8);
bsp_section_rodata_begin = .;
*(.rodata .rodata.* .gnu.linkonce.r.*)
+*(.gnu.linkonce.r.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.eh_frame : {
KEEP (*(.eh_frame))
@@ -324,6 +325,7 @@ SECTIONS {
. = ALIGN(8);
bsp_section_data_begin = .;
*(.data .data.* .gnu.linkonce.d.*)
+*(.comment)
SORT(CONSTRUCTORS)
} > REGION_DATA AT > REGION_DATA_LOAD
.data1 : {
--
2.7.4
___
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devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel
[PATCH 2/4] Add riscv64 to autotools files
Update #3109 --- c/src/aclocal/rtems-cpu-subdirs.m4 | 1 + cpukit/configure.ac| 1 + cpukit/score/cpu/Makefile.am | 1 + 3 files changed, 3 insertions(+) diff --git a/c/src/aclocal/rtems-cpu-subdirs.m4 b/c/src/aclocal/rtems-cpu-subdirs.m4 index b5b579e..863451e 100644 --- a/c/src/aclocal/rtems-cpu-subdirs.m4 +++ b/c/src/aclocal/rtems-cpu-subdirs.m4 @@ -24,6 +24,7 @@ _RTEMS_CPU_SUBDIR([no_cpu],[$1]);; _RTEMS_CPU_SUBDIR([or1k],[$1]);; _RTEMS_CPU_SUBDIR([powerpc],[$1]);; _RTEMS_CPU_SUBDIR([riscv32],[$1]);; +_RTEMS_CPU_SUBDIR([riscv64],[$1]);; _RTEMS_CPU_SUBDIR([sh],[$1]);; _RTEMS_CPU_SUBDIR([sparc],[$1]);; _RTEMS_CPU_SUBDIR([sparc64],[$1]);; diff --git a/cpukit/configure.ac b/cpukit/configure.ac index 210eebf..f61de79 100644 --- a/cpukit/configure.ac +++ b/cpukit/configure.ac @@ -460,6 +460,7 @@ score/cpu/nios2/Makefile score/cpu/or1k/Makefile score/cpu/powerpc/Makefile score/cpu/riscv32/Makefile +score/cpu/riscv64/Makefile score/cpu/sh/Makefile score/cpu/sparc/Makefile score/cpu/sparc64/Makefile diff --git a/cpukit/score/cpu/Makefile.am b/cpukit/score/cpu/Makefile.am index 73c6540..8643515 100644 --- a/cpukit/score/cpu/Makefile.am +++ b/cpukit/score/cpu/Makefile.am @@ -15,6 +15,7 @@ DIST_SUBDIRS += no_cpu DIST_SUBDIRS += or1k DIST_SUBDIRS += powerpc DIST_SUBDIRS += riscv32 +DIST_SUBDIRS += riscv64 DIST_SUBDIRS += sh DIST_SUBDIRS += sparc DIST_SUBDIRS += sparc64 -- 2.7.4 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: importing selected (dual license) linux modules
Hello, what is now the consensus? 1. We keep the Linux submodule and the scripting support private to EB. 2. We rename the "linux" directory into "linux-dual-license" to emphasize that this directory contains dual licensed code imported from Linux. 3. All commits referencing "linux-dual-license" go to review to devel@rtems.org first? -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: RTEMS Tier Allocations.
Hello Chris, thanks for your hints. This ser2net and the IO via telnet is really nice. I am now able to run the tests on a board with U-Boot. U-Boot has a "tftpdstport" option. Maybe this can be used to avoid running the rtems-test as root. There is a problem on some tests with mixed output via BSP_output_char and the normal console driver. We have to fix all tests to use BSP_output_char only. For example: ] should be: 13 ] Int_3_Loc: 7 ] should be: 7 ] Enum_Loc: 1 ] should be: 1 ] Str_1_Loc: DHRYSTONE PROGRAM, 1'ST STRING ] should be: DHRYSTONE PROGRAM, 1'ST STRING ] Str_2_Loc: DHRYSTONE PROGRAM, 2'ND STRING ] should be: DHRYSTONE PROGRAM, 2'ND STRING ] ] Microseconds for one run through Dhrystone: 0.5 ] Dhrystones per Second: 1841407. ] 8* * ] *D MEIPSN:D O F T E S T D H R Y S T O N E * * * ] ] 1048.04 The following patch diff --git a/testsuites/benchmarks/dhrystone/dhry.h b/testsuites/benchmarks/dhrystone/dhry.h index 4eaceebe78..6e8daed32c 100644 --- a/testsuites/benchmarks/dhrystone/dhry.h +++ b/testsuites/benchmarks/dhrystone/dhry.h @@ -386,6 +386,7 @@ /* General definitions: */ #include +#include /* for strcpy, strcmp */ #define Null 0 diff --git a/testsuites/benchmarks/dhrystone/init.c b/testsuites/benchmarks/dhrystone/init.c index 3e6245c743..44c3f27683 100644 --- a/testsuites/benchmarks/dhrystone/init.c +++ b/testsuites/benchmarks/dhrystone/init.c @@ -32,6 +32,7 @@ static void Init(rtems_task_argument arg) TEST_BEGIN(); + rtems_print_printer_fprintf_putc(&rtems_test_printer); main(2, argv); TEST_END(); yields: ] should be: 1 ] Str_1_Loc: DHRYSTONE PROGRAM, 1'ST STRING ] should be: DHRYSTONE PROGRAM, 1'ST STRING ] Str_2_Loc: DHRYSTONE PROGRAM, 2'ND STRING ] should be: DHRYSTONE PROGRAM, 2'ND STRING ] ] Microseconds for one run through Dhrystone: 0.6 ] Dhrystones per Second: 1811990.7 ] DMIPS: 1031.30 ] ] => test end: DHRYSTONE ] *** END OF TEST DHRYSTONE *** -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
RTEMS Tester Lack of Detail on Host
Hi First I am thrilled at the reports going to build@ It occurred to me looking at the reports I was posting that they only say x86_64-linux-gnu. That is not enough to distinguish distributions or even tell the difference between something as old as CentOS 6 from a bleeding edge Fedora or Ubuntu install. I know you can do this on a Redhat/Centos/Fedora machine: joel@localhost ~]$ uname -a Linux localhost.localdomain 3.10.0-514.10.2.el7.x86_64 #1 SMP Fri Mar 3 00:04:05 UTC 2017 x86_64 x86_64 x86_64 GNU/Linux [joel@localhost ~]$ cat /etc/redhat-release CentOS Linux release 7.3.1611 (Core) But /etc/redhat-release is obviously far from universal. Is there agreement that more detail on the host would be desirable? If so, what do we need to know and how would the script gather it? Thanks. --joel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH] Return invalid mode for !preempt and interrupt disable modes when SMP
This impacts rtems_task_mode() and rtems_task_create().
updates #3000.
---
c/src/ada/rtems.ads | 3 ++-
cpukit/rtems/include/rtems/rtems/status.h | 10 --
cpukit/rtems/src/statustext.c | 1 +
cpukit/rtems/src/taskcreate.c | 19 ---
cpukit/rtems/src/taskmode.c | 19 +--
testsuites/smptests/smpunsupported01/init.c | 6 +++---
6 files changed, 43 insertions(+), 15 deletions(-)
diff --git a/c/src/ada/rtems.ads b/c/src/ada/rtems.ads
index 2b59c74..cd23185 100644
--- a/c/src/ada/rtems.ads
+++ b/c/src/ada/rtems.ads
@@ -10,7 +10,7 @@
--RTEMS initialization and configuration are called from
--the BSP side, therefore should never be called from ADA.
--
--- COPYRIGHT (c) 1997-2011.
+-- COPYRIGHT (c) 1997-2011, 2017.
-- On-Line Applications Research Corporation (OAR).
--
-- The license and distribution terms for this file may in
@@ -351,6 +351,7 @@ pragma Elaborate_Body (RTEMS);
Internal_Error, -- RTEMS inconsistency detected
No_Memory,-- no memory left in heap
IO_Error, -- driver IO error
+ Invalid_Mode, -- invalid mode for RTEMS configuration
Proxy_Blocking-- internal multiprocessing only
);
diff --git a/cpukit/rtems/include/rtems/rtems/status.h
b/cpukit/rtems/include/rtems/rtems/status.h
index c54404b..ede43cc 100644
--- a/cpukit/rtems/include/rtems/rtems/status.h
+++ b/cpukit/rtems/include/rtems/rtems/status.h
@@ -10,7 +10,7 @@
* executive directives.
*/
-/* COPYRIGHT (c) 1989-2013.
+/* COPYRIGHT (c) 1989-2017.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -170,6 +170,12 @@ typedef enum {
*/
RTEMS_IO_ERROR = 27,
/**
+ * This is the status to indicate an invalid mode was specified.
+ * This can occur when using a mode that is not supported in
+ * the current RTEMS functional configuration.
+ */
+ RTEMS_INVALID_MODE = 28,
+ /**
* This is the status is used internally to RTEMS when performing
* operations on behalf of remote tasks. This is referred to as
* proxying operations and this status indicates that the operation
@@ -177,7 +183,7 @@ typedef enum {
*
* @note This status will @b NOT be returned to the user.
*/
- RTEMS_PROXY_BLOCKING = 28
+ RTEMS_PROXY_BLOCKING = 29
} rtems_status_code;
/**
diff --git a/cpukit/rtems/src/statustext.c b/cpukit/rtems/src/statustext.c
index f701ebd..f2af24f 100644
--- a/cpukit/rtems/src/statustext.c
+++ b/cpukit/rtems/src/statustext.c
@@ -53,6 +53,7 @@ static const char *const status_code_text[] = {
"RTEMS_INTERNAL_ERROR",
"RTEMS_NO_MEMORY",
"RTEMS_IO_ERROR",
+ "RTEMS_INVALID_MODE",
"RTEMS_PROXY_BLOCKING"
};
diff --git a/cpukit/rtems/src/taskcreate.c b/cpukit/rtems/src/taskcreate.c
index 2695382..7a68c6f 100644
--- a/cpukit/rtems/src/taskcreate.c
+++ b/cpukit/rtems/src/taskcreate.c
@@ -6,7 +6,7 @@
*/
/*
- * COPYRIGHT (c) 1989-2014,2016.
+ * COPYRIGHT (c) 1989-2014,2016,2017.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -50,15 +50,28 @@ rtems_status_code rtems_task_create(
RTEMS_API_Control *api;
ASR_Information *asr;
-
if ( !id )
return RTEMS_INVALID_ADDRESS;
if ( !rtems_is_name_valid( name ) )
return RTEMS_INVALID_NAME;
+#if defined(RTEMS_SMP)
+ /*
+ * Per task preemption and interrupt disable are unsafe and not
+ * supported on SMP configurations.
+ */
+ if ( rtems_configuration_is_smp_enabled() ) {
+if ( !_Modes_Is_preempt(initial_modes) )
+ return RTEMS_INVALID_MODE;
+
+if ( _Modes_Get_interrupt_level(initial_modes) != 0 )
+ return RTEMS_INVALID_MODE;
+ }
+#endif
+
/*
- * Core Thread Initialize insures we get the minimum amount of
+ * Core Thread Initialize ensures we get the minimum amount of
* stack space.
*/
diff --git a/cpukit/rtems/src/taskmode.c b/cpukit/rtems/src/taskmode.c
index a345409..d26fdc2 100644
--- a/cpukit/rtems/src/taskmode.c
+++ b/cpukit/rtems/src/taskmode.c
@@ -6,7 +6,7 @@
*/
/*
- * COPYRIGHT (c) 1989-2014.
+ * COPYRIGHT (c) 1989-2014,2017.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -64,10 +64,10 @@ rtems_status_code rtems_task_mode(
*/
preempt_enabled = false;
if ( mask & RTEMS_PREEMPT_MASK ) {
-#if defined( RTEMS_SMP )
-if ( rtems_configuration_is_smp_enabled() &&
- !_Modes_Is_preempt( mode_set ) ) {
- return RTEMS_NOT_IMPLEMENTED;
+#if defined(RTEMS_SMP)
+if ( rtems_configuration_is_smp_enabled() ) {
+ if ( !_Modes_Is_preempt( mode_set ) )
+return RTEMS_INVALID_MODE;
}
#endif
bool is_preempt_enabled = _Modes_Is_pre
Re: [PATCH] RSB - Add support for RISC-V RV64 (64-bit) toolchain v2
On Fri, Oct 27, 2017 at 5:55 PM, Chris Johns wrote: > On 27/10/2017 16:45, Sebastian Huber wrote: >> Thanks, committed. Even the Ada support works: >> >> riscv64-rtems4.12-gnat --version >> GNAT 7.2.0 20170814 (RTEMS 4.12, RSB >> 5bd4aa6bb33872b0f0fb243e7fc2f0784e69ab81, >> Newlib 2.5.0.20170922) >> Copyright (C) 1996-2017, Free Software Foundation, Inc. >> This is free software; see the source for copying conditions. >> There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A >> PARTICULAR >> PURPOSE. >> > > This this arch get put in tier-4? > > Tools for archs with no BSP sit is tier-4 until a BSP is merged. > Well, I submitted a set of patches for RISC-V 64-bit, with a new riscv64_generic (just a symlink to riscv_generic), which works. Waiting for review. > Chris -- Hesham ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH] Tester - RISC-V: Add spike simulator and scripts/bsp for riscv ports
Update #3109 --- tester/rtems/rtems-bsps-riscv32.ini | 25 tester/rtems/rtems-bsps-riscv64.ini | 25 tester/rtems/testing/bsps/riscv64_generic.ini | 38 ++ tester/rtems/testing/bsps/riscv64_generic.mc | 53 tester/rtems/testing/bsps/riscv_generic.ini | 38 ++ tester/rtems/testing/bsps/riscv_generic.mc| 53 tester/rtems/testing/spike.cfg| 58 +++ 7 files changed, 290 insertions(+) create mode 100644 tester/rtems/rtems-bsps-riscv32.ini create mode 100644 tester/rtems/rtems-bsps-riscv64.ini create mode 100644 tester/rtems/testing/bsps/riscv64_generic.ini create mode 100644 tester/rtems/testing/bsps/riscv64_generic.mc create mode 100644 tester/rtems/testing/bsps/riscv_generic.ini create mode 100644 tester/rtems/testing/bsps/riscv_generic.mc create mode 100644 tester/rtems/testing/spike.cfg diff --git a/tester/rtems/rtems-bsps-riscv32.ini b/tester/rtems/rtems-bsps-riscv32.ini new file mode 100644 index 000..3740222 --- /dev/null +++ b/tester/rtems/rtems-bsps-riscv32.ini @@ -0,0 +1,25 @@ +# +# RTEMS Tools Project (http://www.rtems.org/) +# Copyright 2017 Chris Johns (chr...@rtems.org) +# All rights reserved. +# +# This file is part of the RTEMS Tools package in 'rtems-bsp-builder'. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +# +# RISC-V RV32 Architecture +# +[riscv32] +bsps = riscv_generic +exclude = smp diff --git a/tester/rtems/rtems-bsps-riscv64.ini b/tester/rtems/rtems-bsps-riscv64.ini new file mode 100644 index 000..0a15f6f --- /dev/null +++ b/tester/rtems/rtems-bsps-riscv64.ini @@ -0,0 +1,25 @@ +# +# RTEMS Tools Project (http://www.rtems.org/) +# Copyright 2017 Chris Johns (chr...@rtems.org) +# All rights reserved. +# +# This file is part of the RTEMS Tools package in 'rtems-bsp-builder'. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +# +# RISC-V RV64 Architecture +# +[riscv64] +bsps = riscv64_generic +exclude = smp diff --git a/tester/rtems/testing/bsps/riscv64_generic.ini b/tester/rtems/testing/bsps/riscv64_generic.ini new file mode 100644 index 000..c596a3a --- /dev/null +++ b/tester/rtems/testing/bsps/riscv64_generic.ini @@ -0,0 +1,38 @@ +# +# RTEMS Tools Project (http://www.rtems.org/) +# Copyright 2010-2014 Chris Johns (chr...@rtems.org) +# All rights reserved. +# +# This file is part of the RTEMS Tools package in 'rtems-tools'. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY,
[PATCH] RSB - RISC-V: Add scripts to build RISC-V's simulator
Update #3109
---
bare/config/devel/spike-1.1.0.cfg | 21
bare/config/devel/spike.bset| 7
source-builder/config/spike-1-1.cfg | 64 +
3 files changed, 92 insertions(+)
create mode 100644 bare/config/devel/spike-1.1.0.cfg
create mode 100644 bare/config/devel/spike.bset
create mode 100644 source-builder/config/spike-1-1.cfg
diff --git a/bare/config/devel/spike-1.1.0.cfg
b/bare/config/devel/spike-1.1.0.cfg
new file mode 100644
index 000..5b633fc
--- /dev/null
+++ b/bare/config/devel/spike-1.1.0.cfg
@@ -0,0 +1,21 @@
+#
+# RISC-V's simulator (spike) 1.1.0
+#
+
+%if %{release} == %{nil}
+%define release 1
+%endif
+
+%include %{_configdir}/base.cfg
+
+%define spike_version 1.1.0
+
+%hash sha512 priv-1.10.zip
46ff0a07135bdc8c442ade3727f080d09ec8e7136e42f082d135b256c06088dc0b9f34028f0a20bcb19bb6de5a144ea02a53c587fac4204f0f7d05a11ae23ed3
+
+# RISC-V's front-end server (fesvr)
+%hash sha512 f683e01542acf60e50774d061bcb396b628e3e67.zip
54900159e4a4f6ec28a43702e651354932e22e1e1995fa82aeb182225fe32be085e850e6060b8feadf6ffdd6cbe19873a379af687e36d04a1a3ea337cef93b06
+
+#
+# The spike build instructions. We use 1.x.x Release 1.
+#
+%include %{_configdir}/spike-1-1.cfg
diff --git a/bare/config/devel/spike.bset b/bare/config/devel/spike.bset
new file mode 100644
index 000..c7a6340
--- /dev/null
+++ b/bare/config/devel/spike.bset
@@ -0,0 +1,7 @@
+#
+# Build set for RISC-V's simulator
+#
+
+%define release 1
+
+devel/spike-1.1.0
diff --git a/source-builder/config/spike-1-1.cfg
b/source-builder/config/spike-1-1.cfg
new file mode 100644
index 000..54e4915
--- /dev/null
+++ b/source-builder/config/spike-1-1.cfg
@@ -0,0 +1,64 @@
+#
+# RISC-V's spike (priv-1.10) 1.x.x Version 1.
+#
+# This configuration file configure's, make's and install's RISC-V's spike
simulator.
+#
+
+%if %{release} == %{nil}
+%define release 1
+%endif
+
+Name: spike-%{spike_version}-%{_host}-%{release}
+Summary: spike-github
+Version: %{spike_version}
+Release: %{release}
+URL: https://github.com/riscv/riscv-isa-sim/
+BuildRoot: %{_tmppath}/%{name}-root-%(%{__id_u} -n)
+
+#
+# Source
+#
+%source set spike https://github.com/riscv/riscv-isa-sim/archive/priv-1.10.zip
+%source set fesvr
https://github.com/riscv/riscv-fesvr/archive/f683e01542acf60e50774d061bcb396b628e3e67.zip
+
+#
+# Prepare the source code.
+#
+%prep
+ build_top=$(pwd)
+
+ %source setup fesvr -q -n
riscv-fesvr-f683e01542acf60e50774d061bcb396b628e3e67
+ %source setup spike -q -n riscv-isa-sim-priv-1.10
+
+ cd ${build_top}
+
+%build
+ build_top=$(pwd)
+
+ cd riscv-fesvr-f683e01542acf60e50774d061bcb396b628e3e67
+
+ ../riscv-fesvr-f683e01542acf60e50774d061bcb396b628e3e67/configure \
+ --prefix=%{_prefix}
+ %{__make} %{?_smp_mflags} all$
+ %{__make} install
+
+
+ cd ../riscv-isa-sim-priv-1.10
+
+ ../riscv-isa-sim-priv-1.10/configure \
+ --prefix=%{_prefix} \
+ --with-fesvr=%{_prefix}
+
+ %{__make} %{?_smp_mflags} all$
+
+ cd ${build_top}
+
+%install
+ build_top=$(pwd)
+
+ rm -rf $SB_BUILD_ROOT
+
+ cd riscv-isa-sim-priv-1.10
+ %{__make} DESTDIR=$SB_BUILD_ROOT PREFIX=%{_prefix} install
+
+ cd ${build_top}
--
2.7.4
___
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Re: RTEMS Tester Lack of Detail on Host
On 28/10/2017 06:18, Joel Sherrill wrote: > > First I am thrilled at the reports going to build@ > I am as well. It is great to see valid test results being published. To everyone, the results are easy to publish so please do so. If you are on a host we do not have results for or you just want to help please send them in. > It occurred to me looking at the reports I was posting that they only > say x86_64-linux-gnu. That is not enough to distinguish distributions or even > tell the difference between something as old as CentOS 6 from a bleeding edge > Fedora or Ubuntu install. > > I know you can do this on a Redhat/Centos/Fedora machine: > > joel@localhost ~]$ uname -a > Linux localhost.localdomain 3.10.0-514.10.2.el7.x86_64 #1 SMP Fri Mar 3 > 00:04:05 > UTC 2017 x86_64 x86_64 x86_64 GNU/Linux > [joel@localhost ~]$ cat /etc/redhat-release > CentOS Linux release 7.3.1611 (Core) > > But /etc/redhat-release is obviously far from universal. > > Is there agreement that more detail on the host would be desirable? If so, > what > do we need to know and how would the script gather it? > I agree we need this. I took a look at this just before pushing the last set of changes and stepped back. There is a `os.uname` for Unix but not Windows and if you look in `sb/windows.py` you will see a number of things are needed to figure out Windows. I need to add a per host type support to get a name and then I think it is after the build status in the subject so it is easy to see which results you are looking at. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
