RE: Undefined reference to `__sync_bool_compare_and_swap_4' for some Leon configurations with gfortran

2017-03-03 Thread Jan.Sommer

> -Original Message-
> From: Sebastian Huber [mailto:sebastian.hu...@embedded-brains.de]
> Sent: Wednesday, March 01, 2017 7:47 AM
> To: Sommer, Jan; devel@rtems.org
> Subject: Re: Undefined reference to `__sync_bool_compare_and_swap_4' for
> some Leon configurations with gfortran
 [...]
> > I updated the __sync-check of libbacktrace and now the undefined references
> are gone and my test program compiles.
> > If there are no objections I would try to push something like the attached
> patch upstream. Do you have any suggestions to which branches?
> > I thought about trunk and the gcc-6 branch or do we need further backports
> for older RTEMS versions?
> 
> I don't think this is the way to go. Firstly, this is certainly not a 
> SPARC-specific
> problem. 
> Secondly, RTEMS is multi-threaded, are you sure you can simply disable
> this feature? 

Well, the patch only disabled the feature in the configuration of libbacktrace.
If I understand autotools correctly, this shouldn't affect other parts of gcc, 
i.e.
if the builtins are used there they should still show up as undefined 
references.

> RTEMS supports C11 atomic operations which includes libatomic
> support. However, we lack the
> __sync_* builtin support on targets without atomic operations in hardware. 
> This
> is the problem we should fix. We should provide these functions either in 
> libgcc
> or in libatomic.
> 

I was afraid you would say that ;-). However, I am not sure I would know 
where/how  to start.

> One open question is why is there a libbacktrace dependency in libgfortran?
> Does this add any value to embedded targets?
> 

I don't think so. That's why I assumed it would be safe to change the 
configuration of libbacktrace
in order to get the fortran program to compile.


> --
> Sebastian Huber, embedded brains GmbH
> 
> Address : Dornierstr. 4, D-82178 Puchheim, Germany
> Phone   : +49 89 189 47 41-16
> Fax : +49 89 189 47 41-09
> E-Mail  : sebastian.hu...@embedded-brains.de
> PGP : Public key available on request.
> 
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.

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Re: Undefined reference to `__sync_bool_compare_and_swap_4' for some Leon configurations with gfortran

2017-03-03 Thread Joel Sherrill
On Tue, Feb 28, 2017 at 8:27 AM,  wrote:

>
>
> > -Ursprüngliche Nachricht-
> > Von: Sebastian Huber [mailto:sebastian.hu...@embedded-brains.de]
> > Gesendet: Montag, 27. Februar 2017 15:25
> > An: Sommer, Jan; devel@rtems.org
> > Betreff: Re: AW: AW: AW: Undefined reference to
> > `__sync_bool_compare_and_swap_4' for some Leon configurations with
> > gfortran
> >
> >
> >
> > On 27/02/17 15:15, jan.som...@dlr.de wrote:
> > >> -Ursprüngliche Nachricht-
> > >> >Von: Sebastian Huber [mailto:sebastian.hu...@embedded-brains.de]
> > >> >Gesendet: Montag, 27. Februar 2017 15:11
> > >> >An: Sommer, Jan;devel@rtems.org
> > >> >Betreff: Re: AW: AW: Undefined reference to
> > >> >`__sync_bool_compare_and_swap_4' for some Leon configurations with
> > >> >gfortran
> > >> >
> > >> >On 27/02/17 15:08,jan.som...@dlr.de  wrote:
> > >>> > >Ok, thanks for the clarification.
> > >>> > >I will try to create a patch for gcc and put rtems CC for the
> discussion.
> > >> >
> > >> >Another option would be to provide the __sync_() stuff also via
> libatomic.
> > >> >
> > > True. I will ask on the gcc mailinglist what they would prefer.
> > >
> >
> > This __sync_() stuff seems to be used in several places in GCC. So,
> changing
> > libbacktrace is probably not enough. We need a general solution for the
> > __sync_() builtins on RTEMS. I don't think GCC can be changed to emit
> > __atomic_() calls for the __sync_() builtins (I would still try to ask).
> The libgcc or
> > libatomic is probably a good place to add them for RTEMS as functions
> > implemented via __atomic_() builtins.
> >
>
> I updated the __sync-check of libbacktrace and now thvee undefined
> references are gone and my test program compiles.
> If there are no objections I would try to push something like the attached
> patch upstream. Do you have any suggestions to which branches?
> I thought about trunk and the gcc-6 branch or do we need further backports
> for older RTEMS versions?
>

>From a gcc perspective, it should be applied to all open branches that this
patch can apply easily to with highest priority on gcc-6-branch and newer.

I am on travel and can't speak to whether this impacts 4.11 tools or not. I
strongly suspect it does though and it would be desirable to fix this on
4.11 and master (e.g. 4.12).

--joel


> Best regards,
>
>Jan
>
> > --
> > Sebastian Huber, embedded brains GmbH
> >
> > Address : Dornierstr. 4, D-82178 Puchheim, Germany
> > Phone   : +49 89 189 47 41-16
> > Fax : +49 89 189 47 41-09
> > E-Mail  : sebastian.hu...@embedded-brains.de
> > PGP : Public key available on request.
> >
> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>
>
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>
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Re: Undefined reference to `__sync_bool_compare_and_swap_4' for some Leon configurations with gfortran

2017-03-03 Thread Sebastian Huber



On 03/03/17 11:13, jan.som...@dlr.de wrote:

-Original Message-
From: Sebastian Huber [mailto:sebastian.hu...@embedded-brains.de]
Sent: Wednesday, March 01, 2017 7:47 AM
To: Sommer, Jan; devel@rtems.org
Subject: Re: Undefined reference to `__sync_bool_compare_and_swap_4' for
some Leon configurations with gfortran

  [...]

I updated the __sync-check of libbacktrace and now the undefined references

are gone and my test program compiles.

If there are no objections I would try to push something like the attached

patch upstream. Do you have any suggestions to which branches?

I thought about trunk and the gcc-6 branch or do we need further backports

for older RTEMS versions?

I don't think this is the way to go. Firstly, this is certainly not a 
SPARC-specific
problem.
Secondly, RTEMS is multi-threaded, are you sure you can simply disable
this feature?

Well, the patch only disabled the feature in the configuration of libbacktrace.
If I understand autotools correctly, this shouldn't affect other parts of gcc, 
i.e.
if the builtins are used there they should still show up as undefined 
references.


Yes, you disable it in libbacktrace. Will libbacktrace work correctly in 
this case?





RTEMS supports C11 atomic operations which includes libatomic
support. However, we lack the
__sync_* builtin support on targets without atomic operations in hardware. This
is the problem we should fix. We should provide these functions either in libgcc
or in libatomic.


I was afraid you would say that ;-). However, I am not sure I would know 
where/how  to start.


We have to figure out where to add it. In libgcc similar to

https://gcc.gnu.org/viewcvs/gcc/trunk/libgcc/config/nios2/linux-atomic.c?revision=243994&view=markup
https://gcc.gnu.org/viewcvs/gcc/trunk/libgcc/sync.c?revision=243994&view=markup

or in libatomic. Adding it to libatomic is more work, however, the 
resulting functions are a bit more efficient.


In libgcc you can for example do this (use a macro to generate the variants)

typedefunsignedintUQItype__attribute__((mode(QI)));

UQItype __sync_fetch_and_add_1(UQItype *ptr, UQItype val)
{
   __atomic_fetch_add(ptr, val, |__ATOMIC_SEQ_CST);|
}




One open question is why is there a libbacktrace dependency in libgfortran?
Does this add any value to embedded targets?


I don't think so. That's why I assumed it would be safe to change the 
configuration of libbacktrace
in order to get the fortran program to compile.


If you don't think its useful for embedded targets, then maybe 
libgfortran should simply not use libbacktrace at all, e.g. for RTEMS 
targets. I guess it is used to generate fancy error messages.


--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.

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[PATCH] 4.12: Do not use a global hash file

2017-03-03 Thread Sebastian Huber
---
 rtems/config/hash.cfg  | 41 --
 rtems/config/rtems-base.bset   |  2 --
 .../config/tools/rtems-gcc-4.8-newlib-2.2.0-2.cfg  | 36 ---
 .../rtems-gcc-4.8.3-newlib-2.5.0.20170228-1.cfg|  7 ++--
 .../config/tools/rtems-gcc-4.9-newlib-2.2.0-2.cfg  | 36 ---
 .../rtems-gcc-4.9.2-newlib-2.5.0.20170228-1.cfg|  5 ++-
 .../rtems-gcc-4.9.3-newlib-2.5.0.20170228-1.cfg|  5 ++-
 .../rtems-gcc-6.3.0-newlib-2.5.0.20170228-1.cfg|  6 
 8 files changed, 19 insertions(+), 119 deletions(-)
 delete mode 100644 rtems/config/hash.cfg
 delete mode 100644 rtems/config/tools/rtems-gcc-4.8-newlib-2.2.0-2.cfg
 delete mode 100644 rtems/config/tools/rtems-gcc-4.9-newlib-2.2.0-2.cfg

diff --git a/rtems/config/hash.cfg b/rtems/config/hash.cfg
deleted file mode 100644
index 63f5d8b..000
--- a/rtems/config/hash.cfg
+++ /dev/null
@@ -1,41 +0,0 @@
-%hash sha512 b6c483b4a98424731e6e44558cb4b9863751fb1b.zip 
80fe9603851b5dcad048b488d049341af3abdcb564481efac4a85d6d3aeb6be9c0967e26a62752ab38df7ce9838e91c25c4808459587e9c5472cda07f27c9341
-%hash sha512 binutils-2.20.1-rtems4.10-20151123.diff 
ce24ba3e56e7552739c167950a488d80557fdf562dcb527b2e5972c2d18da42a8fd1a47197e54aff0df630d105eb40702f09cad330c193cb8f9309b43b1fb1bc
-%hash sha512 binutils-2.26-rtems-aarch64-x86_64.patch 
2236cc22dda60d5c18a2ab5abc0f44bf487794f7c0899382bf49233e789e1fb34ce28b0f7a85069642f7cc06bd34d7634a441a8d92bf890de57bb89cc398349f
-%hash sha512 f05996c7c42e6b2781946acbab153a481ce3fd0b.zip 
eeb44951ff9e23ecaad15607a1cc40699464b1707302cd4105363b862aab19382929917deb4abebedb4637e5a1c30b7c941b1d7d372824452203bda1ed8e5c7d
-%hash sha512 f7051762470c42ce7f01baa7edeb113d51c7dd72.zip 
260d1678007f9a33e438c0fe7c0400750c1524ab5c118689059480e79d3e1ad62f72d9db273dc188f5113d0cadfb81cb75b1b1edc689dd7391fd008430ac797d
-%hash sha512 gcc-4.8.3-or1k-rtems-29072014.diff 
89d622f93e3759d2bec062a7a2c83c29fd3630539db18680f1307ea84d3f64a79f83c30e45ccfc2e7637589ad2a679d61a06c9be041388e910fc05421fc749cc
-%hash sha512 gcc-4.9.3-or1k.patch 
d63122c3ab71e867aba323e88e1ec2e937b0fca0e26db6ac2a56550c29a90933506735553079f986d5dd54c1acff5533ac087da8f69acad4f3c1e4d5be73d041
-%hash sha512 gcc-6.0.1-RC-20160415.tar.bz2 
5c03c1a74cc762c2421cd9b5818deca6e6191a19ebe07eaa407e152cd1d4341eed5e15ed9a35d8e372891574d492fb67d0885ce302dcf5d71c89021b0f420c40
-%hash sha512 gcc-6-20160117.tar.bz2 
61d05ad097c640004fad4805b6c407282825d5fcdad11413c47de7178d8f7f2488e2b5f3e354620bca5506b7b7abd464d65db0aea78f89cd63a253e88dd217eb
-%hash sha512 gcc-6-20160124.tar.bz2 
ab90e21b13ead10c58bd2ce17abf4ccffc81355f366c99e6bfce883d288198704d3510d447d48217d4a3e233120da20fc6335dce102ba2dc4785b28a745881da
-%hash sha512 gcc-6-20160228.tar.bz2 
cc768440bf6b89ad58fb64cf2fd93898929f63cd212cdb54443543135be9e713c409f9e2740531376510cad59172b197cad769df14345834bc1cd17b33976a57
-%hash sha512 gcc-6-20160327.tar.bz2 
0213c44e457585d15ad13fc3a7c665ba78faba0d1685e71cbf0cf32e44523394589ac60c7aea567e29c6f5e18159b446b1b0a7d39e330021c40efd8077aa5ad7
-%hash sha512 gcc-6-20160526.tar.bz2 
8ad457b463432b2cc7fc4c1b7967c2a01909f5fd40d2e7a1f38f8b197859ab2c823b96dfaf36add4177f6f932c7e702cc4ac9201b88375404235fc1a03ef778d
-%hash sha512 gcc-6-20160609.tar.bz2 
f9ea9034c0456d350e418a7263cdd02596fdd553f40e9741907436f0df7dbbc5b025ea421c2aece2769ade8e356985c104a37fe6c1bdc51eb61d52257206e0f1
-%hash sha512 gcc-6-20161110.tar.bz2 
b75f73950a409658b45a6dc2fcbfe18b38aba53fdd55f509e17637fb0d50464b6636394297fd33a0843684f7ef3eefefd1dcf8f257694ab4f15339ae37c8437e
-%hash sha512 gcc-6.3.0.tar.bz2 
234dd9b1bdc9a9c6e352216a7ef4ccadc6c07f156006a59759c5e0e6a69f0abcdc14630eff11e3826dd6ba5933a8faa43043f3d1d62df6bd5ab1e82862f9bf78
-%hash sha512 gcc-core-4.3.2-rtems4.9-20090825.diff 
d326372a756a7289404031eb16dcc51c15259342ea3f8697f23cfa754ee38305d5e6aaeef56c83f11cdd28c85711c430d894a87303ad932b024a17fa4aaa4f63
-%hash sha512 gcc-core-4.3.2.tar.bz2 
7fa7cfd57b3cb37990f41132037666d511a480df28d6d5a0620520501488abad89c7843067188bbe23f0c4d3eb5d113537a6a9375135596b58b3d7a848dc8a39
-%hash sha512 gcc-core-4.4.7-rtems4.10-20151123.diff 
70e5868157fd02f011e66f8fa9dcdc3341deee47ff105d9102a501b6e346c0e635c70600ff0646ea5f28faf8152e806367cf8acb60ff35ac61348af20796c4e4
-%hash sha512 gdb-6.8a.tar.bz2 
5114fe14ab25dc085590acff3a6feb75eb93347e501c634548308c4f51b31416ea23b8e612dfc54da466d3e7471e210d8f7a12ff6c050e9e89920884e5a64008
-%hash sha512 gdb-6.8-rtems4.9-2009.diff 
2e6eb2bdeac4bba7c2fcaf701399148fc5de82dfa81e02f5a20654afe5aad77d6fd0edbc31965107f2fe9a43738938d79a313836267ad69dc8509fcbf691
-%hash sha512 gdb-7.11-or1k.patch 
e0c0171b62650e1dcc58a846322d3f2899c0b2196eec7ba1b600a012931e125a5dbb21e19bde79b0786781feca6b19054b307ffd57010c4d5c63c408d2f3144a
-%hash sha512 gdb-7.3.1-rtems4.10-20151123.diff 
2e03f9b01626a1f18c025eecb70350bdd7a29574970fb80edc985d0c5731325a68e42d55fb5d3e23440ea6e384e093269cca79a95d5a4e44a678439977da313f
-%hash sha512 gdb-7.7-or1k-rtems.diff 
a334503fa1159fe

Re: [PATCH] 4.12: Do not use a global hash file

2017-03-03 Thread Gedare Bloom
On Fri, Mar 3, 2017 at 6:23 AM, Sebastian Huber
 wrote:
> ---
>  rtems/config/hash.cfg  | 41 
> --
>  rtems/config/rtems-base.bset   |  2 --
>  .../config/tools/rtems-gcc-4.8-newlib-2.2.0-2.cfg  | 36 ---
>  .../rtems-gcc-4.8.3-newlib-2.5.0.20170228-1.cfg|  7 ++--
>  .../config/tools/rtems-gcc-4.9-newlib-2.2.0-2.cfg  | 36 ---
>  .../rtems-gcc-4.9.2-newlib-2.5.0.20170228-1.cfg|  5 ++-
>  .../rtems-gcc-4.9.3-newlib-2.5.0.20170228-1.cfg|  5 ++-
>  .../rtems-gcc-6.3.0-newlib-2.5.0.20170228-1.cfg|  6 
>  8 files changed, 19 insertions(+), 119 deletions(-)
>  delete mode 100644 rtems/config/hash.cfg
>  delete mode 100644 rtems/config/tools/rtems-gcc-4.8-newlib-2.2.0-2.cfg
>  delete mode 100644 rtems/config/tools/rtems-gcc-4.9-newlib-2.2.0-2.cfg
>
> diff --git a/rtems/config/hash.cfg b/rtems/config/hash.cfg
> deleted file mode 100644
> index 63f5d8b..000
> --- a/rtems/config/hash.cfg
> +++ /dev/null
> @@ -1,41 +0,0 @@
> -%hash sha512 b6c483b4a98424731e6e44558cb4b9863751fb1b.zip 
> 80fe9603851b5dcad048b488d049341af3abdcb564481efac4a85d6d3aeb6be9c0967e26a62752ab38df7ce9838e91c25c4808459587e9c5472cda07f27c9341
> -%hash sha512 binutils-2.20.1-rtems4.10-20151123.diff 
> ce24ba3e56e7552739c167950a488d80557fdf562dcb527b2e5972c2d18da42a8fd1a47197e54aff0df630d105eb40702f09cad330c193cb8f9309b43b1fb1bc
> -%hash sha512 binutils-2.26-rtems-aarch64-x86_64.patch 
> 2236cc22dda60d5c18a2ab5abc0f44bf487794f7c0899382bf49233e789e1fb34ce28b0f7a85069642f7cc06bd34d7634a441a8d92bf890de57bb89cc398349f
> -%hash sha512 f05996c7c42e6b2781946acbab153a481ce3fd0b.zip 
> eeb44951ff9e23ecaad15607a1cc40699464b1707302cd4105363b862aab19382929917deb4abebedb4637e5a1c30b7c941b1d7d372824452203bda1ed8e5c7d
> -%hash sha512 f7051762470c42ce7f01baa7edeb113d51c7dd72.zip 
> 260d1678007f9a33e438c0fe7c0400750c1524ab5c118689059480e79d3e1ad62f72d9db273dc188f5113d0cadfb81cb75b1b1edc689dd7391fd008430ac797d
> -%hash sha512 gcc-4.8.3-or1k-rtems-29072014.diff 
> 89d622f93e3759d2bec062a7a2c83c29fd3630539db18680f1307ea84d3f64a79f83c30e45ccfc2e7637589ad2a679d61a06c9be041388e910fc05421fc749cc
> -%hash sha512 gcc-4.9.3-or1k.patch 
> d63122c3ab71e867aba323e88e1ec2e937b0fca0e26db6ac2a56550c29a90933506735553079f986d5dd54c1acff5533ac087da8f69acad4f3c1e4d5be73d041
> -%hash sha512 gcc-6.0.1-RC-20160415.tar.bz2 
> 5c03c1a74cc762c2421cd9b5818deca6e6191a19ebe07eaa407e152cd1d4341eed5e15ed9a35d8e372891574d492fb67d0885ce302dcf5d71c89021b0f420c40
> -%hash sha512 gcc-6-20160117.tar.bz2 
> 61d05ad097c640004fad4805b6c407282825d5fcdad11413c47de7178d8f7f2488e2b5f3e354620bca5506b7b7abd464d65db0aea78f89cd63a253e88dd217eb
> -%hash sha512 gcc-6-20160124.tar.bz2 
> ab90e21b13ead10c58bd2ce17abf4ccffc81355f366c99e6bfce883d288198704d3510d447d48217d4a3e233120da20fc6335dce102ba2dc4785b28a745881da
> -%hash sha512 gcc-6-20160228.tar.bz2 
> cc768440bf6b89ad58fb64cf2fd93898929f63cd212cdb54443543135be9e713c409f9e2740531376510cad59172b197cad769df14345834bc1cd17b33976a57
> -%hash sha512 gcc-6-20160327.tar.bz2 
> 0213c44e457585d15ad13fc3a7c665ba78faba0d1685e71cbf0cf32e44523394589ac60c7aea567e29c6f5e18159b446b1b0a7d39e330021c40efd8077aa5ad7
> -%hash sha512 gcc-6-20160526.tar.bz2 
> 8ad457b463432b2cc7fc4c1b7967c2a01909f5fd40d2e7a1f38f8b197859ab2c823b96dfaf36add4177f6f932c7e702cc4ac9201b88375404235fc1a03ef778d
> -%hash sha512 gcc-6-20160609.tar.bz2 
> f9ea9034c0456d350e418a7263cdd02596fdd553f40e9741907436f0df7dbbc5b025ea421c2aece2769ade8e356985c104a37fe6c1bdc51eb61d52257206e0f1
> -%hash sha512 gcc-6-20161110.tar.bz2 
> b75f73950a409658b45a6dc2fcbfe18b38aba53fdd55f509e17637fb0d50464b6636394297fd33a0843684f7ef3eefefd1dcf8f257694ab4f15339ae37c8437e
> -%hash sha512 gcc-6.3.0.tar.bz2 
> 234dd9b1bdc9a9c6e352216a7ef4ccadc6c07f156006a59759c5e0e6a69f0abcdc14630eff11e3826dd6ba5933a8faa43043f3d1d62df6bd5ab1e82862f9bf78
> -%hash sha512 gcc-core-4.3.2-rtems4.9-20090825.diff 
> d326372a756a7289404031eb16dcc51c15259342ea3f8697f23cfa754ee38305d5e6aaeef56c83f11cdd28c85711c430d894a87303ad932b024a17fa4aaa4f63
> -%hash sha512 gcc-core-4.3.2.tar.bz2 
> 7fa7cfd57b3cb37990f41132037666d511a480df28d6d5a0620520501488abad89c7843067188bbe23f0c4d3eb5d113537a6a9375135596b58b3d7a848dc8a39
> -%hash sha512 gcc-core-4.4.7-rtems4.10-20151123.diff 
> 70e5868157fd02f011e66f8fa9dcdc3341deee47ff105d9102a501b6e346c0e635c70600ff0646ea5f28faf8152e806367cf8acb60ff35ac61348af20796c4e4
> -%hash sha512 gdb-6.8a.tar.bz2 
> 5114fe14ab25dc085590acff3a6feb75eb93347e501c634548308c4f51b31416ea23b8e612dfc54da466d3e7471e210d8f7a12ff6c050e9e89920884e5a64008
> -%hash sha512 gdb-6.8-rtems4.9-2009.diff 
> 2e6eb2bdeac4bba7c2fcaf701399148fc5de82dfa81e02f5a20654afe5aad77d6fd0edbc31965107f2fe9a43738938d79a313836267ad69dc8509fcbf691
> -%hash sha512 gdb-7.11-or1k.patch 
> e0c0171b62650e1dcc58a846322d3f2899c0b2196eec7ba1b600a012931e125a5dbb21e19bde79b0786781feca6b19054b307ffd57010c4d5c63c408d2f3144a
> -%hash sha512 gdb-7.3.1-rtems4.10-20151123.d

[PATCH 01/44] leon, grspw: rxPktSize must set DMA RX max length

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw.c
index fd21303..661ec6c 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw.c
@@ -553,9 +553,11 @@ int grspw_device_init(GRSPW_DEV *pDev)
pDev->txhbufsize = value->i;
 
value = drvmgr_dev_key_get(pDev->dev, "rxPktSize", DRVMGR_KT_INT);
-   if ( value )
+   if ( value ) {
pDev->rxbufsize = value->i;
-   
+   pDev->config.rxmaxlen = pDev->rxbufsize;
+   }
+
value = drvmgr_dev_key_get(pDev->dev, "rxDmaArea", DRVMGR_KT_INT);
if ( value )
pDev->rx_dma_area = value->i;
-- 
2.7.4

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[PATCH 02/44] libpci: code cleanup

2017-03-03 Thread Daniel Hellstrom
---
 cpukit/libpci/pci_access.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/cpukit/libpci/pci_access.c b/cpukit/libpci/pci_access.c
index 191b06a..11e48c1 100644
--- a/cpukit/libpci/pci_access.c
+++ b/cpukit/libpci/pci_access.c
@@ -11,9 +11,7 @@
 #include 
 
 /* Access Routines valid after a PCI-Access-Driver has registered */
-struct pci_access_drv pci_access_ops = {
-   .cfg = {.read8 = 0},
-};
+struct pci_access_drv pci_access_ops;
 
 /* Read a 8-bit register over configuration space */
 int pci_cfg_r8(pci_dev_t dev, int ofs, uint8_t *data)
-- 
2.7.4

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[PATCH 05/44] leon, grspw_pkt: Fixed parameter check in grspw_dma_open()

2017-03-03 Thread Daniel Hellstrom
From: Martin Aberg 

---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 037b63c..96348ae 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -1599,7 +1599,7 @@ void *grspw_dma_open(void *d, int chan_no)
struct grspw_dma_priv *dma;
int size;
 
-   if ((chan_no < 0) && (priv->hwsup.ndma_chans <= chan_no))
+   if ((chan_no < 0) || (priv->hwsup.ndma_chans <= chan_no))
return NULL;
 
dma = &priv->dma[chan_no];
-- 
2.7.4

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[PATCH 06/44] leon, grspw_pkt: Fixed txpkt flag for link error

2017-03-03 Thread Daniel Hellstrom
From: Martin Aberg 

There was a mixup between the transmit descriptor Link error (LE) bit and
Interrupt enable (IE) bit. TXPKT_FLAG_LINKERR now correctly indicates the link
error condition.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 4b3d40d..c014b37 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -59,16 +59,16 @@ extern int grspw_work_task_priority;
 #define TXPKT_FLAG_NOCRC_LENe 0x000e
 #define TXPKT_FLAG_NOCRC_LENf 0x000f
 
-/* Marks if packet was transmitted or not */
-#define TXPKT_FLAG_TX 0x8000
-
 #define TXPKT_FLAG_INPUT_MASK (TXPKT_FLAG_NOCRC_MASK | TXPKT_FLAG_IE | \
TXPKT_FLAG_HCRC | TXPKT_FLAG_DCRC)
 
+/* Marks if packet was transmitted or not */
+#define TXPKT_FLAG_TX 0x4000
+
 /* Link Error */
-#define TXPKT_FLAG_LINKERR 0x4000
+#define TXPKT_FLAG_LINKERR 0x8000
 
-#define TXPKT_FLAG_OUTPUT_MASK (TXPKT_FLAG_LINKERR)
+#define TXPKT_FLAG_OUTPUT_MASK (TXPKT_FLAG_TX | TXPKT_FLAG_LINKERR)
 
 /*** RX Packet Flags ***/
 
-- 
2.7.4

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[PATCH 10/44] leon, grspw_pkt: code style clean-ups

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 6d2cefb..e23410a 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -545,6 +545,7 @@ void *grspw_open(int dev_no)
 * channels. Max-size descriptor area is allocated (or user assigned):
 *  - 128 RX descriptors per DMA Channel
 *  - 64 TX descriptors per DMA Channel
+* Specified address must be in CPU RAM.
 */
bdtabsize = 2 * BDTAB_SIZE * priv->hwsup.ndma_chans;
value = drvmgr_dev_key_get(priv->dev, "bdDmaArea", DRVMGR_KT_INT);
@@ -827,14 +828,14 @@ void grspw_tc_isr(void *d, void (*tcisr)(void *data, int 
tc), void *data)
  */
 void grspw_tc_time(void *d, int *time)
 {
-struct grspw_priv *priv = d;
-struct grspw_regs *regs = priv->regs;
+   struct grspw_priv *priv = d;
+   struct grspw_regs *regs = priv->regs;
 
-if (time == NULL)
-return;
-if (*time != -1)
-REG_WRITE(®s->time, *time & (GRSPW_TIME_TCNT | 
GRSPW_TIME_CTRL));
-*time = REG_READ(®s->time) & (GRSPW_TIME_TCNT | GRSPW_TIME_CTRL);
+   if (time == NULL)
+   return;
+   if (*time != -1)
+   REG_WRITE(®s->time, *time & (GRSPW_TIME_TCNT | 
GRSPW_TIME_CTRL));
+   *time = REG_READ(®s->time) & (GRSPW_TIME_TCNT | GRSPW_TIME_CTRL);
 }
 
 /* Generate Tick-In for the given Interrupt-code and check for generation
@@ -1832,7 +1833,7 @@ int grspw_dma_tx_reclaim(void *c, int opts, struct 
grspw_list *pkts, int *count)
}
 
/* 3. Schedule as many packets as possible (SEND->SCHED) */
-   if ((started > 0 ) && ((opts & 2) == 0))
+   if ((started > 0) && ((opts & 2) == 0))
grspw_tx_schedule_send(dma);
 
/* Unlock DMA channel */
-- 
2.7.4

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[PATCH 08/44] leon: Fix ambapp_bus OCCAN device registeration order

2017-03-03 Thread Daniel Hellstrom
NOTE that this will change the association of /dev/occanN
with OCCAN[N] device to the same order as in hardware. This means
that if you have been useing /dev/occan0 before you have to use
/dev/occan1 on a dual OCCAN device system (this affects GR712RC).
---
 c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c | 28 +++
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c 
b/c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c
index 922c43b..02aeda0 100644
--- a/c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c
+++ b/c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c
@@ -453,7 +453,11 @@ void ambapp_dev_info(
 }
 #endif
 
-/* Fix device in last stage */
+/* Fix device in last stage and/or register additional devices.
+ * Function returns:
+ *  0  Register device as normal
+ *  1  Fixup function handles registration
+ */
 static int ambapp_dev_fixup(struct drvmgr_dev *dev, struct amba_dev_info *pnp)
 {
/* OCCAN speciality:
@@ -464,12 +468,14 @@ static int ambapp_dev_fixup(struct drvmgr_dev *dev, 
struct amba_dev_info *pnp)
 *
 *  Now, lets detect sub cores.
 */
-   if ( (pnp->info.device == GAISLER_CANAHB) && (pnp->info.vendor == 
VENDOR_GAISLER) ) {
-   struct drvmgr_dev *newdev;
+   if ( (pnp->info.device == GAISLER_CANAHB) &&
+(pnp->info.vendor == VENDOR_GAISLER) ) {
+   struct drvmgr_dev *newdev, *devs_to_register[8];
struct amba_dev_info *pnpinfo;
int subcores;
int core;
 
+   devs_to_register[0] = dev;
subcores = (pnp->info.ahb_slv->ver & 0x7) + 1;
for(core = 1; core < subcores; core++) {
drvmgr_alloc_dev(&newdev, sizeof(*pnpinfo));
@@ -480,10 +486,14 @@ static int ambapp_dev_fixup(struct drvmgr_dev *dev, 
struct amba_dev_info *pnp)
pnpinfo->info.irq += core;
newdev->businfo = (void *)pnpinfo;
 
-   /* Register device */
-   drvmgr_dev_register(newdev);
+   devs_to_register[core] = newdev;
}
-   } else if ( (pnp->info.device == GAISLER_GPIO) && (pnp->info.vendor == 
VENDOR_GAISLER) ) {
+   /* Register all CAN devices */
+   for(core = 0; core < subcores; core++)
+   drvmgr_dev_register(devs_to_register[core]);
+   return 1;
+   } else if ( (pnp->info.device == GAISLER_GPIO) &&
+   (pnp->info.vendor == VENDOR_GAISLER) ) {
/* PIO[N] is connected to IRQ[N]. */
pnp->info.irq = 0;
}
@@ -583,10 +593,8 @@ static void ambapp_core_register(
/* Connect device with PnP information */
newdev->businfo = (void *)pnpinfo;
 
-   ambapp_dev_fixup(newdev, pnpinfo);
-
-   /* Register New Device */
-   drvmgr_dev_register(newdev);
+   if ( ambapp_dev_fixup(newdev, pnpinfo) == 0 )
+   drvmgr_dev_register(newdev); /* Register New Device */
 }
 
 /* Register one AMBA device */
-- 
2.7.4

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[PATCH 13/44] leon, grspw_pkt: Manual handling of link status events

2017-03-03 Thread Daniel Hellstrom
Added functionality for manual handling of link status events,
configurable via grspw_link_ctrl.

Added statistics counter for disconnect error.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 12 +++-
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 17 +++--
 2 files changed, 26 insertions(+), 3 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index ea0ae9a..17bbee8 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -184,6 +184,7 @@ struct grspw_core_stats {
int err_eeop;
int err_addr;
int err_parity;
+   int err_disconnect;
int err_escape;
int err_wsync; /* only in GRSPW1 */
 };
@@ -216,6 +217,15 @@ struct grspw_core_stats {
  * channels.
  */
 
+#define LINKSTS_CE 0x002   /* Credit error */
+#define LINKSTS_ER 0x004   /* Escape error */
+#define LINKSTS_DE 0x008   /* Disconnect error */
+#define LINKSTS_PE 0x010   /* Parity error */
+#define LINKSTS_WE 0x040   /* Write synchonization error (GRSPW1 
only) */
+#define LINKSTS_IA 0x080   /* Invalid address */
+#define LINKSTS_EE 0x100   /* Early EOP/EEP */
+#define LINKSTS_MASK   0x1de
+
 
 /* grspw_tc_ctrl() options */
 #define TCOPTS_EN_RXIRQ0x0001  /* Tick-Out IRQ */
@@ -325,7 +335,7 @@ extern spw_link_state_t grspw_link_state(void *d);
  *  bits 7..0  : Clock Div RUN (only run-state)
  *  bits 15..8 : Clock Div During Startup (all link states except run-state)
  */
-extern void grspw_link_ctrl(void *d, int *options, int *clkdiv);
+extern void grspw_link_ctrl(void *d, int *options, int *stscfg, int *clkdiv);
 /* Read the current value of the status register */
 extern unsigned int grspw_link_status(void *d);
 /* Clear bits in the status register */
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 1827fbd..22fcda3 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -472,6 +472,9 @@ struct grspw_priv {
/* Bit mask representing events which shall cause link disable. */
unsigned int dis_link_on_err;
 
+   /* Bit mask for link status bits to clear by ISR */
+   unsigned int stscfg;
+
/* "Core Global" Statistics gathered, not dependent on DMA channel */
struct grspw_core_stats stats;
 };
@@ -538,6 +541,7 @@ void *grspw_open(int dev_no)
priv->tcisr_arg = NULL;
priv->icisr = NULL;
priv->icisr_arg = NULL;
+   priv->stscfg = LINKSTS_MASK;
 
grspw_stats_clr(priv);
 
@@ -745,7 +749,7 @@ static inline int grspw_is_irqsource_set(unsigned int ctrl, 
unsigned int icctrl)
 
 
 /* options and clkdiv [in/out]: set to -1 to only read current config */
-void grspw_link_ctrl(void *d, int *options, int *clkdiv)
+void grspw_link_ctrl(void *d, int *options, int *stscfg, int *clkdiv)
 {
struct grspw_priv *priv = d;
struct grspw_regs *regs = priv->regs;
@@ -782,6 +786,12 @@ void grspw_link_ctrl(void *d, int *options, int *clkdiv)
SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
*options = (ctrl & GRSPW_LINK_CFG) | priv->dis_link_on_err;
}
+   if (stscfg) {
+   if (*stscfg != -1) {
+   priv->stscfg = *stscfg & LINKSTS_MASK;
+   }
+   *stscfg = priv->stscfg;
+   }
 }
 
 /* Generate Tick-In (increment Time Counter, Send Time Code) */
@@ -2494,7 +2504,7 @@ STATIC void grspw_isr(void *data)
 
/* Get Status from Hardware */
stat = REG_READ(&priv->regs->status);
-   stat_clrmsk = stat & (GRSPW_STS_TO | GRSPW_STAT_ERROR);
+   stat_clrmsk = stat & (GRSPW_STS_TO | GRSPW_STAT_ERROR) & priv->stscfg;
 
/* Make sure to put the timecode handling first in order to get the
 * smallest possible interrupt latency
@@ -2550,6 +2560,9 @@ STATIC void grspw_isr(void *data)
if (stat & GRSPW_STS_PE)
priv->stats.err_parity++;
 
+   if (stat & GRSPW_STS_DE)
+   priv->stats.err_disconnect++;
+
if (stat & GRSPW_STS_ER)
priv->stats.err_escape++;
 
-- 
2.7.4

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[PATCH 03/44] leon, gr1553b: comment cleanup

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/include/gr1553b.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/gr1553b.h 
b/c/src/lib/libbsp/sparc/shared/include/gr1553b.h
index 02753f9..11f0980 100644
--- a/c/src/lib/libbsp/sparc/shared/include/gr1553b.h
+++ b/c/src/lib/libbsp/sparc/shared/include/gr1553b.h
@@ -51,8 +51,8 @@ struct gr1553b_regs {
 
int unused2[(0x68-0x60)/4]; /* Padding */
 
-   volatile uint32_t bc_slot;  /* 0x48 BC Current BD pointer */
-   volatile uint32_t bc_aslot; /* 0x4c BC Current async BD pointer */
+   volatile uint32_t bc_slot;  /* 0x68 BC Current BD pointer */
+   volatile uint32_t bc_aslot; /* 0x6c BC Current async BD pointer */
 
int unused3[(0x80-0x70)/4]; /* Padding */
 
-- 
2.7.4

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[PATCH 07/44] leon, grspw_pkt: Preserve DMA address enable at start.

2017-03-03 Thread Daniel Hellstrom
From: Martin Aberg 

The EN bit (enable separate node address for this channel) is preserved when
grspw_dma_start is called. This preserves any previous address configuration.
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 96348ae..6d2cefb 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -2209,6 +2209,7 @@ int grspw_dma_start(void *c)
struct grspw_dma_priv *dma = c;
struct grspw_dma_regs *dregs = dma->regs;
unsigned int ctrl;
+   IRQFLAGS_TYPE irqflags;
 
if (dma->started)
return 0;
@@ -2264,7 +2265,10 @@ int grspw_dma_start(void *c)
ctrl |= GRSPW_DMACTRL_RI;
if (dma->cfg.tx_irq_en_cnt != 0)
ctrl |= GRSPW_DMACTRL_TI;
+   SPIN_LOCK_IRQ(&dma->core->devlock, irqflags);
+   ctrl |= REG_READ(&dma->regs->ctrl) & GRSPW_DMACTRL_EN;
REG_WRITE(&dregs->ctrl, ctrl);
+   SPIN_UNLOCK_IRQ(&dma->core->devlock, irqflags);
 
dma->started = 1; /* open up other DMA interfaces */
 
-- 
2.7.4

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[PATCH 09/44] leon, gptimer: start/reset must take RS and IP into account

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/timer/gptimer.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/timer/gptimer.c 
b/c/src/lib/libbsp/sparc/shared/timer/gptimer.c
index 0553f5d..f8c6da2 100644
--- a/c/src/lib/libbsp/sparc/shared/timer/gptimer.c
+++ b/c/src/lib/libbsp/sparc/shared/timer/gptimer.c
@@ -377,7 +377,8 @@ static void gptimer_tlib_reset(struct tlib_dev *hand)
 {
struct gptimer_timer *timer = (struct gptimer_timer *)hand;
 
-   timer->tregs->ctrl = 0;
+   timer->tregs->ctrl = (timer->tregs->ctrl & timer->irq_ack_mask) &
+GPTIMER_CTRL_IP;
timer->tregs->reload = 0x;
timer->tregs->ctrl = GPTIMER_CTRL_LD;
 }
@@ -464,7 +465,8 @@ static void gptimer_tlib_start(struct tlib_dev *hand, int 
once)
ctrl = GPTIMER_CTRL_LD | GPTIMER_CTRL_EN;
if ( once == 0 )
ctrl |= GPTIMER_CTRL_RS; /* Restart Timer */
-   timer->tregs->ctrl |= ctrl;
+   timer->tregs->ctrl = ctrl | (timer->tregs->ctrl & timer->irq_ack_mask &
+~GPTIMER_CTRL_RS);
 }
 
 static void gptimer_tlib_stop(struct tlib_dev *hand)
-- 
2.7.4

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[PATCH 15/44] leon, grspw_pkt: fixed and improved RX/TX wait

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h |  6 +-
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 99 +--
 2 files changed, 61 insertions(+), 44 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 17bbee8..0bc749f 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -487,7 +487,7 @@ extern void grspw_dma_tx_count(void *c, int *send, int 
*sched, int *sent);
 
 #define GRSPW_OP_AND 0
 #define GRSPW_OP_OR 1
-/* Block until ready_cnt or fewer packets are Queued in "Send and Scheduled" Q,
+/* Block until send_cnt or fewer packets are Queued in "Send and Scheduled" Q,
  * op (AND or OR), sent_cnt or more packet "have been sent" (Sent Q) condition
  * is met.
  * If a link error occurs and the Stop on Link error is defined, this function
@@ -504,6 +504,7 @@ extern void grspw_dma_tx_count(void *c, int *send, int 
*sched, int *sent);
  *  0Returing to caller because specified conditions are now fullfilled
  *  1DMA stopped
  *  2Timeout, conditions are not met
+ *  3Another task is already waiting. Service is Busy.
  */
 extern int grspw_dma_tx_wait(void *c, int send_cnt, int op, int sent_cnt, int 
timeout);
 
@@ -565,7 +566,7 @@ extern void grspw_dma_rx_count(void *c, int *ready, int 
*sched, int *recv);
  * the other conditions. If timeout is zero, the function will wait forever
  * until the condition is satisfied.
  *
- * NOTE: if IRQ of TX descriptors are not enabled conditions are never
+ * NOTE: if IRQ of RX descriptors are not enabled conditions are never
  *   checked, this may hang infinitely unless a timeout has been specified
  *
  * Return Code
@@ -573,6 +574,7 @@ extern void grspw_dma_rx_count(void *c, int *ready, int 
*sched, int *recv);
  *  0Returing to caller because specified conditions are now fullfilled
  *  1DMA stopped
  *  2Timeout, conditions are not met
+ *  3Another task is already waiting. Service is Busy.
  */
 extern int grspw_dma_rx_wait(void *c, int recv_cnt, int op, int ready_cnt, int 
timeout);
 
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index ce4012b..359b1ac 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -1926,7 +1926,7 @@ static inline int grspw_tx_wait_eval(struct 
grspw_dma_priv *dma)
 int grspw_dma_tx_wait(void *c, int send_cnt, int op, int sent_cnt, int timeout)
 {
struct grspw_dma_priv *dma = c;
-   int ret, rc;
+   int ret, rc, initialized = 0;
 
if (timeout == 0)
timeout = RTEMS_NO_TIMEOUT;
@@ -1941,15 +1941,15 @@ check_condition:
/* Check so that no other thread is waiting, this driver only supports
 * one waiter at a time.
 */
-   if (dma->tx_wait.waiting) {
-   ret = -1;
-   goto out;
+   if (initialized == 0 && dma->tx_wait.waiting) {
+   ret = 3;
+   goto out_release;
}
 
-   /* Stop if link error or similar, abort */
+   /* Stop if link error or similar (DMA stopped), abort */
if (dma->started == 0) {
ret = 1;
-   goto out;
+   goto out_release;
}
 
/* Set up Condition */
@@ -1959,6 +1959,7 @@ check_condition:
 
if (grspw_tx_wait_eval(dma) == 0) {
/* Prepare Wait */
+   initialized = 1;
dma->tx_wait.waiting = 1;
 
/* Release DMA channel lock */
@@ -1970,27 +1971,34 @@ check_condition:
rc = rtems_semaphore_obtain(dma->tx_wait.sem_wait, RTEMS_WAIT,
timeout);
if (rc == RTEMS_TIMEOUT) {
-   dma->tx_wait.waiting = 0;
-   return 2;
+   ret = 2;
+   goto out;
} else if (rc == RTEMS_UNSATISFIED ||
   rc == RTEMS_OBJECT_WAS_DELETED) {
-   dma->tx_wait.waiting = 0;
-   return 1; /* sem was flushed/deleted, means DMA stop */
-   } else if (rc != RTEMS_SUCCESSFUL)
-   return -1;
+   ret = 1; /* sem was flushed/deleted, means DMA stop */
+   goto out;
+   } else if (rc != RTEMS_SUCCESSFUL) {
+   /* Unknown Error */
+   ret = -1;
+   goto out;
+   } else if (dma->started == 0) {
+   ret = 1;
+   goto out;
+   }
 
/* Check condition once more */
goto check_condition;
-   } else {
-   /* No Wait needed */
-   dma->tx_wait.waiting = 0;
}
 
ret = 0;
-out

[PATCH 00/44] LEON improvements, initial batch

2017-03-03 Thread Daniel Hellstrom
First batch of patches for LEON. In short it contains:
 * older fixes present in RCC-1.2 now rebased to RTEMS master
 * a fix needed for the driver manager build
 * various new fixes for PCI on GR740
 * New development and functionality to perpare the SpaceWire packet
   driver for proper SMP support and also the SMP support itself.

Best Regards,
Daniel Hellstrom


 c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c |  52 +-
 c/src/lib/libbsp/sparc/shared/include/gr1553b.h   |  12 +-
 c/src/lib/libbsp/sparc/shared/include/grlib.h |  43 +-
 c/src/lib/libbsp/sparc/shared/include/grpci2.h|   4 +
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 218 +-
 c/src/lib/libbsp/sparc/shared/pci/gr_leon4_n2x.c  |   2 +-
 c/src/lib/libbsp/sparc/shared/pci/grpci2.c|  50 +-
 c/src/lib/libbsp/sparc/shared/spw/grspw.c |   6 +-
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 912 --
 c/src/lib/libbsp/sparc/shared/timer/gptimer.c |   6 +-
 c/src/lib/libbsp/sparc/shared/tmtc/grtm.c |   3 +-
 cpukit/libdrvmgr/drvmgr.c |   9 +
 cpukit/libdrvmgr/drvmgr_confdefs.h|   2 +-
 cpukit/libpci/pci_access.c|   4 +-
 14 files changed, 992 insertions(+), 331 deletions(-)
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[PATCH 04/44] leon, gr1553b: RT status words register declarations fix

2017-03-03 Thread Daniel Hellstrom
The fix does not affect the driver since the bit definitions
were never used by the GR5133B drivers. However it could affect
and application using the definitions.
---
 c/src/lib/libbsp/sparc/shared/include/gr1553b.h | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/gr1553b.h 
b/c/src/lib/libbsp/sparc/shared/include/gr1553b.h
index 11f0980..006417b 100644
--- a/c/src/lib/libbsp/sparc/shared/include/gr1553b.h
+++ b/c/src/lib/libbsp/sparc/shared/include/gr1553b.h
@@ -198,17 +198,19 @@ struct gr1553b_regs {
 #define GR1553B_RT_CFG_RTKEY   (0x

[PATCH 16/44] leon, grspw_pkt: coding style fixups

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 0bc749f..83d5c9c 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -118,14 +118,14 @@ extern int grspw_work_task_priority;
  *   type (RX/TX). See XXPKT_FLAG_* options above.
  */
 struct grspw_pkt {
-   struct grspw_pkt *next;
-   unsigned int pkt_id;/* User assigned ID */
-   unsigned short flags;   /* RX/TX Options */
+   struct grspw_pkt *next; /* Next packet in list. NULL if last packet */
+   unsigned int pkt_id;/* User assigned ID (not touched by driver) */
+   unsigned short flags;   /* RX/TX Options and status */
unsigned char reserved; /* Reserved, must be zero */
-   unsigned char hlen; /* Length of Header Buffer */
+   unsigned char hlen; /* Length of Header Buffer (only TX) */
unsigned int dlen;  /* Length of Data Buffer */
void *data; /* 4-byte or byte aligned depends on HW */
-   void *hdr;  /* 4-byte or byte aligned depends on HW */
+   void *hdr;  /* 4-byte or byte aligned depends on HW (only TX) */
 };
 
 /* GRSPW SpaceWire Packet List */
@@ -226,7 +226,6 @@ struct grspw_core_stats {
 #define LINKSTS_EE 0x100   /* Early EOP/EEP */
 #define LINKSTS_MASK   0x1de
 
-
 /* grspw_tc_ctrl() options */
 #define TCOPTS_EN_RXIRQ0x0001  /* Tick-Out IRQ */
 #define TCOPTS_EN_TX   0x0004
@@ -264,8 +263,7 @@ struct grspw_core_stats {
 #define DMAFLAG_MASK   (DMAFLAG_NO_SPILL|DMAFLAG_STRIP_ADR|DMAFLAG_STRIP_PID)
 
 struct grspw_dma_config {
-   int flags;
-
+   int flags;  /* DMA config flags, see DMAFLAG_* options */
int rxmaxlen;   /* RX Max Packet Length */
int rx_irq_en_cnt;  /* Enable RX IRQ every cnt descriptors */
int tx_irq_en_cnt;  /* Enable TX IRQ every cnt descriptors */
-- 
2.7.4

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[PATCH 25/44] libdrvmgr: remove braces

2017-03-03 Thread Daniel Hellstrom
From: Daniel Cederman 

---
 cpukit/libdrvmgr/drvmgr_confdefs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cpukit/libdrvmgr/drvmgr_confdefs.h 
b/cpukit/libdrvmgr/drvmgr_confdefs.h
index 89d50e7..22c7a90 100644
--- a/cpukit/libdrvmgr/drvmgr_confdefs.h
+++ b/cpukit/libdrvmgr/drvmgr_confdefs.h
@@ -226,7 +226,7 @@ drvmgr_drv_reg_func drvmgr_drivers[] = {
 #endif
 
/* End array with NULL */
-   {NULL}
+   NULL
 };
 
 #endif /* CONFIGURE_INIT */
-- 
2.7.4

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[PATCH 11/44] leon, grspw_pkt: added grspw_link_status_clr() to API

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 2 ++
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 8 
 2 files changed, 10 insertions(+)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index c014b37..f16ec20 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -309,6 +309,8 @@ extern spw_link_state_t grspw_link_state(void *d);
 extern void grspw_link_ctrl(void *d, int *options, int *clkdiv);
 /* Read the current value of the status register */
 extern unsigned int grspw_link_status(void *d);
+/* Clear bits in the status register */
+extern void grspw_link_status_clr(void *d, unsigned int clearmask);
 
 /*** Time Code Interface ***/
 /* Generate Tick-In (increment Time Counter, Send Time Code) */
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index e23410a..cee6dcc 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -719,6 +719,14 @@ unsigned int grspw_link_status(void *d)
return REG_READ(&priv->regs->status);
 }
 
+/* Clear Status Register bits */
+void grspw_link_status_clr(void *d, unsigned int mask)
+{
+   struct grspw_priv *priv = d;
+
+   REG_WRITE(&priv->regs->status, mask);
+}
+
 /* Return Current Link State */
 spw_link_state_t grspw_link_state(void *d)
 {
-- 
2.7.4

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[PATCH 18/44] leon, grspw_pkt: support for reading tx/rx DMA queue

2017-03-03 Thread Daniel Hellstrom
 * Add support for reading the GRSPW TX/RX descriptor counters
   directly.
 * Add semaphore lock to counters to avoid couters being out
   of sync
 * This makes it possible for the user in polling mode to check
   the amount of work before entering RX/TX descriptor table
   processing.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h |  4 +-
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 76 +--
 2 files changed, 74 insertions(+), 6 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 9a2a440..1bab68b 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -481,7 +481,7 @@ extern int grspw_dma_tx_send(void *c, int opts, struct 
grspw_list *pkts, int cou
 extern int grspw_dma_tx_reclaim(void *c, int opts, struct grspw_list *pkts, 
int *count);
 
 /* Get current number of Packets in respective TX Queue. */
-extern void grspw_dma_tx_count(void *c, int *send, int *sched, int *sent);
+extern void grspw_dma_tx_count(void *c, int *send, int *sched, int *sent, int 
*hw);
 
 #define GRSPW_OP_AND 0
 #define GRSPW_OP_OR 1
@@ -553,7 +553,7 @@ extern int grspw_dma_rx_recv(void *c, int opts, struct 
grspw_list *pkts, int *co
 extern int grspw_dma_rx_prepare(void *c, int opts, struct grspw_list *pkts, 
int count);
 
 /* Get current number of Packets in respective RX Queue. */
-extern void grspw_dma_rx_count(void *c, int *ready, int *sched, int *recv);
+extern void grspw_dma_rx_count(void *c, int *ready, int *sched, int *recv, int 
*hw);
 
 /* Block until recv_cnt or more packets are Queued in RECV Q, op (AND or OR), 
  * ready_cnt or fewer packet buffers are available in the "READY and 
Scheduled" Q,
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 066d30f..048f7d1 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -334,6 +334,8 @@ struct grspw_txbd {
 /* GRSPW Constants */
 #define GRSPW_TXBD_NR 64   /* Maximum number of TX Descriptors */
 #define GRSPW_RXBD_NR 128  /* Maximum number of RX Descriptors */
+#define GRSPW_TXBD_SIZE 16 /* Size in bytes of one TX descriptor */
+#define GRSPW_RXBD_SIZE 8  /* Size in bytes of one RX descriptor */
 #define BDTAB_SIZE 0x400   /* BD Table Size (RX or TX) */
 #define BDTAB_ALIGN 0x400  /* BD Table Alignment Requirement */
 
@@ -1894,16 +1896,49 @@ int grspw_dma_tx_reclaim(void *c, int opts, struct 
grspw_list *pkts, int *count)
return (~started) & 1; /* signal DMA has been stopped */
 }
 
-void grspw_dma_tx_count(void *c, int *send, int *sched, int *sent)
+void grspw_dma_tx_count(void *c, int *send, int *sched, int *sent, int *hw)
 {
struct grspw_dma_priv *dma = c;
+   int sched_cnt, diff;
+   unsigned int hwbd;
+   struct grspw_txbd *tailbd;
+
+   /* Take device lock - Wait until we get semaphore.
+* The lock is taken so that the counters are in sync with each other
+* and that DMA descriptor table and tx_ring_tail is not being updated
+* during HW counter processing in this function.
+*/
+   if (rtems_semaphore_obtain(dma->sem_dma, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
+   != RTEMS_SUCCESSFUL)
+   return;
 
if (send)
*send = dma->send_cnt;
+   sched_cnt = dma->tx_sched_cnt;
if (sched)
-   *sched = dma->tx_sched_cnt;
+   *sched = sched_cnt;
if (sent)
*sent = dma->sent_cnt;
+   if (hw) {
+   /* Calculate number of descriptors (processed by HW) between
+* HW pointer and oldest SW pointer.
+*/
+   hwbd = REG_READ(&dma->regs->txdesc);
+   tailbd = dma->tx_ring_tail->bd;
+   diff = ((hwbd - (unsigned int)tailbd) / GRSPW_TXBD_SIZE) &
+   (GRSPW_TXBD_NR - 1);
+   /* Handle special case when HW and SW pointers are equal
+* because all TX descriptors have been processed by HW.
+*/
+   if ((diff == 0) && (sched_cnt == GRSPW_TXBD_NR) &&
+   ((BD_READ(&tailbd->ctrl) & GRSPW_TXBD_EN) == 0)) {
+   diff = GRSPW_TXBD_NR;
+   }
+   *hw = diff;
+   }
+
+   /* Unlock DMA channel */
+   rtems_semaphore_release(dma->sem_dma);
 }
 
 static inline int grspw_tx_wait_eval(struct grspw_dma_priv *dma)
@@ -2108,16 +2143,49 @@ out:
return ret;
 }
 
-void grspw_dma_rx_count(void *c, int *ready, int *sched, int *recv)
+void grspw_dma_rx_count(void *c, int *ready, int *sched, int *recv, int *hw)
 {
struct grspw_dma_priv *dma = c;
+   int sched_cnt, diff;
+   unsigned int hwbd;
+   struct grspw_rxbd *tailbd;
+
+   /* Take device lock - Wait until we get semaphore.
+

[PATCH 26/44] bsps/sparc: Updated L2C registers

2017-03-03 Thread Daniel Hellstrom
From: Javier Jalle 

---
 c/src/lib/libbsp/sparc/shared/include/grlib.h | 43 ++-
 1 file changed, 22 insertions(+), 21 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grlib.h 
b/c/src/lib/libbsp/sparc/shared/include/grlib.h
index a744899..a2d0877 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grlib.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grlib.h
@@ -133,27 +133,28 @@ struct grgpio_regs {
 
 /* L2C - Level 2 Cache Controller registers */
 struct l2c_regs {
-  volatile unsigned int control;
-  volatile unsigned int status;
-  volatile unsigned int flush_mem_addr;
-  volatile unsigned int flush_set_index;
-  volatile unsigned int access_counter;
-  volatile unsigned int hit_counter;
-  volatile unsigned int bus_cycle_counter;
-  volatile unsigned int bus_usage_counter;
-  volatile unsigned int error_status_control;
-  volatile unsigned int error_addr;
-  volatile unsigned int tag_check_bit;
-  volatile unsigned int data_check_bit;
-  volatile unsigned int scrub_control_status;
-  volatile unsigned int scrub_delay;
-  volatile unsigned int error_injection;
-  volatile unsigned int reserved_3c[17];
-  volatile unsigned int mtrr;
-  volatile unsigned int reserved_84[131039];
-  volatile unsigned int diag_iface_tag[16384];
-  volatile unsigned int reserved_9[376832];
-  volatile unsigned int diag_iface_data[524288];
+  volatile unsigned int control;/* 0x00 Control register */
+  volatile unsigned int status; /* 0x04 Status register */
+  volatile unsigned int flush_mem_addr; /* 0x08 Flush (Memory address) 
*/
+  volatile unsigned int flush_set_index;/* 0x0c Flush (set, index) */
+  volatile unsigned int access_counter; /* 0x10 */
+  volatile unsigned int hit_counter;/* 0x14 */
+  volatile unsigned int bus_cycle_counter;  /* 0x18 */
+  volatile unsigned int bus_usage_counter;  /* 0x1c */
+  volatile unsigned int error_status_control;   /* 0x20 Error status/control */
+  volatile unsigned int error_addr; /* 0x24 Error address */
+  volatile unsigned int tag_check_bit;  /* 0x28 TAG-check-bit */
+  volatile unsigned int data_check_bit; /* 0x2c Data-check-bit */
+  volatile unsigned int scrub_control_status;   /* 0x30 Scrub Control/Status */
+  volatile unsigned int scrub_delay;/* 0x34 Scrub Delay */
+  volatile unsigned int error_injection;/* 0x38 Error injection */
+  volatile unsigned int access_control; /* 0x3c Access control */
+  volatile unsigned int reserved_40[16];/* 0x40 Reserved */
+  volatile unsigned int mtrr[32];   /* 0x80 - 0xFC MTRR registers 
*/
+  volatile unsigned int reserved_100[131008];   /* 0x100 Reserved */
+  volatile unsigned int diag_iface_tag[16384];  /* 0x8 - 0x8FFFC 
Diagnostic interface (Tag) */
+  volatile unsigned int reserved_9[376832]; /* 0x9 Reserved */
+  volatile unsigned int diag_iface_data[524288];/* 0x20 - 0x3C 
Diagnostic interface (Data) */
 };
 
 #ifdef __cplusplus
-- 
2.7.4

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[PATCH 20/44] leon, grspw_pkt: coding style fix

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 9f9a31a..ddde100 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -3063,7 +3063,7 @@ static int grspw_common_init(void)
if (rtems_task_start(grspw_work_task, grspw_work_func, 0) !=
RTEMS_SUCCESSFUL)
return -1;
-}
+   }
 
grspw_initialized = 1;
return 0;
-- 
2.7.4

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[PATCH 28/44] leon, grpci2: fixed wrong bit layout

2017-03-03 Thread Daniel Hellstrom
From: Javier Jalle 

---
 c/src/lib/libbsp/sparc/shared/pci/grpci2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c 
b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
index cf2f84f..c5832d5 100644
--- a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
+++ b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
@@ -102,8 +102,8 @@ struct grpci2_regs {
 
 #define CTRL_SI (1<<27)
 #define CTRL_PE (1<<26)
-#define CTRL_EI (1<<25)
-#define CTRL_ER (1<<24)
+#define CTRL_ER (1<<25)
+#define CTRL_EI (1<<24)
 #define CTRL_BUS (0xff

[PATCH 30/44] leon, gr-cpci-leon4-n2x: small comment fix

2017-03-03 Thread Daniel Hellstrom
From: Javier Jalle 

---
 c/src/lib/libbsp/sparc/shared/pci/gr_leon4_n2x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/c/src/lib/libbsp/sparc/shared/pci/gr_leon4_n2x.c 
b/c/src/lib/libbsp/sparc/shared/pci/gr_leon4_n2x.c
index 9f19838..4a51884 100644
--- a/c/src/lib/libbsp/sparc/shared/pci/gr_leon4_n2x.c
+++ b/c/src/lib/libbsp/sparc/shared/pci/gr_leon4_n2x.c
@@ -242,7 +242,7 @@ void gr_cpci_leon4_n2x_isr(void *arg)
if ( tmp ) 
drvmgr_interrupt_clear(priv->dev, 0);
 
-   DBG("RASTA-SPW_ROUTER-IRQ: 0x%x\n", tmp);
+   DBG("GR-CPCI-LEON4-N2X-IRQ: 0x%x\n", tmp);
 }
 
 static int gr_cpci_leon4_n2x_hw_init1(struct gr_cpci_leon4_n2x_priv *priv)
-- 
2.7.4

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[PATCH 23/44] leon, grspw_pkt: Added checks for special list cases

2017-03-03 Thread Daniel Hellstrom
- Fixed grspw_dma_tx_send() so that it does not fail when an empty user packet
  is provided.
- Added empty checks on some of the list handling inline functions for
  GRSPW_PKT. Their use by the driver may be correct already, but the user might
  not have been aware of the assumptions that certain lists had to be non-empty.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 9 +
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 4 ++--
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 995d8bd..3a079c5 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -648,6 +648,9 @@ grspw_list_prepend(struct grspw_list *list, struct 
grspw_pkt *pkt)
 static inline void
 grspw_list_append_list(struct grspw_list *list, struct grspw_list *alist)
 {
+   if (grspw_list_is_empty(alist)) {
+   return;
+   }
alist->tail->next = NULL;
if ( list->tail == NULL ) {
list->head = alist->head;
@@ -660,6 +663,9 @@ grspw_list_append_list(struct grspw_list *list, struct 
grspw_list *alist)
 static inline void
 grspw_list_prepend_list(struct grspw_list *list, struct grspw_list *alist)
 {
+   if (grspw_list_is_empty(alist)) {
+   return;
+   }
if ( list->head == NULL ) {
list->tail = alist->tail;
alist->tail->next = NULL;
@@ -673,6 +679,9 @@ grspw_list_prepend_list(struct grspw_list *list, struct 
grspw_list *alist)
 static inline void
 grspw_list_remove_head_list(struct grspw_list *list, struct grspw_list *dlist)
 {
+   if (grspw_list_is_empty(dlist)) {
+   return;
+   }
list->head = dlist->tail->next;
if ( list->head == NULL ) {
list->tail = NULL;
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 5f40853..cfeebe4 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -1841,7 +1841,7 @@ int grspw_dma_tx_send(void *c, int opts, struct 
grspw_list *pkts, int count)
grspw_tx_process_scheduled(dma);
 
/* 2. Add the requested packets to the SEND List (USER->SEND) */
-   if (pkts) {
+   if (pkts && (count > 0)) {
grspw_list_append_list(&dma->send, pkts);
dma->send_cnt += count;
if (dma->stats.send_cnt_max < dma->send_cnt)
@@ -3104,7 +3104,7 @@ static int grspw_common_init(void)
if (rtems_task_start(grspw_work_task, grspw_work_func, 0) !=
RTEMS_SUCCESSFUL)
return -1;
-   }
+}
 
grspw_initialized = 1;
return 0;
-- 
2.7.4

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[PATCH 33/44] leon, grspw_pkt: added work-task configuration options

2017-03-03 Thread Daniel Hellstrom
Following changes:
 * possible for user to create work-tasks and assign custom  message queues.
 * possible for user to override default ISR message to implement custom
   handling of DMA error, DMA RX/TX and link error from ISR.
 * work-task now checks message to determine which work to perform rather 
than
   looking at registers only, this makes it possible for user to implement
   custom handling.
 * exported work-queue message definitions and separated them so that a user
   can assign custom DMA RX/TX handling of a specific DMA channel.
 * added a work-task event callback to let user add custom handling or
   monitoring of DMA Stop, DMA error, Link Error or work-task exits etc.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h |  98 +
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 252 +++---
 2 files changed, 277 insertions(+), 73 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 3a079c5..5b3a606 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -311,6 +311,50 @@ struct grspw_dma_stats {
int rx_work_enabled;/* No. RX BDs enabled by work thread */
 };
 
+/* ISR message sending call back. Compatible with rtems_message_queue_send().
+ * The 'buf' parameter has a pointer to a WORK-TASK message defined by the
+ * WORK_* macros below. The message indicates what GRSPW device operations
+ * are pending, thus what caused the interrupt.
+ *
+ * \param data   defined by grspw_work_config.msgisr_arg, default a rtems_id.
+ * \param bufPointer to a 32-bit message word
+ * \param n  Always 4 (byte size of buf).
+ */
+typedef int (*grspw_msgqisr_t)(void *data, unsigned int *buf, unsigned int n);
+
+/* Work message definitions, the int sent to *buf
+ * Bits 31..24: reserved.
+ * Bits 23..16: GRSPW device number message is associated with.
+ * Bit  15: reserved.
+ * Bit  14: work-task shall delete message queue on exit.
+ * Bit  13: work-task shall exit and delete itself.
+ * Bit  12: link error - shut down all DMA operations (stop DMA channels).
+ * Bit  11..8:  Indicats DMA error on DMA channel 3..0.
+ * Bit  7..0:   Indicats RX and/or TX packets completed on channel 3..0.
+ */
+#define WORK_NONE 0
+#define WORK_SHUTDOWN 0x1000 /* Signal shut down */
+#define WORK_QUIT_TASK0x2000 /* Work task shall exit (delete itself) */
+#define WORK_FREE_MSGQ0x4000 /* Delete MsgQ (valid when WORK_QUIT_TASK) */
+#define WORK_DMA(chan, rxtx) (((rxtx) & 0x3) << ((chan) * 2))
+#define WORK_DMA_TX(chan) WORK_DMA(chan, 1)
+#define WORK_DMA_RX(chan) WORK_DMA(chan, 2)
+#define WORK_DMA_ER(chan) (0x1 << ((chan) + 8))
+#define WORK_DMA_MASK 0xfff /* max 4 channels all work */
+#define WORK_DMA_TX_MASK  0x055 /* max 4 channels TX work */
+#define WORK_DMA_RX_MASK  0x0aa /* max 4 channels RX work */
+#define WORK_DMA_ER_MASK  0xf00 /* max 4 channels Error work */
+#define WORK_DMA_CHAN_MASK(chan) (WORK_DMA_ER(chan) | WORK_DMA(chan, 0x3))
+#define WORK_CORE_BIT 16
+#define WORK_CORE_MASK0x00ff
+#define WORK_CORE(device) ((device) << WORK_CORE_BIT)
+
+/* Message Q used to send messages to work task */
+struct grspw_work_config {
+   grspw_msgqisr_t msgisr;
+   void *msgisr_arg; /* example: rtems_id to Msg Q */
+};
+
 extern void grspw_initialize_user(
/* Callback every time a GRSPW device is found. Args: DeviceIndex */
void *(*devfound)(int),
@@ -320,6 +364,60 @@ extern void grspw_initialize_user(
 */
void (*devremove)(int,void*)
);
+
+/* Creates a MsgQ (optional) and spawns a worker task associated with the
+ * message Q. The task can also be associated with a custom msgQ if *msgQ.
+ * is non-zero.
+ *
+ * \param prio Task priority, set to -1 for default.
+ * \param stackTask stack size, set to 0 for default.
+ * \param msgQ pMsgQ=NULL: illegal,
+ * pMsqQ==0: create new MsgQ with task and place in *pMsgQ,
+ * *pmsqQ!=0: pointer to MsgQ used for task.
+ * \param msgMax   Maximum number of messages, set to 0 for default.
+ * \return 0 on failure, task id on success.
+ */
+extern rtems_id grspw_work_spawn(int prio, int stack, rtems_id *pMsgQ, int 
msgMax);
+
+/* Free task associated with message queue and optionally also the message
+ * queue itself. The message queue is deleted by the work task and is therefore
+ * delayed until it the work task resumes its execution.
+ */
+extern rtems_status_code grspw_work_free(rtems_id msgQ, int freeMsgQ);
+
+/* Configure a GRSPW device Work task and Message Q set up.
+ * This affects messages to:
+ *  - DMA AHB error interrupt handling (mandatory)
+ *  - Link status interrupt handling (optional)
+ *  - RX DMA, defaults to common msgQ (configured per DMA channel) 
+ */
+extern void grspw_work_cfg(void *d, stru

[PATCH 24/44] libdrvmgr: added default BSP init level hook

2017-03-03 Thread Daniel Hellstrom
---
 cpukit/libdrvmgr/drvmgr.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/cpukit/libdrvmgr/drvmgr.c b/cpukit/libdrvmgr/drvmgr.c
index 03af390..0771c35 100644
--- a/cpukit/libdrvmgr/drvmgr.c
+++ b/cpukit/libdrvmgr/drvmgr.c
@@ -66,6 +66,13 @@ static int do_dev_init(
 
 /* DRIVER MANAGER */
 
+void bsp_driver_level_hook(int level) __attribute__((weak));
+
+/* default hook does nothing, BSP may override. */
+void bsp_driver_level_hook(int level)
+{
+}
+
 void _DRV_Manager_init_level(int level)
 {
struct drvmgr *mgr = &drvmgr;
@@ -78,6 +85,8 @@ void _DRV_Manager_init_level(int level)
 
/* Initialize buses and devices into this new level */
drvmgr_init_update();
+
+   bsp_driver_level_hook(level);
 }
 
 /* Initialize Data structures of the driver manager and call driver
-- 
2.7.4

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[PATCH 27/44] leon, grpci2: added TIMEOUT interrupt

2017-03-03 Thread Daniel Hellstrom
From: Javier Jalle 

---
 c/src/lib/libbsp/sparc/shared/pci/grpci2.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c 
b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
index 9d8dea6..cf2f84f 100644
--- a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
+++ b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
@@ -132,11 +132,12 @@ struct grpci2_regs {
 #define STS_TRACE  (1sts_cap;
 
-   if (sts & (STS_IMSTABRT | STS_ITGTABRT | STS_IPARERR | STS_ISYSERR)) {
+   if (sts & (STS_IMSTABRT | STS_ITGTABRT | STS_IPARERR | STS_ISYSERR | 
STS_ITIMEOUT)) {
/* A PCI error IRQ ... Error handler unimplemented
 * add your code here...
 */
@@ -623,6 +624,9 @@ void grpci2_err_isr(void *arg)
if (sts & STS_ISYSERR) {
printk("GRPCI2: unhandled System Error IRQ\n");
}
+   if (sts & STS_ITIMEOUT) {
+   printk("GRPCI2: unhandled PCI target access timeout 
IRQ\n");
+   }
}
 }
 
-- 
2.7.4

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[PATCH 21/44] leon, grspw_pkt: split DMA sem into RX and TX sem

2017-03-03 Thread Daniel Hellstrom
By introducing a spearate RX and TX DMA channel semaphore RX
operations and TX operations does not block each other. Stopping
a DMA channel needs now to take both RX and TX semaphores to
block out both RX and TX tasks.
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 148 --
 1 file changed, 94 insertions(+), 54 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index ddde100..60aa68f 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -376,7 +376,8 @@ struct grspw_dma_priv {
int index;  /* DMA Channel Index @ GRSPW core */
int open;   /* DMA Channel opened by user */
int started;/* DMA Channel activity (start|stop) */
-   rtems_id sem_dma;   /* DMA Channel Semaphore */
+   rtems_id sem_rxdma; /* DMA Channel RX Semaphore */
+   rtems_id sem_txdma; /* DMA Channel TX Semaphore */
struct grspw_dma_stats stats;   /* DMA Channel Statistics */
struct grspw_dma_config cfg;/* DMA Channel Configuration */
 
@@ -1657,18 +1658,27 @@ void *grspw_dma_open(void *d, int chan_no)
dma->cfg.flags = DMAFLAG_NO_SPILL;
 
/* set to NULL so that error exit works correctly */
-   dma->sem_dma = RTEMS_ID_NONE;
+   dma->sem_rxdma = RTEMS_ID_NONE;
+   dma->sem_txdma = RTEMS_ID_NONE;
dma->rx_wait.sem_wait = RTEMS_ID_NONE;
dma->tx_wait.sem_wait = RTEMS_ID_NONE;
dma->rx_ring_base = NULL;
 
/* DMA Channel Semaphore created with count = 1 */
if (rtems_semaphore_create(
-   rtems_build_name('S', 'D', '0' + priv->index, '0' + chan_no), 1,
+   rtems_build_name('S', 'D', '0' + priv->index, '0' + chan_no*2), 1,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | \
RTEMS_NO_INHERIT_PRIORITY | RTEMS_LOCAL | \
-   RTEMS_NO_PRIORITY_CEILING, 0, &dma->sem_dma) != RTEMS_SUCCESSFUL) {
-   dma->sem_dma = RTEMS_ID_NONE;
+   RTEMS_NO_PRIORITY_CEILING, 0, &dma->sem_rxdma) != RTEMS_SUCCESSFUL) 
{
+   dma->sem_rxdma = RTEMS_ID_NONE;
+   goto err;
+   }
+   if (rtems_semaphore_create(
+   rtems_build_name('S', 'D', '0' + priv->index, '0' + chan_no*2+1), 1,
+   RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | \
+   RTEMS_NO_INHERIT_PRIORITY | RTEMS_LOCAL | \
+   RTEMS_NO_PRIORITY_CEILING, 0, &dma->sem_txdma) != RTEMS_SUCCESSFUL) 
{
+   dma->sem_txdma = RTEMS_ID_NONE;
goto err;
}
 
@@ -1710,8 +1720,10 @@ out:
 
/* initialization error happended */
 err:
-   if (dma->sem_dma != RTEMS_ID_NONE)
-   rtems_semaphore_delete(dma->sem_dma);
+   if (dma->sem_rxdma != RTEMS_ID_NONE)
+   rtems_semaphore_delete(dma->sem_rxdma);
+   if (dma->sem_txdma != RTEMS_ID_NONE)
+   rtems_semaphore_delete(dma->sem_txdma);
if (dma->rx_wait.sem_wait != RTEMS_ID_NONE)
rtems_semaphore_delete(dma->rx_wait.sem_wait);
if (dma->tx_wait.sem_wait != RTEMS_ID_NONE)
@@ -1764,15 +1776,21 @@ int grspw_dma_close(void *c)
return 0;
 
/* Take device lock - Wait until we get semaphore */
-   if (rtems_semaphore_obtain(dma->sem_dma, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
+   if (rtems_semaphore_obtain(dma->sem_rxdma, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
!= RTEMS_SUCCESSFUL)
return -1;
+   if (rtems_semaphore_obtain(dma->sem_txdma, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
+   != RTEMS_SUCCESSFUL) {
+   rtems_semaphore_release(dma->sem_rxdma);
+   return -1;
+   }
 
/* Can not close active DMA channel. User must stop DMA and make sure
 * no threads are active/blocked within driver.
 */
if (dma->started || dma->rx_wait.waiting || dma->tx_wait.waiting) {
-   rtems_semaphore_release(dma->sem_dma);
+   rtems_semaphore_release(dma->sem_txdma);
+   rtems_semaphore_release(dma->sem_rxdma);
return 1;
}
 
@@ -1780,8 +1798,10 @@ int grspw_dma_close(void *c)
rtems_semaphore_delete(dma->rx_wait.sem_wait);
rtems_semaphore_delete(dma->tx_wait.sem_wait);
/* Release and delete lock. Operations requiring lock will fail */
-   rtems_semaphore_delete(dma->sem_dma);
-   dma->sem_dma = RTEMS_ID_NONE;
+   rtems_semaphore_delete(dma->sem_txdma);
+   rtems_semaphore_delete(dma->sem_rxdma);
+   dma->sem_txdma = RTEMS_ID_NONE;
+   dma->sem_rxdma = RTEMS_ID_NONE;
 
/* Free memory */
if (dma->rx_ring_base)
@@ -1806,7 +1826,7 @@ int grspw_dma_tx_send(void *c, int opts, struct 
grspw_list *pkts, int count)
int ret;
 
/* Take DMA channel lock */
-   if (rtems_semaphore_obtai

[PATCH 31/44] leon, gr740: fix device registration for GRPCI2 core

2017-03-03 Thread Daniel Hellstrom
From: Javier Jalle 

---
 c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c | 26 +++
 1 file changed, 26 insertions(+)

diff --git a/c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c 
b/c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c
index 02aeda0..c48d12d 100644
--- a/c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c
+++ b/c/src/lib/libbsp/sparc/shared/drvmgr/ambapp_bus.c
@@ -597,6 +597,27 @@ static void ambapp_core_register(
drvmgr_dev_register(newdev); /* Register New Device */
 }
 
+/* Fix device registration.
+ * Function returns:
+ *  0  Register device as normal
+ *  1  Fixup function handles registration
+ */
+static int ambapp_dev_register_fixup(struct ambapp_dev *dev, struct 
ambapp_dev_reg_struct *p)
+{
+   /* GR740 GRPCI2 speciality:
+* - In the GR740 the APB_SLV is detected before the AHB_SLV
+*   which makes the registration incorrect. We deal with it in 
+*   this function. */
+   if ((dev->dev_type == DEV_APB_SLV) &&
+   (dev->device == GAISLER_GRPCI2) &&
+   (dev->vendor == VENDOR_GAISLER) &&
+   (p->ahb_slv == NULL) ) {
+   DBG("GRPCI2 APB_SLV detected before AHB_SLV. Skipping APB_SLV 
registration.\n");
+   return 1;
+   }
+   return 0;
+}
+
 /* Register one AMBA device */
 static int ambapp_dev_register(struct ambapp_dev *dev, int index, void *arg)
 {
@@ -615,6 +636,11 @@ static int ambapp_dev_register(struct ambapp_dev *dev, int 
index, void *arg)
DBG("Found [%d:%x:%x], %s\n", index, dev->vendor, dev->device, type);
 #endif
 
+   /* Fixup for device registration */
+   if (ambapp_dev_register_fixup(dev, p)){
+   return 0;
+   }
+
if ( dev->dev_type == DEV_AHB_MST ) {
if ( p->ahb_mst ) {
/* This should not happen */
-- 
2.7.4

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[PATCH 29/44] leon, grpci2: updated DMA descriptor layout

2017-03-03 Thread Daniel Hellstrom
From: Javier Jalle 

---
 c/src/lib/libbsp/sparc/shared/pci/grpci2.c | 22 +-
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c 
b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
index c5832d5..7fca3cd 100644
--- a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
+++ b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
@@ -152,10 +152,12 @@ struct grpci2_bd_chan {
volatile unsigned int res;  /* 0x0C Reserved */
 };
 
-#define BD_CHAN_EN 0x8000
-#define BD_CHAN_TYPE   0x0030
-#define BD_CHAN_BDCNT  0x
+#define BD_CHAN_EN (1

[PATCH 32/44] leon, grpci2: latency timer user configurable (default 64)

2017-03-03 Thread Daniel Hellstrom
From: Javier Jalle 

---
 c/src/lib/libbsp/sparc/shared/include/grpci2.h |  4 
 c/src/lib/libbsp/sparc/shared/pci/grpci2.c | 16 
 2 files changed, 20 insertions(+)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grpci2.h 
b/c/src/lib/libbsp/sparc/shared/include/grpci2.h
index 624191e..c356b56 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grpci2.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grpci2.h
@@ -36,6 +36,10 @@ extern void grpci2_register_drv(void);
  * 
  * Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware
  *
+ * PCI Latency timer
+ * 
+ * Name="latencyTimer", Type=INT, Set the latency timer
+ *
  * PCI Host's Target BARs setup
  * 
  * The Host's BARs are not configured by the configuration routines, by default
diff --git a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c 
b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
index 7fca3cd..be459cc 100644
--- a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
+++ b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c
@@ -57,6 +57,9 @@
 /* If defined to 1 - byte twisting is enabled by default */
 #define DEFAULT_BT_ENABLED 0
 
+/* If defined to 64 - Latency timer is 64 by default */
+#define DEFAULT_LATENCY_TIMER 64
+
 /* Interrupt assignment. Set to other value than 0xff in order to 
  * override defaults and plug&play information
  */
@@ -237,6 +240,7 @@ struct grpci2_priv {
charirq_mode; /* IRQ Mode from CAPSTS REG */
charbt_enabled;
unsigned intirq_mask;
+   unsigned intlatency_timer;
 
struct grpci2_pcibar_cfg*barcfg;
 
@@ -696,6 +700,12 @@ static int grpci2_hw_init(struct grpci2_priv *priv)
data |= (PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
grpci2_cfg_w32(host, PCIR_COMMAND, data);
 
+   /* set latency timer */
+   grpci2_cfg_r32(host, PCIR_CACHELNSZ, &data);
+   data &= ~0xff00;
+   data |= ((priv->latency_timer & 0xff) << 8);
+   grpci2_cfg_w32(host, PCIR_CACHELNSZ, data);
+
/* Enable Error respone (CPU-TRAP) on illegal memory access */
regs->ctrl = CTRL_ER | CTRL_PE;
 
@@ -733,6 +743,7 @@ static int grpci2_init(struct grpci2_priv *priv)
priv->regs = (struct grpci2_regs *)apb->start;
priv->bt_enabled = DEFAULT_BT_ENABLED;
priv->irq_mode = (priv->regs->sts_cap & STS_IRQMODE) >> STS_IRQMODE_BIT;
+   priv->latency_timer = DEFAULT_LATENCY_TIMER;
 
/* Calculate the PCI windows 
 *  AMBA->PCI Window:   AHB SLAVE AREA0
@@ -791,6 +802,11 @@ static int grpci2_init(struct grpci2_priv *priv)
else
priv->barcfg = grpci2_default_bar_mapping;
 
+   /* User may override DEFAULT_LATENCY_TIMER */
+   value = drvmgr_dev_key_get(priv->dev, "latencyTimer", DRVMGR_KT_INT);
+   if (value)
+   priv->latency_timer = value->i;
+
/* This driver only support HOST systems, we check that it can act as a 
 * PCI Master and that it is in the Host slot. */
if ((priv->regs->sts_cap&STS_HOST) || !(priv->regs->sts_cap&STS_MST))
-- 
2.7.4

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[PATCH 38/44] leon, grspw_pkt: add missing GRSPW1 IP-core support

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 6b5390f..aa83524 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -3010,6 +3010,20 @@ void grspw_initialize_user(void *(*devfound)(int), void 
(*devremove)(int,void*))
}
 }
 
+/* Get a value at least 6.4us in number of clock cycles */
+static unsigned int grspw1_calc_timer64(int freq_khz)
+{
+   unsigned int timer64 = (freq_khz * 64 + ) / 1;
+   return timer64 & 0xfff;
+}
+
+/* Get a value at least 850ns in number of clock cycles - 3 */
+static unsigned int grspw1_calc_discon(int freq_khz)
+{
+   unsigned int discon = ((freq_khz * 85 + 9) / 10) - 3;
+   return discon & 0x3ff;
+}
+
 /*** Driver manager interface ***/
 
 /* Driver prototypes */
@@ -3111,9 +3125,18 @@ static int grspw2_init3(struct drvmgr_dev *dev)
priv->hwsup.strip_adr = 1; /* All GRSPW2 can strip Address */
priv->hwsup.strip_pid = 1; /* All GRSPW2 can strip PID */
} else {
+   unsigned int apb_hz, apb_khz;
+
/* Autodetect GRSPW1 features? */
priv->hwsup.strip_adr = 0;
priv->hwsup.strip_pid = 0;
+
+   drvmgr_freq_get(dev, DEV_APB_SLV, &apb_hz);
+   apb_khz = apb_hz / 1000;
+
+   REG_WRITE(&priv->regs->timer,
+   ((grspw1_calc_discon(apb_khz) & 0x3FF) << 12) |
+   (grspw1_calc_timer64(apb_khz) & 0xFFF));
}
 
/* Probe width of SpaceWire Interrupt ISR timers. All have the same
-- 
2.7.4

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[PATCH 34/44] leon, grspw_pkt: fix interrupt code ctrl bit declarations

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 8f660e7..8853a36 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -266,7 +266,7 @@ struct grspw_regs {
 #define GRSPW_ICCTRL_ID_BIT7
 #define GRSPW_ICCTRL_II_BIT6
 #define GRSPW_ICCTRL_TXIRQ_BIT 0
-#define GRSPW_ICCTRL_INUM  (0x3f << GRSPW_ICCTRL_INUM_BIT)
+#define GRSPW_ICCTRL_INUM  (0x1f << GRSPW_ICCTRL_INUM_BIT)
 #define GRSPW_ICCTRL_IA(1 << GRSPW_ICCTRL_IA_BIT)
 #define GRSPW_ICCTRL_LE(1 << GRSPW_ICCTRL_LE_BIT)
 #define GRSPW_ICCTRL_PR(1 << GRSPW_ICCTRL_PR_BIT)
-- 
2.7.4

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[PATCH 39/44] leon, grspw_pkt: fix descriptor table mem leak on grspw_close()

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index aa83524..498333e 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -657,6 +657,12 @@ int grspw_close(void *d)
}
grspw_hw_stop(priv);
 
+   /* Free descriptor table memory if allocated using malloc() */
+   if (priv->bd_mem_alloced) {
+   free((void *)priv->bd_mem_alloced);
+   priv->bd_mem_alloced = 0;
+   }
+
/* Mark not open */
priv->open = 0;
rtems_semaphore_release(grspw_sem);
-- 
2.7.4

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[PATCH 36/44] leon, grpsw_pkt: set unique work-task name

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index e445c2a..b64a807 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -3160,6 +3160,7 @@ rtems_id grspw_work_spawn(int prio, int stack, rtems_id 
*pMsgQ, int msgMax)
 {
rtems_id tid;
int created_msgq = 0;
+   static char work_name = 'A';
 
if (pMsgQ == NULL)
return OBJECTS_ID_NONE;
@@ -3169,7 +3170,7 @@ rtems_id grspw_work_spawn(int prio, int stack, rtems_id 
*pMsgQ, int msgMax)
msgMax = 32;
 
if (rtems_message_queue_create(
-   rtems_build_name('S', 'G', 'L', 'Q'),
+   rtems_build_name('S', 'G', 'Q', work_name),
msgMax, 4, RTEMS_FIFO, pMsgQ) !=
RTEMS_SUCCESSFUL)
return OBJECTS_ID_NONE;
@@ -3181,7 +3182,7 @@ rtems_id grspw_work_spawn(int prio, int stack, rtems_id 
*pMsgQ, int msgMax)
if (stack < 0x800)
stack = RTEMS_MINIMUM_STACK_SIZE; /* default stack size */
 
-   if (rtems_task_create(rtems_build_name('S', 'G', 'L', 'T'),
+   if (rtems_task_create(rtems_build_name('S', 'G', 'T', work_name),
prio, stack, RTEMS_PREEMPT | RTEMS_NO_ASR,
RTEMS_NO_FLOATING_POINT, &tid) != RTEMS_SUCCESSFUL)
tid = OBJECTS_ID_NONE;
@@ -3194,6 +3195,9 @@ rtems_id grspw_work_spawn(int prio, int stack, rtems_id 
*pMsgQ, int msgMax)
if (tid == OBJECTS_ID_NONE && created_msgq) {
rtems_message_queue_delete(*pMsgQ);
*pMsgQ = OBJECTS_ID_NONE;
+   } else {
+   if (++work_name > 'Z')
+   work_name = 'A';
}
return tid;
 }
-- 
2.7.4

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[PATCH 35/44] leon, grspw_pkt: functions to support custom work-task

2017-03-03 Thread Daniel Hellstrom
Added new function:
 * grspw_dma_ctrlsts()   - Read value of DMA CTRL/STS reg.
 * grspw_dma_enable_int()- re-enable interrupt, used when
   implementing a custom work-task.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h |   6 +
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 189 +-
 2 files changed, 119 insertions(+), 76 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 5b3a606..71f45d5 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -535,6 +535,12 @@ extern int grspw_dma_close(void *c);
 extern int grspw_dma_start(void *c);
 extern void grspw_dma_stop(void *c);
 
+/* Enable interrupt manually */
+extern unsigned int grspw_dma_enable_int(void *c, int rxtx, int force);
+
+/* Return Current DMA Control & Status Register */
+extern unsigned int grspw_dma_ctrlsts(void *c);
+
 /* Schedule List of packets for transmission at some point in
  * future.
  *
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 8853a36..e445c2a 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -730,6 +730,14 @@ void grspw_addr_ctrl(void *d, struct grspw_addr_config 
*cfg)
}
 }
 
+/* Return Current DMA CTRL/Status Register */
+unsigned int grspw_dma_ctrlsts(void *c)
+{
+   struct grspw_dma_priv *dma = c;
+
+   return REG_READ(&dma->regs->ctrl);
+}
+
 /* Return Current Status Register */
 unsigned int grspw_link_status(void *d)
 {
@@ -1822,6 +1830,52 @@ int grspw_dma_close(void *c)
return 0;
 }
 
+unsigned int grspw_dma_enable_int(void *c, int rxtx, int force)
+{
+   struct grspw_dma_priv *dma = c;
+   int rc = 0;
+   unsigned int ctrl, ctrl_old;
+   IRQFLAGS_TYPE irqflags;
+
+   SPIN_LOCK_IRQ(&dma->core->devlock, irqflags);
+   if (dma->started == 0) {
+   rc = 1; /* DMA stopped */
+   goto out;
+   }
+   ctrl = REG_READ(&dma->regs->ctrl);
+   ctrl_old = ctrl;
+
+   /* Read/Write DMA error ? */
+   if (ctrl & GRSPW_DMA_STATUS_ERROR) {
+   rc = 2; /* DMA error */
+   goto out;
+   }
+
+   /* DMA has finished a TX/RX packet and user wants work-task to
+* take care of DMA table processing.
+*/
+   ctrl &= ~GRSPW_DMACTRL_AT;
+
+   if ((rxtx & 1) == 0)
+   ctrl &= ~GRSPW_DMACTRL_PR;
+   else if (force || ((dma->cfg.rx_irq_en_cnt != 0) ||
+(dma->cfg.flags & DMAFLAG2_RXIE)))
+   ctrl |= GRSPW_DMACTRL_RI;
+
+   if ((rxtx & 2) == 0)
+   ctrl &= ~GRSPW_DMACTRL_PS;
+   else if (force || ((dma->cfg.tx_irq_en_cnt != 0) ||
+(dma->cfg.flags & DMAFLAG2_TXIE)))
+   ctrl |= GRSPW_DMACTRL_TI;
+
+   REG_WRITE(&dma->regs->ctrl, ctrl);
+   /* Re-enabled interrupts previously enabled */
+   rc = ctrl_old & (GRSPW_DMACTRL_PR | GRSPW_DMACTRL_PS);
+out:
+   SPIN_UNLOCK_IRQ(&dma->core->devlock, irqflags);
+   return rc;
+}
+
 /* Schedule List of packets for transmission at some point in
  * future.
  *
@@ -2542,99 +2596,82 @@ static void grspw_work_shutdown_func(struct grspw_priv 
*priv)
 /* Do DMA work on one channel, invoked indirectly from ISR */
 static void grspw_work_dma_func(struct grspw_dma_priv *dma, unsigned int msg)
 {
-   int tx_cond_true, rx_cond_true;
-   unsigned int ctrl;
-   IRQFLAGS_TYPE irqflags;
+   int tx_cond_true, rx_cond_true, rxtx;
 
/* If DMA channel is closed we should not access the semaphore */
if (dma->open == 0)
return;
 
-   rx_cond_true = 0;
-   tx_cond_true = 0;
dma->stats.irq_cnt++;
 
/* Look at cause we were woken up and clear source */
-   SPIN_LOCK_IRQ(&priv->devlock, irqflags);
-   if (dma->started == 0) {
-   SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
+   rxtx = 0;
+   if (msg & WORK_DMA_RX_MASK)
+   rxtx |= 1;
+   if (msg & WORK_DMA_TX_MASK)
+   rxtx |= 2;
+   switch (grspw_dma_enable_int(dma, rxtx, 0)) {
+   case 1:
+   /* DMA stopped */
return;
-   }
-   ctrl = REG_READ(&dma->regs->ctrl);
-
-   /* Read/Write DMA error ? */
-   if (ctrl & GRSPW_DMA_STATUS_ERROR) {
+   case 2:
/* DMA error -> Stop DMA channel (both RX and TX) */
-   SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
if (msg & WORK_DMA_ER_MASK) {
/* DMA error and user wants work-task to handle error */
grspw_dma_stop(dma);
grspw_work_event(WORKTASK_EV_DMA_STOP, msg);
}
-   } else if (((msg & WORK_DMA_RX_MASK) && (ctrl & GRSPW_DMACT

[PATCH 42/44] leon, grspw_pkt: SMP support

2017-03-03 Thread Daniel Hellstrom
The driver already was developed with SMP in mind however SMP was
disabled waiting for final fixups and testing.

The new function to control the affinity of the ISR was added
but does not work for now since the LEON BSP does not reroute
IRQs between CPUs during run-time:
 grspw_isr_affinity()
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h |  7 ++
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 82 +--
 2 files changed, 53 insertions(+), 36 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index d14d434..a74a7c9 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -431,6 +431,13 @@ enum grspw_worktask_ev {
  */
 extern void grspw_work_event(enum grspw_worktask_ev ev, unsigned int msg);
 
+#ifdef RTEMS_SMP
+/* Set ISR interrupt affinity. The LEON IRQCtrl requires that the cpumask shall
+ * always have one bit set.
+ */
+extern int grspw_isr_affinity(void *d, const cpu_set_t *cpus);
+#endif
+
 extern int grspw_dev_count(void);
 extern void *grspw_open(int dev_no);
 extern int grspw_close(void *d);
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index ce5b732..e44ca56 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -28,33 +28,38 @@
 #include 
 #include 
 
-/* This driver has been prepared for SMP operation however never tested 
- * on a SMP system - use on your own risk.
+/* Use interrupt lock privmitives compatible with SMP defined in
+ * RTEMS 4.11.99 and higher.
  */
-#ifdef RTEMS_HAS_SMP
+#if (((__RTEMS_MAJOR__ << 16) | (__RTEMS_MINOR__ << 8) | __RTEMS_REVISION__) 
>= 0x040b63)
 
-#include  /* spin-lock */
+#include  /* spin-lock */
 
-/* SPIN_LOCK() and SPIN_UNLOCK() NOT_IMPLEMENTED_BY_RTEMS. Use _IRQ version
- * to implement.
- */
-#define SPIN_DECLARE(name) SMP_lock_spinlock_simple_Control name
-#define SPIN_INIT(lock) _SMP_lock_spinlock_simple_Initialize(lock)
-#define SPIN_LOCK(lock, level) SPIN_LOCK_IRQ(lock, level)
-#define SPIN_LOCK_IRQ(lock, level) (level) = 
_SMP_lock_spinlock_simple_Obtain(lock)
-#define SPIN_UNLOCK(lock, level) SPIN_UNLOCK_IRQ(lock, level)
-#define SPIN_UNLOCK_IRQ(lock, level) _SMP_lock_spinlock_simple_Release(lock, 
level)
-#define IRQFLAGS_TYPE ISR_Level
+/* map via ISR lock: */
+#define SPIN_DECLARE(lock) ISR_LOCK_MEMBER(lock)
+#define SPIN_INIT(lock, name) _ISR_lock_Initialize(lock, name)
+#define SPIN_LOCK(lock, level) _ISR_lock_Acquire_inline(lock, &level)
+#define SPIN_LOCK_IRQ(lock, level) _ISR_lock_ISR_disable_and_acquire(lock, 
&level)
+#define SPIN_UNLOCK(lock, level) _ISR_lock_Release_inline(lock, &level)
+#define SPIN_UNLOCK_IRQ(lock, level) _ISR_lock_Release_and_ISR_enable(lock, 
&level)
+#define SPIN_IRQFLAGS(k) ISR_lock_Context k
+#define SPIN_ISR_IRQFLAGS(k) SPIN_IRQFLAGS(k)
 
 #else
 
+/* maintain sinlge-core compatibility with older versions of RTEMS: */
 #define SPIN_DECLARE(name)
-#define SPIN_INIT(lock)
+#define SPIN_INIT(lock, name)
 #define SPIN_LOCK(lock, level)
 #define SPIN_LOCK_IRQ(lock, level) rtems_interrupt_disable(level)
 #define SPIN_UNLOCK(lock, level)
 #define SPIN_UNLOCK_IRQ(lock, level) rtems_interrupt_enable(level)
-#define IRQFLAGS_TYPE rtems_interrupt_level
+#define SPIN_IRQFLAGS(k) rtems_interrupt_level k
+#define SPIN_ISR_IRQFLAGS(k)
+
+#ifdef RTEMS_SMP
+#error SMP mode not compatible with these interrupt lock primitives
+#endif
 
 #endif
 
@@ -542,7 +547,7 @@ void *grspw_open(int dev_no)
/* Initialize Spin-lock for GRSPW Device. This is to protect
 * CTRL and DMACTRL registers from ISR.
 */
-   SPIN_INIT(&priv->devlock);
+   SPIN_INIT(&priv->devlock, priv->devname);
 
priv->tcisr = NULL;
priv->tcisr_arg = NULL;
@@ -684,7 +689,7 @@ void grspw_addr_ctrl(void *d, struct grspw_addr_config *cfg)
struct grspw_priv *priv = d;
struct grspw_regs *regs = priv->regs;
unsigned int ctrl, nodeaddr;
-   IRQFLAGS_TYPE irqflags;
+   SPIN_IRQFLAGS(irqflags);
int i;
 
if (!priv || !cfg)
@@ -786,7 +791,7 @@ void grspw_link_ctrl(void *d, int *options, int *stscfg, 
int *clkdiv)
struct grspw_priv *priv = d;
struct grspw_regs *regs = priv->regs;
unsigned int ctrl;
-   IRQFLAGS_TYPE irqflags;
+   SPIN_IRQFLAGS(irqflags);
 
/* Write? */
if (clkdiv) {
@@ -831,7 +836,7 @@ void grspw_tc_tx(void *d)
 {
struct grspw_priv *priv = d;
struct grspw_regs *regs = priv->regs;
-   IRQFLAGS_TYPE irqflags;
+   SPIN_IRQFLAGS(irqflags);
 
SPIN_LOCK_IRQ(&priv->devlock, irqflags);
REG_WRITE(®s->ctrl, REG_READ(®s->ctrl) | GRSPW_CTRL_TI);
@@ -843,7 +848,7 @@ void grspw_tc_ctrl(void *d, int *options)
struct grspw_priv *priv = d;
struct grspw_regs *regs = priv->regs;
unsigned 

[PATCH 37/44] leon, grspw_pkt: ISR RX/TX DMA interrupt source disable configurable

2017-03-03 Thread Daniel Hellstrom
This patch introduces some new options to let the user control when
the ISR shall disable DMA RX/TX interrupt. The ISR can be set in three
modes when a RX/TX DMA interrupt is asserted:
 1) ISR will always clear both RX/TX DMA interrupt enable. (DEFAULT).
 2) ISR will never never RX or TX DMA interrupt enable, ISR will
leave RX/TX DMA interrupt enable untouched.
 3) ISR will clear the interrupt enable(s) causing the interrupt,
this allows separate RX and TX IRQ handling.

This patch is backwards compatible since default mode 1) is activated
when the grspw_dma_config.flags DMAFLAGS2_IRQD field is 0.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 15 ++-
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 48 +--
 2 files changed, 51 insertions(+), 12 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 71f45d5..d14d434 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -270,7 +270,20 @@ struct grspw_core_stats {
 * Used to enable RX DMA interrupt
 * when rx_irq_en_cnt=0.
 */
-#define DMAFLAG2_MASK  (DMAFLAG2_TXIE | DMAFLAG2_RXIE)
+/* Defines how the ISR will disable RX/TX DMA interrupt source when a DMA RX/TX
+ * interrupt has happended. DMA Error Interrupt always disables both RX/TX DMA
+ * interrupt. By default both RX/TX IRQs are disabled when either a RX, TX or
+ * both RX/TX DMA interrupt has been requested. The work-task, custom
+ * application handler or custom ISR handler is responsible to re-enable
+ * DMA interrupts.
+ */
+#define DMAFLAG2_IRQD_SRC  0x0100  /* Disable triggering RX/TX source */
+#define DMAFLAG2_IRQD_NONE 0x00c0  /* Never disable RX/TX IRQ in ISR */
+#define DMAFLAG2_IRQD_BOTH 0x  /* Always disable both RX/TX sources */
+#define DMAFLAG2_IRQD_MASK 0x01c0  /* Mask of options */
+#define DMAFLAG2_IRQD_BIT  22
+
+#define DMAFLAG2_MASK  (DMAFLAG2_TXIE | DMAFLAG2_RXIE | DMAFLAG2_IRQD_MASK)
 
 struct grspw_dma_config {
int flags;  /* DMA config flags, see DMAFLAG1&2_* options */
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index b64a807..6b5390f 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -2625,10 +2625,21 @@ static void grspw_work_dma_func(struct grspw_dma_priv 
*dma, unsigned int msg)
default:
break;
}
+   if (msg == 0)
+   return;
 
rx_cond_true = 0;
tx_cond_true = 0;
 
+   if ((dma->cfg.flags & DMAFLAG2_IRQD_MASK) == DMAFLAG2_IRQD_BOTH) {
+   /* In case both interrupt sources are disabled simultaneously
+* by the ISR the re-enabling of the interrupt source must also
+* do so to avoid missing interrupts. Both RX and TX process
+* will be forced.
+*/
+   msg |= WORK_DMA_RX_MASK | WORK_DMA_TX_MASK;
+   }
+
if (msg & WORK_DMA_RX_MASK) {
/* Do RX Work */
 
@@ -2726,7 +2737,7 @@ STATIC void grspw_isr(void *data)
unsigned int dma_stat, stat, stat_clrmsk, ctrl, icctrl, timecode, irqs;
unsigned int rxirq, rxack, intto;
int i, handled = 0, call_user_int_isr;
-   unsigned int message = WORK_NONE;
+   unsigned int message = WORK_NONE, dma_en;
 #ifdef RTEMS_HAS_SMP
IRQFLAGS_TYPE irqflags;
 #endif
@@ -2839,26 +2850,41 @@ STATIC void grspw_isr(void *data)
if (!irqs)
continue;
 
-   /* Disable Further IRQs (until enabled again)
-* from this DMA channel. Let the status
-* bit remain so that they can be handled by
-* work function.
-*/
-   REG_WRITE(&priv->regs->dma[i].ctrl, dma_stat & 
-   ~(GRSPW_DMACTRL_RI|GRSPW_DMACTRL_TI|
-   GRSPW_DMACTRL_PR|GRSPW_DMACTRL_PS|
-   GRSPW_DMACTRL_RA|GRSPW_DMACTRL_TA|
-   GRSPW_DMACTRL_AT));
handled = 1;
 
/* DMA error has priority, if error happens it is assumed that
 * the common work-queue stops the DMA operation for that
 * channel and makes the DMA tasks exit from their waiting
 * functions (both RX and TX tasks).
+* 
+* Disable Further IRQs (until enabled again)
+* from this DMA channel. Let the status
+* bit remain so that they can be handled by
+* work function.
 */
if (irqs & GRSPW_DMA_STATUS_ERROR) {
+   REG_WR

[PATCH 41/44] leon, grspw_pkt: unregister ISR on close

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index d3eca27..ce5b732 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -657,6 +657,9 @@ int grspw_close(void *d)
}
grspw_hw_stop(priv);
 
+   /* Uninstall Interrupt handler */
+   drvmgr_interrupt_unregister(priv->dev, 0, grspw_isr, priv);
+
/* Free descriptor table memory if allocated using malloc() */
if (priv->bd_mem_alloced) {
free((void *)priv->bd_mem_alloced);
-- 
2.7.4

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[PATCH 44/44] leon, grspw_pkt: fix overwrite protection when more than 32 devs

2017-03-03 Thread Daniel Hellstrom
This is a fix for a coverity warning
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index e44ca56..a3303c3 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -3093,7 +3093,7 @@ static int grspw2_init3(struct drvmgr_dev *dev)
GRSPW_DBG("GRSPW[%d] on bus %s\n", dev->minor_drv,
dev->parent->dev->name);
 
-   if (grspw_count > GRSPW_MAX)
+   if (grspw_count >= GRSPW_MAX)
return DRVMGR_ENORES;
 
priv = dev->priv;
-- 
2.7.4

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[PATCH 12/44] leon, grspw_pkt: added link_ctrl options

2017-03-03 Thread Daniel Hellstrom
Improved the link error handling options. Its now possible to
disable the link on individual link errors/warnings instead of
always on all or none.

Changed name of LINKOPTS_IRQ to LINKOPTS_EIRQ to match Linux
and VxWorks SpW driver.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 25 ---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 17 +--
 2 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index f16ec20..ea0ae9a 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -193,10 +193,29 @@ struct grspw_core_stats {
 #define LINKOPTS_DISABLE   0x0001
 #define LINKOPTS_START 0x0002
 #define LINKOPTS_AUTOSTART 0x0004
-#define LINKOPTS_DIS_ONERR 0x0008
+#define LINKOPTS_DIS_ONERR 0x0008  /* Disable DMA transmitter on link error
+* Controls LE bit in DMACTRL register.
+*/
+#define LINKOPTS_DIS_ON_CE 0x002/* Disable Link on Credit error */
+#define LINKOPTS_DIS_ON_ER 0x004/* Disable Link on Escape error */
+#define LINKOPTS_DIS_ON_DE 0x008/* Disable Link on Disconnect error */
+#define LINKOPTS_DIS_ON_PE 0x010/* Disable Link on Parity error */
+#define LINKOPTS_DIS_ON_WE 0x040/* Disable Link on write synchonization
+ * error (GRSPW1 only)
+ */
+#define LINKOPTS_DIS_ON_EE 0x100/* Disable Link on Early EOP/EEP 
error*/
+
 /*#define LINKOPTS_TICK_OUT_IRQ0x0100*//* Enable Tick-out IRQ */
-#define LINKOPTS_IRQ   0x0200  /* Enable Error Link IRQ */
-#define LINKOPTS_MASK  0x020f  /* All above options */
+#define LINKOPTS_EIRQ  0x0200  /* Enable Error Link IRQ */
+
+#define LINKOPTS_MASK  0x15e020f/* All above options */
+#define LINKOPTS_MASK_DIS_ON   0x15e/* All disable link on error options
+ * On a certain error the link disable
+ * bit will be written and the work
+ * task will call dma_stop() for all
+ * channels.
+ */
+
 
 /* grspw_tc_ctrl() options */
 #define TCOPTS_EN_RXIRQ0x0001  /* Tick-Out IRQ */
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index cee6dcc..1827fbd 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -469,8 +469,8 @@ struct grspw_priv {
spwpkt_ic_isr_t icisr;
void *icisr_arg;
 
-   /* Disable Link on SpW Link error */
-   int dis_link_on_err;
+   /* Bit mask representing events which shall cause link disable. */
+   unsigned int dis_link_on_err;
 
/* "Core Global" Statistics gathered, not dependent on DMA channel */
struct grspw_core_stats stats;
@@ -772,10 +772,15 @@ void grspw_link_ctrl(void *d, int *options, int *clkdiv)
ctrl &= ~GRSPW_CTRL_IE;
 
REG_WRITE(®s->ctrl, ctrl);
-   priv->dis_link_on_err = (*options & LINKOPTS_DIS_ONERR) 
>> 3;
+   /* Store the link disable events for use in
+   ISR. The LINKOPTS_DIS_ON_* options are actually the
+   corresponding bits in the status register, shifted
+   by 16. */
+   priv->dis_link_on_err = *options &
+   (LINKOPTS_MASK_DIS_ON | LINKOPTS_DIS_ONERR);
}
SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
-   *options = (ctrl & GRSPW_LINK_CFG)|(priv->dis_link_on_err << 3);
+   *options = (ctrl & GRSPW_LINK_CFG) | priv->dis_link_on_err;
}
 }
 
@@ -2268,7 +2273,7 @@ int grspw_dma_start(void *c)
ctrl =  GRSPW_DMACTRL_AI | GRSPW_DMACTRL_PS | GRSPW_DMACTRL_PR |
GRSPW_DMACTRL_TA | GRSPW_DMACTRL_RA | GRSPW_DMACTRL_RE |
(dma->cfg.flags & DMAFLAG_MASK) << GRSPW_DMACTRL_NS_BIT;
-   if (dma->core->dis_link_on_err)
+   if (dma->core->dis_link_on_err & LINKOPTS_DIS_ONERR)
ctrl |= GRSPW_DMACTRL_LE;
if (dma->cfg.rx_irq_en_cnt != 0)
ctrl |= GRSPW_DMACTRL_RI;
@@ -2554,7 +2559,7 @@ STATIC void grspw_isr(void *data)
if (stat & GRSPW_STS_WE)
priv->stats.err_wsync++;
 
-   if (priv->dis_link_on_err) {
+   if ((priv->dis_link_on_err >> 16) & stat) {
/* Disable the link, no more transfers are expected
 * on any DMA channel.
 */
-

[PATCH 17/44] leon, grspw_pkt: fixed device/dma closing

2017-03-03 Thread Daniel Hellstrom
The user is now responsible to stop and close the DMA channels
before closing the device. To prevent complicated situations and
blocking the caller of grspw_close and grspw_dma_close a return
code was added to indicate to the user that the DMA may not have
been stopped or that blocked tasks are still active within the
driver for the specified device.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h |  4 +--
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 44 ---
 2 files changed, 33 insertions(+), 15 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 83d5c9c..9a2a440 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -312,7 +312,7 @@ extern void grspw_initialize_user(
);
 extern int grspw_dev_count(void);
 extern void *grspw_open(int dev_no);
-extern void grspw_close(void *d);
+extern int grspw_close(void *d);
 extern void grspw_hw_support(void *d, struct grspw_hw_sup *hw);
 extern void grspw_stats_read(void *d, struct grspw_core_stats *sts);
 extern void grspw_stats_clr(void *d);
@@ -422,7 +422,7 @@ extern int grspw_port_active(void *d);
 
 /*** DMA Interface ***/
 extern void *grspw_dma_open(void *d, int chan_no);
-extern void grspw_dma_close(void *c);
+extern int grspw_dma_close(void *c);
 
 extern int grspw_dma_start(void *c);
 extern void grspw_dma_stop(void *c);
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 359b1ac..066d30f 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -623,7 +623,7 @@ out:
return priv;
 }
 
-void grspw_close(void *d)
+int grspw_close(void *d)
 {
struct grspw_priv *priv = d;
int i;
@@ -631,21 +631,24 @@ void grspw_close(void *d)
/* Take GRSPW lock - Wait until we get semaphore */
if (rtems_semaphore_obtain(grspw_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
!= RTEMS_SUCCESSFUL)
-   return;
+   return -1;
 
-   /* Stop Hardware from doing DMA, put HW into "startup-state",
-* Stop hardware from generating IRQ.
+   /* Check that user has stopped and closed all DMA channels
+* appropriately. At this point the Hardware shall not be doing DMA
+* or generating Interrupts. We want HW in a "startup-state".
 */
-   for (i=0; ihwsup.ndma_chans; i++)
-   grspw_dma_close(&priv->dma[i]);
+   for (i=0; ihwsup.ndma_chans; i++) {
+   if (priv->dma[i].open) {
+   rtems_semaphore_release(grspw_sem);
+   return 1;
+   }
+   }
grspw_hw_stop(priv);
 
/* Mark not open */
priv->open = 0;
-
rtems_semaphore_release(grspw_sem);
-
-   /* Check that all threads are out? */
+   return 0;
 }
 
 void grspw_hw_support(void *d, struct grspw_hw_sup *hw)
@@ -1751,19 +1754,25 @@ STATIC void grspw_dma_reset(struct grspw_dma_priv *dma)
grspw_dma_stats_clr(dma);
 }
 
-void grspw_dma_close(void *c)
+int grspw_dma_close(void *c)
 {
struct grspw_dma_priv *dma = c;
 
if (!dma->open)
-   return;
+   return 0;
 
/* Take device lock - Wait until we get semaphore */
if (rtems_semaphore_obtain(dma->sem_dma, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
!= RTEMS_SUCCESSFUL)
-   return;
+   return -1;
 
-   grspw_dma_stop_locked(dma);
+   /* Can not close active DMA channel. User must stop DMA and make sure
+* no threads are active/blocked within driver.
+*/
+   if (dma->started || dma->rx_wait.waiting || dma->tx_wait.waiting) {
+   rtems_semaphore_release(dma->sem_dma);
+   return 1;
+   }
 
/* Free resources */
rtems_semaphore_delete(dma->rx_wait.sem_wait);
@@ -1779,6 +1788,7 @@ void grspw_dma_close(void *c)
dma->tx_ring_base = NULL;
 
dma->open = 0;
+   return 0;
 }
 
 /* Schedule List of packets for transmission at some point in
@@ -2398,6 +2408,10 @@ void grspw_dma_stop(void *c)
 {
struct grspw_dma_priv *dma = c;
 
+   /* If DMA channel is closed we should not access the semaphore */
+   if (!dma->open)
+   return;
+
/* Take DMA Channel lock */
if (rtems_semaphore_obtain(dma->sem_dma, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
!= RTEMS_SUCCESSFUL)
@@ -2429,6 +2443,10 @@ static void grspw_work_dma_func(struct grspw_dma_priv 
*dma)
unsigned int ctrl;
IRQFLAGS_TYPE irqflags;
 
+   /* If DMA channel is closed we should not access the semaphore */
+   if (dma->open == 0)
+   return;
+
rx_cond_true = 0;
tx_cond_true = 0;
dma->stats.irq_cnt++;
-- 
2.7.4

___
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[PATCH 14/44] leon, grspw_pkt: fixed error return path in dma_open

2017-03-03 Thread Daniel Hellstrom
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 43 +++
 1 file changed, 31 insertions(+), 12 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 22fcda3..ce4012b 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -1651,24 +1651,28 @@ void *grspw_dma_open(void *d, int chan_no)
dma->cfg.tx_irq_en_cnt = 0;
dma->cfg.flags = DMAFLAG_NO_SPILL;
 
+   /* set to NULL so that error exit works correctly */
+   dma->sem_dma = RTEMS_ID_NONE;
+   dma->rx_wait.sem_wait = RTEMS_ID_NONE;
+   dma->tx_wait.sem_wait = RTEMS_ID_NONE;
+   dma->rx_ring_base = NULL;
+
/* DMA Channel Semaphore created with count = 1 */
if (rtems_semaphore_create(
rtems_build_name('S', 'D', '0' + priv->index, '0' + chan_no), 1,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | \
RTEMS_NO_INHERIT_PRIORITY | RTEMS_LOCAL | \
RTEMS_NO_PRIORITY_CEILING, 0, &dma->sem_dma) != RTEMS_SUCCESSFUL) {
-   dma = NULL;
-   goto out;
+   dma->sem_dma = RTEMS_ID_NONE;
+   goto err;
}
 
/* Allocate memory for the two descriptor rings */
size = sizeof(struct grspw_ring) * (GRSPW_RXBD_NR + GRSPW_TXBD_NR);
dma->rx_ring_base = (struct grspw_rxring *)malloc(size);
dma->tx_ring_base = (struct grspw_txring 
*)&dma->rx_ring_base[GRSPW_RXBD_NR];
-   if (dma->rx_ring_base == NULL) {
-   dma = NULL;
-   goto out;
-   }
+   if (dma->rx_ring_base == NULL)
+   goto err;
 
/* Create DMA RX and TX Channel sempahore with count = 0 */
if (rtems_semaphore_create(
@@ -1676,16 +1680,16 @@ void *grspw_dma_open(void *d, int chan_no)
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | \
RTEMS_NO_INHERIT_PRIORITY | RTEMS_LOCAL | \
RTEMS_NO_PRIORITY_CEILING, 0, &dma->rx_wait.sem_wait) != 
RTEMS_SUCCESSFUL) {
-   dma = NULL;
-   goto out;
+   dma->rx_wait.sem_wait = RTEMS_ID_NONE;
+   goto err;
}
if (rtems_semaphore_create(
rtems_build_name('S', 'T', '0' + priv->index, '0' + chan_no), 0,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | \
RTEMS_NO_INHERIT_PRIORITY | RTEMS_LOCAL | \
RTEMS_NO_PRIORITY_CEILING, 0, &dma->tx_wait.sem_wait) != 
RTEMS_SUCCESSFUL) {
-   dma = NULL;
-   goto out;
+   dma->tx_wait.sem_wait = RTEMS_ID_NONE;
+   goto err;
}
 
/* Reset software structures */
@@ -1698,6 +1702,19 @@ out:
rtems_semaphore_release(grspw_sem);
 
return dma;
+
+   /* initialization error happended */
+err:
+   if (dma->sem_dma != RTEMS_ID_NONE)
+   rtems_semaphore_delete(dma->sem_dma);
+   if (dma->rx_wait.sem_wait != RTEMS_ID_NONE)
+   rtems_semaphore_delete(dma->rx_wait.sem_wait);
+   if (dma->tx_wait.sem_wait != RTEMS_ID_NONE)
+   rtems_semaphore_delete(dma->tx_wait.sem_wait);
+   if (dma->rx_ring_base)
+   free(dma->rx_ring_base);
+   dma = NULL;
+   goto out;
 }
 
 /* Initialize Software Structures:
@@ -1751,7 +1768,9 @@ void grspw_dma_close(void *c)
/* Free resources */
rtems_semaphore_delete(dma->rx_wait.sem_wait);
rtems_semaphore_delete(dma->tx_wait.sem_wait);
-   rtems_semaphore_delete(dma->sem_dma); /* Release and delete lock */
+   /* Release and delete lock. Operations requiring lock will fail */
+   rtems_semaphore_delete(dma->sem_dma);
+   dma->sem_dma = RTEMS_ID_NONE;
 
/* Free memory */
if (dma->rx_ring_base)
@@ -2941,7 +2960,7 @@ static int grspw_common_init(void)
if (rtems_task_start(grspw_work_task, grspw_work_func, 0) !=
RTEMS_SUCCESSFUL)
return -1;
-   }
+}
 
grspw_initialized = 1;
return 0;
-- 
2.7.4

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[PATCH 43/44] leon, grtm: ioctl() shouldn't access pointer before validated

2017-03-03 Thread Daniel Hellstrom
This is a fix for a coverity warning
---
 c/src/lib/libbsp/sparc/shared/tmtc/grtm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/c/src/lib/libbsp/sparc/shared/tmtc/grtm.c 
b/c/src/lib/libbsp/sparc/shared/tmtc/grtm.c
index 48b4631..a1038d4 100644
--- a/c/src/lib/libbsp/sparc/shared/tmtc/grtm.c
+++ b/c/src/lib/libbsp/sparc/shared/tmtc/grtm.c
@@ -1188,7 +1188,7 @@ static rtems_device_driver 
grtm_ioctl(rtems_device_major_number major, rtems_dev
struct grtm_priv *pDev;
struct drvmgr_dev *dev;
rtems_libio_ioctl_args_t *ioarg = (rtems_libio_ioctl_args_t *)arg;
-   unsigned int *data = ioarg->buffer;
+   unsigned int *data;
int status;
struct grtm_ioc_config *cfg;
struct grtm_ioc_hw_status *hwregs;
@@ -1209,6 +1209,7 @@ static rtems_device_driver 
grtm_ioctl(rtems_device_major_number major, rtems_dev
if (!ioarg)
return RTEMS_INVALID_NAME;
 
+   data = ioarg->buffer;
ioarg->ioctl_return = 0;
switch(ioarg->command) {
case GRTM_IOC_START:
-- 
2.7.4

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[PATCH 19/44] leon, grspw_pkt: allow user controlled DMA intr

2017-03-03 Thread Daniel Hellstrom
The user has already the power to control which DMA buffer
will generate interrupt, but no clean way to enable RX/TX
interrupts on DMA channel. Without this patch the user had
to init DMA config rx/tx_irq_en_cnt to a very large value.
---
 c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h | 12 +++-
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 12 +++-
 2 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h 
b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
index 1bab68b..995d8bd 100644
--- a/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
+++ b/c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
@@ -261,9 +261,19 @@ struct grspw_core_stats {
 #define DMAFLAG_STRIP_PID  0x0008  /* See HW doc DMA-CTRL SP bit */
 #define DMAFLAG_RESV2  0x0010  /* HAS NO EFFECT */
 #define DMAFLAG_MASK   (DMAFLAG_NO_SPILL|DMAFLAG_STRIP_ADR|DMAFLAG_STRIP_PID)
+/* grspw_dma_config.flags misc options (not shifted internally) */
+#define DMAFLAG2_TXIE  0x0010  /* See HW doc DMA-CTRL TI bit. 
+* Used to enable TX DMA interrupt
+* when tx_irq_en_cnt=0.
+*/
+#define DMAFLAG2_RXIE  0x0020  /* See HW doc DMA-CTRL RI bit.
+* Used to enable RX DMA interrupt
+* when rx_irq_en_cnt=0.
+*/
+#define DMAFLAG2_MASK  (DMAFLAG2_TXIE | DMAFLAG2_RXIE)
 
 struct grspw_dma_config {
-   int flags;  /* DMA config flags, see DMAFLAG_* options */
+   int flags;  /* DMA config flags, see DMAFLAG1&2_* options */
int rxmaxlen;   /* RX Max Packet Length */
int rx_irq_en_cnt;  /* Enable RX IRQ every cnt descriptors */
int tx_irq_en_cnt;  /* Enable TX IRQ every cnt descriptors */
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 048f7d1..9f9a31a 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -2301,7 +2301,7 @@ int grspw_dma_config(void *c, struct grspw_dma_config 
*cfg)
if (dma->started || !cfg)
return -1;
 
-   if (cfg->flags & ~DMAFLAG_MASK)
+   if (cfg->flags & ~(DMAFLAG_MASK | DMAFLAG2_MASK))
return -1;
 
/* Update Configuration */
@@ -2398,9 +2398,9 @@ int grspw_dma_start(void *c)
(dma->cfg.flags & DMAFLAG_MASK) << GRSPW_DMACTRL_NS_BIT;
if (dma->core->dis_link_on_err & LINKOPTS_DIS_ONERR)
ctrl |= GRSPW_DMACTRL_LE;
-   if (dma->cfg.rx_irq_en_cnt != 0)
+   if (dma->cfg.rx_irq_en_cnt != 0 || dma->cfg.flags & DMAFLAG2_RXIE)
ctrl |= GRSPW_DMACTRL_RI;
-   if (dma->cfg.tx_irq_en_cnt != 0)
+   if (dma->cfg.tx_irq_en_cnt != 0 || dma->cfg.flags & DMAFLAG2_TXIE)
ctrl |= GRSPW_DMACTRL_TI;
SPIN_LOCK_IRQ(&dma->core->devlock, irqflags);
ctrl |= REG_READ(&dma->regs->ctrl) & GRSPW_DMACTRL_EN;
@@ -2540,9 +2540,11 @@ static void grspw_work_dma_func(struct grspw_dma_priv 
*dma)
} else if (ctrl & (GRSPW_DMACTRL_PR | GRSPW_DMACTRL_PS)) {
/* DMA has finished a TX/RX packet */
ctrl &= ~GRSPW_DMACTRL_AT;
-   if (dma->cfg.rx_irq_en_cnt != 0)
+   if (dma->cfg.rx_irq_en_cnt != 0 ||
+   (dma->cfg.flags & DMAFLAG2_RXIE))
ctrl |= GRSPW_DMACTRL_RI;
-   if (dma->cfg.tx_irq_en_cnt != 0)
+   if (dma->cfg.tx_irq_en_cnt != 0 ||
+   (dma->cfg.flags & DMAFLAG2_TXIE))
ctrl |= GRSPW_DMACTRL_TI;
REG_WRITE(&dma->regs->ctrl, ctrl);
SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
-- 
2.7.4

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[PATCH 40/44] leon, grspw_pkt: ISR activate shutdown work only if errintr enabled

2017-03-03 Thread Daniel Hellstrom
In shared interrupt systems it might be a problem to handle the interrupt
regardless of the interrupt is enabled. Now the same approach to the
DMA RX/TX interrupt in the ISR is taken.
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 498333e..d3eca27 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -2819,7 +2819,8 @@ STATIC void grspw_isr(void *data)
if (stat & GRSPW_STS_WE)
priv->stats.err_wsync++;
 
-   if ((priv->dis_link_on_err >> 16) & stat) {
+   if (((priv->dis_link_on_err >> 16) & stat) &&
+   (REG_READ(&priv->regs->ctrl) & GRSPW_CTRL_IE)) {
/* Disable the link, no more transfers are expected
 * on any DMA channel.
 */
-- 
2.7.4

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[PATCH 22/44] leon, grspw_pkt: fix stscfg cfg TimeCode Int clr

2017-03-03 Thread Daniel Hellstrom
Without this patch time code interrupts was never cleared
in the STATUS register.
---
 c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c 
b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 60aa68f..5f40853 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -2666,7 +2666,8 @@ STATIC void grspw_isr(void *data)
 
/* Get Status from Hardware */
stat = REG_READ(&priv->regs->status);
-   stat_clrmsk = stat & (GRSPW_STS_TO | GRSPW_STAT_ERROR) & priv->stscfg;
+   stat_clrmsk = stat & (GRSPW_STS_TO | GRSPW_STAT_ERROR) &
+   (GRSPW_STS_TO | priv->stscfg);
 
/* Make sure to put the timecode handling first in order to get the
 * smallest possible interrupt latency
-- 
2.7.4

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GSoC 2017

2017-03-03 Thread aditya upadhyay
Hello all,
I am trying to implement pthread_condattr_getclock() in pthread.h in POSIX
directory. but i am not able to understand where and which location(files
and directories) these changes would require.As there are 3 pthread.h files
and i think implementation of this function is done at this location
(/home/aditya/development/rtems/4.12/sparc-rtems4.12/include/). I have used
FREEBSD and NETBSD as a reference.Would you please help me so that i can
proceed.

Regards,
Aditya
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Re: GSoC 2017

2017-03-03 Thread punit vara
Hi

On Fri, Mar 3, 2017 at 9:45 PM, aditya upadhyay  wrote:
> Hello all,
> I am trying to implement pthread_condattr_getclock() in pthread.h in POSIX
> directory. but i am not able to understand where and which location(files
> and directories) these changes would require.As there are 3 pthread.h files
> and i think implementation of this function is done at this location
> (/home/aditya/development/rtems/4.12/sparc-rtems4.12/include/). I have used

This location is not the actual RTEMS kernel location. Whenever you
want to implement something you should add in actual source code.
Which should be look like :

https://github.com/RTEMS/rtems

Here Posix directory is

/rtems/cpukit/posix/src

@Gedare Correct me if I am wrong ? I think we guys add POSIX function
in this directory only right ?

> FREEBSD and NETBSD as a reference.Would you please help me so that i can
> proceed.
>
> Regards,
> Aditya
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Re: GSoC 2017

2017-03-03 Thread Gedare Bloom
On Fri, Mar 3, 2017 at 12:57 PM, punit vara  wrote:
> Hi
>
> On Fri, Mar 3, 2017 at 9:45 PM, aditya upadhyay  wrote:
>> Hello all,
>> I am trying to implement pthread_condattr_getclock() in pthread.h in POSIX
>> directory. but i am not able to understand where and which location(files
>> and directories) these changes would require.As there are 3 pthread.h files
>> and i think implementation of this function is done at this location
>> (/home/aditya/development/rtems/4.12/sparc-rtems4.12/include/). I have used
>
> This location is not the actual RTEMS kernel location. Whenever you
> want to implement something you should add in actual source code.
> Which should be look like :
>
> https://github.com/RTEMS/rtems
>
> Here Posix directory is
>
> /rtems/cpukit/posix/src
>
> @Gedare Correct me if I am wrong ? I think we guys add POSIX function
> in this directory only right ?
>
POSIX stuff goes there, or in newlib. See also
https://devel.rtems.org/ticket/2833


>> FREEBSD and NETBSD as a reference.Would you please help me so that i can
>> proceed.
>>
>> Regards,
>> Aditya
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Re: GSoC 2017

2017-03-03 Thread Joel Sherrill
On Mar 3, 2017 9:47 PM, "Gedare Bloom"  wrote:

On Fri, Mar 3, 2017 at 12:57 PM, punit vara  wrote:
> Hi
>
> On Fri, Mar 3, 2017 at 9:45 PM, aditya upadhyay 
wrote:
>> Hello all,
>> I am trying to implement pthread_condattr_getclock() in pthread.h in
POSIX
>> directory. but i am not able to understand where and which location(files
>> and directories) these changes would require.As there are 3 pthread.h
files
>> and i think implementation of this function is done at this location
>> (/home/aditya/development/rtems/4.12/sparc-rtems4.12/include/). I have
used


Gedare.. is this method implemented already or have I just thought about it
so much I think it is.


> This location is not the actual RTEMS kernel location. Whenever you
> want to implement something you should add in actual source code.
> Which should be look like :
>
> https://github.com/RTEMS/rtems
>
> Here Posix directory is
>
> /rtems/cpukit/posix/src
>
> @Gedare Correct me if I am wrong ? I think we guys add POSIX function
> in this directory only right ?
>
POSIX stuff goes there, or in newlib. See also
https://devel.rtems.org/ticket/2833


>> FREEBSD and NETBSD as a reference.Would you please help me so that i can
>> proceed.
>>
>> Regards,
>> Aditya
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Issue with 'rtems_shell_wait_for_input' function

2017-03-03 Thread vivek kukreja
Hello all,

I made few changes to the fileio test to run NFS using libbsd. The test 
compiles and when i run it on qemu NFS is initialised.

The test starts with the 'rtems_shell_wait_for_input' function which returns 
RTEMS_UNSATISFIED so the test quits as soon as it begins. I read this means the 
terminal related attributes could not be set. When i bypass this function to 
directly start the test it works fine. Im not sure this is a bug or some 
problem with my configuration. Any help with this issue is appreciated!

Regards,
Vivek
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Re: GSoC 2017

2017-03-03 Thread Gedare Bloom
On Fri, Mar 3, 2017 at 5:40 PM, Joel Sherrill  wrote:
>
>
> On Mar 3, 2017 9:47 PM, "Gedare Bloom"  wrote:
>
> On Fri, Mar 3, 2017 at 12:57 PM, punit vara  wrote:
>> Hi
>>
>> On Fri, Mar 3, 2017 at 9:45 PM, aditya upadhyay 
>> wrote:
>>> Hello all,
>>> I am trying to implement pthread_condattr_getclock() in pthread.h in
>>> POSIX
>>> directory. but i am not able to understand where and which location(files
>>> and directories) these changes would require.As there are 3 pthread.h
>>> files
>>> and i think implementation of this function is done at this location
>>> (/home/aditya/development/rtems/4.12/sparc-rtems4.12/include/). I have
>>> used
>
>
> Gedare.. is this method implemented already or have I just thought about it
> so much I think it is.
>
https://git.rtems.org/rtems/tree/cpukit/posix/src/condattrgetclock.c#n24

>
>> This location is not the actual RTEMS kernel location. Whenever you
>> want to implement something you should add in actual source code.
>> Which should be look like :
>>
>> https://github.com/RTEMS/rtems
>>
>> Here Posix directory is
>>
>> /rtems/cpukit/posix/src
>>
>> @Gedare Correct me if I am wrong ? I think we guys add POSIX function
>> in this directory only right ?
>>
> POSIX stuff goes there, or in newlib. See also
> https://devel.rtems.org/ticket/2833
>
>
>>> FREEBSD and NETBSD as a reference.Would you please help me so that i can
>>> proceed.
>>>
>>> Regards,
>>> Aditya
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PI STATUS

2017-03-03 Thread Sagar Gupta
Hi ,

I have done a course on Operating Systems at undergraduate level.
I am specifically interested in development of drivers for operating
systems which work on hardware such as the Raspberry Pi.
Can I get to know what are the potential projects for Raspberry pi in
GSoc'17 ?
also can you guide me to such threads, projects, documentation which could
be be helpful for the same.

Thanks

Warm Regards,
Sagar Gupta
Phone : +91 8686146518
Computer Science Student
BITS Pilani , Hyderabad Campus
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