Re: Porting to a NXP K6x series chip
You have the gist of it. Read through the https://docs.rtems.org/branches/master/cpu-supplement/index.html and https://docs.rtems.org/branches/master/bsp-howto/index.html for a bit more guidance. There is currently no official "porting guide" beyond that, so keep asking questions. On Thu, Feb 23, 2017 at 1:19 PM, wrote: > I've got a FRDM-K64F and would like to get RTEMS running on it for a personal > project. It has the standard ARM interrupt controller. One complication is > that the SRAM is divided into two banks of 128K as the banks are connected to > different buses in the MCU, and causes hard faults if an unaligned access > crosses the boundary. > > Looking at the existing code, anything specific too the K6x would go in > libcpu, and anything specific to board (such as clock setup/debug uart) would > appear to go in libsp? > > Thanks, > George > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Porting to a NXP K6x series chip
For the RAM, maybe 128k can be used for the workspace,heap, and initial stack, and the other 128k bank can be used for data. If you get this working, I would not mind trying to port it to the Teensy 3.6 board, which has a similar CPU: https://www.pjrc.com/store/teensy36.html Alan On Fri, Feb 24, 2017 at 9:35 AM, Gedare Bloom wrote: > You have the gist of it. Read through the > https://docs.rtems.org/branches/master/cpu-supplement/index.html and > https://docs.rtems.org/branches/master/bsp-howto/index.html for a bit > more guidance. There is currently no official "porting guide" beyond > that, so keep asking questions. > > On Thu, Feb 23, 2017 at 1:19 PM, wrote: > > I've got a FRDM-K64F and would like to get RTEMS running on it for a > personal project. It has the standard ARM interrupt controller. One > complication is that the SRAM is divided into two banks of 128K as the > banks are connected to different buses in the MCU, and causes hard faults > if an unaligned access crosses the boundary. > > > > Looking at the existing code, anything specific too the K6x would go in > libcpu, and anything specific to board (such as clock setup/debug uart) > would appear to go in libsp? > > > > Thanks, > > George > > > > ___ > > devel mailing list > > devel@rtems.org > > http://lists.rtems.org/mailman/listinfo/devel > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: Porting to a NXP K6x series chip
On Fri, Feb 24, 2017 at 8:56 AM, Alan Cudmore wrote: > For the RAM, maybe 128k can be used for the workspace,heap, and initial > stack, and the other 128k bank can be used for data. > I did something similar to this for an old 68000 board which only had 384K RAM. You gave good advice for the port/BSP itself. I wouldn't expect much in what I would call porting proper. The ARM port should cover the basic CPU architectural variations. The issue is going to me in CPU model specifics and peripherals. Mostly BSP issues and where peripherals are common across NXP CPUs, libbsp/arm/.. and libcpu/arm/... FWIW we are trying to slowly disperse libcpu contents so focusing on the proper libbsp directories and asking questions when in doubt is the best path. > If you get this working, I would not mind trying to port it to the Teensy > 3.6 board, which has a similar CPU: > https://www.pjrc.com/store/teensy36.html > Alan > > > > On Fri, Feb 24, 2017 at 9:35 AM, Gedare Bloom wrote: > >> You have the gist of it. Read through the >> https://docs.rtems.org/branches/master/cpu-supplement/index.html and >> https://docs.rtems.org/branches/master/bsp-howto/index.html for a bit >> more guidance. There is currently no official "porting guide" beyond >> that, so keep asking questions. >> >> On Thu, Feb 23, 2017 at 1:19 PM, wrote: >> > I've got a FRDM-K64F and would like to get RTEMS running on it for a >> personal project. It has the standard ARM interrupt controller. One >> complication is that the SRAM is divided into two banks of 128K as the >> banks are connected to different buses in the MCU, and causes hard faults >> if an unaligned access crosses the boundary. >> > >> > Looking at the existing code, anything specific too the K6x would go in >> libcpu, and anything specific to board (such as clock setup/debug uart) >> would appear to go in libsp? >> > >> > Thanks, >> > George >> > >> > ___ >> > devel mailing list >> > devel@rtems.org >> > http://lists.rtems.org/mailman/listinfo/devel >> ___ >> devel mailing list >> devel@rtems.org >> http://lists.rtems.org/mailman/listinfo/devel >> > > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
devel.rtems.org is down for maintenance.
The site is going down for some unplanned maintenance. While investigating another issue I decided it was better to redo the entire site with a full upgrade. Sorry for the inconvenience it will be back tomorrow (2017-02-25) sometime! Amar. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
