[PATCH v2] eventdev: add port attribute for independent enqueue
From: Pravin Pathak
Independent Enqueue support is added to DPDK 24.11.
Adding support for RTE_EVENT_PORT_ATTR_INDEPENDENT_ENQ attribute
to rte_event_port_attr_get() which was missing
Signed-off-by: Pravin Pathak
---
lib/eventdev/rte_eventdev.c | 8
lib/eventdev/rte_eventdev.h | 4
2 files changed, 12 insertions(+)
diff --git a/lib/eventdev/rte_eventdev.c b/lib/eventdev/rte_eventdev.c
index ca295c87c4..61cff87b63 100644
--- a/lib/eventdev/rte_eventdev.c
+++ b/lib/eventdev/rte_eventdev.c
@@ -880,6 +880,14 @@ rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id,
uint32_t attr_id,
*attr_value = !!(config & RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL);
break;
}
+ case RTE_EVENT_PORT_ATTR_INDEPENDENT_ENQ:
+ {
+ uint32_t config;
+
+ config = dev->data->ports_cfg[port_id].event_port_cfg;
+ *attr_value = !!(config & RTE_EVENT_PORT_CFG_INDEPENDENT_ENQ);
+ break;
+ }
default:
return -EINVAL;
};
diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index fabd1490db..6400d6109f 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1318,6 +1318,10 @@ rte_event_port_quiesce(uint8_t dev_id, uint8_t port_id,
* Port attribute id for the implicit release disable attribute of the port.
*/
#define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3
+/**
+ * Port attribute id for the Independent Enqueue feature.
+ */
+#define RTE_EVENT_PORT_ATTR_INDEPENDENT_ENQ 4
/**
* Get an attribute from a port.
--
2.26.2
[PATCH v1] event/dlb2: add port attribute for independent enqueue
From: Pravin Pathak
Independent Enqueue support is added to DPDK 24.11
Adding the attribute rte_event_port_attr_get() was missing
This commit adds it to retrieve port attributes
Signed-off-by: Pravin Pathak
---
lib/eventdev/rte_eventdev.c | 8
lib/eventdev/rte_eventdev.h | 6 ++
2 files changed, 14 insertions(+)
diff --git a/lib/eventdev/rte_eventdev.c b/lib/eventdev/rte_eventdev.c
index ca295c87c4..61cff87b63 100644
--- a/lib/eventdev/rte_eventdev.c
+++ b/lib/eventdev/rte_eventdev.c
@@ -880,6 +880,14 @@ rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id,
uint32_t attr_id,
*attr_value = !!(config & RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL);
break;
}
+ case RTE_EVENT_PORT_ATTR_INDEPENDENT_ENQ:
+ {
+ uint32_t config;
+
+ config = dev->data->ports_cfg[port_id].event_port_cfg;
+ *attr_value = !!(config & RTE_EVENT_PORT_CFG_INDEPENDENT_ENQ);
+ break;
+ }
default:
return -EINVAL;
};
diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index fabd1490db..4089c493a7 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1318,6 +1318,12 @@ rte_event_port_quiesce(uint8_t dev_id, uint8_t port_id,
* Port attribute id for the implicit release disable attribute of the port.
*/
#define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3
+/**
+ * Port attribute indicating it supports independent enqueue. i.e. enqueue
order
+ * is independent of dequeue order for all forwarded events.
+ *
+ */
+#define RTE_EVENT_PORT_ATTR_INDEPENDENT_ENQ 4
/**
* Get an attribute from a port.
--
2.26.2
[PATCH v1] event/dlb2: enhancement to DLB credit management
Updates are added to enable releasing of unused credits by threads
to avoid deadlock and starving of other active threads needing credits.
It also adds compile time options to enable/disable credit checks.
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
.mailmap | 1 +
doc/guides/eventdevs/dlb2.rst | 19 ++
drivers/event/dlb2/dlb2.c | 316 +++--
drivers/event/dlb2/dlb2_priv.h | 4 +-
drivers/event/dlb2/meson.build | 15 ++
5 files changed, 298 insertions(+), 57 deletions(-)
diff --git a/.mailmap b/.mailmap
index a03d3cfb59..9688941c92 100644
--- a/.mailmap
+++ b/.mailmap
@@ -1556,6 +1556,7 @@ Tim Shearer
Ting-Kai Ku
Ting Xu
Tingting Liao
+Tirthendu Sarkar
Tiwei Bie
Todd Fujinaka
Tomáš Ďurovec
diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst
index 2532d92888..0ac3027f93 100644
--- a/doc/guides/eventdevs/dlb2.rst
+++ b/doc/guides/eventdevs/dlb2.rst
@@ -456,6 +456,25 @@ Example command to enable QE Weight feature:
--allow ea:00.0,enable_cq_weight=
+Credit Handling Scenario Improvements
+~
+
+It is possible for ports to hold on to unused credits and not release them
+due to insufficient accumulation (i.e. less than 2 * credit quanta). This
+can result in credit deadlocks situation. DLB2 PMD makes worker ports to
+release all accumulated credits when back-to-back zero poll count reaches
+a preset threshold and makes producer ports release all the accumulated
+credits if enqueue fails for a consecutive number of retries.
+
+New meson options are provided through c_args for enabling and disabling
+credits handling option flags. Credit checks are enabled by default.
+
+Example command to use as meson option for credit handling:
+
+.. code-block:: console
+
+ meson configure -Dc_args='-DDLB_SW_CREDITS_CHECKS=0
-DDLB_HW_CREDITS_CHECKS=1'
+
Running Eventdev Applications with DLB Device
-
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 934fcafcfe..286241ea41 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -43,7 +43,63 @@
* to DLB can go ahead of relevant application writes like updates to buffers
* being sent with event
*/
+#ifndef DLB2_BYPASS_FENCE_ON_PP
#define DLB2_BYPASS_FENCE_ON_PP 0 /* 1 == Bypass fence, 0 == do not bypass */
+#endif
+
+/*
+ * Optimization switches for improving driver performance.
+ * WARNING: Do not change any of the below switches without first
+ * consulting with DLB2 software development team.
+ *
+ * HW credit checks can only be turned off for DLB2 device if following
+ * is true for each created eventdev
+ * LDB credits <= DIR credits + minimum CQ Depth
+ * (CQ Depth is minimum of all ports configured within eventdev)
+ * This needs to be true for all eventdevs created on any DLB2 device
+ * managed by this driver.
+ * DLB2.5 does not any such restriction as it has single credit pool
+ */
+#ifndef DLB_HW_CREDITS_CHECKS
+#define DLB_HW_CREDITS_CHECKS 0
+#endif
+
+/*
+ * SW credit checks can only be turned off if application has a way to
+ * limit input events to the eventdev below assigned credit limit
+ */
+#ifndef DLB_SW_CREDITS_CHECKS
+#define DLB_SW_CREDITS_CHECKS 1
+#endif
+
+/*
+ * This check can only be disabled if application is not using
+ * queues of RTE_EVENT_QUEUE_CFG_ALL_TYPES type.
+ * Once such application is fully validated, type check can be turned off.
+ * HW will continue checking for correct type and generate alarm on mismatch
+ */
+#ifndef DLB_TYPE_CHECK
+#define DLB_TYPE_CHECK 1
+#endif
+#define DLB_TYPE_MACRO 0x010002
+
+/*
+ * To avoid deadlock situations, by default, per port new_event_threshold
+ * check is disabled. nb_events_limit is still checked while allocating
+ * new event credits.
+ */
+#define ENABLE_PORT_THRES_CHECK 1
+/*
+ * To avoid deadlock, ports holding to credits will release them after these
+ * many consecutive zero dequeues
+ */
+#define DLB2_ZERO_DEQ_CREDIT_RETURN_THRES 16384
+
+/*
+ * To avoid deadlock, ports holding to credits will release them after these
+ * many consecutive enqueue failures
+ */
+#define DLB2_ENQ_FAIL_CREDIT_RETURN_THRES 100
/*
* Resources exposed to eventdev. Some values overridden at runtime using
@@ -52,6 +108,7 @@
#if (RTE_EVENT_MAX_QUEUES_PER_DEV > UINT8_MAX)
#error "RTE_EVENT_MAX_QUEUES_PER_DEV cannot fit in member max_event_queues"
#endif
+
static struct rte_event_dev_info evdev_dlb2_default_info = {
.driver_name = "", /* probe will set */
.min_dequeue_timeout_ns = DLB2_MIN_DEQUEUE_TIMEOUT_NS,
@@ -375,6 +432,33 @@ set_max_num_events(const char *key __rte_unused,
return 0;
}
+static int
+set_max_num_events_v2_5(const char *key __rte_unused,
+ const char *value,
+ void *opaque)
+{
+ int *max_num_events = o
[PATCH v1 4/7] event/dlb2: support managing history list resource
Add support for setting application specified port history
Set HL equal to CQ depth when inflight control is enabled
Added command line parameters 'use_default_hl' (default: 1)
and 'alloc_hl_entries'
- When 'use_default_hl = 1'
* Per port HL is set to DLB2_FIXED_CQ_HL_SIZE (32)
* Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
is DLB2_FIXED_CQ_HL_SIZE/2
* command line parameter alloc_hl_entries is ignored
- When 'use_default_hl = 0'
* Per LDB port HL = 2 * CQ depth
* Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
is DLB2_FIXED_CQ_HL_SIZE
* User should calculate needed HL entries based on CQ depths the
application will use and specify it as command line parameter
'alloc_hl_entries'. This will be used to allocate HL entries.
alloc_hl_entries = (Sum of all LDB ports CQ depths * 2)
* If alloc_hl_entries is not specified, then
Total HL entries for the eventdev = num_ldb_ports * 64
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/dlb2.c | 220 +
drivers/event/dlb2/dlb2_iface.c| 5 +-
drivers/event/dlb2/dlb2_iface.h| 4 +-
drivers/event/dlb2/dlb2_priv.h | 19 +-
drivers/event/dlb2/dlb2_user.h | 24 +++
drivers/event/dlb2/pf/base/dlb2_regs.h | 9 +
drivers/event/dlb2/pf/base/dlb2_resource.c | 74 +++
drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++
drivers/event/dlb2/pf/dlb2_pf.c| 29 ++-
drivers/event/dlb2/rte_pmd_dlb2.c | 23 +++
drivers/event/dlb2/rte_pmd_dlb2.h | 40
drivers/event/dlb2/version.map | 1 +
12 files changed, 422 insertions(+), 44 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 24c56a7968..cd843bb9d0 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -727,6 +727,50 @@ set_enable_cq_weight(const char *key __rte_unused,
return 0;
}
+static int set_hl_override(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ bool *default_hl = opaque;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ if ((*value == 'n') || (*value == 'N') || (*value == '0'))
+ *default_hl = false;
+ else
+ *default_hl = true;
+
+ return 0;
+}
+
+static int set_hl_entries(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ int hl_entries = 0;
+ int ret;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ ret = dlb2_string_to_int(&hl_entries, value);
+ if (ret < 0)
+ return ret;
+
+ if (!hl_entries || (uint32_t)hl_entries > DLB2_MAX_HL_ENTRIES) {
+ DLB2_LOG_ERR(
+ "alloc_hl_entries %u out of range, must be in [1 - %d]",
+ hl_entries, DLB2_MAX_HL_ENTRIES);
+ return -EINVAL;
+ }
+ *(uint32_t *)opaque = hl_entries;
+
+ return 0;
+}
+
static int
set_qid_depth_thresh(const char *key __rte_unused,
const char *value,
@@ -932,8 +976,16 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
DLB2_NUM_ATOMIC_INFLIGHTS_PER_QUEUE *
cfg->num_ldb_queues;
- cfg->num_hist_list_entries = resources_asked->num_ldb_ports *
- evdev_dlb2_default_info.max_event_port_dequeue_depth;
+ /* If hl_entries is non-zero then user specified command line option.
+* Else compute using default_port_hl that has been set earlier based
+* on use_default_hl option
+*/
+ if (dlb2->hl_entries) {
+ cfg->num_hist_list_entries = dlb2->hl_entries;
+ } else {
+ cfg->num_hist_list_entries =
+ resources_asked->num_ldb_ports * dlb2->default_port_hl;
+ }
if (device_version == DLB2_HW_V2_5) {
DLB2_LOG_LINE_DBG("sched domain create - ldb_qs=%d,
ldb_ports=%d, dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d,
credits=%d",
@@ -1154,8 +1206,8 @@ dlb2_eventdev_port_default_conf_get(struct rte_eventdev
*dev,
struct dlb2_eventdev *dlb2 = dlb2_pmd_priv(dev);
port_conf->new_event_threshold = dlb2->new_event_limit;
- port_conf->dequeue_depth = 32;
- port_conf->enqueue_depth = DLB2_MAX_ENQUEUE_DEPTH;
+ port_conf->dequeue_depth = dlb2->default_port_hl / 2;
+ port_conf->enqueue_depth =
evdev_dlb2_default_info.max_event_port_enqueue_depth;
port_conf->event_port_cfg = 0;
}
[PATCH v1 5/7] event/dlb2: avoid credit release race condition
While unlinking ports, all associated credits should be released.
This commit avoids race condition when main thread is unlinking
while workers are running.
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index cd843bb9d0..5f3b816665 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -2664,7 +2664,7 @@ dlb2_eventdev_port_unlink(struct rte_eventdev *dev, void
*event_port,
DLB2_LOG_LINE_DBG("dlb2: ignore unlink from dir port %d",
ev_port->id);
rte_errno = 0;
- return nb_unlinks; /* as if success */
+ goto ret_credits;
}
dlb2 = ev_port->dlb2;
--
2.25.1
[PATCH v1 2/7] event/dlb2: changes to correctly validate COS ID arguments
While providing port_cos as vdev/pf CLI argument, the port numbers should
take into account all ports (LDB and DIR) that are created by the
application and the same order should be provided for port_cos parameter.
This fix add checks to ensure that above is validated correctly.
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 32 +++-
drivers/event/dlb2/dlb2_priv.h | 1 -
2 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index a0e673b96b..58eb27f495 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -194,10 +194,8 @@ dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int
*port_cos)
for (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++) {
dlb2->ev_ports[q].cos_id = port_cos[q];
if (port_cos[q] != DLB2_COS_DEFAULT &&
- dlb2->cos_ports[port_cos[q]] <
DLB2_MAX_NUM_LDB_PORTS_PER_COS) {
+ dlb2->cos_ports[port_cos[q]] <
DLB2_MAX_NUM_LDB_PORTS_PER_COS)
dlb2->cos_ports[port_cos[q]]++;
- dlb2->max_cos_port = q;
- }
}
}
@@ -531,8 +529,8 @@ set_port_cos(const char *key __rte_unused,
const char *value,
void *opaque)
{
+ int first, last, cos_id, i, ports_per_cos[DLB2_COS_NUM_VALS] = {0};
struct dlb2_port_cos *port_cos = opaque;
- int first, last, cos_id, i;
if (value == NULL || opaque == NULL) {
DLB2_LOG_ERR("NULL pointer");
@@ -566,6 +564,14 @@ set_port_cos(const char *key __rte_unused,
for (i = first; i <= last; i++)
port_cos->cos_id[i] = cos_id; /* indexed by port */
+ for (i = 0; i < DLB2_MAX_NUM_PORTS_ALL; i++)
+ if (port_cos->cos_id[i] != DLB2_COS_DEFAULT &&
+ ++ports_per_cos[port_cos->cos_id[i]] >
DLB2_MAX_NUM_LDB_PORTS_PER_COS) {
+ DLB2_LOG_ERR("Error parsing ldb port cos_id devarg:
More than 16 ports for "
+ "cos_id %d.", port_cos->cos_id[i]);
+ return -EINVAL;
+ }
+
return 0;
}
@@ -866,9 +872,10 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
const struct dlb2_hw_rsrcs *resources_asked,
uint8_t device_version)
{
- int ret = 0;
- uint32_t cos_ports = 0;
+ uint32_t total_asked_ports;
struct dlb2_create_sched_domain_args *cfg;
+ uint32_t cos_ports = 0, max_cos_port = 0;
+ int ret = 0;
if (resources_asked == NULL) {
DLB2_LOG_ERR("dlb2: dlb2_create NULL parameter");
@@ -876,6 +883,8 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
goto error_exit;
}
+ total_asked_ports = resources_asked->num_ldb_ports +
resources_asked->num_dir_ports;
+
/* Map generic qm resources to dlb2 resources */
cfg = &handle->cfg.resources;
@@ -897,9 +906,14 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
cos_ports = dlb2->cos_ports[0] + dlb2->cos_ports[1] +
dlb2->cos_ports[2] + dlb2->cos_ports[3];
- if (cos_ports > resources_asked->num_ldb_ports ||
- (cos_ports && dlb2->max_cos_port >=
resources_asked->num_ldb_ports)) {
- DLB2_LOG_ERR("dlb2: num_ldb_ports < cos_ports");
+ for (int i = 0; i < DLB2_MAX_NUM_PORTS_ALL; i++) {
+ if (dlb2->ev_ports[i].cos_id != DLB2_COS_DEFAULT)
+ max_cos_port = i;
+ }
+
+ if (cos_ports > resources_asked->num_ldb_ports || max_cos_port >=
total_asked_ports) {
+ DLB2_LOG_ERR("dlb2: Insufficient num_ldb_ports=%d: cos_ports=%d
max_cos_port=%d",
+ resources_asked->num_ldb_ports, cos_ports,
max_cos_port);
ret = EINVAL;
goto error_exit;
}
diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h
index 4dd7532519..285d427397 100644
--- a/drivers/event/dlb2/dlb2_priv.h
+++ b/drivers/event/dlb2/dlb2_priv.h
@@ -649,7 +649,6 @@ struct dlb2_eventdev {
};
uint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class
*/
uint32_t cos_bw[DLB2_COS_NUM_VALS]; /* bandwidth per cos domain */
- uint8_t max_cos_port; /* Max LDB port from any cos */
bool enable_cq_weight;
};
--
2.25.1
[PATCH v1 1/7] event/dlb2: addresses deq failure when CQ depth <= 16
When application configures a DIR port with CQ depth less than 8, DLB PMD sets port's cq_depth as 8 and token reservation is used to make the effective cq_depth smaller. However, while setting port's cq_depth_mask application configured CQ depth was used resulting in reading incorrect cachelines while dequeuing. Use PMD calculated CQ depth for cq_depth_mask calculation. Signed-off-by: Pravin Pathak Signed-off-by: Tirthendu Sarkar --- drivers/event/dlb2/dlb2.c | 4 ++-- drivers/event/dlb2/pf/dlb2_pf.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 286241ea41..a0e673b96b 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -1951,9 +1951,9 @@ dlb2_hw_create_dir_port(struct dlb2_eventdev *dlb2, qm_port->cq_idx_unmasked = 0; if (dlb2->poll_mode == DLB2_CQ_POLL_MODE_SPARSE) - qm_port->cq_depth_mask = (cfg.cq_depth * 4) - 1; + qm_port->cq_depth_mask = (qm_port->cq_depth * 4) - 1; else - qm_port->cq_depth_mask = cfg.cq_depth - 1; + qm_port->cq_depth_mask = qm_port->cq_depth - 1; qm_port->gen_bit_shift = rte_popcount32(qm_port->cq_depth_mask); /* starting value of gen bit - it toggles at wrap time */ diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c index ed4e6e424c..31b5487d85 100644 --- a/drivers/event/dlb2/pf/dlb2_pf.c +++ b/drivers/event/dlb2/pf/dlb2_pf.c @@ -400,7 +400,7 @@ dlb2_pf_dir_port_create(struct dlb2_hw_dev *handle, /* Calculate the port memory required, and round up to the nearest * cache line. */ - alloc_sz = cfg->cq_depth * qe_sz; + alloc_sz = RTE_MAX(cfg->cq_depth, DLB2_MIN_HARDWARE_CQ_DEPTH) * qe_sz; alloc_sz = RTE_CACHE_LINE_ROUNDUP(alloc_sz); port_base = dlb2_alloc_coherent_aligned(&mz, &cq_base, alloc_sz, -- 2.25.1
[PATCH v1 0/7] event/dlb2: dlb2 hw resource management
This patchset introduces various fixes related to dlb2 hw resource management. The dlb2 hw has limited resources, which are configurable using command line options. This patch allows managing History list, scheduling bandwidth and credits using command line options. It also fixes some issues with resources management. Pravin Pathak (6): event/dlb2: addresses deq failure when CQ depth <= 16 event/dlb2: changes to correctly validate COS ID arguments event/dlb2: return 96 single link ports for DLB2.5 event/dlb2: support managing history list resource event/dlb2: avoid credit release race condition event/dlb2: update qid depth xstat in vector path Tirthendu Sarkar (1): event/dlb2: fix default credits in dlb2_eventdev_info_get() drivers/event/dlb2/dlb2.c | 274 + drivers/event/dlb2/dlb2_iface.c| 5 +- drivers/event/dlb2/dlb2_iface.h| 4 +- drivers/event/dlb2/dlb2_priv.h | 20 +- drivers/event/dlb2/dlb2_user.h | 24 ++ drivers/event/dlb2/pf/base/dlb2_regs.h | 9 + drivers/event/dlb2/pf/base/dlb2_resource.c | 74 ++ drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++ drivers/event/dlb2/pf/dlb2_pf.c| 33 ++- drivers/event/dlb2/rte_pmd_dlb2.c | 23 ++ drivers/event/dlb2/rte_pmd_dlb2.h | 40 +++ drivers/event/dlb2/version.map | 1 + 12 files changed, 463 insertions(+), 62 deletions(-) -- 2.25.1
[PATCH v1 3/7] event/dlb2: return 96 single link ports for DLB2.5
DLB 2.0 device has 64 single linked or directed ports.
DLB 2.5 device has 96 single linked ports.
This commit fixes issue of rte_event_dev_info_get returning 64
instead of 96 single link ports for DLB2.5
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 58eb27f495..24c56a7968 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -241,16 +241,16 @@ dlb2_hw_query_resources(struct dlb2_eventdev *dlb2)
* The capabilities (CAPs) were set at compile time.
*/
- if (dlb2->max_cq_depth != DLB2_DEFAULT_CQ_DEPTH)
- num_ldb_ports = DLB2_MAX_HL_ENTRIES / dlb2->max_cq_depth;
- else
- num_ldb_ports = dlb2->hw_rsrc_query_results.num_ldb_ports;
+ num_ldb_ports = dlb2->hw_rsrc_query_results.num_ldb_ports;
evdev_dlb2_default_info.max_event_queues =
dlb2->hw_rsrc_query_results.num_ldb_queues;
evdev_dlb2_default_info.max_event_ports = num_ldb_ports;
+ evdev_dlb2_default_info.max_single_link_event_port_queue_pairs =
+ dlb2->hw_rsrc_query_results.num_dir_ports;
+
if (dlb2->version == DLB2_HW_V2_5) {
evdev_dlb2_default_info.max_num_events =
dlb2->hw_rsrc_query_results.num_credits;
--
2.25.1
[PATCH v1 6/7] event/dlb2: update qid depth xstat in vector path
update QID depth xstats counter in vector dequeue path Signed-off-by: Pravin Pathak --- drivers/event/dlb2/dlb2.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 5f3b816665..19fe973bff 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -4138,6 +4138,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port, _mm_storeu_si128((__m128i *)&events[3], v_ev_3); DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched3], 1); + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid3].\ + qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[3])], 1); /* fallthrough */ case 3: v_ev_2 = _mm_unpacklo_epi64(v_unpk_ev_23, v_qe_2); @@ -4145,6 +4147,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port, _mm_storeu_si128((__m128i *)&events[2], v_ev_2); DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched2], 1); + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid2].\ + qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[2])], 1); /* fallthrough */ case 2: v_ev_1 = _mm_blend_epi16(v_unpk_ev_01, v_qe_1, 0x0F); @@ -4153,6 +4157,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port, _mm_storeu_si128((__m128i *)&events[1], v_ev_1); DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched1], 1); + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid1].\ + qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[1])], 1); /* fallthrough */ case 1: v_ev_0 = _mm_unpacklo_epi64(v_unpk_ev_01, v_qe_0); @@ -4160,6 +4166,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port, _mm_storeu_si128((__m128i *)&events[0], v_ev_0); DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched0], 1); + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid0].\ + qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[0])], 1); } qm_port->reorder_id += valid_events; } -- 2.25.1
[PATCH v1 7/7] event/dlb2: fix default credits in dlb2_eventdev_info_get()
From: Tirthendu Sarkar
dlb2_eventdev_info_get() that implements rte_event_dev_info_get() should
return the maximum available credits as supported by HW.
Set maximum credits before device probing by checking HW version.
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/pf/dlb2_pf.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c
index a3f3e7f803..6c273742c9 100644
--- a/drivers/event/dlb2/pf/dlb2_pf.c
+++ b/drivers/event/dlb2/pf/dlb2_pf.c
@@ -756,6 +756,8 @@ dlb2_eventdev_pci_init(struct rte_eventdev *eventdev)
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
dlb2 = dlb2_pmd_priv(eventdev); /* rte_zmalloc_socket mem */
dlb2->version = DLB2_HW_DEVICE_FROM_PCI_ID(pci_dev);
+ if (dlb2->version == DLB2_HW_V2_5)
+ dlb2_args.max_num_events =
DLB2_MAX_NUM_CREDITS(DLB2_HW_V2_5);
/* Were we invoked with runtime parameters? */
if (pci_dev->device.devargs) {
--
2.25.1
[PATCH v1 0/7] event/dlb2: dlb2 hw resource management
This patchset introduces various fixes related to dlb2 hw resource management. The dlb2 hw has limited resources, which are configurable using command line options. This patch allows managing History list, scheduling bandwidth and credits using command line options. It also fixes some issues with resources management. Pravin Pathak (6): event/dlb2: addresses deq failure when CQ depth <= 16 event/dlb2: changes to correctly validate COS ID arguments event/dlb2: return 96 single link ports for DLB2.5 event/dlb2: support managing history list resource event/dlb2: avoid credit release race condition event/dlb2: update qid depth xstat in vector path Tirthendu Sarkar (1): event/dlb2: fix default credits in dlb2_eventdev_info_get() drivers/event/dlb2/dlb2.c | 274 + drivers/event/dlb2/dlb2_iface.c| 5 +- drivers/event/dlb2/dlb2_iface.h| 4 +- drivers/event/dlb2/dlb2_priv.h | 20 +- drivers/event/dlb2/dlb2_user.h | 24 ++ drivers/event/dlb2/pf/base/dlb2_regs.h | 9 + drivers/event/dlb2/pf/base/dlb2_resource.c | 74 ++ drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++ drivers/event/dlb2/pf/dlb2_pf.c| 33 ++- drivers/event/dlb2/rte_pmd_dlb2.c | 23 ++ drivers/event/dlb2/rte_pmd_dlb2.h | 40 +++ drivers/event/dlb2/version.map | 1 + 12 files changed, 463 insertions(+), 62 deletions(-) -- 2.25.1
[PATCH v1 1/7] event/dlb2: addresses deq failure when CQ depth <= 16
When application configures a DIR port with CQ depth less than 8, DLB PMD sets port's cq_depth as 8 and token reservation is used to make the effective cq_depth smaller. However, while setting port's cq_depth_mask application configured CQ depth was used resulting in reading incorrect cachelines while dequeuing. Use PMD calculated CQ depth for cq_depth_mask calculation. Signed-off-by: Pravin Pathak Signed-off-by: Tirthendu Sarkar --- drivers/event/dlb2/dlb2.c | 4 ++-- drivers/event/dlb2/pf/dlb2_pf.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 286241ea41..a0e673b96b 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -1951,9 +1951,9 @@ dlb2_hw_create_dir_port(struct dlb2_eventdev *dlb2, qm_port->cq_idx_unmasked = 0; if (dlb2->poll_mode == DLB2_CQ_POLL_MODE_SPARSE) - qm_port->cq_depth_mask = (cfg.cq_depth * 4) - 1; + qm_port->cq_depth_mask = (qm_port->cq_depth * 4) - 1; else - qm_port->cq_depth_mask = cfg.cq_depth - 1; + qm_port->cq_depth_mask = qm_port->cq_depth - 1; qm_port->gen_bit_shift = rte_popcount32(qm_port->cq_depth_mask); /* starting value of gen bit - it toggles at wrap time */ diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c index ed4e6e424c..31b5487d85 100644 --- a/drivers/event/dlb2/pf/dlb2_pf.c +++ b/drivers/event/dlb2/pf/dlb2_pf.c @@ -400,7 +400,7 @@ dlb2_pf_dir_port_create(struct dlb2_hw_dev *handle, /* Calculate the port memory required, and round up to the nearest * cache line. */ - alloc_sz = cfg->cq_depth * qe_sz; + alloc_sz = RTE_MAX(cfg->cq_depth, DLB2_MIN_HARDWARE_CQ_DEPTH) * qe_sz; alloc_sz = RTE_CACHE_LINE_ROUNDUP(alloc_sz); port_base = dlb2_alloc_coherent_aligned(&mz, &cq_base, alloc_sz, -- 2.25.1
[PATCH v1] event/dlb2: fixes names of DLB2 token pop enums
added RTE_PMD_DLB2_ prefix to dlb2 token pop mode enmus
to avoid name comflict. These enums are passed to public
API rte_pmd_dlb2_set_token_pop_mode().
Fixes: c667583d82f4 ("event/dlb2: add token pop API")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 28 +++-
drivers/event/dlb2/dlb2_priv.h | 2 +-
drivers/event/dlb2/dlb2_selftest.c | 6 +++---
drivers/event/dlb2/rte_pmd_dlb2.c | 4 ++--
drivers/event/dlb2/rte_pmd_dlb2.h | 23 ---
5 files changed, 33 insertions(+), 30 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index fd8cc70f3c..084875f1c8 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -1819,7 +1819,7 @@ dlb2_hw_create_ldb_port(struct dlb2_eventdev *dlb2,
/* The default enqueue functions do not include delayed-pop support for
* performance reasons.
*/
- if (qm_port->token_pop_mode == DELAYED_POP) {
+ if (qm_port->token_pop_mode == RTE_PMD_DLB2_DELAYED_POP) {
dlb2->event_dev->enqueue_burst =
dlb2_event_enqueue_burst_delayed;
dlb2->event_dev->enqueue_new_burst =
@@ -2021,7 +2021,7 @@ dlb2_hw_create_dir_port(struct dlb2_eventdev *dlb2,
qm_port->dequeue_depth = dequeue_depth;
/* Directed ports are auto-pop, by default. */
- qm_port->token_pop_mode = AUTO_POP;
+ qm_port->token_pop_mode = RTE_PMD_DLB2_AUTO_POP;
qm_port->owed_tokens = 0;
qm_port->issued_releases = 0;
@@ -3359,7 +3359,7 @@ __dlb2_event_enqueue_burst_reorder(void *event_port,
}
}
- if (use_delayed && qm_port->token_pop_mode == DELAYED_POP &&
+ if (use_delayed && qm_port->token_pop_mode ==
RTE_PMD_DLB2_DELAYED_POP &&
(events[i].op == RTE_EVENT_OP_FORWARD ||
events[i].op == RTE_EVENT_OP_RELEASE) &&
qm_port->issued_releases >= thresh - 1) {
@@ -3468,7 +3468,7 @@ __dlb2_event_enqueue_burst(void *event_port,
int ret;
if (use_delayed &&
- qm_port->token_pop_mode == DELAYED_POP &&
+ qm_port->token_pop_mode == RTE_PMD_DLB2_DELAYED_POP
&&
(ev->op == RTE_EVENT_OP_FORWARD ||
ev->op == RTE_EVENT_OP_RELEASE) &&
qm_port->issued_releases >= thresh - 1) {
@@ -3620,7 +3620,7 @@ dlb2_event_release(struct dlb2_eventdev *dlb2,
for (; j < DLB2_NUM_QES_PER_CACHE_LINE && (i + j) < n; j++) {
int16_t thresh = qm_port->token_pop_thresh;
- if (qm_port->token_pop_mode == DELAYED_POP &&
+ if (qm_port->token_pop_mode == RTE_PMD_DLB2_DELAYED_POP
&&
qm_port->issued_releases >= thresh - 1) {
/* Insert the token pop QE */
dlb2_construct_token_pop_qe(qm_port, j);
@@ -4365,7 +4365,7 @@ dlb2_hw_dequeue_sparse(struct dlb2_eventdev *dlb2,
qm_port->owed_tokens += num;
if (num) {
- if (qm_port->token_pop_mode == AUTO_POP)
+ if (qm_port->token_pop_mode == RTE_PMD_DLB2_AUTO_POP)
dlb2_consume_qe_immediate(qm_port, num);
ev_port->outstanding_releases += num;
@@ -4495,7 +4495,7 @@ dlb2_hw_dequeue(struct dlb2_eventdev *dlb2,
qm_port->owed_tokens += num;
if (num) {
- if (qm_port->token_pop_mode == AUTO_POP)
+ if (qm_port->token_pop_mode == RTE_PMD_DLB2_AUTO_POP)
dlb2_consume_qe_immediate(qm_port, num);
ev_port->outstanding_releases += num;
@@ -4540,7 +4540,7 @@ dlb2_event_dequeue_burst(void *event_port, struct
rte_event *ev, uint16_t num,
order->enq_reorder[i].u64[1] =
release_u64;
__dlb2_event_enqueue_burst_reorder(event_port, NULL, 0,
- qm_port->token_pop_mode ==
DELAYED_POP);
+ qm_port->token_pop_mode ==
RTE_PMD_DLB2_DELAYED_POP);
} else {
dlb2_event_release(dlb2, ev_port->id, out_rels);
}
@@ -4548,7 +4548,7 @@ dlb2_event_dequeue_burst(void *event_port, struct
rte_event *ev, uint16_t num,
DLB2_INC_STAT(ev_port->stats.tx_implicit_rel, out_rels);
}
- if (qm_port->token_pop_mode == DEFERRED_POP && qm_port->owed_tokens)
+ if (qm_port->token_pop_mode
[PATCH v4 4/7] event/dlb2: support managing history list resource
Add support for setting application specified port history
Set HL equal to CQ depth when inflight control is enabled
Added command line parameters 'use_default_hl' (default: 1)
and 'alloc_hl_entries'
- When 'use_default_hl = 1'
* Per port HL is set to DLB2_FIXED_CQ_HL_SIZE (32)
* Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
is DLB2_FIXED_CQ_HL_SIZE/2
* command line parameter alloc_hl_entries is ignored
- When 'use_default_hl = 0'
* Per LDB port HL = 2 * CQ depth
* Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
is DLB2_FIXED_CQ_HL_SIZE
* User should calculate needed HL entries based on CQ depths the
application will use and specify it as command line parameter
'alloc_hl_entries'. This will be used to allocate HL entries.
alloc_hl_entries = (Sum of all LDB ports CQ depths * 2)
* If alloc_hl_entries is not specified, then
Total HL entries for the eventdev = num_ldb_ports * 64
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/dlb2.c | 220 +
drivers/event/dlb2/dlb2_iface.c| 5 +-
drivers/event/dlb2/dlb2_iface.h| 4 +-
drivers/event/dlb2/dlb2_priv.h | 19 +-
drivers/event/dlb2/dlb2_user.h | 24 +++
drivers/event/dlb2/pf/base/dlb2_regs.h | 9 +
drivers/event/dlb2/pf/base/dlb2_resource.c | 74 +++
drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++
drivers/event/dlb2/pf/dlb2_pf.c| 29 ++-
drivers/event/dlb2/rte_pmd_dlb2.c | 24 +++
drivers/event/dlb2/rte_pmd_dlb2.h | 55 +-
11 files changed, 435 insertions(+), 46 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 69dc3cf7c9..52edb75fa0 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -727,6 +727,50 @@ set_enable_cq_weight(const char *key __rte_unused,
return 0;
}
+static int set_hl_override(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ bool *default_hl = opaque;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ if ((*value == 'n') || (*value == 'N') || (*value == '0'))
+ *default_hl = false;
+ else
+ *default_hl = true;
+
+ return 0;
+}
+
+static int set_hl_entries(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ int hl_entries = 0;
+ int ret;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ ret = dlb2_string_to_int(&hl_entries, value);
+ if (ret < 0)
+ return ret;
+
+ if (!hl_entries || (uint32_t)hl_entries > DLB2_MAX_HL_ENTRIES) {
+ DLB2_LOG_ERR(
+ "alloc_hl_entries %u out of range, must be in [1 - %d]",
+ hl_entries, DLB2_MAX_HL_ENTRIES);
+ return -EINVAL;
+ }
+ *(uint32_t *)opaque = hl_entries;
+
+ return 0;
+}
+
static int
set_qid_depth_thresh(const char *key __rte_unused,
const char *value,
@@ -932,8 +976,16 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
DLB2_NUM_ATOMIC_INFLIGHTS_PER_QUEUE *
cfg->num_ldb_queues;
- cfg->num_hist_list_entries = resources_asked->num_ldb_ports *
- evdev_dlb2_default_info.max_event_port_dequeue_depth;
+ /* If hl_entries is non-zero then user specified command line option.
+* Else compute using default_port_hl that has been set earlier based
+* on use_default_hl option
+*/
+ if (dlb2->hl_entries) {
+ cfg->num_hist_list_entries = dlb2->hl_entries;
+ } else {
+ cfg->num_hist_list_entries =
+ resources_asked->num_ldb_ports * dlb2->default_port_hl;
+ }
if (device_version == DLB2_HW_V2_5) {
DLB2_LOG_LINE_DBG("sched domain create - ldb_qs=%d,
ldb_ports=%d, dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d,
credits=%d",
@@ -1154,8 +1206,8 @@ dlb2_eventdev_port_default_conf_get(struct rte_eventdev
*dev,
struct dlb2_eventdev *dlb2 = dlb2_pmd_priv(dev);
port_conf->new_event_threshold = dlb2->new_event_limit;
- port_conf->dequeue_depth = 32;
- port_conf->enqueue_depth = DLB2_MAX_ENQUEUE_DEPTH;
+ port_conf->dequeue_depth = dlb2->default_port_hl / 2;
+ port_conf->enqueue_depth =
evdev_dlb2_default_info.max_event_port_enqueue_depth;
port_conf->event_port_cfg = 0;
}
@@ -1647,13 +1699,11 @@ dlb2_hw_create_ldb
[PATCH v4 1/7] event/dlb2: fix addresses deq failure when CQ depth <= 16
When application configures a DIR port with CQ depth less than 8, DLB PMD
sets port's cq_depth as 8 and token reservation is used to make the
effective cq_depth smaller. However, while setting port's cq_depth_mask
application configured CQ depth was used resulting in reading incorrect
cachelines while dequeuing. Use PMD calculated CQ depth for cq_depth_mask
calculation.
Fixes: 3a6d0c04e7fb3e ("event/dlb2: add port setup")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/dlb2.c | 4 ++--
drivers/event/dlb2/pf/dlb2_pf.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 08291b10b8..bec1e88074 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -1951,9 +1951,9 @@ dlb2_hw_create_dir_port(struct dlb2_eventdev *dlb2,
qm_port->cq_idx_unmasked = 0;
if (dlb2->poll_mode == DLB2_CQ_POLL_MODE_SPARSE)
- qm_port->cq_depth_mask = (cfg.cq_depth * 4) - 1;
+ qm_port->cq_depth_mask = (qm_port->cq_depth * 4) - 1;
else
- qm_port->cq_depth_mask = cfg.cq_depth - 1;
+ qm_port->cq_depth_mask = qm_port->cq_depth - 1;
qm_port->gen_bit_shift = rte_popcount32(qm_port->cq_depth_mask);
/* starting value of gen bit - it toggles at wrap time */
diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c
index ac432b81ad..cd2788c035 100644
--- a/drivers/event/dlb2/pf/dlb2_pf.c
+++ b/drivers/event/dlb2/pf/dlb2_pf.c
@@ -427,7 +427,7 @@ dlb2_pf_dir_port_create(struct dlb2_hw_dev *handle,
/* Calculate the port memory required, and round up to the nearest
* cache line.
*/
- alloc_sz = cfg->cq_depth * qe_sz;
+ alloc_sz = RTE_MAX(cfg->cq_depth, DLB2_MIN_HARDWARE_CQ_DEPTH) * qe_sz;
alloc_sz = RTE_CACHE_LINE_ROUNDUP(alloc_sz);
port_base = dlb2_alloc_coherent_aligned(&mz, &cq_base, alloc_sz,
--
2.39.1
[PATCH v4 2/7] event/dlb2: fix validaton of LDB port COS ID arguments
While providing port_cos as vdev/pf CLI argument, the port numbers should
take into account all ports (LDB and DIR) that are created by the
application and the same order should be provided for port_cos parameter.
This fix add checks to ensure that above is validated correctly.
Fixes: bec8901bfe9f ("event/dlb2: support ldb port specific COS")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 32 +++-
drivers/event/dlb2/dlb2_priv.h | 1 -
2 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index bec1e88074..8722e62948 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -194,10 +194,8 @@ dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int
*port_cos)
for (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++) {
dlb2->ev_ports[q].cos_id = port_cos[q];
if (port_cos[q] != DLB2_COS_DEFAULT &&
- dlb2->cos_ports[port_cos[q]] <
DLB2_MAX_NUM_LDB_PORTS_PER_COS) {
+ dlb2->cos_ports[port_cos[q]] <
DLB2_MAX_NUM_LDB_PORTS_PER_COS)
dlb2->cos_ports[port_cos[q]]++;
- dlb2->max_cos_port = q;
- }
}
}
@@ -531,8 +529,8 @@ set_port_cos(const char *key __rte_unused,
const char *value,
void *opaque)
{
+ int first, last, cos_id, i, ports_per_cos[DLB2_COS_NUM_VALS] = {0};
struct dlb2_port_cos *port_cos = opaque;
- int first, last, cos_id, i;
if (value == NULL || opaque == NULL) {
DLB2_LOG_ERR("NULL pointer");
@@ -566,6 +564,14 @@ set_port_cos(const char *key __rte_unused,
for (i = first; i <= last; i++)
port_cos->cos_id[i] = cos_id; /* indexed by port */
+ for (i = 0; i < DLB2_MAX_NUM_PORTS_ALL; i++)
+ if (port_cos->cos_id[i] != DLB2_COS_DEFAULT &&
+ ++ports_per_cos[port_cos->cos_id[i]] >
DLB2_MAX_NUM_LDB_PORTS_PER_COS) {
+ DLB2_LOG_ERR("Error parsing ldb port cos_id devarg:
More than 16 ports for "
+ "cos_id %d.", port_cos->cos_id[i]);
+ return -EINVAL;
+ }
+
return 0;
}
@@ -866,9 +872,10 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
const struct dlb2_hw_rsrcs *resources_asked,
uint8_t device_version)
{
- int ret = 0;
- uint32_t cos_ports = 0;
+ uint32_t total_asked_ports;
struct dlb2_create_sched_domain_args *cfg;
+ uint32_t cos_ports = 0, max_cos_port = 0;
+ int ret = 0;
if (resources_asked == NULL) {
DLB2_LOG_ERR("dlb2: dlb2_create NULL parameter");
@@ -876,6 +883,8 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
goto error_exit;
}
+ total_asked_ports = resources_asked->num_ldb_ports +
resources_asked->num_dir_ports;
+
/* Map generic qm resources to dlb2 resources */
cfg = &handle->cfg.resources;
@@ -897,9 +906,14 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
cos_ports = dlb2->cos_ports[0] + dlb2->cos_ports[1] +
dlb2->cos_ports[2] + dlb2->cos_ports[3];
- if (cos_ports > resources_asked->num_ldb_ports ||
- (cos_ports && dlb2->max_cos_port >=
resources_asked->num_ldb_ports)) {
- DLB2_LOG_ERR("dlb2: num_ldb_ports < cos_ports");
+ for (int i = 0; i < DLB2_MAX_NUM_PORTS_ALL; i++) {
+ if (dlb2->ev_ports[i].cos_id != DLB2_COS_DEFAULT)
+ max_cos_port = i;
+ }
+
+ if (cos_ports > resources_asked->num_ldb_ports || max_cos_port >=
total_asked_ports) {
+ DLB2_LOG_ERR("dlb2: Insufficient num_ldb_ports=%d: cos_ports=%d
max_cos_port=%d",
+ resources_asked->num_ldb_ports, cos_ports,
max_cos_port);
ret = EINVAL;
goto error_exit;
}
diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h
index 4dd7532519..285d427397 100644
--- a/drivers/event/dlb2/dlb2_priv.h
+++ b/drivers/event/dlb2/dlb2_priv.h
@@ -649,7 +649,6 @@ struct dlb2_eventdev {
};
uint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class
*/
uint32_t cos_bw[DLB2_COS_NUM_VALS]; /* bandwidth per cos domain */
- uint8_t max_cos_port; /* Max LDB port from any cos */
bool enable_cq_weight;
};
--
2.39.1
[PATCH v4 0/7] event/dlb2: dlb2 hw resource management
This patchset introduces various fixes related to dlb2 hw resource management. The dlb2 hw has limited resources, which are configurable using command line options. This patch allows managing History list, scheduling bandwidth and credits using command line options. It also fixes some issues with resources management. v2: [PATCH v1 3/7] Addressed issue with Fixes tag [PATCH v1 4/7] Renamed structure and Macros to avoid name space conflicts. [PATCH v1 4/7] Addressed Doxygen format feedback v3: [PATCH v2 1/7] Added Fixes tag [PATCH v2 2/7] Added Fixes tag [PATCH v2 3/7] Added Fixes tag [PATCH v2 5/7] Added Fixes tag [PATCH v2 6/7] Added Fixes tag [PATCH v2 7/7] Added Fixes tag v4: [PATCH v3 4/7] Fixed Doxygen format and parameter type to rte_pmd_dlb2_set_port_param() Fixed other documentation feedback Pravin Pathak (6): event/dlb2: fix addresses deq failure when CQ depth <= 16 event/dlb2: fix validaton of LDB port COS ID arguments event/dlb2: fix num single link ports for DLB2.5 event/dlb2: support managing history list resource event/dlb2: fix to avoid credit release race condition event/dlb2: fix qid depth xstat in vector path Tirthendu Sarkar (1): event/dlb2: fix default credits based on HW version drivers/event/dlb2/dlb2.c | 274 + drivers/event/dlb2/dlb2_iface.c| 5 +- drivers/event/dlb2/dlb2_iface.h| 4 +- drivers/event/dlb2/dlb2_priv.h | 20 +- drivers/event/dlb2/dlb2_user.h | 24 ++ drivers/event/dlb2/pf/base/dlb2_regs.h | 9 + drivers/event/dlb2/pf/base/dlb2_resource.c | 74 ++ drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++ drivers/event/dlb2/pf/dlb2_pf.c| 33 ++- drivers/event/dlb2/rte_pmd_dlb2.c | 24 ++ drivers/event/dlb2/rte_pmd_dlb2.h | 55 - 11 files changed, 476 insertions(+), 64 deletions(-) -- 2.39.1
[PATCH v4 5/7] event/dlb2: fix to avoid credit release race condition
While unlinking ports, all associated credits should be released.
This commit avoids race condition when main thread is unlinking
while workers are running.
Fixes: a29248b57b31 ("event/dlb2: add port unlink and unlinks in progress")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 52edb75fa0..f9bdfb3503 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -2664,7 +2664,7 @@ dlb2_eventdev_port_unlink(struct rte_eventdev *dev, void
*event_port,
DLB2_LOG_LINE_DBG("dlb2: ignore unlink from dir port %d",
ev_port->id);
rte_errno = 0;
- return nb_unlinks; /* as if success */
+ goto ret_credits;
}
dlb2 = ev_port->dlb2;
--
2.39.1
[PATCH v4 3/7] event/dlb2: fix num single link ports for DLB2.5
DLB 2.0 device has 64 single linked or directed ports.
DLB 2.5 device has 96 single linked ports.
This commit fixes issue of rte_event_dev_info_get returning 64
instead of 96 single link ports for DLB2.5
Fixes: 4ce7bf9ec1c7 ("event/dlb2: add v2.5 get resources")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 8722e62948..69dc3cf7c9 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -241,16 +241,16 @@ dlb2_hw_query_resources(struct dlb2_eventdev *dlb2)
* The capabilities (CAPs) were set at compile time.
*/
- if (dlb2->max_cq_depth != DLB2_DEFAULT_CQ_DEPTH)
- num_ldb_ports = DLB2_MAX_HL_ENTRIES / dlb2->max_cq_depth;
- else
- num_ldb_ports = dlb2->hw_rsrc_query_results.num_ldb_ports;
+ num_ldb_ports = dlb2->hw_rsrc_query_results.num_ldb_ports;
evdev_dlb2_default_info.max_event_queues =
dlb2->hw_rsrc_query_results.num_ldb_queues;
evdev_dlb2_default_info.max_event_ports = num_ldb_ports;
+ evdev_dlb2_default_info.max_single_link_event_port_queue_pairs =
+ dlb2->hw_rsrc_query_results.num_dir_ports;
+
if (dlb2->version == DLB2_HW_V2_5) {
evdev_dlb2_default_info.max_num_events =
dlb2->hw_rsrc_query_results.num_credits;
--
2.39.1
[PATCH v4 6/7] event/dlb2: fix qid depth xstat in vector path
update QID depth xstats counter in vector dequeue path
Fixes: 000a7b8e7582 ("event/dlb2: optimize dequeue operation")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index f9bdfb3503..fd8cc70f3c 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -4145,6 +4145,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port,
_mm_storeu_si128((__m128i *)&events[3], v_ev_3);
DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched3],
1);
+ DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid3].\
+ qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[3])], 1);
/* fallthrough */
case 3:
v_ev_2 = _mm_unpacklo_epi64(v_unpk_ev_23, v_qe_2);
@@ -4152,6 +4154,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port,
_mm_storeu_si128((__m128i *)&events[2], v_ev_2);
DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched2],
1);
+ DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid2].\
+ qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[2])], 1);
/* fallthrough */
case 2:
v_ev_1 = _mm_blend_epi16(v_unpk_ev_01, v_qe_1, 0x0F);
@@ -4160,6 +4164,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port,
_mm_storeu_si128((__m128i *)&events[1], v_ev_1);
DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched1],
1);
+ DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid1].\
+ qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[1])], 1);
/* fallthrough */
case 1:
v_ev_0 = _mm_unpacklo_epi64(v_unpk_ev_01, v_qe_0);
@@ -4167,6 +4173,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port,
_mm_storeu_si128((__m128i *)&events[0], v_ev_0);
DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched0],
1);
+ DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid0].\
+ qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[0])], 1);
}
qm_port->reorder_id += valid_events;
}
--
2.39.1
[PATCH v4 7/7] event/dlb2: fix default credits based on HW version
From: Tirthendu Sarkar
dlb2_eventdev_info_get() that implements rte_event_dev_info_get() should
return the maximum available credits as supported by HW.
Set maximum credits before device probing by checking HW version.
Fixes: b66a418d2ad3 ("event/dlb2: add v2.5 probe")
Cc: sta...@dpdk.org
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/pf/dlb2_pf.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c
index 15a06bee4f..edcdfb319f 100644
--- a/drivers/event/dlb2/pf/dlb2_pf.c
+++ b/drivers/event/dlb2/pf/dlb2_pf.c
@@ -789,6 +789,8 @@ dlb2_eventdev_pci_init(struct rte_eventdev *eventdev)
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
dlb2 = dlb2_pmd_priv(eventdev); /* rte_zmalloc_socket mem */
dlb2->version = DLB2_HW_DEVICE_FROM_PCI_ID(pci_dev);
+ if (dlb2->version == DLB2_HW_V2_5)
+ dlb2_args.max_num_events =
DLB2_MAX_NUM_CREDITS(DLB2_HW_V2_5);
/* Were we invoked with runtime parameters? */
if (pci_dev->device.devargs) {
--
2.39.1
[PATCH v3 4/7] event/dlb2: support managing history list resource
Add support for setting application specified port history
Set HL equal to CQ depth when inflight control is enabled
Added command line parameters 'use_default_hl' (default: 1)
and 'alloc_hl_entries'
- When 'use_default_hl = 1'
* Per port HL is set to DLB2_FIXED_CQ_HL_SIZE (32)
* Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
is DLB2_FIXED_CQ_HL_SIZE/2
* command line parameter alloc_hl_entries is ignored
- When 'use_default_hl = 0'
* Per LDB port HL = 2 * CQ depth
* Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
is DLB2_FIXED_CQ_HL_SIZE
* User should calculate needed HL entries based on CQ depths the
application will use and specify it as command line parameter
'alloc_hl_entries'. This will be used to allocate HL entries.
alloc_hl_entries = (Sum of all LDB ports CQ depths * 2)
* If alloc_hl_entries is not specified, then
Total HL entries for the eventdev = num_ldb_ports * 64
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/dlb2.c | 220 +
drivers/event/dlb2/dlb2_iface.c| 5 +-
drivers/event/dlb2/dlb2_iface.h| 4 +-
drivers/event/dlb2/dlb2_priv.h | 19 +-
drivers/event/dlb2/dlb2_user.h | 24 +++
drivers/event/dlb2/pf/base/dlb2_regs.h | 9 +
drivers/event/dlb2/pf/base/dlb2_resource.c | 74 +++
drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++
drivers/event/dlb2/pf/dlb2_pf.c| 29 ++-
drivers/event/dlb2/rte_pmd_dlb2.c | 24 +++
drivers/event/dlb2/rte_pmd_dlb2.h | 48 -
11 files changed, 429 insertions(+), 45 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 24c56a7968..28c9054f63 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -727,6 +727,50 @@ set_enable_cq_weight(const char *key __rte_unused,
return 0;
}
+static int set_hl_override(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ bool *default_hl = opaque;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ if ((*value == 'n') || (*value == 'N') || (*value == '0'))
+ *default_hl = false;
+ else
+ *default_hl = true;
+
+ return 0;
+}
+
+static int set_hl_entries(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ int hl_entries = 0;
+ int ret;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ ret = dlb2_string_to_int(&hl_entries, value);
+ if (ret < 0)
+ return ret;
+
+ if (!hl_entries || (uint32_t)hl_entries > DLB2_MAX_HL_ENTRIES) {
+ DLB2_LOG_ERR(
+ "alloc_hl_entries %u out of range, must be in [1 - %d]",
+ hl_entries, DLB2_MAX_HL_ENTRIES);
+ return -EINVAL;
+ }
+ *(uint32_t *)opaque = hl_entries;
+
+ return 0;
+}
+
static int
set_qid_depth_thresh(const char *key __rte_unused,
const char *value,
@@ -932,8 +976,16 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
DLB2_NUM_ATOMIC_INFLIGHTS_PER_QUEUE *
cfg->num_ldb_queues;
- cfg->num_hist_list_entries = resources_asked->num_ldb_ports *
- evdev_dlb2_default_info.max_event_port_dequeue_depth;
+ /* If hl_entries is non-zero then user specified command line option.
+* Else compute using default_port_hl that has been set earlier based
+* on use_default_hl option
+*/
+ if (dlb2->hl_entries) {
+ cfg->num_hist_list_entries = dlb2->hl_entries;
+ } else {
+ cfg->num_hist_list_entries =
+ resources_asked->num_ldb_ports * dlb2->default_port_hl;
+ }
if (device_version == DLB2_HW_V2_5) {
DLB2_LOG_LINE_DBG("sched domain create - ldb_qs=%d,
ldb_ports=%d, dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d,
credits=%d",
@@ -1154,8 +1206,8 @@ dlb2_eventdev_port_default_conf_get(struct rte_eventdev
*dev,
struct dlb2_eventdev *dlb2 = dlb2_pmd_priv(dev);
port_conf->new_event_threshold = dlb2->new_event_limit;
- port_conf->dequeue_depth = 32;
- port_conf->enqueue_depth = DLB2_MAX_ENQUEUE_DEPTH;
+ port_conf->dequeue_depth = dlb2->default_port_hl / 2;
+ port_conf->enqueue_depth =
evdev_dlb2_default_info.max_event_port_enqueue_depth;
port_conf->event_port_cfg = 0;
}
@@ -1647,16 +1699,14 @@ dlb2_hw_create_ldb
[PATCH v3 2/7] event/dlb2: fix validaton of LDB port COS ID arguments
While providing port_cos as vdev/pf CLI argument, the port numbers should
take into account all ports (LDB and DIR) that are created by the
application and the same order should be provided for port_cos parameter.
This fix add checks to ensure that above is validated correctly.
Fixes: bec8901bfe9f ("event/dlb2: support ldb port specific COS")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 32 +++-
drivers/event/dlb2/dlb2_priv.h | 1 -
2 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index a0e673b96b..58eb27f495 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -194,10 +194,8 @@ dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int
*port_cos)
for (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++) {
dlb2->ev_ports[q].cos_id = port_cos[q];
if (port_cos[q] != DLB2_COS_DEFAULT &&
- dlb2->cos_ports[port_cos[q]] <
DLB2_MAX_NUM_LDB_PORTS_PER_COS) {
+ dlb2->cos_ports[port_cos[q]] <
DLB2_MAX_NUM_LDB_PORTS_PER_COS)
dlb2->cos_ports[port_cos[q]]++;
- dlb2->max_cos_port = q;
- }
}
}
@@ -531,8 +529,8 @@ set_port_cos(const char *key __rte_unused,
const char *value,
void *opaque)
{
+ int first, last, cos_id, i, ports_per_cos[DLB2_COS_NUM_VALS] = {0};
struct dlb2_port_cos *port_cos = opaque;
- int first, last, cos_id, i;
if (value == NULL || opaque == NULL) {
DLB2_LOG_ERR("NULL pointer");
@@ -566,6 +564,14 @@ set_port_cos(const char *key __rte_unused,
for (i = first; i <= last; i++)
port_cos->cos_id[i] = cos_id; /* indexed by port */
+ for (i = 0; i < DLB2_MAX_NUM_PORTS_ALL; i++)
+ if (port_cos->cos_id[i] != DLB2_COS_DEFAULT &&
+ ++ports_per_cos[port_cos->cos_id[i]] >
DLB2_MAX_NUM_LDB_PORTS_PER_COS) {
+ DLB2_LOG_ERR("Error parsing ldb port cos_id devarg:
More than 16 ports for "
+ "cos_id %d.", port_cos->cos_id[i]);
+ return -EINVAL;
+ }
+
return 0;
}
@@ -866,9 +872,10 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
const struct dlb2_hw_rsrcs *resources_asked,
uint8_t device_version)
{
- int ret = 0;
- uint32_t cos_ports = 0;
+ uint32_t total_asked_ports;
struct dlb2_create_sched_domain_args *cfg;
+ uint32_t cos_ports = 0, max_cos_port = 0;
+ int ret = 0;
if (resources_asked == NULL) {
DLB2_LOG_ERR("dlb2: dlb2_create NULL parameter");
@@ -876,6 +883,8 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
goto error_exit;
}
+ total_asked_ports = resources_asked->num_ldb_ports +
resources_asked->num_dir_ports;
+
/* Map generic qm resources to dlb2 resources */
cfg = &handle->cfg.resources;
@@ -897,9 +906,14 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
cos_ports = dlb2->cos_ports[0] + dlb2->cos_ports[1] +
dlb2->cos_ports[2] + dlb2->cos_ports[3];
- if (cos_ports > resources_asked->num_ldb_ports ||
- (cos_ports && dlb2->max_cos_port >=
resources_asked->num_ldb_ports)) {
- DLB2_LOG_ERR("dlb2: num_ldb_ports < cos_ports");
+ for (int i = 0; i < DLB2_MAX_NUM_PORTS_ALL; i++) {
+ if (dlb2->ev_ports[i].cos_id != DLB2_COS_DEFAULT)
+ max_cos_port = i;
+ }
+
+ if (cos_ports > resources_asked->num_ldb_ports || max_cos_port >=
total_asked_ports) {
+ DLB2_LOG_ERR("dlb2: Insufficient num_ldb_ports=%d: cos_ports=%d
max_cos_port=%d",
+ resources_asked->num_ldb_ports, cos_ports,
max_cos_port);
ret = EINVAL;
goto error_exit;
}
diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h
index 4dd7532519..285d427397 100644
--- a/drivers/event/dlb2/dlb2_priv.h
+++ b/drivers/event/dlb2/dlb2_priv.h
@@ -649,7 +649,6 @@ struct dlb2_eventdev {
};
uint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class
*/
uint32_t cos_bw[DLB2_COS_NUM_VALS]; /* bandwidth per cos domain */
- uint8_t max_cos_port; /* Max LDB port from any cos */
bool enable_cq_weight;
};
--
2.39.1
[PATCH v3 3/7] event/dlb2: fix num single link ports for DLB2.5
DLB 2.0 device has 64 single linked or directed ports.
DLB 2.5 device has 96 single linked ports.
This commit fixes issue of rte_event_dev_info_get returning 64
instead of 96 single link ports for DLB2.5
Fixes: 4ce7bf9ec1c7 ("event/dlb2: add v2.5 get resources")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 58eb27f495..24c56a7968 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -241,16 +241,16 @@ dlb2_hw_query_resources(struct dlb2_eventdev *dlb2)
* The capabilities (CAPs) were set at compile time.
*/
- if (dlb2->max_cq_depth != DLB2_DEFAULT_CQ_DEPTH)
- num_ldb_ports = DLB2_MAX_HL_ENTRIES / dlb2->max_cq_depth;
- else
- num_ldb_ports = dlb2->hw_rsrc_query_results.num_ldb_ports;
+ num_ldb_ports = dlb2->hw_rsrc_query_results.num_ldb_ports;
evdev_dlb2_default_info.max_event_queues =
dlb2->hw_rsrc_query_results.num_ldb_queues;
evdev_dlb2_default_info.max_event_ports = num_ldb_ports;
+ evdev_dlb2_default_info.max_single_link_event_port_queue_pairs =
+ dlb2->hw_rsrc_query_results.num_dir_ports;
+
if (dlb2->version == DLB2_HW_V2_5) {
evdev_dlb2_default_info.max_num_events =
dlb2->hw_rsrc_query_results.num_credits;
--
2.39.1
[PATCH v3 5/7] event/dlb2: fix to avoid credit release race condition
While unlinking ports, all associated credits should be released.
This commit avoids race condition when main thread is unlinking
while workers are running.
Fixes: a29248b57b31 ("event/dlb2: add port unlink and unlinks in progress")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 28c9054f63..6734e93eac 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -2664,7 +2664,7 @@ dlb2_eventdev_port_unlink(struct rte_eventdev *dev, void
*event_port,
DLB2_LOG_LINE_DBG("dlb2: ignore unlink from dir port %d",
ev_port->id);
rte_errno = 0;
- return nb_unlinks; /* as if success */
+ goto ret_credits;
}
dlb2 = ev_port->dlb2;
--
2.39.1
[PATCH v3 6/7] event/dlb2: fix qid depth xstat in vector path
update QID depth xstats counter in vector dequeue path
Fixes: 000a7b8e7582 ("event/dlb2: optimize dequeue operation")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 6734e93eac..6dfb345de8 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -4138,6 +4138,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port,
_mm_storeu_si128((__m128i *)&events[3], v_ev_3);
DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched3],
1);
+ DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid3].\
+ qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[3])], 1);
/* fallthrough */
case 3:
v_ev_2 = _mm_unpacklo_epi64(v_unpk_ev_23, v_qe_2);
@@ -4145,6 +4147,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port,
_mm_storeu_si128((__m128i *)&events[2], v_ev_2);
DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched2],
1);
+ DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid2].\
+ qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[2])], 1);
/* fallthrough */
case 2:
v_ev_1 = _mm_blend_epi16(v_unpk_ev_01, v_qe_1, 0x0F);
@@ -4153,6 +4157,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port,
_mm_storeu_si128((__m128i *)&events[1], v_ev_1);
DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched1],
1);
+ DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid1].\
+ qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[1])], 1);
/* fallthrough */
case 1:
v_ev_0 = _mm_unpacklo_epi64(v_unpk_ev_01, v_qe_0);
@@ -4160,6 +4166,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port,
_mm_storeu_si128((__m128i *)&events[0], v_ev_0);
DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched0],
1);
+ DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid0].\
+ qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[0])], 1);
}
qm_port->reorder_id += valid_events;
}
--
2.39.1
[PATCH v3 0/7] event/dlb2: dlb2 hw resource management
This patchset introduces various fixes related to dlb2 hw resource management. The dlb2 hw has limited resources, which are configurable using command line options. This patch allows managing History list, scheduling bandwidth and credits using command line options. It also fixes some issues with resources management. v2: [PATCH v1 3/7] Addressed issue with Fixes tag [PATCH v1 4/7] Renamed structure and Macros to avoid name space conflicts. [PATCH v1 4/7] Addressed Doxygen format feedback v3: [PATCH v1 1/7] Added Fixes tag [PATCH v1 2/7] Added Fixes tag [PATCH v1 3/7] Added Fixes tag [PATCH v1 5/7] Added Fixes tag [PATCH v1 6/7] Added Fixes tag [PATCH v1 7/7] Added Fixes tag Pravin Pathak (6): event/dlb2: fix addresses deq failure when CQ depth <= 16 event/dlb2: fix validaton of LDB port COS ID arguments event/dlb2: fix num single link ports for DLB2.5 event/dlb2: support managing history list resource event/dlb2: fix to avoid credit release race condition event/dlb2: fix qid depth xstat in vector path Tirthendu Sarkar (1): event/dlb2: fix default credits based on HW version drivers/event/dlb2/dlb2.c | 274 + drivers/event/dlb2/dlb2_iface.c| 5 +- drivers/event/dlb2/dlb2_iface.h| 4 +- drivers/event/dlb2/dlb2_priv.h | 20 +- drivers/event/dlb2/dlb2_user.h | 24 ++ drivers/event/dlb2/pf/base/dlb2_regs.h | 9 + drivers/event/dlb2/pf/base/dlb2_resource.c | 74 ++ drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++ drivers/event/dlb2/pf/dlb2_pf.c| 33 ++- drivers/event/dlb2/rte_pmd_dlb2.c | 24 ++ drivers/event/dlb2/rte_pmd_dlb2.h | 48 +++- 11 files changed, 470 insertions(+), 63 deletions(-) -- 2.39.1
[PATCH v3 7/7] event/dlb2: fix default credits based on HW version
From: Tirthendu Sarkar
dlb2_eventdev_info_get() that implements rte_event_dev_info_get() should
return the maximum available credits as supported by HW.
Set maximum credits before device probing by checking HW version.
Fixes: b66a418d2ad3 ("event/dlb2: add v2.5 probe")
Cc: sta...@dpdk.org
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/pf/dlb2_pf.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c
index a3f3e7f803..6c273742c9 100644
--- a/drivers/event/dlb2/pf/dlb2_pf.c
+++ b/drivers/event/dlb2/pf/dlb2_pf.c
@@ -756,6 +756,8 @@ dlb2_eventdev_pci_init(struct rte_eventdev *eventdev)
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
dlb2 = dlb2_pmd_priv(eventdev); /* rte_zmalloc_socket mem */
dlb2->version = DLB2_HW_DEVICE_FROM_PCI_ID(pci_dev);
+ if (dlb2->version == DLB2_HW_V2_5)
+ dlb2_args.max_num_events =
DLB2_MAX_NUM_CREDITS(DLB2_HW_V2_5);
/* Were we invoked with runtime parameters? */
if (pci_dev->device.devargs) {
--
2.39.1
[PATCH v3 1/7] event/dlb2: fix addresses deq failure when CQ depth <= 16
When application configures a DIR port with CQ depth less than 8, DLB PMD
sets port's cq_depth as 8 and token reservation is used to make the
effective cq_depth smaller. However, while setting port's cq_depth_mask
application configured CQ depth was used resulting in reading incorrect
cachelines while dequeuing. Use PMD calculated CQ depth for cq_depth_mask
calculation.
Fixes: 3a6d0c04e7fb3e ("event/dlb2: add port setup")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/dlb2.c | 4 ++--
drivers/event/dlb2/pf/dlb2_pf.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 286241ea41..a0e673b96b 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -1951,9 +1951,9 @@ dlb2_hw_create_dir_port(struct dlb2_eventdev *dlb2,
qm_port->cq_idx_unmasked = 0;
if (dlb2->poll_mode == DLB2_CQ_POLL_MODE_SPARSE)
- qm_port->cq_depth_mask = (cfg.cq_depth * 4) - 1;
+ qm_port->cq_depth_mask = (qm_port->cq_depth * 4) - 1;
else
- qm_port->cq_depth_mask = cfg.cq_depth - 1;
+ qm_port->cq_depth_mask = qm_port->cq_depth - 1;
qm_port->gen_bit_shift = rte_popcount32(qm_port->cq_depth_mask);
/* starting value of gen bit - it toggles at wrap time */
diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c
index ed4e6e424c..31b5487d85 100644
--- a/drivers/event/dlb2/pf/dlb2_pf.c
+++ b/drivers/event/dlb2/pf/dlb2_pf.c
@@ -400,7 +400,7 @@ dlb2_pf_dir_port_create(struct dlb2_hw_dev *handle,
/* Calculate the port memory required, and round up to the nearest
* cache line.
*/
- alloc_sz = cfg->cq_depth * qe_sz;
+ alloc_sz = RTE_MAX(cfg->cq_depth, DLB2_MIN_HARDWARE_CQ_DEPTH) * qe_sz;
alloc_sz = RTE_CACHE_LINE_ROUNDUP(alloc_sz);
port_base = dlb2_alloc_coherent_aligned(&mz, &cq_base, alloc_sz,
--
2.39.1
[PATCH v1] app/eventdev: fix number of releases sent during cleanup
During cleanup, only send releases for events app was
not able to enqueue. Current code is sending releases for
entire dequeue burst.
Fixes: f0b68c0b2af7 ("app/eventdev: clean up worker state before exit")
Cc: sta...@dpdk.org
Signed-off-by: Pravin Pathak
---
app/test-eventdev/test_perf_common.c | 4 ++--
app/test-eventdev/test_pipeline_common.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/app/test-eventdev/test_perf_common.c
b/app/test-eventdev/test_perf_common.c
index 4709de8b07..f77557e765 100644
--- a/app/test-eventdev/test_perf_common.c
+++ b/app/test-eventdev/test_perf_common.c
@@ -1833,9 +1833,9 @@ perf_worker_cleanup(struct rte_mempool *const pool,
uint8_t dev_id,
for (i = nb_enq; i < nb_deq; i++)
rte_mempool_put(pool, events[i].event_ptr);
- for (i = 0; i < nb_deq; i++)
+ for (i = nb_enq; i < nb_deq; i++)
events[i].op = RTE_EVENT_OP_RELEASE;
- rte_event_enqueue_burst(dev_id, port_id, events, nb_deq);
+ rte_event_enqueue_burst(dev_id, port_id, events + nb_enq,
nb_deq - nb_enq);
}
rte_event_port_quiesce(dev_id, port_id, perf_event_port_flush, pool);
}
diff --git a/app/test-eventdev/test_pipeline_common.c
b/app/test-eventdev/test_pipeline_common.c
index 204117ef7f..c1382ac188 100644
--- a/app/test-eventdev/test_pipeline_common.c
+++ b/app/test-eventdev/test_pipeline_common.c
@@ -684,10 +684,10 @@ pipeline_worker_cleanup(uint8_t dev, uint8_t port, struct
rte_event ev[],
rte_pktmbuf_free(ev[i].mbuf);
}
- for (i = 0; i < deq; i++)
+ for (i = enq; i < deq; i++)
ev[i].op = RTE_EVENT_OP_RELEASE;
- rte_event_enqueue_burst(dev, port, ev, deq);
+ rte_event_enqueue_burst(dev, port, ev + enq, deq - enq);
}
rte_event_port_quiesce(dev, port, pipeline_event_port_flush, NULL);
--
2.39.1
[PATCH v2 2/7] event/dlb2: changes to correctly validate COS ID arguments
While providing port_cos as vdev/pf CLI argument, the port numbers should
take into account all ports (LDB and DIR) that are created by the
application and the same order should be provided for port_cos parameter.
This fix add checks to ensure that above is validated correctly.
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 32 +++-
drivers/event/dlb2/dlb2_priv.h | 1 -
2 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index a0e673b96b..58eb27f495 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -194,10 +194,8 @@ dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int
*port_cos)
for (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++) {
dlb2->ev_ports[q].cos_id = port_cos[q];
if (port_cos[q] != DLB2_COS_DEFAULT &&
- dlb2->cos_ports[port_cos[q]] <
DLB2_MAX_NUM_LDB_PORTS_PER_COS) {
+ dlb2->cos_ports[port_cos[q]] <
DLB2_MAX_NUM_LDB_PORTS_PER_COS)
dlb2->cos_ports[port_cos[q]]++;
- dlb2->max_cos_port = q;
- }
}
}
@@ -531,8 +529,8 @@ set_port_cos(const char *key __rte_unused,
const char *value,
void *opaque)
{
+ int first, last, cos_id, i, ports_per_cos[DLB2_COS_NUM_VALS] = {0};
struct dlb2_port_cos *port_cos = opaque;
- int first, last, cos_id, i;
if (value == NULL || opaque == NULL) {
DLB2_LOG_ERR("NULL pointer");
@@ -566,6 +564,14 @@ set_port_cos(const char *key __rte_unused,
for (i = first; i <= last; i++)
port_cos->cos_id[i] = cos_id; /* indexed by port */
+ for (i = 0; i < DLB2_MAX_NUM_PORTS_ALL; i++)
+ if (port_cos->cos_id[i] != DLB2_COS_DEFAULT &&
+ ++ports_per_cos[port_cos->cos_id[i]] >
DLB2_MAX_NUM_LDB_PORTS_PER_COS) {
+ DLB2_LOG_ERR("Error parsing ldb port cos_id devarg:
More than 16 ports for "
+ "cos_id %d.", port_cos->cos_id[i]);
+ return -EINVAL;
+ }
+
return 0;
}
@@ -866,9 +872,10 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
const struct dlb2_hw_rsrcs *resources_asked,
uint8_t device_version)
{
- int ret = 0;
- uint32_t cos_ports = 0;
+ uint32_t total_asked_ports;
struct dlb2_create_sched_domain_args *cfg;
+ uint32_t cos_ports = 0, max_cos_port = 0;
+ int ret = 0;
if (resources_asked == NULL) {
DLB2_LOG_ERR("dlb2: dlb2_create NULL parameter");
@@ -876,6 +883,8 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
goto error_exit;
}
+ total_asked_ports = resources_asked->num_ldb_ports +
resources_asked->num_dir_ports;
+
/* Map generic qm resources to dlb2 resources */
cfg = &handle->cfg.resources;
@@ -897,9 +906,14 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
cos_ports = dlb2->cos_ports[0] + dlb2->cos_ports[1] +
dlb2->cos_ports[2] + dlb2->cos_ports[3];
- if (cos_ports > resources_asked->num_ldb_ports ||
- (cos_ports && dlb2->max_cos_port >=
resources_asked->num_ldb_ports)) {
- DLB2_LOG_ERR("dlb2: num_ldb_ports < cos_ports");
+ for (int i = 0; i < DLB2_MAX_NUM_PORTS_ALL; i++) {
+ if (dlb2->ev_ports[i].cos_id != DLB2_COS_DEFAULT)
+ max_cos_port = i;
+ }
+
+ if (cos_ports > resources_asked->num_ldb_ports || max_cos_port >=
total_asked_ports) {
+ DLB2_LOG_ERR("dlb2: Insufficient num_ldb_ports=%d: cos_ports=%d
max_cos_port=%d",
+ resources_asked->num_ldb_ports, cos_ports,
max_cos_port);
ret = EINVAL;
goto error_exit;
}
diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h
index 4dd7532519..285d427397 100644
--- a/drivers/event/dlb2/dlb2_priv.h
+++ b/drivers/event/dlb2/dlb2_priv.h
@@ -649,7 +649,6 @@ struct dlb2_eventdev {
};
uint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class
*/
uint32_t cos_bw[DLB2_COS_NUM_VALS]; /* bandwidth per cos domain */
- uint8_t max_cos_port; /* Max LDB port from any cos */
bool enable_cq_weight;
};
--
2.25.1
[PATCH v2 3/7] event/dlb2: return 96 single link ports for DLB2.5
DLB 2.0 device has 64 single linked or directed ports.
DLB 2.5 device has 96 single linked ports.
API rte_event_dev_info_get() will return 64 directed
ports for DLB 2.0 and 96 single linked ports for DLB2.5
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 58eb27f495..24c56a7968 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -241,16 +241,16 @@ dlb2_hw_query_resources(struct dlb2_eventdev *dlb2)
* The capabilities (CAPs) were set at compile time.
*/
- if (dlb2->max_cq_depth != DLB2_DEFAULT_CQ_DEPTH)
- num_ldb_ports = DLB2_MAX_HL_ENTRIES / dlb2->max_cq_depth;
- else
- num_ldb_ports = dlb2->hw_rsrc_query_results.num_ldb_ports;
+ num_ldb_ports = dlb2->hw_rsrc_query_results.num_ldb_ports;
evdev_dlb2_default_info.max_event_queues =
dlb2->hw_rsrc_query_results.num_ldb_queues;
evdev_dlb2_default_info.max_event_ports = num_ldb_ports;
+ evdev_dlb2_default_info.max_single_link_event_port_queue_pairs =
+ dlb2->hw_rsrc_query_results.num_dir_ports;
+
if (dlb2->version == DLB2_HW_V2_5) {
evdev_dlb2_default_info.max_num_events =
dlb2->hw_rsrc_query_results.num_credits;
--
2.25.1
[PATCH v2 1/7] event/dlb2: addresses deq failure when CQ depth <= 16
When application configures a DIR port with CQ depth less than 8, DLB PMD sets port's cq_depth as 8 and token reservation is used to make the effective cq_depth smaller. However, while setting port's cq_depth_mask application configured CQ depth was used resulting in reading incorrect cachelines while dequeuing. Use PMD calculated CQ depth for cq_depth_mask calculation. Signed-off-by: Pravin Pathak Signed-off-by: Tirthendu Sarkar --- drivers/event/dlb2/dlb2.c | 4 ++-- drivers/event/dlb2/pf/dlb2_pf.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 286241ea41..a0e673b96b 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -1951,9 +1951,9 @@ dlb2_hw_create_dir_port(struct dlb2_eventdev *dlb2, qm_port->cq_idx_unmasked = 0; if (dlb2->poll_mode == DLB2_CQ_POLL_MODE_SPARSE) - qm_port->cq_depth_mask = (cfg.cq_depth * 4) - 1; + qm_port->cq_depth_mask = (qm_port->cq_depth * 4) - 1; else - qm_port->cq_depth_mask = cfg.cq_depth - 1; + qm_port->cq_depth_mask = qm_port->cq_depth - 1; qm_port->gen_bit_shift = rte_popcount32(qm_port->cq_depth_mask); /* starting value of gen bit - it toggles at wrap time */ diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c index ed4e6e424c..31b5487d85 100644 --- a/drivers/event/dlb2/pf/dlb2_pf.c +++ b/drivers/event/dlb2/pf/dlb2_pf.c @@ -400,7 +400,7 @@ dlb2_pf_dir_port_create(struct dlb2_hw_dev *handle, /* Calculate the port memory required, and round up to the nearest * cache line. */ - alloc_sz = cfg->cq_depth * qe_sz; + alloc_sz = RTE_MAX(cfg->cq_depth, DLB2_MIN_HARDWARE_CQ_DEPTH) * qe_sz; alloc_sz = RTE_CACHE_LINE_ROUNDUP(alloc_sz); port_base = dlb2_alloc_coherent_aligned(&mz, &cq_base, alloc_sz, -- 2.25.1
[PATCH v2 6/7] event/dlb2: update qid depth xstat in vector path
update QID depth xstats counter in vector dequeue path Signed-off-by: Pravin Pathak --- drivers/event/dlb2/dlb2.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 6734e93eac..6dfb345de8 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -4138,6 +4138,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port, _mm_storeu_si128((__m128i *)&events[3], v_ev_3); DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched3], 1); + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid3].\ + qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[3])], 1); /* fallthrough */ case 3: v_ev_2 = _mm_unpacklo_epi64(v_unpk_ev_23, v_qe_2); @@ -4145,6 +4147,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port, _mm_storeu_si128((__m128i *)&events[2], v_ev_2); DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched2], 1); + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid2].\ + qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[2])], 1); /* fallthrough */ case 2: v_ev_1 = _mm_blend_epi16(v_unpk_ev_01, v_qe_1, 0x0F); @@ -4153,6 +4157,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port, _mm_storeu_si128((__m128i *)&events[1], v_ev_1); DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched1], 1); + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid1].\ + qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[1])], 1); /* fallthrough */ case 1: v_ev_0 = _mm_unpacklo_epi64(v_unpk_ev_01, v_qe_0); @@ -4160,6 +4166,8 @@ _process_deq_qes_vec_impl(struct dlb2_port *qm_port, _mm_storeu_si128((__m128i *)&events[0], v_ev_0); DLB2_INC_STAT(qm_port->ev_port->stats.rx_sched_cnt[hw_sched0], 1); + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid0].\ + qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[0])], 1); } qm_port->reorder_id += valid_events; } -- 2.25.1
[PATCH v2 4/7] event/dlb2: support managing history list resource
Add support for setting application specified port history
Set HL equal to CQ depth when inflight control is enabled
Added command line parameters 'use_default_hl' (default: 1)
and 'alloc_hl_entries'
- When 'use_default_hl = 1'
* Per port HL is set to DLB2_FIXED_CQ_HL_SIZE (32)
* Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
is DLB2_FIXED_CQ_HL_SIZE/2
* command line parameter alloc_hl_entries is ignored
- When 'use_default_hl = 0'
* Per LDB port HL = 2 * CQ depth
* Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
is DLB2_FIXED_CQ_HL_SIZE
* User should calculate needed HL entries based on CQ depths the
application will use and specify it as command line parameter
'alloc_hl_entries'. This will be used to allocate HL entries.
alloc_hl_entries = (Sum of all LDB ports CQ depths * 2)
* If alloc_hl_entries is not specified, then
Total HL entries for the eventdev = num_ldb_ports * 64
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/dlb2.c | 220 +
drivers/event/dlb2/dlb2_iface.c| 5 +-
drivers/event/dlb2/dlb2_iface.h| 4 +-
drivers/event/dlb2/dlb2_priv.h | 19 +-
drivers/event/dlb2/dlb2_user.h | 24 +++
drivers/event/dlb2/pf/base/dlb2_regs.h | 9 +
drivers/event/dlb2/pf/base/dlb2_resource.c | 74 +++
drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++
drivers/event/dlb2/pf/dlb2_pf.c| 29 ++-
drivers/event/dlb2/rte_pmd_dlb2.c | 24 +++
drivers/event/dlb2/rte_pmd_dlb2.h | 48 -
11 files changed, 429 insertions(+), 45 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 24c56a7968..28c9054f63 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -727,6 +727,50 @@ set_enable_cq_weight(const char *key __rte_unused,
return 0;
}
+static int set_hl_override(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ bool *default_hl = opaque;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ if ((*value == 'n') || (*value == 'N') || (*value == '0'))
+ *default_hl = false;
+ else
+ *default_hl = true;
+
+ return 0;
+}
+
+static int set_hl_entries(const char *key __rte_unused, const char *value,
+ void *opaque)
+{
+ int hl_entries = 0;
+ int ret;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ ret = dlb2_string_to_int(&hl_entries, value);
+ if (ret < 0)
+ return ret;
+
+ if (!hl_entries || (uint32_t)hl_entries > DLB2_MAX_HL_ENTRIES) {
+ DLB2_LOG_ERR(
+ "alloc_hl_entries %u out of range, must be in [1 - %d]",
+ hl_entries, DLB2_MAX_HL_ENTRIES);
+ return -EINVAL;
+ }
+ *(uint32_t *)opaque = hl_entries;
+
+ return 0;
+}
+
static int
set_qid_depth_thresh(const char *key __rte_unused,
const char *value,
@@ -932,8 +976,16 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
DLB2_NUM_ATOMIC_INFLIGHTS_PER_QUEUE *
cfg->num_ldb_queues;
- cfg->num_hist_list_entries = resources_asked->num_ldb_ports *
- evdev_dlb2_default_info.max_event_port_dequeue_depth;
+ /* If hl_entries is non-zero then user specified command line option.
+* Else compute using default_port_hl that has been set earlier based
+* on use_default_hl option
+*/
+ if (dlb2->hl_entries) {
+ cfg->num_hist_list_entries = dlb2->hl_entries;
+ } else {
+ cfg->num_hist_list_entries =
+ resources_asked->num_ldb_ports * dlb2->default_port_hl;
+ }
if (device_version == DLB2_HW_V2_5) {
DLB2_LOG_LINE_DBG("sched domain create - ldb_qs=%d,
ldb_ports=%d, dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d,
credits=%d",
@@ -1154,8 +1206,8 @@ dlb2_eventdev_port_default_conf_get(struct rte_eventdev
*dev,
struct dlb2_eventdev *dlb2 = dlb2_pmd_priv(dev);
port_conf->new_event_threshold = dlb2->new_event_limit;
- port_conf->dequeue_depth = 32;
- port_conf->enqueue_depth = DLB2_MAX_ENQUEUE_DEPTH;
+ port_conf->dequeue_depth = dlb2->default_port_hl / 2;
+ port_conf->enqueue_depth =
evdev_dlb2_default_info.max_event_port_enqueue_depth;
port_conf->event_port_cfg = 0;
}
@@ -1647,16 +1699,14 @@ dlb2_hw_create_ldb
[PATCH v2 7/7] event/dlb2: return default credits based on HW version
From: Tirthendu Sarkar
dlb2_eventdev_info_get() that implements rte_event_dev_info_get() should
return the maximum available credits as supported by HW.
Set maximum credits before device probing by checking HW version.
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/pf/dlb2_pf.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c
index a3f3e7f803..6c273742c9 100644
--- a/drivers/event/dlb2/pf/dlb2_pf.c
+++ b/drivers/event/dlb2/pf/dlb2_pf.c
@@ -756,6 +756,8 @@ dlb2_eventdev_pci_init(struct rte_eventdev *eventdev)
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
dlb2 = dlb2_pmd_priv(eventdev); /* rte_zmalloc_socket mem */
dlb2->version = DLB2_HW_DEVICE_FROM_PCI_ID(pci_dev);
+ if (dlb2->version == DLB2_HW_V2_5)
+ dlb2_args.max_num_events =
DLB2_MAX_NUM_CREDITS(DLB2_HW_V2_5);
/* Were we invoked with runtime parameters? */
if (pci_dev->device.devargs) {
--
2.25.1
[PATCH v2 5/7] event/dlb2: avoid credit release race condition
While unlinking ports, all associated credits should be released.
This commit avoids race condition when main thread is unlinking
while workers are running.
Signed-off-by: Pravin Pathak
---
drivers/event/dlb2/dlb2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 28c9054f63..6734e93eac 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -2664,7 +2664,7 @@ dlb2_eventdev_port_unlink(struct rte_eventdev *dev, void
*event_port,
DLB2_LOG_LINE_DBG("dlb2: ignore unlink from dir port %d",
ev_port->id);
rte_errno = 0;
- return nb_unlinks; /* as if success */
+ goto ret_credits;
}
dlb2 = ev_port->dlb2;
--
2.25.1
[PATCH v2 0/7] event/dlb2: dlb2 hw resource management
v2: [PATCH v1 3/7] Addressed issue with Fixes tag [PATCH v1 4/7] Renamed structure and Macros to avoid name space conflicts. [PATCH v1 4/7] Addressed Doxygen format feedback Pravin Pathak (6): event/dlb2: addresses deq failure when CQ depth <= 16 event/dlb2: changes to correctly validate COS ID arguments event/dlb2: return 96 single link ports for DLB2.5 event/dlb2: support managing history list resource event/dlb2: avoid credit release race condition event/dlb2: update qid depth xstat in vector path Tirthendu Sarkar (1): event/dlb2: return default credits based on HW version drivers/event/dlb2/dlb2.c | 274 + drivers/event/dlb2/dlb2_iface.c| 5 +- drivers/event/dlb2/dlb2_iface.h| 4 +- drivers/event/dlb2/dlb2_priv.h | 20 +- drivers/event/dlb2/dlb2_user.h | 24 ++ drivers/event/dlb2/pf/base/dlb2_regs.h | 9 + drivers/event/dlb2/pf/base/dlb2_resource.c | 74 ++ drivers/event/dlb2/pf/base/dlb2_resource.h | 18 ++ drivers/event/dlb2/pf/dlb2_pf.c| 33 ++- drivers/event/dlb2/rte_pmd_dlb2.c | 24 ++ drivers/event/dlb2/rte_pmd_dlb2.h | 48 +++- 11 files changed, 470 insertions(+), 63 deletions(-) -- 2.25.1
[PATCH v2] event/dlb2: add support for stop and restart dlb device
This feature enables restarting a stopped eventdev with a call
to rte_event_dev_start(). For this, the DLB scheduling domain needs
to be stopped, all DLB ports disabled during eventdev stop and
re-enabled during start. Port configuration is preserved.
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/dlb2.c | 72 ++-
drivers/event/dlb2/dlb2_iface.c| 6 +-
drivers/event/dlb2/dlb2_iface.h| 7 +-
drivers/event/dlb2/dlb2_user.h | 16 +
drivers/event/dlb2/pf/base/dlb2_resource.c | 583 +++--
drivers/event/dlb2/pf/base/dlb2_resource.h | 150 ++
drivers/event/dlb2/pf/dlb2_main.c | 10 +
drivers/event/dlb2/pf/dlb2_main.h | 4 +
drivers/event/dlb2/pf/dlb2_pf.c| 69 ++-
9 files changed, 857 insertions(+), 60 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 084875f1c8..7827d697cf 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -1025,18 +1025,28 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
return ret;
}
-static void
+static int
dlb2_hw_reset_sched_domain(const struct rte_eventdev *dev, bool reconfig)
{
struct dlb2_eventdev *dlb2 = dlb2_pmd_priv(dev);
enum dlb2_configuration_state config_state;
- int i, j;
+ int i, j, ret;
- dlb2_iface_domain_reset(dlb2);
+ ret = dlb2_iface_domain_reset(dlb2);
+ if (ret) {
+ DLB2_LOG_ERR("dlb2_hw_reset_domain err %d", ret);
+ return ret;
+ }
/* Free all dynamically allocated port memory */
- for (i = 0; i < dlb2->num_ports; i++)
+ for (i = 0; i < dlb2->num_ports; i++) {
dlb2_free_qe_mem(&dlb2->ev_ports[i].qm_port);
+ if (!reconfig) {
+ dlb2->ev_ports[i].qm_port.enable_inflight_ctrl = 0;
+ dlb2->ev_ports[i].qm_port.token_pop_mode = 0;
+ dlb2->ev_ports[i].qm_port.hist_list = 0;
+ }
+ }
/* If reconfiguring, mark the device's queues and ports as "previously
* configured." If the user doesn't reconfigure them, the PMD will
@@ -1075,6 +1085,8 @@ dlb2_hw_reset_sched_domain(const struct rte_eventdev
*dev, bool reconfig)
dlb2->max_dir_credits = 0;
}
dlb2->configured = false;
+
+ return 0;
}
/* Note: 1 QM instance per QM device, QM instance/device == event device */
@@ -1092,7 +1104,9 @@ dlb2_eventdev_configure(const struct rte_eventdev *dev)
* scheduling domain before attempting to configure a new one.
*/
if (dlb2->configured) {
- dlb2_hw_reset_sched_domain(dev, true);
+ ret = dlb2_hw_reset_sched_domain(dev, true);
+ if (ret)
+ return ret;
ret = dlb2_hw_query_resources(dlb2);
if (ret) {
DLB2_LOG_ERR("get resources err=%d, devid=%d",
@@ -2818,6 +2832,27 @@ dlb2_eventdev_apply_port_links(struct rte_eventdev *dev)
return 0;
}
+static int
+dlb2_set_port_ctrl(struct dlb2_eventdev_port *ev_port, bool enable)
+{
+ const char *err_str = enable ? "enabled" : "disabled";
+
+ if (!ev_port->setup_done)
+ return 0;
+
+ if (!(ev_port->enq_configured ^ enable)) {
+ DLB2_LOG_INFO("dlb2: ev_port %d already %s", ev_port->id,
err_str);
+ return 0;
+ }
+ if (dlb2_iface_port_ctrl(&ev_port->qm_port, enable)) {
+ DLB2_LOG_ERR("dlb2: ev_port %d could not be %s", ev_port->id,
err_str);
+ return -EFAULT;
+ }
+ ev_port->enq_configured = enable;
+
+ return 0;
+}
+
static int
dlb2_eventdev_start(struct rte_eventdev *dev)
{
@@ -2849,10 +2884,14 @@ dlb2_eventdev_start(struct rte_eventdev *dev)
return ret;
for (i = 0; i < dlb2->num_ports; i++) {
- if (!dlb2->ev_ports[i].setup_done) {
+ struct dlb2_eventdev_port *ev_port = &dlb2->ev_ports[i];
+
+ if (!ev_port->setup_done && ev_port->qm_port.config_state !=
DLB2_NOT_CONFIGURED) {
DLB2_LOG_ERR("dlb2: port %d not setup", i);
return -ESTALE;
}
+ if (dlb2_set_port_ctrl(ev_port, true))
+ return -EFAULT;
}
for (i = 0; i < dlb2->num_queues; i++) {
@@ -4816,9 +4855,11 @@ static void
dlb2_drain(struct rte_eventdev *dev)
{
struct dlb2_eventdev *dlb2 = dlb2_pmd_priv(dev);
+ struct dlb2_hw_dev *handle = &dlb2->qm_instance;
struct dlb2_eventdev_port *ev_port = NULL;
+ struct dlb2_stop_domain_args
[PATCH v1] event/dlb2: add support for stop and restart dlb device
This feature enables restarting a stopped eventdev with a call
to rte_event_dev_start(). For this, the DLB scheduling domain needs
to be stopped, all DLB ports disabled during eventdev stop and
re-enabled during start. Port configuration is preserved.
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
drivers/event/dlb2/dlb2.c | 72 ++-
drivers/event/dlb2/dlb2_iface.c| 6 +-
drivers/event/dlb2/dlb2_iface.h| 7 +-
drivers/event/dlb2/dlb2_user.h | 16 +
drivers/event/dlb2/pf/base/dlb2_resource.c | 583 +++--
drivers/event/dlb2/pf/base/dlb2_resource.h | 150 ++
drivers/event/dlb2/pf/dlb2_main.c | 10 +
drivers/event/dlb2/pf/dlb2_main.h | 4 +
drivers/event/dlb2/pf/dlb2_pf.c| 69 ++-
9 files changed, 857 insertions(+), 60 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 084875f1c8..7827d697cf 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -1025,18 +1025,28 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,
return ret;
}
-static void
+static int
dlb2_hw_reset_sched_domain(const struct rte_eventdev *dev, bool reconfig)
{
struct dlb2_eventdev *dlb2 = dlb2_pmd_priv(dev);
enum dlb2_configuration_state config_state;
- int i, j;
+ int i, j, ret;
- dlb2_iface_domain_reset(dlb2);
+ ret = dlb2_iface_domain_reset(dlb2);
+ if (ret) {
+ DLB2_LOG_ERR("dlb2_hw_reset_domain err %d", ret);
+ return ret;
+ }
/* Free all dynamically allocated port memory */
- for (i = 0; i < dlb2->num_ports; i++)
+ for (i = 0; i < dlb2->num_ports; i++) {
dlb2_free_qe_mem(&dlb2->ev_ports[i].qm_port);
+ if (!reconfig) {
+ dlb2->ev_ports[i].qm_port.enable_inflight_ctrl = 0;
+ dlb2->ev_ports[i].qm_port.token_pop_mode = 0;
+ dlb2->ev_ports[i].qm_port.hist_list = 0;
+ }
+ }
/* If reconfiguring, mark the device's queues and ports as "previously
* configured." If the user doesn't reconfigure them, the PMD will
@@ -1075,6 +1085,8 @@ dlb2_hw_reset_sched_domain(const struct rte_eventdev
*dev, bool reconfig)
dlb2->max_dir_credits = 0;
}
dlb2->configured = false;
+
+ return 0;
}
/* Note: 1 QM instance per QM device, QM instance/device == event device */
@@ -1092,7 +1104,9 @@ dlb2_eventdev_configure(const struct rte_eventdev *dev)
* scheduling domain before attempting to configure a new one.
*/
if (dlb2->configured) {
- dlb2_hw_reset_sched_domain(dev, true);
+ ret = dlb2_hw_reset_sched_domain(dev, true);
+ if (ret)
+ return ret;
ret = dlb2_hw_query_resources(dlb2);
if (ret) {
DLB2_LOG_ERR("get resources err=%d, devid=%d",
@@ -2818,6 +2832,27 @@ dlb2_eventdev_apply_port_links(struct rte_eventdev *dev)
return 0;
}
+static int
+dlb2_set_port_ctrl(struct dlb2_eventdev_port *ev_port, bool enable)
+{
+ const char *err_str = enable ? "enabled" : "disabled";
+
+ if (!ev_port->setup_done)
+ return 0;
+
+ if (!(ev_port->enq_configured ^ enable)) {
+ DLB2_LOG_INFO("dlb2: ev_port %d already %s", ev_port->id,
err_str);
+ return 0;
+ }
+ if (dlb2_iface_port_ctrl(&ev_port->qm_port, enable)) {
+ DLB2_LOG_ERR("dlb2: ev_port %d could not be %s", ev_port->id,
err_str);
+ return -EFAULT;
+ }
+ ev_port->enq_configured = enable;
+
+ return 0;
+}
+
static int
dlb2_eventdev_start(struct rte_eventdev *dev)
{
@@ -2849,10 +2884,14 @@ dlb2_eventdev_start(struct rte_eventdev *dev)
return ret;
for (i = 0; i < dlb2->num_ports; i++) {
- if (!dlb2->ev_ports[i].setup_done) {
+ struct dlb2_eventdev_port *ev_port = &dlb2->ev_ports[i];
+
+ if (!ev_port->setup_done && ev_port->qm_port.config_state !=
DLB2_NOT_CONFIGURED) {
DLB2_LOG_ERR("dlb2: port %d not setup", i);
return -ESTALE;
}
+ if (dlb2_set_port_ctrl(ev_port, true))
+ return -EFAULT;
}
for (i = 0; i < dlb2->num_queues; i++) {
@@ -4816,9 +4855,11 @@ static void
dlb2_drain(struct rte_eventdev *dev)
{
struct dlb2_eventdev *dlb2 = dlb2_pmd_priv(dev);
+ struct dlb2_hw_dev *handle = &dlb2->qm_instance;
struct dlb2_eventdev_port *ev_port = NULL;
+ struct dlb2_stop_domain_args
[PATCH v2] event/dlb2: add dequeue interrupt mode support
DLB2 port interrupt is implemented using DPDK interrupt
framework. This allows eventdev dequeue API to sleep when
the port queue is empty and gets wakeup when event arrives
at the port. Port dequeue mode is configured using devargs
argument port_dequeue_wait. Supported modes are polling and
interrupt. Default mode is polling.
This commit also adds code to handle device error interrupts
and print alarm details.
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
doc/guides/eventdevs/dlb2.rst | 20 +
drivers/event/dlb2/dlb2.c | 236 +-
drivers/event/dlb2/dlb2_iface.c| 7 +
drivers/event/dlb2/dlb2_iface.h| 8 +
drivers/event/dlb2/dlb2_priv.h | 18 +
drivers/event/dlb2/dlb2_user.h | 112 +++
drivers/event/dlb2/pf/base/dlb2_hw_types.h | 70 ++
drivers/event/dlb2/pf/base/dlb2_osdep.h| 46 ++
drivers/event/dlb2/pf/base/dlb2_regs.h | 149 +++-
drivers/event/dlb2/pf/base/dlb2_resource.c | 825 +
drivers/event/dlb2/pf/base/dlb2_resource.h | 6 +
drivers/event/dlb2/pf/dlb2_pf.c| 223 ++
12 files changed, 1711 insertions(+), 9 deletions(-)
diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst
index 8ec7168f20..a4ba857351 100644
--- a/doc/guides/eventdevs/dlb2.rst
+++ b/doc/guides/eventdevs/dlb2.rst
@@ -477,6 +477,26 @@ Example command to use as meson option for credit handling:
meson configure -Dc_args='-DDLB_SW_CREDITS_CHECKS=0
-DDLB_HW_CREDITS_CHECKS=1'
+Interrupt Mode Support
+~~
+DLB dequeue supports interrupt mode for the API rte_event_dequeue_burst().
+The default port dequeue mode is polling. Dequeue wait mode can be configured
+on per eventdev port basis using devargs argument 'port_dequeue_wait'. In
+interrupt mode, if the port queue is empty, the application thread will block
+on the interrupt until a new event arrives. It enters blocking mode only after
+any specified timeout. During the timeout, it will poll the port queue for
+events as usual. Interrupt mode uses the DPDK interrupt support framework.
+
+.. code-block:: console
+
+ --allow ea:00.0,port_dequeue_wait=all:interrupt
+
+port = all//-
+mode = interrupt/polling
+
+Eventdev port interrupt and polling wait modes for dequeue can be set for all
+the ports, a single port, or a range of ports using this parameter.
+
Running Eventdev Applications with DLB Device
-
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 084875f1c8..c3e40bd707 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -185,6 +185,22 @@ dlb2_init_queue_depth_thresholds(struct dlb2_eventdev
*dlb2,
}
}
+/* override defaults with value(s) provided on command line */
+static int
+dlb2_init_port_dequeue_wait(struct dlb2_eventdev *dlb2,
+ enum dlb2_port_dequeue_wait_types
+ *port_dequeue_wait_modes)
+{
+ int p;
+
+ for (p = 0; p < DLB2_MAX_NUM_PORTS(dlb2->version); p++) {
+ if (port_dequeue_wait_modes[p] != 0)
+ dlb2->ev_ports[p].qm_port.dequeue_wait =
+ port_dequeue_wait_modes[p];
+ }
+ return 0;
+}
+
/* override defaults with value(s) provided on command line */
static void
dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int *port_cos)
@@ -867,6 +883,111 @@ set_qid_depth_thresh_v2_5(const char *key __rte_unused,
return 0;
}
+static int
+set_port_dequeue_wait_ver(const char *key __rte_unused,
+ const char *value,
+ void *opaque,
+ int version)
+{
+ struct dlb2_port_dequeue_wait *dequeue_wait = opaque;
+ int first, last;
+ enum dlb2_port_dequeue_wait_types wait;
+ const char *valp = value;
+ bool port_list[DLB2_MAX_NUM_PORTS_ALL] = {false};
+ int lmax = DLB2_MAX_NUM_PORTS(version);
+ int len;
+ int lc;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ /* command line override may take a combination of the following forms:
+* port_dequeue_wait=all: ... all ports
+* port_dequeue_wait=portA-portB: ... a range of ports
+* port_dequeue_wait=portA: ... just one port
+*/
+
+ do {
+ do {
+ if (strncmp(valp, "all", 3) == 0) {
+ for (lc = 0; lc < lmax; lc++)
+ port_list[lc] = true;
+ valp += 3;
+ } else if (sscanf(valp, "%d-%d%n",
+ &first,
+
[PATCH v1] event/dlb2: update DLB documentation for history list config
Update DPDK documentation for configuring DLB hardware history
list resource using devargs arguments.
Fixes: 33ab065d0c40 ("event/dlb2: support managing history list resource")
Signed-off-by: Pravin Pathak
---
doc/guides/eventdevs/dlb2.rst | 23 +++
1 file changed, 23 insertions(+)
diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst
index 8ec7168f20..2f836db010 100644
--- a/doc/guides/eventdevs/dlb2.rst
+++ b/doc/guides/eventdevs/dlb2.rst
@@ -7,6 +7,12 @@ Driver for the Intel® Dynamic Load Balancer (DLB)
The DPDK DLB poll mode driver supports the Intel® Dynamic Load Balancer,
hardware versions 2.0 and 2.5.
+Please follow the links below to download the Programmer Guides.
+
+`Intel Dynamic Load Balancer 2.0 Programmer Guide
<https://cdrdv2.intel.com/v1/dl/getContent/613545>`_. (Device: 0x2710)
+
+`Intel Dynamic Load Balancer 2.5 Programmer Guide
<https://cdrdv2.intel.com/v1/dl/getContent/639481>`_. (Device: 0x2714)
+
Prerequisites
-
@@ -477,6 +483,23 @@ Example command to use as meson option for credit handling:
meson configure -Dc_args='-DDLB_SW_CREDITS_CHECKS=0
-DDLB_HW_CREDITS_CHECKS=1'
+DLB History List Configuration
+~~
+Every DLB Load Balancing port (i.e., eventdev port not using
RTE_EVENT_PORT_CFG_SINGLE_LINK flag)
+has a hardware resource call history list entries (HL) associated with it.
This count decides the number
+of events that can be inflight to the port from the DLB hardware. DLB has 2048
total HL entries.
+As DLB supports 64 load-balanced ports, by default DLB PMD assigns 32 HL
entries to each port.
+Following devargs arguments allow application to control HL entries overriding
default mode.
+DLB API rte_pmd_dlb2_set_port_param() allows setting HL entries for the DLB
eventdev ports.
+Please refer to section "Fine Tuning History List Entries" in DLB Programmer
Guide for details.
+
+.. code-block:: console
+
+ --allow ea:00.0,use_default_hl=0,alloc_hl_entries=1024
+
+use_default_hl = 1=Enable (default), 0=Disable
+alloc_hl_entries = 0-2048 Total HL entries
+
Running Eventdev Applications with DLB Device
-
--
2.39.1
[PATCH v1] event/dlb2: add dequeue interrupt mode support
DLB2 port interrupt is implemented using DPDK interrupt
framework. This allows eventdev dequeue API to sleep when
the port queue is empty and gets wakeup when event arrives
at the port. Port dequeue mode is configured using devargs
argument port_dequeue_wait. Supported modes are polling and
interrupt. Default mode is polling.
This commit also adds code to handle device error interrupts
and print alarm details.
Signed-off-by: Pravin Pathak
Signed-off-by: Tirthendu Sarkar
---
doc/guides/eventdevs/dlb2.rst | 20 +
drivers/event/dlb2/dlb2.c | 236 +-
drivers/event/dlb2/dlb2_iface.c| 7 +
drivers/event/dlb2/dlb2_iface.h| 8 +
drivers/event/dlb2/dlb2_priv.h | 18 +
drivers/event/dlb2/dlb2_user.h | 112 +++
drivers/event/dlb2/pf/base/dlb2_hw_types.h | 70 ++
drivers/event/dlb2/pf/base/dlb2_osdep.h| 46 ++
drivers/event/dlb2/pf/base/dlb2_regs.h | 149 +++-
drivers/event/dlb2/pf/base/dlb2_resource.c | 825 +
drivers/event/dlb2/pf/base/dlb2_resource.h | 6 +
drivers/event/dlb2/pf/dlb2_pf.c| 223 ++
12 files changed, 1711 insertions(+), 9 deletions(-)
diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst
index 8ec7168f20..a4ba857351 100644
--- a/doc/guides/eventdevs/dlb2.rst
+++ b/doc/guides/eventdevs/dlb2.rst
@@ -477,6 +477,26 @@ Example command to use as meson option for credit handling:
meson configure -Dc_args='-DDLB_SW_CREDITS_CHECKS=0
-DDLB_HW_CREDITS_CHECKS=1'
+Interrupt Mode Support
+~~
+DLB dequeue supports interrupt mode for the API rte_event_dequeue_burst().
+The default port dequeue mode is polling. Dequeue wait mode can be configured
+on per eventdev port basis using devargs argument 'port_dequeue_wait'. In
+interrupt mode, if the port queue is empty, the application thread will block
+on the interrupt until a new event arrives. It enters blocking mode only after
+any specified timeout. During the timeout, it will poll the port queue for
+events as usual. Interrupt mode uses the DPDK interrupt support framework.
+
+.. code-block:: console
+
+ --allow ea:00.0,port_dequeue_wait=all:interrupt
+
+port = all//-
+mode = interrupt/polling
+
+Eventdev port interrupt and polling wait modes for dequeue can be set for all
+the ports, a single port, or a range of ports using this parameter.
+
Running Eventdev Applications with DLB Device
-
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 084875f1c8..bf668eb777 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -185,6 +185,22 @@ dlb2_init_queue_depth_thresholds(struct dlb2_eventdev
*dlb2,
}
}
+/* override defaults with value(s) provided on command line */
+static int
+dlb2_init_port_dequeue_wait(struct dlb2_eventdev *dlb2,
+ enum dlb2_port_dequeue_wait_types
+ *port_dequeue_wait_modes)
+{
+ int p;
+
+ for (p = 0; p < DLB2_MAX_NUM_PORTS(dlb2->version); p++) {
+ if (port_dequeue_wait_modes[p] != 0)
+ dlb2->ev_ports[p].qm_port.dequeue_wait =
+ port_dequeue_wait_modes[p];
+ }
+ return 0;
+}
+
/* override defaults with value(s) provided on command line */
static void
dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int *port_cos)
@@ -867,6 +883,111 @@ set_qid_depth_thresh_v2_5(const char *key __rte_unused,
return 0;
}
+static int
+set_port_dequeue_wait_ver(const char *key __rte_unused,
+ const char *value,
+ void *opaque,
+ int version)
+{
+ struct dlb2_port_dequeue_wait *dequeue_wait = opaque;
+ int first, last;
+ enum dlb2_port_dequeue_wait_types wait;
+ const char *valp = value;
+ bool port_list[DLB2_MAX_NUM_PORTS_ALL] = {false};
+ int lmax = DLB2_MAX_NUM_PORTS(version);
+ int len;
+ int lc;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer");
+ return -EINVAL;
+ }
+
+ /* command line override may take a combination of the following forms:
+* port_dequeue_wait=all: ... all ports
+* port_dequeue_wait=portA-portB: ... a range of ports
+* port_dequeue_wait=portA: ... just one port
+*/
+
+ do {
+ do {
+ if (strncmp(valp, "all", 3) == 0) {
+ for (lc = 0; lc < lmax; lc++)
+ port_list[lc] = true;
+ valp += 3;
+ } else if (sscanf(valp, "%d-%d%n",
+ &first,
+
[PATCH v1] mailmap: add new email to DPDK
Adding new mail for DPDK contribution Signed-off-by: Pravin Pathak --- .mailmap | 1 + 1 file changed, 1 insertion(+) diff --git a/.mailmap b/.mailmap index c7d55c7386..c81e745ce7 100644 --- a/.mailmap +++ b/.mailmap @@ -1240,6 +1240,7 @@ Prateek Agarwal Prathisna Padmasanan Praveen Kaligineedi Praveen Shetty +Pravin Pathak Pravin Pathak Prince Takkar Priyalee Kushwaha -- 2.25.1
[PATCH v1] mailmap: add new email to DPDK
Adding new mail for DPDK contribution Signed-off-by: Pravin Pathak --- .mailmap | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.mailmap b/.mailmap index c7d55c7386..1c5c367f6c 100644 --- a/.mailmap +++ b/.mailmap @@ -1240,7 +1240,7 @@ Prateek Agarwal Prathisna Padmasanan Praveen Kaligineedi Praveen Shetty -Pravin Pathak +Pravin Pathak Prince Takkar Priyalee Kushwaha Priyanka Jain -- 2.43.0
[PATCH v2] mailmap: add new email to DPDK
Adding new mail for DPDK contribution Signed-off-by: Pravin Pathak --- .mailmap | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.mailmap b/.mailmap index c7d55c7386..1c5c367f6c 100644 --- a/.mailmap +++ b/.mailmap @@ -1240,7 +1240,7 @@ Prateek Agarwal Prathisna Padmasanan Praveen Kaligineedi Praveen Shetty -Pravin Pathak +Pravin Pathak Prince Takkar Priyalee Kushwaha Priyanka Jain -- 2.43.0
