[PATCH] D135526: [clang][LoongArch] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for LoongArch

2022-10-08 Thread wanglei via Phabricator via cfe-commits
wangleiat created this revision.
wangleiat added reviewers: SixWeining, xen0n, xry111, gonglingqin, MaskRay.
Herald added a subscriber: StephenFan.
Herald added a project: All.
wangleiat requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D135526

Files:
  clang/lib/Basic/Targets/LoongArch.h
  clang/test/CodeGen/LoongArch/atomics.c


Index: clang/test/CodeGen/LoongArch/atomics.c
===
--- /dev/null
+++ clang/test/CodeGen/LoongArch/atomics.c
@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -triple loongarch32 -O1 -emit-llvm %s -o - \
+// RUN:   | FileCheck %s -check-prefix=LA32
+// RUN: %clang_cc1 -triple loongarch64 -O1 -emit-llvm %s -o - \
+// RUN:   | FileCheck %s -check-prefix=LA64
+
+/// This test demonstrates that MaxAtomicInlineWidth is set appropriately.
+
+#include 
+#include 
+
+void test_i8_atomics(_Atomic(int8_t) * a, int8_t b) {
+  // LA32: load atomic i8, ptr %a seq_cst, align 1
+  // LA32: store atomic i8 %b, ptr %a seq_cst, align 1
+  // LA32: atomicrmw add ptr %a, i8 %b seq_cst
+  // LA64: load atomic i8, ptr %a seq_cst, align 1
+  // LA64: store atomic i8 %b, ptr %a seq_cst, align 1
+  // LA64: atomicrmw add ptr %a, i8 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i32_atomics(_Atomic(int32_t) * a, int32_t b) {
+  // LA32: load atomic i32, ptr %a seq_cst, align 4
+  // LA32: store atomic i32 %b, ptr %a seq_cst, align 4
+  // LA32: atomicrmw add ptr %a, i32 %b seq_cst
+  // LA64: load atomic i32, ptr %a seq_cst, align 4
+  // LA64: store atomic i32 %b, ptr %a seq_cst, align 4
+  // LA64: atomicrmw add ptr %a, i32 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i64_atomics(_Atomic(int64_t) * a, int64_t b) {
+  // LA32: call i64 @__atomic_load_8
+  // LA32: call void @__atomic_store_8
+  // LA32: call i64 @__atomic_fetch_add_8
+  // LA64: load atomic i64, ptr %a seq_cst, align 8
+  // LA64: store atomic i64 %b, ptr %a seq_cst, align 8
+  // LA64: atomicrmw add ptr %a, i64 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
Index: clang/lib/Basic/Targets/LoongArch.h
===
--- clang/lib/Basic/Targets/LoongArch.h
+++ clang/lib/Basic/Targets/LoongArch.h
@@ -79,6 +79,9 @@
 }
 return false;
   }
+  void setMaxAtomicWidth() override {
+MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
@@ -100,6 +103,9 @@
 }
 return false;
   }
+  void setMaxAtomicWidth() override {
+MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
+  }
 };
 } // end namespace targets
 } // end namespace clang


Index: clang/test/CodeGen/LoongArch/atomics.c
===
--- /dev/null
+++ clang/test/CodeGen/LoongArch/atomics.c
@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -triple loongarch32 -O1 -emit-llvm %s -o - \
+// RUN:   | FileCheck %s -check-prefix=LA32
+// RUN: %clang_cc1 -triple loongarch64 -O1 -emit-llvm %s -o - \
+// RUN:   | FileCheck %s -check-prefix=LA64
+
+/// This test demonstrates that MaxAtomicInlineWidth is set appropriately.
+
+#include 
+#include 
+
+void test_i8_atomics(_Atomic(int8_t) * a, int8_t b) {
+  // LA32: load atomic i8, ptr %a seq_cst, align 1
+  // LA32: store atomic i8 %b, ptr %a seq_cst, align 1
+  // LA32: atomicrmw add ptr %a, i8 %b seq_cst
+  // LA64: load atomic i8, ptr %a seq_cst, align 1
+  // LA64: store atomic i8 %b, ptr %a seq_cst, align 1
+  // LA64: atomicrmw add ptr %a, i8 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i32_atomics(_Atomic(int32_t) * a, int32_t b) {
+  // LA32: load atomic i32, ptr %a seq_cst, align 4
+  // LA32: store atomic i32 %b, ptr %a seq_cst, align 4
+  // LA32: atomicrmw add ptr %a, i32 %b seq_cst
+  // LA64: load atomic i32, ptr %a seq_cst, align 4
+  // LA64: store atomic i32 %b, ptr %a seq_cst, align 4
+  // LA64: atomicrmw add ptr %a, i32 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i64_atomics(_Atomic(int64_t) * a, int64_t b) {
+  // LA32: call i64 @__atomic_load_8
+  // LA32: call void @__atomic_store_8
+  // LA32: call i64 @__atomic_fetch_add_8
+  // LA64: load atomic i64, ptr %a seq_cst, align 8
+  // LA64: store atomic i64 %b, ptr %a seq_cst, align 8
+  // LA6

[PATCH] D135526: [clang][LoongArch] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for LoongArch

2022-10-08 Thread wanglei via Phabricator via cfe-commits
wangleiat updated this revision to Diff 466349.
wangleiat added a comment.

Address @SixWeining's comment.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135526/new/

https://reviews.llvm.org/D135526

Files:
  clang/lib/Basic/Targets/LoongArch.h
  clang/test/CodeGen/LoongArch/atomics.c


Index: clang/test/CodeGen/LoongArch/atomics.c
===
--- /dev/null
+++ clang/test/CodeGen/LoongArch/atomics.c
@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -triple loongarch32 -O1 -emit-llvm %s -o - \
+// RUN:   | FileCheck %s --check-prefix=LA32
+// RUN: %clang_cc1 -triple loongarch64 -O1 -emit-llvm %s -o - \
+// RUN:   | FileCheck %s --check-prefix=LA64
+
+/// This test demonstrates that MaxAtomicInlineWidth is set appropriately.
+
+#include 
+#include 
+
+void test_i8_atomics(_Atomic(int8_t) * a, int8_t b) {
+  // LA32: load atomic i8, ptr %a seq_cst, align 1
+  // LA32: store atomic i8 %b, ptr %a seq_cst, align 1
+  // LA32: atomicrmw add ptr %a, i8 %b seq_cst
+  // LA64: load atomic i8, ptr %a seq_cst, align 1
+  // LA64: store atomic i8 %b, ptr %a seq_cst, align 1
+  // LA64: atomicrmw add ptr %a, i8 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i32_atomics(_Atomic(int32_t) * a, int32_t b) {
+  // LA32: load atomic i32, ptr %a seq_cst, align 4
+  // LA32: store atomic i32 %b, ptr %a seq_cst, align 4
+  // LA32: atomicrmw add ptr %a, i32 %b seq_cst
+  // LA64: load atomic i32, ptr %a seq_cst, align 4
+  // LA64: store atomic i32 %b, ptr %a seq_cst, align 4
+  // LA64: atomicrmw add ptr %a, i32 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i64_atomics(_Atomic(int64_t) * a, int64_t b) {
+  // LA32: call i64 @__atomic_load_8
+  // LA32: call void @__atomic_store_8
+  // LA32: call i64 @__atomic_fetch_add_8
+  // LA64: load atomic i64, ptr %a seq_cst, align 8
+  // LA64: store atomic i64 %b, ptr %a seq_cst, align 8
+  // LA64: atomicrmw add ptr %a, i64 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
Index: clang/lib/Basic/Targets/LoongArch.h
===
--- clang/lib/Basic/Targets/LoongArch.h
+++ clang/lib/Basic/Targets/LoongArch.h
@@ -79,6 +79,9 @@
 }
 return false;
   }
+  void setMaxAtomicWidth() override {
+MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY LoongArch64TargetInfo
@@ -100,6 +103,9 @@
 }
 return false;
   }
+  void setMaxAtomicWidth() override {
+MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
+  }
 };
 } // end namespace targets
 } // end namespace clang


Index: clang/test/CodeGen/LoongArch/atomics.c
===
--- /dev/null
+++ clang/test/CodeGen/LoongArch/atomics.c
@@ -0,0 +1,45 @@
+// RUN: %clang_cc1 -triple loongarch32 -O1 -emit-llvm %s -o - \
+// RUN:   | FileCheck %s --check-prefix=LA32
+// RUN: %clang_cc1 -triple loongarch64 -O1 -emit-llvm %s -o - \
+// RUN:   | FileCheck %s --check-prefix=LA64
+
+/// This test demonstrates that MaxAtomicInlineWidth is set appropriately.
+
+#include 
+#include 
+
+void test_i8_atomics(_Atomic(int8_t) * a, int8_t b) {
+  // LA32: load atomic i8, ptr %a seq_cst, align 1
+  // LA32: store atomic i8 %b, ptr %a seq_cst, align 1
+  // LA32: atomicrmw add ptr %a, i8 %b seq_cst
+  // LA64: load atomic i8, ptr %a seq_cst, align 1
+  // LA64: store atomic i8 %b, ptr %a seq_cst, align 1
+  // LA64: atomicrmw add ptr %a, i8 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i32_atomics(_Atomic(int32_t) * a, int32_t b) {
+  // LA32: load atomic i32, ptr %a seq_cst, align 4
+  // LA32: store atomic i32 %b, ptr %a seq_cst, align 4
+  // LA32: atomicrmw add ptr %a, i32 %b seq_cst
+  // LA64: load atomic i32, ptr %a seq_cst, align 4
+  // LA64: store atomic i32 %b, ptr %a seq_cst, align 4
+  // LA64: atomicrmw add ptr %a, i32 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b, memory_order_seq_cst);
+  __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i64_atomics(_Atomic(int64_t) * a, int64_t b) {
+  // LA32: call i64 @__atomic_load_8
+  // LA32: call void @__atomic_store_8
+  // LA32: call i64 @__atomic_fetch_add_8
+  // LA64: load atomic i64, ptr %a seq_cst, align 8
+  // LA64: store atomic i64 %b, ptr %a seq_cst, align 8
+  // LA64: atomicrmw add ptr %a, i64 %b seq_cst
+  __c11_atomic_load(a, memory_order_seq_cst);
+  __c11_atomic_store(a, b,

[PATCH] D135526: [clang][LoongArch] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for LoongArch

2022-10-08 Thread wanglei via Phabricator via cfe-commits
wangleiat marked 2 inline comments as done.
wangleiat added a comment.

Thanks. @SixWeining


Repository:
  rG LLVM Github Monorepo

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[PATCH] D135526: [clang][LoongArch] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for LoongArch

2022-10-11 Thread wanglei via Phabricator via cfe-commits
wangleiat added a comment.

In D135526#3849117 , @thakis wrote:

> This seems to break check-clang: http://45.33.8.238/linux/88687/step_7.txt
>
> Please take a look and revert for now if it takes a while to fix.

Thanks a lot, I'll fix it right away.


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[PATCH] D135526: [clang][LoongArch] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for LoongArch

2022-10-11 Thread wanglei via Phabricator via cfe-commits
wangleiat updated this revision to Diff 466775.
wangleiat added a comment.

Fix `Preprocessor/init-loongarch.c` test failed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135526/new/

https://reviews.llvm.org/D135526

Files:
  clang/lib/Basic/Targets/LoongArch.h
  clang/test/CodeGen/LoongArch/atomics.c
  clang/test/Preprocessor/init-loongarch.c

Index: clang/test/Preprocessor/init-loongarch.c
===
--- clang/test/Preprocessor/init-loongarch.c
+++ clang/test/Preprocessor/init-loongarch.c
@@ -30,16 +30,16 @@
 // LA32: #define __CHAR16_TYPE__ unsigned short
 // LA32: #define __CHAR32_TYPE__ unsigned int
 // LA32: #define __CHAR_BIT__ 8
-// LA32: #define __CLANG_ATOMIC_BOOL_LOCK_FREE 1
-// LA32: #define __CLANG_ATOMIC_CHAR16_T_LOCK_FREE 1
-// LA32: #define __CLANG_ATOMIC_CHAR32_T_LOCK_FREE 1
-// LA32: #define __CLANG_ATOMIC_CHAR_LOCK_FREE 1
-// LA32: #define __CLANG_ATOMIC_INT_LOCK_FREE 1
+// LA32: #define __CLANG_ATOMIC_BOOL_LOCK_FREE 2
+// LA32: #define __CLANG_ATOMIC_CHAR16_T_LOCK_FREE 2
+// LA32: #define __CLANG_ATOMIC_CHAR32_T_LOCK_FREE 2
+// LA32: #define __CLANG_ATOMIC_CHAR_LOCK_FREE 2
+// LA32: #define __CLANG_ATOMIC_INT_LOCK_FREE 2
 // LA32: #define __CLANG_ATOMIC_LLONG_LOCK_FREE 1
-// LA32: #define __CLANG_ATOMIC_LONG_LOCK_FREE 1
-// LA32: #define __CLANG_ATOMIC_POINTER_LOCK_FREE 1
-// LA32: #define __CLANG_ATOMIC_SHORT_LOCK_FREE 1
-// LA32: #define __CLANG_ATOMIC_WCHAR_T_LOCK_FREE 1
+// LA32: #define __CLANG_ATOMIC_LONG_LOCK_FREE 2
+// LA32: #define __CLANG_ATOMIC_POINTER_LOCK_FREE 2
+// LA32: #define __CLANG_ATOMIC_SHORT_LOCK_FREE 2
+// LA32: #define __CLANG_ATOMIC_WCHAR_T_LOCK_FREE 2
 // LA32: #define __DBL_DECIMAL_DIG__ 17
 // LA32: #define __DBL_DENORM_MIN__ 4.9406564584124654e-324
 // LA32: #define __DBL_DIG__ 15
@@ -70,17 +70,17 @@
 // LA32: #define __FLT_MIN_EXP__ (-125)
 // LA32: #define __FLT_MIN__ 1.17549435e-38F
 // LA32: #define __FLT_RADIX__ 2
-// LA32: #define __GCC_ATOMIC_BOOL_LOCK_FREE 1
-// LA32: #define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 1
-// LA32: #define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 1
-// LA32: #define __GCC_ATOMIC_CHAR_LOCK_FREE 1
-// LA32: #define __GCC_ATOMIC_INT_LOCK_FREE 1
+// LA32: #define __GCC_ATOMIC_BOOL_LOCK_FREE 2
+// LA32: #define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 2
+// LA32: #define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 2
+// LA32: #define __GCC_ATOMIC_CHAR_LOCK_FREE 2
+// LA32: #define __GCC_ATOMIC_INT_LOCK_FREE 2
 // LA32: #define __GCC_ATOMIC_LLONG_LOCK_FREE 1
-// LA32: #define __GCC_ATOMIC_LONG_LOCK_FREE 1
-// LA32: #define __GCC_ATOMIC_POINTER_LOCK_FREE 1
-// LA32: #define __GCC_ATOMIC_SHORT_LOCK_FREE 1
+// LA32: #define __GCC_ATOMIC_LONG_LOCK_FREE 2
+// LA32: #define __GCC_ATOMIC_POINTER_LOCK_FREE 2
+// LA32: #define __GCC_ATOMIC_SHORT_LOCK_FREE 2
 // LA32: #define __GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1
-// LA32: #define __GCC_ATOMIC_WCHAR_T_LOCK_FREE 1
+// LA32: #define __GCC_ATOMIC_WCHAR_T_LOCK_FREE 2
 // LA32: #define __ILP32__ 1
 // LA32: #define __INT16_C_SUFFIX__
 // LA32: #define __INT16_FMTd__ "hd"
@@ -342,16 +342,16 @@
 // LA64: #define __CHAR16_TYPE__ unsigned short
 // LA64: #define __CHAR32_TYPE__ unsigned int
 // LA64: #define __CHAR_BIT__ 8
-// LA64: #define __CLANG_ATOMIC_BOOL_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_CHAR16_T_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_CHAR32_T_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_CHAR_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_INT_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_LLONG_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_LONG_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_POINTER_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_SHORT_LOCK_FREE 1
-// LA64: #define __CLANG_ATOMIC_WCHAR_T_LOCK_FREE 1
+// LA64: #define __CLANG_ATOMIC_BOOL_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_CHAR16_T_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_CHAR32_T_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_CHAR_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_INT_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_LLONG_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_LONG_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_POINTER_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_SHORT_LOCK_FREE 2
+// LA64: #define __CLANG_ATOMIC_WCHAR_T_LOCK_FREE 2
 // LA64: #define __DBL_DECIMAL_DIG__ 17
 // LA64: #define __DBL_DENORM_MIN__ 4.9406564584124654e-324
 // LA64: #define __DBL_DIG__ 15
@@ -382,17 +382,17 @@
 // LA64: #define __FLT_MIN_EXP__ (-125)
 // LA64: #define __FLT_MIN__ 1.17549435e-38F
 // LA64: #define __FLT_RADIX__ 2
-// LA64: #define __GCC_ATOMIC_BOOL_LOCK_FREE 1
-// LA64: #define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 1
-// LA64: #define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 1
-// LA64: #define __GCC_ATOMIC_CHAR_LOCK_FREE 1
-// LA64: #define __GCC_ATOMIC_INT_LOCK_FREE 1
-// LA64: #define __GCC_ATOMIC_LLONG_LOCK_FREE 1
-// LA64: #define __GCC_ATOMIC_LONG_LOCK_FREE 1
-// LA64: #define __GCC_ATOMIC_POINTER_LOCK_FREE 1
-// LA64: #define __GCC_ATOMIC_SHORT_L

[PATCH] D151298: [clang][LoongArch] Fix the calling convention for empty struct in C++ mode

2023-07-20 Thread wanglei via Phabricator via cfe-commits
wangleiat abandoned this revision.
wangleiat added a comment.

We have decided to keep it unchanged. Thank you, everyone.


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  rG LLVM Github Monorepo

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[PATCH] D156866: [Clang][LoongArch] Use the ClangBuiltin class to automatically generate support for CBE and CFE

2023-08-02 Thread wanglei via Phabricator via cfe-commits
wangleiat created this revision.
wangleiat added reviewers: SixWeining, xen0n, xry111, gonglingqin, 
XiaodongLoong.
Herald added a subscriber: hiraditya.
Herald added a project: All.
wangleiat requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

Fixed the type modifier (L->W), removed redundant feature checking code
since the feature has already been checked in `EmitBuiltinExpr`. And
Cleaned up unused diagnostic information.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156866

Files:
  clang/include/clang/Basic/BuiltinsLoongArch.def
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/LoongArch/intrinsic-la32-error.c
  llvm/include/llvm/IR/IntrinsicsLoongArch.td
  llvm/lib/IR/Function.cpp

Index: llvm/lib/IR/Function.cpp
===
--- llvm/lib/IR/Function.cpp
+++ llvm/lib/IR/Function.cpp
@@ -37,6 +37,7 @@
 #include "llvm/IR/IntrinsicsBPF.h"
 #include "llvm/IR/IntrinsicsDirectX.h"
 #include "llvm/IR/IntrinsicsHexagon.h"
+#include "llvm/IR/IntrinsicsLoongArch.h"
 #include "llvm/IR/IntrinsicsMips.h"
 #include "llvm/IR/IntrinsicsNVPTX.h"
 #include "llvm/IR/IntrinsicsPowerPC.h"
Index: llvm/include/llvm/IR/IntrinsicsLoongArch.td
===
--- llvm/include/llvm/IR/IntrinsicsLoongArch.td
+++ llvm/include/llvm/IR/IntrinsicsLoongArch.td
@@ -51,74 +51,75 @@
 //===--===//
 // LoongArch BASE
 
-def int_loongarch_break : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_cacop_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty],
-[ImmArg>, ImmArg>]>;
-def int_loongarch_cacop_w : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-[ImmArg>, ImmArg>]>;
-def int_loongarch_dbar : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_ibar : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_movfcsr2gr : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
-   [ImmArg>]>;
-def int_loongarch_movgr2fcsr : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty],
-   [ImmArg>]>;
-def int_loongarch_syscall : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-
-def int_loongarch_crc_w_b_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_h_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_w_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_d_w : Intrinsic<[llvm_i32_ty],
-[llvm_i64_ty, llvm_i32_ty]>;
-
-def int_loongarch_crcc_w_b_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_h_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_w_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_d_w : Intrinsic<[llvm_i32_ty],
- [llvm_i64_ty, llvm_i32_ty]>;
-
-def int_loongarch_csrrd_w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrrd_d : Intrinsic<[llvm_i64_ty], [llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrwr_w : Intrinsic<[llvm_i32_ty],
-  [llvm_i32_ty, llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrwr_d : Intrinsic<[llvm_i64_ty],
-  [llvm_i64_ty, llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrxchg_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty,
- llvm_i32_ty],
-[ImmArg>]>;
-def int_loongarch_csrxchg_d : Intrinsic<[llvm_i64_ty],
-[llvm_i64_ty, llvm_i64_ty,
- llvm_i32_ty],
-[ImmArg>]>;
-
-def int_loongarch_iocsrrd_b : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_h : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_d : Intrinsic<[llvm_i64_ty], [llvm_i32_ty]>;
-
-def int_loongarch_iocsrwr_b : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_iocsrwr_h : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_iocsrwr_w : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_i

[PATCH] D156866: [Clang][LoongArch] Use the ClangBuiltin class to automatically generate support for CBE and CFE

2023-08-03 Thread wanglei via Phabricator via cfe-commits
wangleiat updated this revision to Diff 547072.
wangleiat added a comment.

Address @SixWeining's commonts.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156866/new/

https://reviews.llvm.org/D156866

Files:
  clang/include/clang/Basic/BuiltinsLoongArch.def
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/LoongArch/intrinsic-la32-error.c
  llvm/include/llvm/IR/IntrinsicsLoongArch.td
  llvm/lib/IR/Function.cpp

Index: llvm/lib/IR/Function.cpp
===
--- llvm/lib/IR/Function.cpp
+++ llvm/lib/IR/Function.cpp
@@ -37,6 +37,7 @@
 #include "llvm/IR/IntrinsicsBPF.h"
 #include "llvm/IR/IntrinsicsDirectX.h"
 #include "llvm/IR/IntrinsicsHexagon.h"
+#include "llvm/IR/IntrinsicsLoongArch.h"
 #include "llvm/IR/IntrinsicsMips.h"
 #include "llvm/IR/IntrinsicsNVPTX.h"
 #include "llvm/IR/IntrinsicsPowerPC.h"
Index: llvm/include/llvm/IR/IntrinsicsLoongArch.td
===
--- llvm/include/llvm/IR/IntrinsicsLoongArch.td
+++ llvm/include/llvm/IR/IntrinsicsLoongArch.td
@@ -51,74 +51,75 @@
 //===--===//
 // LoongArch BASE
 
-def int_loongarch_break : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_cacop_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty],
-[ImmArg>, ImmArg>]>;
-def int_loongarch_cacop_w : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-[ImmArg>, ImmArg>]>;
-def int_loongarch_dbar : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_ibar : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_movfcsr2gr : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
-   [ImmArg>]>;
-def int_loongarch_movgr2fcsr : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty],
-   [ImmArg>]>;
-def int_loongarch_syscall : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-
-def int_loongarch_crc_w_b_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_h_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_w_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_d_w : Intrinsic<[llvm_i32_ty],
-[llvm_i64_ty, llvm_i32_ty]>;
-
-def int_loongarch_crcc_w_b_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_h_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_w_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_d_w : Intrinsic<[llvm_i32_ty],
- [llvm_i64_ty, llvm_i32_ty]>;
-
-def int_loongarch_csrrd_w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrrd_d : Intrinsic<[llvm_i64_ty], [llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrwr_w : Intrinsic<[llvm_i32_ty],
-  [llvm_i32_ty, llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrwr_d : Intrinsic<[llvm_i64_ty],
-  [llvm_i64_ty, llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrxchg_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty,
- llvm_i32_ty],
-[ImmArg>]>;
-def int_loongarch_csrxchg_d : Intrinsic<[llvm_i64_ty],
-[llvm_i64_ty, llvm_i64_ty,
- llvm_i32_ty],
-[ImmArg>]>;
-
-def int_loongarch_iocsrrd_b : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_h : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_d : Intrinsic<[llvm_i64_ty], [llvm_i32_ty]>;
-
-def int_loongarch_iocsrwr_b : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_iocsrwr_h : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_iocsrwr_w : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_iocsrwr_d : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty]>;
-
-def int_loongarch_cpucfg : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-
-def int_loongarch_asrtle_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty]>;
-def int_loongarch_asrtgt_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty]>;
-
-def int_loon

[PATCH] D156866: [Clang][LoongArch] Use the ClangBuiltin class to automatically generate support for CBE and CFE

2023-08-09 Thread wanglei via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rGea8d3b1f9f2d: [Clang][LoongArch] Use the ClangBuiltin class 
to automatically generate support… (authored by wangleiat).

Changed prior to commit:
  https://reviews.llvm.org/D156866?vs=547072&id=548511#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156866/new/

https://reviews.llvm.org/D156866

Files:
  clang/include/clang/Basic/BuiltinsLoongArch.def
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/LoongArch/intrinsic-la32-error.c
  llvm/include/llvm/IR/IntrinsicsLoongArch.td
  llvm/lib/IR/Function.cpp

Index: llvm/lib/IR/Function.cpp
===
--- llvm/lib/IR/Function.cpp
+++ llvm/lib/IR/Function.cpp
@@ -37,6 +37,7 @@
 #include "llvm/IR/IntrinsicsBPF.h"
 #include "llvm/IR/IntrinsicsDirectX.h"
 #include "llvm/IR/IntrinsicsHexagon.h"
+#include "llvm/IR/IntrinsicsLoongArch.h"
 #include "llvm/IR/IntrinsicsMips.h"
 #include "llvm/IR/IntrinsicsNVPTX.h"
 #include "llvm/IR/IntrinsicsPowerPC.h"
Index: llvm/include/llvm/IR/IntrinsicsLoongArch.td
===
--- llvm/include/llvm/IR/IntrinsicsLoongArch.td
+++ llvm/include/llvm/IR/IntrinsicsLoongArch.td
@@ -51,74 +51,75 @@
 //===--===//
 // LoongArch BASE
 
-def int_loongarch_break : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_cacop_d : Intrinsic<[], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty],
-[ImmArg>, ImmArg>]>;
-def int_loongarch_cacop_w : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
-[ImmArg>, ImmArg>]>;
-def int_loongarch_dbar : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_ibar : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-def int_loongarch_movfcsr2gr : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
-   [ImmArg>]>;
-def int_loongarch_movgr2fcsr : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty],
-   [ImmArg>]>;
-def int_loongarch_syscall : Intrinsic<[], [llvm_i32_ty], [ImmArg>]>;
-
-def int_loongarch_crc_w_b_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_h_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_w_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crc_w_d_w : Intrinsic<[llvm_i32_ty],
-[llvm_i64_ty, llvm_i32_ty]>;
-
-def int_loongarch_crcc_w_b_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_h_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_w_w : Intrinsic<[llvm_i32_ty],
- [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_crcc_w_d_w : Intrinsic<[llvm_i32_ty],
- [llvm_i64_ty, llvm_i32_ty]>;
-
-def int_loongarch_csrrd_w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrrd_d : Intrinsic<[llvm_i64_ty], [llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrwr_w : Intrinsic<[llvm_i32_ty],
-  [llvm_i32_ty, llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrwr_d : Intrinsic<[llvm_i64_ty],
-  [llvm_i64_ty, llvm_i32_ty],
-  [ImmArg>]>;
-def int_loongarch_csrxchg_w : Intrinsic<[llvm_i32_ty],
-[llvm_i32_ty, llvm_i32_ty,
- llvm_i32_ty],
-[ImmArg>]>;
-def int_loongarch_csrxchg_d : Intrinsic<[llvm_i64_ty],
-[llvm_i64_ty, llvm_i64_ty,
- llvm_i32_ty],
-[ImmArg>]>;
-
-def int_loongarch_iocsrrd_b : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_h : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_w : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>;
-def int_loongarch_iocsrrd_d : Intrinsic<[llvm_i64_ty], [llvm_i32_ty]>;
-
-def int_loongarch_iocsrwr_b : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_iocsrwr_h : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_iocsrwr_w : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty]>;
-def int_loongarch_iocsrwr_d : Intrinsic<[], [llvm_i64_ty, llvm_i32_ty]>;
-
-def int_loongarch_cpucfg : Intrinsic<[llv

[PATCH] D139177: [LoongArch] Specify registers used for exception handling

2022-12-02 Thread wanglei via Phabricator via cfe-commits
wangleiat accepted this revision.
wangleiat added a comment.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139177/new/

https://reviews.llvm.org/D139177

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[PATCH] D151297: [clang][test][LoongArch] Pre-commit test for empty struct in C++ mode

2023-05-23 Thread wanglei via Phabricator via cfe-commits
wangleiat created this revision.
wangleiat added reviewers: SixWeining, xen0n, xry111, gonglingqin.
Herald added a subscriber: mstorsjo.
Herald added a project: All.
wangleiat requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This is a preliminary patch that adds test cases for handling empty
structs in C++.

The current implementation for passing empty structs is inconsistent
with the calling convention description. For example, when there is only
one empty struct (it satisfies the condition `0 < WOA < GRLEN`),
according to the calling convention, it should be passed through a
GAR (if exists). However, the current implementation does not pass it.
Upcoming patch will address these inconsistencies.

Change-Id: Icc47e56ae7102dc1baebabd48ba93f562a8d5802


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151297

Files:
  clang/test/CodeGenCXX/LoongArch/abi-lp64d-empty-struct.cpp

Index: clang/test/CodeGenCXX/LoongArch/abi-lp64d-empty-struct.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/LoongArch/abi-lp64d-empty-struct.cpp
@@ -0,0 +1,157 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --filter "^define" --version 2
+// RUN: %clang_cc1 -triple loongarch64 -target-feature +f -target-feature +d -target-abi lp64d \
+// RUN:   -emit-llvm %s -o - | FileCheck %s
+
+/// Treat the empty struct as char in C++ mode (sizeof(empty_s) = 1).
+/// If the empty struct is a struct's member, will be treated as
+/// fixed-point member.
+/// WOA: Bit width of the argument.
+/// FIXME: Empty struct is always passed or returned in C++ mode.
+
+/// 1. 0 < WOA <= GRLEN
+/// 1.a. Only fixed-point members.
+
+struct empty_s {};
+// CHECK-LABEL: define dso_local void @_Z12empty_struct7empty_s
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+struct empty_s empty_struct(struct empty_s e) {
+  return e;
+}
+
+struct empty_char_s {
+  struct empty_s e;
+  char c;
+};
+// CHECK-LABEL: define dso_local i64 @_Z18empty_float_struct12empty_char_s
+// CHECK-SAME: (i64 [[S_COERCE:%.*]]) #[[ATTR0:[0-9]+]] {
+struct empty_char_s empty_float_struct(struct empty_char_s s) {
+  return s;
+}
+
+/// 1.b. Only floating-point members.
+/// Nothing to do. The empty struct treated as fixed-point member.
+
+/// 1.c. Both fixed-point and floating-point members.
+/// 1.c.i. Multiple fixed-point members.
+
+struct empty_char_float_s {
+  struct empty_s e1;
+  char c;
+  float f32;
+};
+// CHECK-LABEL: define dso_local { i8, float } @_Z23empty_char_float_struct18empty_char_float_s
+// CHECK-SAME: (i8 [[TMP0:%.*]], float [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
+struct empty_char_float_s empty_char_float_struct(struct empty_char_float_s s) {
+  return s;
+}
+
+/// 1.c.ii. One fixed-point member.
+
+struct empty_float_s {
+  struct empty_s e;
+  float f32;
+};
+// CHECK-LABEL: define dso_local float @_Z18empty_float_struct13empty_float_s
+// CHECK-SAME: (float [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+struct empty_float_s empty_float_struct(struct empty_float_s s) {
+  return s;
+}
+
+struct float_empty_s {
+  float f32;
+  struct empty_s e;
+};
+
+// CHECK-LABEL: define dso_local float @_Z18float_empty_struct13float_empty_s
+// CHECK-SAME: (float [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+struct float_empty_s float_empty_struct(struct float_empty_s s) {
+  return s;
+}
+
+/// 2. GRLEN < WOA <= 2*GRLEN
+
+/// 2.a. Only fixed-point members.
+struct empty_long_s {
+  struct empty_s e;
+  long l;
+};
+// CHECK-LABEL: define dso_local [2 x i64] @_Z17empty_long_struct12empty_long_s
+// CHECK-SAME: ([2 x i64] [[S_COERCE:%.*]]) #[[ATTR0:[0-9]+]] {
+struct empty_long_s empty_long_struct(struct empty_long_s s) {
+  return s;
+}
+
+/// 2.b. Only floating-point members.
+/// Nothing to do.
+
+/// 2.c. Both fixed-point and floating-point members.
+/// 2.c.i. The structure has one floating-point member and only one fixed-point
+/// member.
+
+struct empty_double_s {
+  struct empty_s e;
+  double f64;
+};
+// CHECK-LABEL: define dso_local double @_Z19empty_double_struct14empty_double_s
+// CHECK-SAME: (double [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+struct empty_double_s empty_double_struct(struct empty_double_s s) {
+  return s;
+}
+
+struct double_empty_s {
+  double f64;
+  struct empty_s e;
+};
+// CHECK-LABEL: define dso_local double @_Z19double_empty_struct14double_empty_s
+// CHECK-SAME: (double [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+struct double_empty_s double_empty_struct(struct double_empty_s s) {
+  return s;
+}
+
+/// 2.c.ii. Others
+
+struct empty_float_char_s {
+  struct empty_s e1;
+  float f32;
+  char c;
+};
+// CHECK-LABEL: define dso_local { float, i8 } @_Z23empty_float_char_struct18empty_float_char_s
+// CHECK-SAME: (float [[TMP0:%.*]], i8 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
+struct empty_float_char_s empty_float_char_struct(struct empty_float_char_s s) {
+  return s;
+}
+
+struct empty_float_double_s {
+  struct empty_s 

[PATCH] D151298: [clang][LoongArch] Fix the calling convention for empty struct in C++ mode

2023-05-23 Thread wanglei via Phabricator via cfe-commits
wangleiat created this revision.
wangleiat added reviewers: SixWeining, xen0n, xry111, gonglingqin.
Herald added a project: All.
wangleiat requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Prior to this patch, paramter or return value whose type was a
structure containing empty structure members and fewer than three
floating-point members did not meet the calling convention.

With this patch, an empty struct will always be passed.

An empty struct type that is not non-trivial for the purposes of calls
will be treated as though it were the following C type:

  struct {
char c;
  };

Change-Id: If5c7f499d38d1853261dc1dae6620b8fc9db7fd3


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151298

Files:
  clang/docs/ReleaseNotes.rst
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenCXX/LoongArch/abi-lp64d-empty-struct.cpp

Index: clang/test/CodeGenCXX/LoongArch/abi-lp64d-empty-struct.cpp
===
--- clang/test/CodeGenCXX/LoongArch/abi-lp64d-empty-struct.cpp
+++ clang/test/CodeGenCXX/LoongArch/abi-lp64d-empty-struct.cpp
@@ -6,14 +6,13 @@
 /// If the empty struct is a struct's member, will be treated as
 /// fixed-point member.
 /// WOA: Bit width of the argument.
-/// FIXME: Empty struct is always passed or returned in C++ mode.
 
 /// 1. 0 < WOA <= GRLEN
 /// 1.a. Only fixed-point members.
 
 struct empty_s {};
-// CHECK-LABEL: define dso_local void @_Z12empty_struct7empty_s
-// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-LABEL: define dso_local i64 @_Z12empty_struct7empty_s
+// CHECK-SAME: (i64 [[E_COERCE:%.*]]) #[[ATTR0:[0-9]+]] {
 struct empty_s empty_struct(struct empty_s e) {
   return e;
 }
@@ -39,8 +38,8 @@
   char c;
   float f32;
 };
-// CHECK-LABEL: define dso_local { i8, float } @_Z23empty_char_float_struct18empty_char_float_s
-// CHECK-SAME: (i8 [[TMP0:%.*]], float [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-LABEL: define dso_local i64 @_Z23empty_char_float_struct18empty_char_float_s
+// CHECK-SAME: (i64 [[S_COERCE:%.*]]) #[[ATTR0:[0-9]+]] {
 struct empty_char_float_s empty_char_float_struct(struct empty_char_float_s s) {
   return s;
 }
@@ -51,8 +50,8 @@
   struct empty_s e;
   float f32;
 };
-// CHECK-LABEL: define dso_local float @_Z18empty_float_struct13empty_float_s
-// CHECK-SAME: (float [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-LABEL: define dso_local { i8, float } @_Z18empty_float_struct13empty_float_s
+// CHECK-SAME: (i8 [[TMP0:%.*]], float [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
 struct empty_float_s empty_float_struct(struct empty_float_s s) {
   return s;
 }
@@ -62,8 +61,8 @@
   struct empty_s e;
 };
 
-// CHECK-LABEL: define dso_local float @_Z18float_empty_struct13float_empty_s
-// CHECK-SAME: (float [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-LABEL: define dso_local { float, i8 } @_Z18float_empty_struct13float_empty_s
+// CHECK-SAME: (float [[TMP0:%.*]], i8 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
 struct float_empty_s float_empty_struct(struct float_empty_s s) {
   return s;
 }
@@ -92,8 +91,8 @@
   struct empty_s e;
   double f64;
 };
-// CHECK-LABEL: define dso_local double @_Z19empty_double_struct14empty_double_s
-// CHECK-SAME: (double [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-LABEL: define dso_local { i8, double } @_Z19empty_double_struct14empty_double_s
+// CHECK-SAME: (i8 [[TMP0:%.*]], double [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
 struct empty_double_s empty_double_struct(struct empty_double_s s) {
   return s;
 }
@@ -102,8 +101,8 @@
   double f64;
   struct empty_s e;
 };
-// CHECK-LABEL: define dso_local double @_Z19double_empty_struct14double_empty_s
-// CHECK-SAME: (double [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-LABEL: define dso_local { double, i8 } @_Z19double_empty_struct14double_empty_s
+// CHECK-SAME: (double [[TMP0:%.*]], i8 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
 struct double_empty_s double_empty_struct(struct double_empty_s s) {
   return s;
 }
@@ -115,8 +114,8 @@
   float f32;
   char c;
 };
-// CHECK-LABEL: define dso_local { float, i8 } @_Z23empty_float_char_struct18empty_float_char_s
-// CHECK-SAME: (float [[TMP0:%.*]], i8 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-LABEL: define dso_local [2 x i64] @_Z23empty_float_char_struct18empty_float_char_s
+// CHECK-SAME: ([2 x i64] [[S_COERCE:%.*]]) #[[ATTR0:[0-9]+]] {
 struct empty_float_char_s empty_float_char_struct(struct empty_float_char_s s) {
   return s;
 }
@@ -126,8 +125,8 @@
   float f32;
   double f64;
 };
-// CHECK-LABEL: define dso_local { float, double } @_Z25empty_float_double_struct20empty_float_double_s
-// CHECK-SAME: (float [[TMP0:%.*]], double [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-LABEL: define dso_local [2 x i64] @_Z25empty_float_double_struct20empty_float_double_s
+// CHECK-SAME: ([2 x i64] [[S_COERCE:%.*]]) #[[ATTR0:[0-9]+]] {
 struct empty_float_double_s empty_float_double_struct(struct empty_float_double_s s) {
   return s;
 }
@@ -150,8 +149,8 @@
   double f64;

[PATCH] D151298: [clang][LoongArch] Fix the calling convention for empty struct in C++ mode

2023-05-24 Thread wanglei via Phabricator via cfe-commits
wangleiat added a comment.

In D151298#4367163 , @xry111 wrote:

> Blocking this as it's a deliberate decision made in D132285 
> .
>
> Is there any imperative reason we must really pass the empty struct?  The C++ 
> standard only treats struct {} as size 1 for the semantics of pointer 
> comparison.  While there is no pointers to registers, ignoring it in the 
> register calling convention will make no harm.
>
> And AFAIK it will be an undefined behavior attempting to (mis)use the padding 
> space of/after the empty struct to pass any information.



In D151298#4367163 , @xry111 wrote:

> Blocking this as it's a deliberate decision made in D132285 
> .
>
> Is there any imperative reason we must really pass the empty struct?  The C++ 
> standard only treats struct {} as size 1 for the semantics of pointer 
> comparison.  While there is no pointers to registers, ignoring it in the 
> register calling convention will make no harm.
>
> And AFAIK it will be an undefined behavior attempting to (mis)use the padding 
> space of/after the empty struct to pass any information.

Our current modifications are closer to the description of `Itanium C++ ABI`, 
and we try to keep it consistent with the description of the calling convention 
under `reasonable premise`.


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[PATCH] D151298: [clang][LoongArch] Fix the calling convention for empty struct in C++ mode

2023-05-24 Thread wanglei via Phabricator via cfe-commits
wangleiat added a comment.

In D151298#4367225 , @xry111 wrote:

> In D151298#4367215 , @wangleiat 
> wrote:
>
>> In D151298#4367163 , @xry111 wrote:
>>
>>> Blocking this as it's a deliberate decision made in D132285 
>>> .
>>>
>>> Is there any imperative reason we must really pass the empty struct?  The 
>>> C++ standard only treats struct {} as size 1 for the semantics of pointer 
>>> comparison.  While there is no pointers to registers, ignoring it in the 
>>> register calling convention will make no harm.
>>>
>>> And AFAIK it will be an undefined behavior attempting to (mis)use the 
>>> padding space of/after the empty struct to pass any information.
>>
>> Our current modifications are closer to the description of `Itanium C++ 
>> ABI`, and we try to keep it consistent with the description of the calling 
>> convention under `reasonable premise`.
>
> Hmm, could you provide a link to the section saying this in the Itanium C++ 
> ABI?

http://itanium-cxx-abi.github.io/cxx-abi/abi.html#empty-parameters
http://itanium-cxx-abi.github.io/cxx-abi/abi.html#emptty-return-values

> I see it has some words about passing or returning an empty class, but there 
> seems no words about passing a class containing an empty class.

It's possible that my understanding is incorrect. There is indeed no place to 
see how an empty class is passed, just like there is no documentation on how to 
pass `class A { class B { char c;};};`.

> And for our own psABI, it's easier to simply reword it (making it similar to 
> the RISC-V psABI about passing args with FPRs) instead of modifying both 
> Clang and GCC (causing the code of Clang and GCC more nasty, and both 
> compilers slower, and we'll need to add a -Wpsabi warning at least in GCC 
> too).  And it already needs a reword considering empty arrays and zero-width 
> bit-fields anyway.

I'm sorry, I couldn't quite understand what you meant.


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[PATCH] D151298: [clang][LoongArch] Fix the calling convention for empty struct in C++ mode

2023-05-24 Thread wanglei via Phabricator via cfe-commits
wangleiat added a comment.

> I think the paragraph means:
>
>   class Empty {};
>   int test(Empty empty, int a);
>
> Then we should put `a` into `a1`, not `a0`.  And we are indeed doing so.

yes. with this patch, `a` will be passed with `a1` register.

> I mean now GCC and Clang have the same behavior, so it's easier to just 
> document the behavior in our psABI doc instead of making both Clang and GCC 
> rigidly following the interpretation of psABI (which is currently unclear 
> about zero-sized fields now) anyway.
>
> And the current behavior of GCC and Clang treating a class containing two 
> floating-point members and some empty fields is same as RISC-V, so it's 
> highly unlikely we are violating the C++ standard or IA64 C++ ABI (or the 
> entire RISC-V ecosystem would be violating them).  The only issue is our 
> psABI is unclear about empty fields, and the easiest way to solve the issue 
> is revising the psABI (maybe, just "borrowing" some paragraphs from RISC-V 
> psABI if there is no copyright issue).

If we want to ignore empty structures, it is not enough to only modify psABI, 
because the current implementations of gcc and clang do not ignore empty 
structures in all cases. For example:

  struct { struct{}; int i; }; // in this case, the empty struct is not ignored.
  struct { struct{}; float f; }; // ignored.


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[PATCH] D151298: [clang][LoongArch] Fix the calling convention for empty struct in C++ mode

2023-05-24 Thread wanglei via Phabricator via cfe-commits
wangleiat added a comment.

>>> If we want to ignore empty structures, it is not enough to only modify 
>>> psABI, because the current implementations of gcc and clang do not ignore 
>>> empty structures in all cases. For example:
>>>
>>>   struct { struct{}; int i; }; // in this case, the empty struct is not 
>>> ignored.
>>>   struct { struct{}; float f; }; // ignored.
>>
>> This is the same behavior as RISC-V.  While attempting to pass a struct 
>> through FPRs, the empty field is ignored.  But if passing through FPR does 
>> not work and it's passed through GPRs, the empty fields are not ignored:

Yes, but our psABI still differs from RISC-V in the description of parameter 
passing, and it would be better to have consistent behavior regardless of 
whether there are floating points or not.


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