[clang] 383057e - [Clang][AArch64] Fix -Wcovered-switch-default warning (SemaARM)

2024-09-06 Thread Spencer Abson via cfe-commits

Author: Spencer Abson
Date: 2024-09-06T14:19:13Z
New Revision: 383057e5a0b53a79926dbdbae4cfcd39bfb44645

URL: 
https://github.com/llvm/llvm-project/commit/383057e5a0b53a79926dbdbae4cfcd39bfb44645
DIFF: 
https://github.com/llvm/llvm-project/commit/383057e5a0b53a79926dbdbae4cfcd39bfb44645.diff

LOG: [Clang][AArch64] Fix -Wcovered-switch-default warning (SemaARM)

Added: 


Modified: 
clang/include/clang/Basic/TargetBuiltins.h
clang/lib/Sema/SemaARM.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/TargetBuiltins.h 
b/clang/include/clang/Basic/TargetBuiltins.h
index 124e353a5c1c47..d0f41b17c154f3 100644
--- a/clang/include/clang/Basic/TargetBuiltins.h
+++ b/clang/include/clang/Basic/TargetBuiltins.h
@@ -236,6 +236,7 @@ namespace clang {
   case Poly128:
 return 128;
   }
+  llvm_unreachable("Invalid NeonTypeFlag!");
 }
   };
 

diff  --git a/clang/lib/Sema/SemaARM.cpp b/clang/lib/Sema/SemaARM.cpp
index 770968cb2d4b46..efde354860de43 100644
--- a/clang/lib/Sema/SemaARM.cpp
+++ b/clang/lib/Sema/SemaARM.cpp
@@ -504,9 +504,6 @@ bool SemaARM::CheckImmediateArg(CallExpr *TheCall, unsigned 
CheckTy,
 SemaRef.BuiltinConstantArgMultiple(TheCall, ArgIdx, 2))
   return true;
 break;
-  default:
-llvm_unreachable("Invalid immediate range typeflag!");
-break;
   }
   return false;
 }



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[clang] a3744f0 - [clang][AArch64] Remove references to vector size in SVE immediate range checking. NFC

2025-01-02 Thread Spencer Abson via cfe-commits

Author: Spencer Abson
Date: 2025-01-02T08:55:20Z
New Revision: a3744f065a3ce38deaf650a8f92941c19980b32a

URL: 
https://github.com/llvm/llvm-project/commit/a3744f065a3ce38deaf650a8f92941c19980b32a
DIFF: 
https://github.com/llvm/llvm-project/commit/a3744f065a3ce38deaf650a8f92941c19980b32a.diff

LOG: [clang][AArch64] Remove references to vector size in SVE immediate range 
checking. NFC

Added: 


Modified: 
clang/include/clang/Basic/arm_immcheck_incl.td
clang/lib/Sema/SemaARM.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/arm_immcheck_incl.td 
b/clang/include/clang/Basic/arm_immcheck_incl.td
index 9d7f74a35aaa87..6892b8299771b7 100644
--- a/clang/include/clang/Basic/arm_immcheck_incl.td
+++ b/clang/include/clang/Basic/arm_immcheck_incl.td
@@ -2,7 +2,9 @@ class ImmCheckType {
   int Value = val;
 }
 
-// These must be kept in sync with the flags in 
include/clang/Basic/TargetBuiltins.h
+
+// For SVE, container_size refers to the width of a vector segment (128b).
+// For NEON, container_size refers to the vector width (64b or 128b).
 def ImmCheck0_31: ImmCheckType<0>;  // 0..31 (used for e.g. 
predicate patterns)
 def ImmCheck1_16: ImmCheckType<1>;  // 1..16
 def ImmCheckExtract : ImmCheckType<2>;  // 
0..(2048/sizeinbits(elt) - 1)
@@ -10,10 +12,10 @@ def ImmCheckShiftRight  : ImmCheckType<3>;  // 
1..sizeinbits(elt)
 def ImmCheckShiftRightNarrow: ImmCheckType<4>;  // 1..sizeinbits(elt)/2
 def ImmCheckShiftLeft   : ImmCheckType<5>;  // 0..(sizeinbits(elt) - 1)
 def ImmCheck0_7 : ImmCheckType<6>;  // 0..7
-def ImmCheckLaneIndex   : ImmCheckType<7>;  // 
0..(sizeinbits(vec)/(sizeinbits(elt)) - 1)
+def ImmCheckLaneIndex   : ImmCheckType<7>;  // 
0..(container_size/(sizeinbits(elt)) - 1)
 def ImmCheckCvt : ImmCheckType<8>;  // 1..sizeinbits(elt) 
(same as ShiftRight)
-def ImmCheckLaneIndexCompRotate : ImmCheckType<9>;  // 
0..(sizeinbits(vec)/(2*sizeinbits(elt)) - 1)
-def ImmCheckLaneIndexDot: ImmCheckType<10>; // 
0..(sizeinbits(vec)/(4*sizeinbits(elt)) - 1)
+def ImmCheckLaneIndexCompRotate : ImmCheckType<9>;  // 
0..(container_size/(2*sizeinbits(elt)) - 1)
+def ImmCheckLaneIndexDot: ImmCheckType<10>; // 
0..(container_size/(4*sizeinbits(elt)) - 1)
 def ImmCheckComplexRot90_270: ImmCheckType<11>; // [90,270]
 def ImmCheckComplexRotAll90 : ImmCheckType<12>; // [0, 90, 180,270]
 def ImmCheck0_13: ImmCheckType<13>; // 0..13

diff  --git a/clang/lib/Sema/SemaARM.cpp b/clang/lib/Sema/SemaARM.cpp
index 3e93b38143f3b3..411baa066f7097 100644
--- a/clang/lib/Sema/SemaARM.cpp
+++ b/clang/lib/Sema/SemaARM.cpp
@@ -372,7 +372,7 @@ enum ArmSMEState : unsigned {
 
 bool SemaARM::CheckImmediateArg(CallExpr *TheCall, unsigned CheckTy,
 unsigned ArgIdx, unsigned EltBitWidth,
-unsigned VecBitWidth) {
+unsigned ContainerBitWidth) {
   // Function that checks whether the operand (ArgIdx) is an immediate
   // that is one of a given set of values.
   auto CheckImmediateInSet = [&](std::initializer_list Set,
@@ -445,17 +445,17 @@ bool SemaARM::CheckImmediateArg(CallExpr *TheCall, 
unsigned CheckTy,
 break;
   case ImmCheckType::ImmCheckLaneIndex:
 if (SemaRef.BuiltinConstantArgRange(TheCall, ArgIdx, 0,
-(VecBitWidth / EltBitWidth) - 1))
+(ContainerBitWidth / EltBitWidth) - 1))
   return true;
 break;
   case ImmCheckType::ImmCheckLaneIndexCompRotate:
-if (SemaRef.BuiltinConstantArgRange(TheCall, ArgIdx, 0,
-(VecBitWidth / (2 * EltBitWidth)) - 1))
+if (SemaRef.BuiltinConstantArgRange(
+TheCall, ArgIdx, 0, (ContainerBitWidth / (2 * EltBitWidth)) - 1))
   return true;
 break;
   case ImmCheckType::ImmCheckLaneIndexDot:
-if (SemaRef.BuiltinConstantArgRange(TheCall, ArgIdx, 0,
-(VecBitWidth / (4 * EltBitWidth)) - 1))
+if (SemaRef.BuiltinConstantArgRange(
+TheCall, ArgIdx, 0, (ContainerBitWidth / (4 * EltBitWidth)) - 1))
   return true;
 break;
   case ImmCheckType::ImmCheckComplexRot90_270:
@@ -515,13 +515,13 @@ bool SemaARM::PerformNeonImmChecks(
   bool HasError = false;
 
   for (const auto &I : ImmChecks) {
-auto [ArgIdx, CheckTy, ElementSizeInBits, VecSizeInBits] = I;
+auto [ArgIdx, CheckTy, ElementBitWidth, VecBitWidth] = I;
 
 if (OverloadType >= 0)
-  ElementSizeInBits = NeonTypeFlags(OverloadType).getEltSizeInBits();
+  ElementBitWidth = NeonTypeFlags(OverloadType).getEltSizeInBits();
 
-HasError |= CheckImmediateArg(TheCall, CheckTy, ArgIdx, ElementSizeInBits,
-  VecSizeInBits);
+HasError |= Ch