[PATCH] D120449: [RISCV][RVV] Add strict vfcvt intrinsics that have side effects for dynamically-set rounding mode

2022-03-23 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb planned changes to this revision.
arcbbb added a comment.
Herald added a subscriber: StephenFan.

I started a discussion on how RVV clang builtins interact with FENV_ACCESS in 
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/147
I would drop this patch if those builtins are going to be independent of FENV.


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[PATCH] D103603: [Sema][RISCV] Allow ?: to select Typedef BuiltinType in C

2021-06-03 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb created this revision.
arcbbb added reviewers: rsandifo-arm, efriedma, sdesmalen, rovka, rjmccall, 
rengolin, HsiangKai, craig.topper.
Herald added subscribers: vkmr, frasercrmck, evandro, luismarques, apazos, 
sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, 
brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, 
kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb.
arcbbb requested review of this revision.
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This patch solves an error such as:

  incompatible operand types ('vbool4_t' (aka '__rvv_bool4_t') and 
'__rvv_bool4_t')

when one of the value is a TypedefType of the other value in ?:.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D103603

Files:
  clang/lib/Sema/SemaExpr.cpp
  clang/test/Sema/riscv-types.c


Index: clang/test/Sema/riscv-types.c
===
--- clang/test/Sema/riscv-types.c
+++ clang/test/Sema/riscv-types.c
@@ -134,3 +134,12 @@
   // CHECK: __rvv_int8mf2_t x43;
   __rvv_int8mf2_t x43;
 }
+
+typedef __rvv_bool4_t vbool4_t;
+__rvv_bool4_t get_rvv_bool4();
+vbool4_t get_vbool4_t();
+
+void func1(int sel) {
+  // CHECK: vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+  vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -8393,8 +8393,10 @@
 
   // Allow ?: operations in which both operands have the same
   // built-in sizeless type.
-  if (LHSTy->isSizelessBuiltinType() && LHSTy == RHSTy)
+  if (LHSTy->isSizelessBuiltinType() &&
+  (Context.getCanonicalType(LHSTy) == Context.getCanonicalType(RHSTy))) {
 return LHSTy;
+  }
 
   // Emit a better diagnostic if one of the expressions is a null pointer
   // constant and the other is not a pointer type. In this case, the user most


Index: clang/test/Sema/riscv-types.c
===
--- clang/test/Sema/riscv-types.c
+++ clang/test/Sema/riscv-types.c
@@ -134,3 +134,12 @@
   // CHECK: __rvv_int8mf2_t x43;
   __rvv_int8mf2_t x43;
 }
+
+typedef __rvv_bool4_t vbool4_t;
+__rvv_bool4_t get_rvv_bool4();
+vbool4_t get_vbool4_t();
+
+void func1(int sel) {
+  // CHECK: vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+  vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -8393,8 +8393,10 @@
 
   // Allow ?: operations in which both operands have the same
   // built-in sizeless type.
-  if (LHSTy->isSizelessBuiltinType() && LHSTy == RHSTy)
+  if (LHSTy->isSizelessBuiltinType() &&
+  (Context.getCanonicalType(LHSTy) == Context.getCanonicalType(RHSTy))) {
 return LHSTy;
+  }
 
   // Emit a better diagnostic if one of the expressions is a null pointer
   // constant and the other is not a pointer type. In this case, the user most
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[PATCH] D103603: [Sema][RISCV][SVE] Allow ?: to select Typedef BuiltinType in C

2021-06-03 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb updated this revision to Diff 349600.
arcbbb marked an inline comment as done.
arcbbb retitled this revision from "[Sema][RISCV] Allow ?: to select Typedef 
BuiltinType in C" to "[Sema][RISCV][SVE] Allow ?: to select Typedef BuiltinType 
in C".
arcbbb added a reviewer: frasercrmck.
arcbbb added a comment.
Herald added a subscriber: tschuett.

Add a case in AArch64 test and address review comments.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103603/new/

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Files:
  clang/lib/Sema/SemaExpr.cpp
  clang/test/Sema/riscv-types.c
  clang/test/Sema/sizeless-1.c


Index: clang/test/Sema/sizeless-1.c
===
--- clang/test/Sema/sizeless-1.c
+++ clang/test/Sema/sizeless-1.c
@@ -57,6 +57,7 @@
   static svint8_t static_int8; // expected-error {{non-local variable with 
sizeless type 'svint8_t'}}
 
   svint8_t local_int8;
+  int8_typedef typedef_int8;
   svint16_t local_int16;
 
   svint8_t __attribute__((aligned)) aligned_int8_1;// expected-error 
{{'aligned' attribute cannot be applied to sizeless type 'svint8_t'}}
@@ -137,6 +138,7 @@
   const_volatile_int8 = local_int8; // expected-error {{cannot assign to 
variable 'const_volatile_int8' with const-qualified type 'const volatile 
svint8_t'}}
 
   init_int8 = sel ? init_int8 : local_int8;
+  init_int8 = sel ? init_int8 : typedef_int8;
   init_int8 = sel ? init_int8 : const_int8;
   init_int8 = sel ? volatile_int8 : const_int8;
   init_int8 = sel ? volatile_int8 : const_volatile_int8;
Index: clang/test/Sema/riscv-types.c
===
--- clang/test/Sema/riscv-types.c
+++ clang/test/Sema/riscv-types.c
@@ -134,3 +134,12 @@
   // CHECK: __rvv_int8mf2_t x43;
   __rvv_int8mf2_t x43;
 }
+
+typedef __rvv_bool4_t vbool4_t;
+__rvv_bool4_t get_rvv_bool4();
+vbool4_t get_vbool4_t();
+
+void func1(int sel) {
+  // CHECK: vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+  vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -8393,7 +8393,7 @@
 
   // Allow ?: operations in which both operands have the same
   // built-in sizeless type.
-  if (LHSTy->isSizelessBuiltinType() && LHSTy == RHSTy)
+  if (LHSTy->isSizelessBuiltinType() && Context.hasSameType(LHSTy, RHSTy))
 return LHSTy;
 
   // Emit a better diagnostic if one of the expressions is a null pointer


Index: clang/test/Sema/sizeless-1.c
===
--- clang/test/Sema/sizeless-1.c
+++ clang/test/Sema/sizeless-1.c
@@ -57,6 +57,7 @@
   static svint8_t static_int8; // expected-error {{non-local variable with sizeless type 'svint8_t'}}
 
   svint8_t local_int8;
+  int8_typedef typedef_int8;
   svint16_t local_int16;
 
   svint8_t __attribute__((aligned)) aligned_int8_1;// expected-error {{'aligned' attribute cannot be applied to sizeless type 'svint8_t'}}
@@ -137,6 +138,7 @@
   const_volatile_int8 = local_int8; // expected-error {{cannot assign to variable 'const_volatile_int8' with const-qualified type 'const volatile svint8_t'}}
 
   init_int8 = sel ? init_int8 : local_int8;
+  init_int8 = sel ? init_int8 : typedef_int8;
   init_int8 = sel ? init_int8 : const_int8;
   init_int8 = sel ? volatile_int8 : const_int8;
   init_int8 = sel ? volatile_int8 : const_volatile_int8;
Index: clang/test/Sema/riscv-types.c
===
--- clang/test/Sema/riscv-types.c
+++ clang/test/Sema/riscv-types.c
@@ -134,3 +134,12 @@
   // CHECK: __rvv_int8mf2_t x43;
   __rvv_int8mf2_t x43;
 }
+
+typedef __rvv_bool4_t vbool4_t;
+__rvv_bool4_t get_rvv_bool4();
+vbool4_t get_vbool4_t();
+
+void func1(int sel) {
+  // CHECK: vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+  vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -8393,7 +8393,7 @@
 
   // Allow ?: operations in which both operands have the same
   // built-in sizeless type.
-  if (LHSTy->isSizelessBuiltinType() && LHSTy == RHSTy)
+  if (LHSTy->isSizelessBuiltinType() && Context.hasSameType(LHSTy, RHSTy))
 return LHSTy;
 
   // Emit a better diagnostic if one of the expressions is a null pointer
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[PATCH] D103603: [Sema][RISCV][SVE] Allow ?: to select Typedef BuiltinType in C

2021-06-04 Thread ShihPo Hung via Phabricator via cfe-commits 
This revision was not accepted when it landed; it landed in state "Needs 
Review".
This revision was automatically updated to reflect the committed changes.
Closed by commit rGfcf8827a98be: [Sema][RISCV][SVE] Allow ?: to select Typedef 
BuiltinType in C (authored by arcbbb).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103603/new/

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Files:
  clang/lib/Sema/SemaExpr.cpp
  clang/test/Sema/riscv-types.c
  clang/test/Sema/sizeless-1.c


Index: clang/test/Sema/sizeless-1.c
===
--- clang/test/Sema/sizeless-1.c
+++ clang/test/Sema/sizeless-1.c
@@ -57,6 +57,7 @@
   static svint8_t static_int8; // expected-error {{non-local variable with 
sizeless type 'svint8_t'}}
 
   svint8_t local_int8;
+  int8_typedef typedef_int8;
   svint16_t local_int16;
 
   svint8_t __attribute__((aligned)) aligned_int8_1;// expected-error 
{{'aligned' attribute cannot be applied to sizeless type 'svint8_t'}}
@@ -137,6 +138,7 @@
   const_volatile_int8 = local_int8; // expected-error {{cannot assign to 
variable 'const_volatile_int8' with const-qualified type 'const volatile 
svint8_t'}}
 
   init_int8 = sel ? init_int8 : local_int8;
+  init_int8 = sel ? init_int8 : typedef_int8;
   init_int8 = sel ? init_int8 : const_int8;
   init_int8 = sel ? volatile_int8 : const_int8;
   init_int8 = sel ? volatile_int8 : const_volatile_int8;
Index: clang/test/Sema/riscv-types.c
===
--- clang/test/Sema/riscv-types.c
+++ clang/test/Sema/riscv-types.c
@@ -134,3 +134,12 @@
   // CHECK: __rvv_int8mf2_t x43;
   __rvv_int8mf2_t x43;
 }
+
+typedef __rvv_bool4_t vbool4_t;
+__rvv_bool4_t get_rvv_bool4();
+vbool4_t get_vbool4_t();
+
+void func1(int sel) {
+  // CHECK: vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+  vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -8393,7 +8393,7 @@
 
   // Allow ?: operations in which both operands have the same
   // built-in sizeless type.
-  if (LHSTy->isSizelessBuiltinType() && LHSTy == RHSTy)
+  if (LHSTy->isSizelessBuiltinType() && Context.hasSameType(LHSTy, RHSTy))
 return LHSTy;
 
   // Emit a better diagnostic if one of the expressions is a null pointer


Index: clang/test/Sema/sizeless-1.c
===
--- clang/test/Sema/sizeless-1.c
+++ clang/test/Sema/sizeless-1.c
@@ -57,6 +57,7 @@
   static svint8_t static_int8; // expected-error {{non-local variable with sizeless type 'svint8_t'}}
 
   svint8_t local_int8;
+  int8_typedef typedef_int8;
   svint16_t local_int16;
 
   svint8_t __attribute__((aligned)) aligned_int8_1;// expected-error {{'aligned' attribute cannot be applied to sizeless type 'svint8_t'}}
@@ -137,6 +138,7 @@
   const_volatile_int8 = local_int8; // expected-error {{cannot assign to variable 'const_volatile_int8' with const-qualified type 'const volatile svint8_t'}}
 
   init_int8 = sel ? init_int8 : local_int8;
+  init_int8 = sel ? init_int8 : typedef_int8;
   init_int8 = sel ? init_int8 : const_int8;
   init_int8 = sel ? volatile_int8 : const_int8;
   init_int8 = sel ? volatile_int8 : const_volatile_int8;
Index: clang/test/Sema/riscv-types.c
===
--- clang/test/Sema/riscv-types.c
+++ clang/test/Sema/riscv-types.c
@@ -134,3 +134,12 @@
   // CHECK: __rvv_int8mf2_t x43;
   __rvv_int8mf2_t x43;
 }
+
+typedef __rvv_bool4_t vbool4_t;
+__rvv_bool4_t get_rvv_bool4();
+vbool4_t get_vbool4_t();
+
+void func1(int sel) {
+  // CHECK: vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+  vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
+}
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -8393,7 +8393,7 @@
 
   // Allow ?: operations in which both operands have the same
   // built-in sizeless type.
-  if (LHSTy->isSizelessBuiltinType() && LHSTy == RHSTy)
+  if (LHSTy->isSizelessBuiltinType() && Context.hasSameType(LHSTy, RHSTy))
 return LHSTy;
 
   // Emit a better diagnostic if one of the expressions is a null pointer
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[PATCH] D105396: [RISCV] Remove Zvamo extension for v1.0-rc change

2021-07-03 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb created this revision.
arcbbb added reviewers: rogfer01, frasercrmck, jrtc27, craig.topper, evandro, 
HsiangKai, khchen, kito-cheng.
Herald added subscribers: vkmr, dexonsmith, jdoerfert, luismarques, apazos, 
sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, jfb, the_o, 
brucehoult, MartinMosbeck, edward-jones, zzheng, shiva0217, niosHD, sabuasal, 
simoncook, johnrusso, rbar, asb, hiraditya.
arcbbb requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, MaskRay.
Herald added projects: clang, LLVM.

As V extension v1.0-rc1 says Zvamo will be added as a separate vector extension
but with a new encoding, we remove this support to reflect it for now.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105396

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/Basic/Targets/RISCV.h
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoxor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoxor.c
  clang/test/Driver/riscv-arch.c
  clang/test/Preprocessor/riscv-target-features.c
  clang/utils/TableGen/RISCVVEmitter.cpp
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVSchedRocket.td
  llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/attributes.ll
  llvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll
  llvm/test/MC/RISCV/attribute-arch.s
  llvm/test/MC/RISCV/rvv/zvamo.s

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[PATCH] D105396: [RISCV] Remove Zvamo implication for v1.0-rc change

2021-07-03 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb updated this revision to Diff 356353.
arcbbb retitled this revision from "[RISCV] Remove Zvamo extension for v1.0-rc 
change" to "[RISCV] Remove Zvamo implication for v1.0-rc change".
arcbbb edited the summary of this revision.
arcbbb added a comment.

keep Zvamo0p10 and remove the implication only.


Repository:
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CHANGES SINCE LAST ACTION
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Files:
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Preprocessor/riscv-target-features.c


Index: clang/test/Preprocessor/riscv-target-features.c
===
--- clang/test/Preprocessor/riscv-target-features.c
+++ clang/test/Preprocessor/riscv-target-features.c
@@ -225,12 +225,6 @@
 // RUN: -march=rv64iv0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
 // RUN: -march=rv32izvlsseg0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
@@ -238,9 +232,19 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // CHECK-V-EXT: __riscv_v 1
 // CHECK-V-EXT: __riscv_vector 1
-// CHECK-V-EXT: __riscv_zvamo 1
 // CHECK-V-EXT: __riscv_zvlsseg 1
 
+// RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-VAMO-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-VAMO-EXT %s
+// CHECK-VAMO-EXT: __riscv_v 1
+// CHECK-VAMO-EXT: __riscv_vector 1
+// CHECK-VAMO-EXT: __riscv_zvamo 1
+// CHECK-VAMO-EXT: __riscv_zvlsseg 1
+
 // RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
 // RUN: -march=rv32izfh0p1 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZFH-EXT %s
Index: clang/lib/Driver/ToolChains/Arch/RISCV.cpp
===
--- clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+++ clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -258,10 +258,13 @@
 << MArch << Error << Ext;
   return;
 }
-if (Ext == "zvamo" || Ext == "zvlsseg") {
+if (Ext == "zvlsseg") {
+  Features.push_back("+experimental-v");
+  Features.push_back("+experimental-zvlsseg");
+} else if (Ext == "zvamo") {
   Features.push_back("+experimental-v");
-  Features.push_back("+experimental-zvamo");
   Features.push_back("+experimental-zvlsseg");
+  Features.push_back("+experimental-zvamo");
 } else if (isExperimentalExtension(Ext))
   Features.push_back(Args.MakeArgString("+experimental-" + Ext));
 else
@@ -429,7 +432,6 @@
   break;
 case 'v':
   Features.push_back("+experimental-v");
-  Features.push_back("+experimental-zvamo");
   Features.push_back("+experimental-zvlsseg");
   break;
 }


Index: clang/test/Preprocessor/riscv-target-features.c
===
--- clang/test/Preprocessor/riscv-target-features.c
+++ clang/test/Preprocessor/riscv-target-features.c
@@ -225,12 +225,6 @@
 // RUN: -march=rv64iv0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
 // RUN: -march=rv32izvlsseg0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
@@ -238,9 +232,19 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // CHECK-V-EXT: __riscv_v 1
 // CHECK-V-EXT: __riscv_vector 1
-// CHECK-V-EXT: __riscv_zvamo 1
 // CHECK-V-EXT: __riscv_zvlsseg 1
 
+// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-VAMO-EXT %s
+// RUN: %clang -target r

[PATCH] D105396: [RISCV] Remove Zvamo implication for v1.0-rc change

2021-07-03 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb updated this revision to Diff 356369.
arcbbb added a comment.

Fix FileCheck prefix: ZVAMO


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105396/new/

https://reviews.llvm.org/D105396

Files:
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Preprocessor/riscv-target-features.c


Index: clang/test/Preprocessor/riscv-target-features.c
===
--- clang/test/Preprocessor/riscv-target-features.c
+++ clang/test/Preprocessor/riscv-target-features.c
@@ -225,12 +225,6 @@
 // RUN: -march=rv64iv0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
 // RUN: -march=rv32izvlsseg0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
@@ -238,9 +232,19 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // CHECK-V-EXT: __riscv_v 1
 // CHECK-V-EXT: __riscv_vector 1
-// CHECK-V-EXT: __riscv_zvamo 1
 // CHECK-V-EXT: __riscv_zvlsseg 1
 
+// RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZVAMO-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZVAMO-EXT %s
+// CHECK-ZVAMO-EXT: __riscv_v 1
+// CHECK-ZVAMO-EXT: __riscv_vector 1
+// CHECK-ZVAMO-EXT: __riscv_zvamo 1
+// CHECK-ZVAMO-EXT: __riscv_zvlsseg 1
+
 // RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
 // RUN: -march=rv32izfh0p1 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZFH-EXT %s
Index: clang/lib/Driver/ToolChains/Arch/RISCV.cpp
===
--- clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+++ clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -258,10 +258,13 @@
 << MArch << Error << Ext;
   return;
 }
-if (Ext == "zvamo" || Ext == "zvlsseg") {
+if (Ext == "zvlsseg") {
+  Features.push_back("+experimental-v");
+  Features.push_back("+experimental-zvlsseg");
+} else if (Ext == "zvamo") {
   Features.push_back("+experimental-v");
-  Features.push_back("+experimental-zvamo");
   Features.push_back("+experimental-zvlsseg");
+  Features.push_back("+experimental-zvamo");
 } else if (isExperimentalExtension(Ext))
   Features.push_back(Args.MakeArgString("+experimental-" + Ext));
 else
@@ -429,7 +432,6 @@
   break;
 case 'v':
   Features.push_back("+experimental-v");
-  Features.push_back("+experimental-zvamo");
   Features.push_back("+experimental-zvlsseg");
   break;
 }


Index: clang/test/Preprocessor/riscv-target-features.c
===
--- clang/test/Preprocessor/riscv-target-features.c
+++ clang/test/Preprocessor/riscv-target-features.c
@@ -225,12 +225,6 @@
 // RUN: -march=rv64iv0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
 // RUN: -march=rv32izvlsseg0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
@@ -238,9 +232,19 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // CHECK-V-EXT: __riscv_v 1
 // CHECK-V-EXT: __riscv_vector 1
-// CHECK-V-EXT: __riscv_zvamo 1
 // CHECK-V-EXT: __riscv_zvlsseg 1
 
+// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZVAMO-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZVAMO-EXT %s
+// CHECK-ZVAMO-EXT: __riscv_v 1000

[PATCH] D105396: [RISCV] Remove Zvamo implication for v1.0-rc change

2021-07-06 Thread ShihPo Hung via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf1cbea3e5275: [RISCV] Remove Zvamo implication for v1.0-rc 
change (authored by arcbbb).

Repository:
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CHANGES SINCE LAST ACTION
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Files:
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Preprocessor/riscv-target-features.c


Index: clang/test/Preprocessor/riscv-target-features.c
===
--- clang/test/Preprocessor/riscv-target-features.c
+++ clang/test/Preprocessor/riscv-target-features.c
@@ -225,12 +225,6 @@
 // RUN: -march=rv64iv0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
 // RUN: -march=rv32izvlsseg0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
@@ -238,9 +232,19 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // CHECK-V-EXT: __riscv_v 1
 // CHECK-V-EXT: __riscv_vector 1
-// CHECK-V-EXT: __riscv_zvamo 1
 // CHECK-V-EXT: __riscv_zvlsseg 1
 
+// RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZVAMO-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu 
-menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZVAMO-EXT %s
+// CHECK-ZVAMO-EXT: __riscv_v 1
+// CHECK-ZVAMO-EXT: __riscv_vector 1
+// CHECK-ZVAMO-EXT: __riscv_zvamo 1
+// CHECK-ZVAMO-EXT: __riscv_zvlsseg 1
+
 // RUN: %clang -target riscv32-unknown-linux-gnu 
-menable-experimental-extensions \
 // RUN: -march=rv32izfh0p1 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZFH-EXT %s
Index: clang/lib/Driver/ToolChains/Arch/RISCV.cpp
===
--- clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+++ clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -258,10 +258,13 @@
 << MArch << Error << Ext;
   return;
 }
-if (Ext == "zvamo" || Ext == "zvlsseg") {
+if (Ext == "zvlsseg") {
+  Features.push_back("+experimental-v");
+  Features.push_back("+experimental-zvlsseg");
+} else if (Ext == "zvamo") {
   Features.push_back("+experimental-v");
-  Features.push_back("+experimental-zvamo");
   Features.push_back("+experimental-zvlsseg");
+  Features.push_back("+experimental-zvamo");
 } else if (isExperimentalExtension(Ext))
   Features.push_back(Args.MakeArgString("+experimental-" + Ext));
 else
@@ -429,7 +432,6 @@
   break;
 case 'v':
   Features.push_back("+experimental-v");
-  Features.push_back("+experimental-zvamo");
   Features.push_back("+experimental-zvlsseg");
   break;
 }


Index: clang/test/Preprocessor/riscv-target-features.c
===
--- clang/test/Preprocessor/riscv-target-features.c
+++ clang/test/Preprocessor/riscv-target-features.c
@@ -225,12 +225,6 @@
 // RUN: -march=rv64iv0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
-// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
-// RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
-// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
 // RUN: -march=rv32izvlsseg0p10 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
@@ -238,9 +232,19 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-V-EXT %s
 // CHECK-V-EXT: __riscv_v 1
 // CHECK-V-EXT: __riscv_vector 1
-// CHECK-V-EXT: __riscv_zvamo 1
 // CHECK-V-EXT: __riscv_zvlsseg 1
 
+// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZVAMO-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: -march=rv32izvamo0p10 -x c -E -dM %s \
+// RUN: -o

[PATCH] D120449: [RISCV][RVV] Add strict vfcvt intrinsics that have side effects for dynamically-set rounding mode

2022-02-23 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb created this revision.
arcbbb added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, 
monkchiang, eopXD, khchen.
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, 
vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, 
psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, 
jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
arcbbb requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, pcwang-thead, MaskRay.
Herald added projects: clang, LLVM.

This patch adds a set of vector vfcvt intrinsics that have side effects:

  strict.vfcvt.xu.f,  strict.vfcvt.x.f,  strict.vfcvt.f.xu, strict.vfcvt.f.xu,
  strict.vfwcvt.xu.f,  strict.vfwcvt.x.f,  strict.vfwcvt.f.xu, 
strict.vfwcvt.f.xu, strict.vfwcvt.f.f
  strict.vfncvt.xu.f,  strict.vfncvt.x.f,  strict.vfncvt.f.xu, 
strict.vfncvt.f.xu,.strict.vfncvt.f.f

Clang can emit these based on getIsFPConstrained().

And the rest strict vector fp intrinsics will come in later patches:

  vfsqrt, vfrsqrt7, vfrec7, vfadd, vfsub, vfmul, vfdiv,
  vfredosum, vfredusum, vfmacc, vfmadd, vfmsac, vfmsub


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120449

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfcvt.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfncvt.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vfwcvt.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vfcvt.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vfncvt.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vfwcvt.c
  clang/utils/TableGen/RISCVVEmitter.cpp
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/strict-vfcvt-f-x.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfcvt-f-xu.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfcvt-x-f.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfcvt-xu-f.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfncvt-f-f.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfncvt-f-x.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfncvt-f-xu.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfncvt-x-f.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfncvt-xu-f.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfwcvt-f-f.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfwcvt-f-x.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfwcvt-f-xu.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfwcvt-x-f.ll
  llvm/test/CodeGen/RISCV/rvv/strict-vfwcvt-xu-f.ll

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[PATCH] D120449: [RISCV][RVV] Add strict vfcvt intrinsics that have side effects for dynamically-set rounding mode

2022-03-03 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb added inline comments.



Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4683
+Ops.push_back(VL);
+Ops.push_back(DAG.getUNDEF(XLenVT)); // Policy
+  }

kito-cheng wrote:
> Is this operand for tail policy? if so why this is `UNDEF`? I guess this 
> should be `TAIL_AGNOSTIC` rather than `UNDEF`?
Because unmasked pseudos doesn't have a policy operand,
TA/TU is distinguished by checking if passthru is undef. I think it is proper 
to leave undef here.


Repository:
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[PATCH] D115709: [RISCV] Remove Zvamo Extention

2021-12-19 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb accepted this revision.
arcbbb added a comment.
This revision is now accepted and ready to land.

LGTM too. Thanks.


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[PATCH] D100448: [RISCV][Clang] Add RVV AMO builtins

2021-04-13 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb created this revision.
arcbbb added reviewers: craig.topper, rogfer01, khchen, HsiangKai, evandro, 
liaolucy, jrtc27.
Herald added subscribers: vkmr, frasercrmck, dexonsmith, luismarques, apazos, 
sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, 
brucehoult, MartinMosbeck, edward-jones, zzheng, shiva0217, kito-cheng, niosHD, 
sabuasal, simoncook, johnrusso, rbar, asb.
arcbbb requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay.
Herald added a project: clang.

Add vamo[swap/add/xor/and/or/min/max/minu/maxu] builtins.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100448

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoxor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoxor.c
  clang/utils/TableGen/RISCVVEmitter.cpp

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[PATCH] D100615: [RISCV][Driver] Make the ordering of CmdArgs consistent between RISCV::Linker and baremetal::Linker

2021-04-15 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb created this revision.
arcbbb added reviewers: asb, craig.topper, frasercrmck, rogfer01, jrtc27, 
mgrang.
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In baremetal::Linker::ConstructJob, LinkerInput is handled prior to T_Group 
options,
but on the other side in RISCV::Linker::ConstructJob, it is opposite.

  

We want it to be consistent whether users are using RISCV::Linker or 
baremetal::Linker.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100615

Files:
  clang/lib/Driver/ToolChains/RISCVToolchain.cpp
  clang/test/Driver/riscv-args.c


Index: clang/test/Driver/riscv-args.c
===
--- /dev/null
+++ clang/test/Driver/riscv-args.c
@@ -0,0 +1,5 @@
+// Make sure --defsym takes precedence over T_Group options
+// RUN: %clang -### -target riscv32 \
+// RUN:   --gcc-toolchain= -Xlinker --defsym=ABC=10 -T a.lds %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK-LD %s
+// CHECK-LD: {{.*}} "--defsym=ABC=10" {{.*}} "-T" "a.lds"
Index: clang/lib/Driver/ToolChains/RISCVToolchain.cpp
===
--- clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -181,14 +181,14 @@
 CmdArgs.push_back(Args.MakeArgString(ToolChain.GetFilePath(crtbegin)));
   }
 
+  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
+
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   ToolChain.AddFilePathLibArgs(Args, CmdArgs);
   Args.AddAllArgs(CmdArgs,
   {options::OPT_T_Group, options::OPT_e, options::OPT_s,
options::OPT_t, options::OPT_Z_Flag, options::OPT_r});
 
-  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
-
   // TODO: add C++ includes and libs if compiling C++.
 
   if (!Args.hasArg(options::OPT_nostdlib) &&


Index: clang/test/Driver/riscv-args.c
===
--- /dev/null
+++ clang/test/Driver/riscv-args.c
@@ -0,0 +1,5 @@
+// Make sure --defsym takes precedence over T_Group options
+// RUN: %clang -### -target riscv32 \
+// RUN:   --gcc-toolchain= -Xlinker --defsym=ABC=10 -T a.lds %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK-LD %s
+// CHECK-LD: {{.*}} "--defsym=ABC=10" {{.*}} "-T" "a.lds"
Index: clang/lib/Driver/ToolChains/RISCVToolchain.cpp
===
--- clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -181,14 +181,14 @@
 CmdArgs.push_back(Args.MakeArgString(ToolChain.GetFilePath(crtbegin)));
   }
 
+  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
+
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   ToolChain.AddFilePathLibArgs(Args, CmdArgs);
   Args.AddAllArgs(CmdArgs,
   {options::OPT_T_Group, options::OPT_e, options::OPT_s,
options::OPT_t, options::OPT_Z_Flag, options::OPT_r});
 
-  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
-
   // TODO: add C++ includes and libs if compiling C++.
 
   if (!Args.hasArg(options::OPT_nostdlib) &&
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[PATCH] D100615: [RISCV][Driver] Make the ordering of CmdArgs consistent between RISCV::Linker and baremetal::Linker

2021-04-16 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb updated this revision to Diff 338004.
arcbbb added a comment.

Addressed @MaskRay 's comment


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100615/new/

https://reviews.llvm.org/D100615

Files:
  clang/lib/Driver/ToolChains/RISCVToolchain.cpp
  clang/test/Driver/riscv-args.c


Index: clang/test/Driver/riscv-args.c
===
--- /dev/null
+++ clang/test/Driver/riscv-args.c
@@ -0,0 +1,7 @@
+// Check the arguments are correctly passed
+
+// Make sure -T is the last with gcc-toolchain option
+// RUN: %clang -### -target riscv32 \
+// RUN:   --gcc-toolchain= -Xlinker --defsym=ABC=10 -T a.lds %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK-LD %s
+// CHECK-LD: {{.*}} "--defsym=ABC=10" {{.*}} "-T" "a.lds"
Index: clang/lib/Driver/ToolChains/RISCVToolchain.cpp
===
--- clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -181,14 +181,14 @@
 CmdArgs.push_back(Args.MakeArgString(ToolChain.GetFilePath(crtbegin)));
   }
 
+  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
+
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   ToolChain.AddFilePathLibArgs(Args, CmdArgs);
   Args.AddAllArgs(CmdArgs,
   {options::OPT_T_Group, options::OPT_e, options::OPT_s,
options::OPT_t, options::OPT_Z_Flag, options::OPT_r});
 
-  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
-
   // TODO: add C++ includes and libs if compiling C++.
 
   if (!Args.hasArg(options::OPT_nostdlib) &&


Index: clang/test/Driver/riscv-args.c
===
--- /dev/null
+++ clang/test/Driver/riscv-args.c
@@ -0,0 +1,7 @@
+// Check the arguments are correctly passed
+
+// Make sure -T is the last with gcc-toolchain option
+// RUN: %clang -### -target riscv32 \
+// RUN:   --gcc-toolchain= -Xlinker --defsym=ABC=10 -T a.lds %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK-LD %s
+// CHECK-LD: {{.*}} "--defsym=ABC=10" {{.*}} "-T" "a.lds"
Index: clang/lib/Driver/ToolChains/RISCVToolchain.cpp
===
--- clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -181,14 +181,14 @@
 CmdArgs.push_back(Args.MakeArgString(ToolChain.GetFilePath(crtbegin)));
   }
 
+  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
+
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   ToolChain.AddFilePathLibArgs(Args, CmdArgs);
   Args.AddAllArgs(CmdArgs,
   {options::OPT_T_Group, options::OPT_e, options::OPT_s,
options::OPT_t, options::OPT_Z_Flag, options::OPT_r});
 
-  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
-
   // TODO: add C++ includes and libs if compiling C++.
 
   if (!Args.hasArg(options::OPT_nostdlib) &&
___
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[PATCH] D100615: [RISCV][Driver] Make the ordering of CmdArgs consistent between RISCV::Linker and baremetal::Linker

2021-04-18 Thread ShihPo Hung via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG27edaee84e3e: [RISCV][Driver] Make the ordering of CmdArgs 
consistent between RISCV::Linker… (authored by arcbbb).

Changed prior to commit:
  https://reviews.llvm.org/D100615?vs=338004&id=338410#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100615/new/

https://reviews.llvm.org/D100615

Files:
  clang/lib/Driver/ToolChains/RISCVToolchain.cpp
  clang/test/Driver/riscv-args.c


Index: clang/test/Driver/riscv-args.c
===
--- /dev/null
+++ clang/test/Driver/riscv-args.c
@@ -0,0 +1,7 @@
+// Check the arguments are correctly passed
+
+// Make sure -T is the last with gcc-toolchain option
+// RUN: %clang -### -target riscv32 \
+// RUN:   --gcc-toolchain= -Xlinker --defsym=FOO=10 -T a.lds %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK-LD %s
+// CHECK-LD: {{.*}} "--defsym=FOO=10" {{.*}} "-T" "a.lds"
Index: clang/lib/Driver/ToolChains/RISCVToolchain.cpp
===
--- clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -181,14 +181,14 @@
 CmdArgs.push_back(Args.MakeArgString(ToolChain.GetFilePath(crtbegin)));
   }
 
+  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
+
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   ToolChain.AddFilePathLibArgs(Args, CmdArgs);
   Args.AddAllArgs(CmdArgs,
   {options::OPT_T_Group, options::OPT_e, options::OPT_s,
options::OPT_t, options::OPT_Z_Flag, options::OPT_r});
 
-  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
-
   // TODO: add C++ includes and libs if compiling C++.
 
   if (!Args.hasArg(options::OPT_nostdlib) &&


Index: clang/test/Driver/riscv-args.c
===
--- /dev/null
+++ clang/test/Driver/riscv-args.c
@@ -0,0 +1,7 @@
+// Check the arguments are correctly passed
+
+// Make sure -T is the last with gcc-toolchain option
+// RUN: %clang -### -target riscv32 \
+// RUN:   --gcc-toolchain= -Xlinker --defsym=FOO=10 -T a.lds %s 2>&1 \
+// RUN:   | FileCheck -check-prefix=CHECK-LD %s
+// CHECK-LD: {{.*}} "--defsym=FOO=10" {{.*}} "-T" "a.lds"
Index: clang/lib/Driver/ToolChains/RISCVToolchain.cpp
===
--- clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -181,14 +181,14 @@
 CmdArgs.push_back(Args.MakeArgString(ToolChain.GetFilePath(crtbegin)));
   }
 
+  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
+
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   ToolChain.AddFilePathLibArgs(Args, CmdArgs);
   Args.AddAllArgs(CmdArgs,
   {options::OPT_T_Group, options::OPT_e, options::OPT_s,
options::OPT_t, options::OPT_Z_Flag, options::OPT_r});
 
-  AddLinkerInputs(ToolChain, Inputs, Args, CmdArgs, JA);
-
   // TODO: add C++ includes and libs if compiling C++.
 
   if (!Args.hasArg(options::OPT_nostdlib) &&
___
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[PATCH] D100448: [RISCV][Clang] Add RVV AMO builtins

2021-04-18 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb updated this revision to Diff 338416.
arcbbb marked 3 inline comments as done.
arcbbb added a comment.

Addressed @khchen's comment.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100448/new/

https://reviews.llvm.org/D100448

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoxor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoxor.c
  clang/utils/TableGen/RISCVVEmitter.cpp

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[PATCH] D100448: [RISCV][Clang] Add RVV AMO builtins

2021-04-18 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb updated this revision to Diff 338419.
arcbbb added a comment.

re-formatted.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100448/new/

https://reviews.llvm.org/D100448

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoxor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoxor.c
  clang/utils/TableGen/RISCVVEmitter.cpp

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[PATCH] D100448: [RISCV][Clang] Add RVV AMO builtins

2021-04-21 Thread ShihPo Hung via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG11072a0bdbc0: [RISCV][Clang] Add RVV AMO builtins (authored 
by arcbbb).

Changed prior to commit:
  https://reviews.llvm.org/D100448?vs=338419&id=339139#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100448/new/

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Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoxor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoadd.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoand.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomax.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamomin.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoor.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoswap.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vamoxor.c
  clang/utils/TableGen/RISCVVEmitter.cpp

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[PATCH] D111692: [RISCV] Remove Zvamo C intrinsics and builtins.

2021-10-13 Thread ShihPo Hung via Phabricator via cfe-commits 
arcbbb added a reviewer: jrtc27.
arcbbb added a comment.

@jrtc27 commented to keep it in https://reviews.llvm.org/D105396?id=356342

LGTM otherwise.


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