[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 


@@ -21,6 +21,10 @@ class SM newer_list> : 
SMFeatures {
 !strconcat(f, "|", newer.Features));
 }
 
+let Features = "sm_101a" in def SM_101a : SMFeatures;
+
+def SM_101 : SM<"101", [SM_101a]>;

jodelek wrote:

Added sm120 and sm120a.

Thanks for the clarification with the other part - I was completely lost there. 
I hope I got it right.

https://github.com/llvm/llvm-project/pull/127187
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[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek edited 
https://github.com/llvm/llvm-project/pull/127187
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[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek edited 
https://github.com/llvm/llvm-project/pull/127187
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[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek edited 
https://github.com/llvm/llvm-project/pull/127187
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[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 


@@ -300,6 +306,10 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
 if (GPU == OffloadArch::SM_100a)
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM100_ALL", "1");
+if (GPU == OffloadArch::SM_101a)
+  Builder.defineMacro("__CUDA_ARCH_FEAT_SM101_ALL", "1");
+if (GPU == OffloadArch::SM_120a)
+  Builder.defineMacro("__CUDA_ARCH_FEAT_SM120_ALL", "1");

jodelek wrote:

I think handling variable length is necessary:
```
switch(GPU) {
  case OffloadArch::SM_90a:
  case OffloadArch::SM_100a:
  case OffloadArch::SM_101a:
  case OffloadArch::SM_120a:
Builder.defineMacro("__CUDA_ARCH_FEAT_SM" + CUDAArchCode.substr(0, 
CUDAArchCode.length()-1) + "_ALL", "1");
break;
}
```

https://github.com/llvm/llvm-project/pull/127187
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[clang] [CUDA] Add support for sm101 target architecture (Tegra Blackwell) (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek updated 
https://github.com/llvm/llvm-project/pull/127187

From a55c76bac1bd70878c777b5930553fac114d2fd5 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 01:34:16 -0800
Subject: [PATCH 1/2] Add support for sm101 target architecture (Tegra
 Blackwell)

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 4 
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-invalid-cpu-note/nvptx.c | 2 ++
 6 files changed, 19 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.td 
b/clang/include/clang/Basic/BuiltinsNVPTX.td
index 327dc88cffdb4..3853e7dc8fbaf 100644
--- a/clang/include/clang/Basic/BuiltinsNVPTX.td
+++ b/clang/include/clang/Basic/BuiltinsNVPTX.td
@@ -21,6 +21,10 @@ class SM newer_list> : 
SMFeatures {
 !strconcat(f, "|", newer.Features));
 }
 
+let Features = "sm_101a" in def SM_101a : SMFeatures;
+
+def SM_101 : SM<"101", [SM_101a]>;
+
 let Features = "sm_100a" in def SM_100a : SMFeatures;
 
 def SM_100 : SM<"100", [SM_100a]>;
diff --git a/clang/include/clang/Basic/Cuda.h b/clang/include/clang/Basic/Cuda.h
index f33ba46233a7a..380f51fed22a2 100644
--- a/clang/include/clang/Basic/Cuda.h
+++ b/clang/include/clang/Basic/Cuda.h
@@ -82,6 +82,8 @@ enum class OffloadArch {
   SM_90a,
   SM_100,
   SM_100a,
+  SM_101,
+  SM_101a,
   GFX600,
   GFX601,
   GFX602,
diff --git a/clang/lib/Basic/Cuda.cpp b/clang/lib/Basic/Cuda.cpp
index 1bfec0b37c5ee..e92a12b3ce3be 100644
--- a/clang/lib/Basic/Cuda.cpp
+++ b/clang/lib/Basic/Cuda.cpp
@@ -100,6 +100,8 @@ static const OffloadArchToStringMap arch_names[] = {
 SM(90a), // Hopper
 SM(100), // Blackwell
 SM(100a),// Blackwell
+SM(101), // Blackwell
+SM(101a),// Blackwell
 GFX(600),  // gfx600
 GFX(601),  // gfx601
 GFX(602),  // gfx602
@@ -230,6 +232,8 @@ CudaVersion MinVersionForOffloadArch(OffloadArch A) {
 return CudaVersion::CUDA_120;
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
 return CudaVersion::CUDA_128;
   default:
 llvm_unreachable("invalid enum");
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp 
b/clang/lib/Basic/Targets/NVPTX.cpp
index 7d13c1f145440..3f3c1bb653b04 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -292,6 +292,9 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
 return "1000";
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
+ return "1010";
   }
   llvm_unreachable("unhandled OffloadArch");
 }();
@@ -300,6 +303,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
 if (GPU == OffloadArch::SM_100a)
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM100_ALL", "1");
+if (GPU == OffloadArch::SM_101a)
+  Builder.defineMacro("__CUDA_ARCH_FEAT_SM101_ALL", "1");
   }
 }
 
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp 
b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index c13928f61a748..2cac1eb73b438 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -2278,6 +2278,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const 
OMPRequiresDecl *D) {
   case OffloadArch::SM_90a:
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
   case OffloadArch::GFX600:
   case OffloadArch::GFX601:
   case OffloadArch::GFX602:
diff --git a/clang/test/Misc/target-invalid-cpu-note/nvptx.c 
b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
index 3afcdf8c9fe5c..ed9d4865c3ec9 100644
--- a/clang/test/Misc/target-invalid-cpu-note/nvptx.c
+++ b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
@@ -28,6 +28,8 @@
 // CHECK-SAME: {{^}}, sm_90a
 // CHECK-SAME: {{^}}, sm_100
 // CHECK-SAME: {{^}}, sm_100a
+// CHECK-SAME: {{^}}, sm_101
+// CHECK-SAME: {{^}}, sm_101a
 // CHECK-SAME: {{^}}, gfx600
 // CHECK-SAME: {{^}}, gfx601
 // CHECK-SAME: {{^}}, gfx602

From ebc2bad79409208753c4eeda7a684569a2e78f93 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 14:58:59 -0800
Subject: [PATCH 2/2] Add support for sm120 as well.

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 8 ++--
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 2 ++
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-invali

[clang] [CUDA] Add support for sm101 target architecture (Tegra Blackwell) (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek updated 
https://github.com/llvm/llvm-project/pull/127187

From a55c76bac1bd70878c777b5930553fac114d2fd5 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 01:34:16 -0800
Subject: [PATCH 1/2] Add support for sm101 target architecture (Tegra
 Blackwell)

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 4 
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-invalid-cpu-note/nvptx.c | 2 ++
 6 files changed, 19 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.td 
b/clang/include/clang/Basic/BuiltinsNVPTX.td
index 327dc88cffdb4..3853e7dc8fbaf 100644
--- a/clang/include/clang/Basic/BuiltinsNVPTX.td
+++ b/clang/include/clang/Basic/BuiltinsNVPTX.td
@@ -21,6 +21,10 @@ class SM newer_list> : 
SMFeatures {
 !strconcat(f, "|", newer.Features));
 }
 
+let Features = "sm_101a" in def SM_101a : SMFeatures;
+
+def SM_101 : SM<"101", [SM_101a]>;
+
 let Features = "sm_100a" in def SM_100a : SMFeatures;
 
 def SM_100 : SM<"100", [SM_100a]>;
diff --git a/clang/include/clang/Basic/Cuda.h b/clang/include/clang/Basic/Cuda.h
index f33ba46233a7a..380f51fed22a2 100644
--- a/clang/include/clang/Basic/Cuda.h
+++ b/clang/include/clang/Basic/Cuda.h
@@ -82,6 +82,8 @@ enum class OffloadArch {
   SM_90a,
   SM_100,
   SM_100a,
+  SM_101,
+  SM_101a,
   GFX600,
   GFX601,
   GFX602,
diff --git a/clang/lib/Basic/Cuda.cpp b/clang/lib/Basic/Cuda.cpp
index 1bfec0b37c5ee..e92a12b3ce3be 100644
--- a/clang/lib/Basic/Cuda.cpp
+++ b/clang/lib/Basic/Cuda.cpp
@@ -100,6 +100,8 @@ static const OffloadArchToStringMap arch_names[] = {
 SM(90a), // Hopper
 SM(100), // Blackwell
 SM(100a),// Blackwell
+SM(101), // Blackwell
+SM(101a),// Blackwell
 GFX(600),  // gfx600
 GFX(601),  // gfx601
 GFX(602),  // gfx602
@@ -230,6 +232,8 @@ CudaVersion MinVersionForOffloadArch(OffloadArch A) {
 return CudaVersion::CUDA_120;
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
 return CudaVersion::CUDA_128;
   default:
 llvm_unreachable("invalid enum");
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp 
b/clang/lib/Basic/Targets/NVPTX.cpp
index 7d13c1f145440..3f3c1bb653b04 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -292,6 +292,9 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
 return "1000";
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
+ return "1010";
   }
   llvm_unreachable("unhandled OffloadArch");
 }();
@@ -300,6 +303,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
 if (GPU == OffloadArch::SM_100a)
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM100_ALL", "1");
+if (GPU == OffloadArch::SM_101a)
+  Builder.defineMacro("__CUDA_ARCH_FEAT_SM101_ALL", "1");
   }
 }
 
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp 
b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index c13928f61a748..2cac1eb73b438 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -2278,6 +2278,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const 
OMPRequiresDecl *D) {
   case OffloadArch::SM_90a:
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
   case OffloadArch::GFX600:
   case OffloadArch::GFX601:
   case OffloadArch::GFX602:
diff --git a/clang/test/Misc/target-invalid-cpu-note/nvptx.c 
b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
index 3afcdf8c9fe5c..ed9d4865c3ec9 100644
--- a/clang/test/Misc/target-invalid-cpu-note/nvptx.c
+++ b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
@@ -28,6 +28,8 @@
 // CHECK-SAME: {{^}}, sm_90a
 // CHECK-SAME: {{^}}, sm_100
 // CHECK-SAME: {{^}}, sm_100a
+// CHECK-SAME: {{^}}, sm_101
+// CHECK-SAME: {{^}}, sm_101a
 // CHECK-SAME: {{^}}, gfx600
 // CHECK-SAME: {{^}}, gfx601
 // CHECK-SAME: {{^}}, gfx602

From af2bf2fc8bcaaa8763086504f771b0a70810f2d3 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 14:58:59 -0800
Subject: [PATCH 2/2] Add support for sm120 as well.

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 8 ++--
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-inva

[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-18 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek updated 
https://github.com/llvm/llvm-project/pull/127187

From a55c76bac1bd70878c777b5930553fac114d2fd5 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 01:34:16 -0800
Subject: [PATCH 1/4] Add support for sm101 target architecture (Tegra
 Blackwell)

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 4 
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-invalid-cpu-note/nvptx.c | 2 ++
 6 files changed, 19 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.td 
b/clang/include/clang/Basic/BuiltinsNVPTX.td
index 327dc88cffdb4..3853e7dc8fbaf 100644
--- a/clang/include/clang/Basic/BuiltinsNVPTX.td
+++ b/clang/include/clang/Basic/BuiltinsNVPTX.td
@@ -21,6 +21,10 @@ class SM newer_list> : 
SMFeatures {
 !strconcat(f, "|", newer.Features));
 }
 
+let Features = "sm_101a" in def SM_101a : SMFeatures;
+
+def SM_101 : SM<"101", [SM_101a]>;
+
 let Features = "sm_100a" in def SM_100a : SMFeatures;
 
 def SM_100 : SM<"100", [SM_100a]>;
diff --git a/clang/include/clang/Basic/Cuda.h b/clang/include/clang/Basic/Cuda.h
index f33ba46233a7a..380f51fed22a2 100644
--- a/clang/include/clang/Basic/Cuda.h
+++ b/clang/include/clang/Basic/Cuda.h
@@ -82,6 +82,8 @@ enum class OffloadArch {
   SM_90a,
   SM_100,
   SM_100a,
+  SM_101,
+  SM_101a,
   GFX600,
   GFX601,
   GFX602,
diff --git a/clang/lib/Basic/Cuda.cpp b/clang/lib/Basic/Cuda.cpp
index 1bfec0b37c5ee..e92a12b3ce3be 100644
--- a/clang/lib/Basic/Cuda.cpp
+++ b/clang/lib/Basic/Cuda.cpp
@@ -100,6 +100,8 @@ static const OffloadArchToStringMap arch_names[] = {
 SM(90a), // Hopper
 SM(100), // Blackwell
 SM(100a),// Blackwell
+SM(101), // Blackwell
+SM(101a),// Blackwell
 GFX(600),  // gfx600
 GFX(601),  // gfx601
 GFX(602),  // gfx602
@@ -230,6 +232,8 @@ CudaVersion MinVersionForOffloadArch(OffloadArch A) {
 return CudaVersion::CUDA_120;
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
 return CudaVersion::CUDA_128;
   default:
 llvm_unreachable("invalid enum");
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp 
b/clang/lib/Basic/Targets/NVPTX.cpp
index 7d13c1f145440..3f3c1bb653b04 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -292,6 +292,9 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
 return "1000";
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
+ return "1010";
   }
   llvm_unreachable("unhandled OffloadArch");
 }();
@@ -300,6 +303,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
 if (GPU == OffloadArch::SM_100a)
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM100_ALL", "1");
+if (GPU == OffloadArch::SM_101a)
+  Builder.defineMacro("__CUDA_ARCH_FEAT_SM101_ALL", "1");
   }
 }
 
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp 
b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index c13928f61a748..2cac1eb73b438 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -2278,6 +2278,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const 
OMPRequiresDecl *D) {
   case OffloadArch::SM_90a:
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
   case OffloadArch::GFX600:
   case OffloadArch::GFX601:
   case OffloadArch::GFX602:
diff --git a/clang/test/Misc/target-invalid-cpu-note/nvptx.c 
b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
index 3afcdf8c9fe5c..ed9d4865c3ec9 100644
--- a/clang/test/Misc/target-invalid-cpu-note/nvptx.c
+++ b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
@@ -28,6 +28,8 @@
 // CHECK-SAME: {{^}}, sm_90a
 // CHECK-SAME: {{^}}, sm_100
 // CHECK-SAME: {{^}}, sm_100a
+// CHECK-SAME: {{^}}, sm_101
+// CHECK-SAME: {{^}}, sm_101a
 // CHECK-SAME: {{^}}, gfx600
 // CHECK-SAME: {{^}}, gfx601
 // CHECK-SAME: {{^}}, gfx602

From af2bf2fc8bcaaa8763086504f771b0a70810f2d3 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 14:58:59 -0800
Subject: [PATCH 2/4] Add support for sm120 as well.

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 8 ++--
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-inva

[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-18 Thread Sebastian Jodłowski via cfe-commits 

jodelek wrote:

> LGTM.
> 
> Do you need help merging the patch?

This is my first one, so would appreciate the help, thanks!

https://github.com/llvm/llvm-project/pull/127187
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[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-18 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek updated 
https://github.com/llvm/llvm-project/pull/127187

From a55c76bac1bd70878c777b5930553fac114d2fd5 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 01:34:16 -0800
Subject: [PATCH 1/4] Add support for sm101 target architecture (Tegra
 Blackwell)

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 4 
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-invalid-cpu-note/nvptx.c | 2 ++
 6 files changed, 19 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.td 
b/clang/include/clang/Basic/BuiltinsNVPTX.td
index 327dc88cffdb4..3853e7dc8fbaf 100644
--- a/clang/include/clang/Basic/BuiltinsNVPTX.td
+++ b/clang/include/clang/Basic/BuiltinsNVPTX.td
@@ -21,6 +21,10 @@ class SM newer_list> : 
SMFeatures {
 !strconcat(f, "|", newer.Features));
 }
 
+let Features = "sm_101a" in def SM_101a : SMFeatures;
+
+def SM_101 : SM<"101", [SM_101a]>;
+
 let Features = "sm_100a" in def SM_100a : SMFeatures;
 
 def SM_100 : SM<"100", [SM_100a]>;
diff --git a/clang/include/clang/Basic/Cuda.h b/clang/include/clang/Basic/Cuda.h
index f33ba46233a7a..380f51fed22a2 100644
--- a/clang/include/clang/Basic/Cuda.h
+++ b/clang/include/clang/Basic/Cuda.h
@@ -82,6 +82,8 @@ enum class OffloadArch {
   SM_90a,
   SM_100,
   SM_100a,
+  SM_101,
+  SM_101a,
   GFX600,
   GFX601,
   GFX602,
diff --git a/clang/lib/Basic/Cuda.cpp b/clang/lib/Basic/Cuda.cpp
index 1bfec0b37c5ee..e92a12b3ce3be 100644
--- a/clang/lib/Basic/Cuda.cpp
+++ b/clang/lib/Basic/Cuda.cpp
@@ -100,6 +100,8 @@ static const OffloadArchToStringMap arch_names[] = {
 SM(90a), // Hopper
 SM(100), // Blackwell
 SM(100a),// Blackwell
+SM(101), // Blackwell
+SM(101a),// Blackwell
 GFX(600),  // gfx600
 GFX(601),  // gfx601
 GFX(602),  // gfx602
@@ -230,6 +232,8 @@ CudaVersion MinVersionForOffloadArch(OffloadArch A) {
 return CudaVersion::CUDA_120;
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
 return CudaVersion::CUDA_128;
   default:
 llvm_unreachable("invalid enum");
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp 
b/clang/lib/Basic/Targets/NVPTX.cpp
index 7d13c1f145440..3f3c1bb653b04 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -292,6 +292,9 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
 return "1000";
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
+ return "1010";
   }
   llvm_unreachable("unhandled OffloadArch");
 }();
@@ -300,6 +303,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
 if (GPU == OffloadArch::SM_100a)
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM100_ALL", "1");
+if (GPU == OffloadArch::SM_101a)
+  Builder.defineMacro("__CUDA_ARCH_FEAT_SM101_ALL", "1");
   }
 }
 
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp 
b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index c13928f61a748..2cac1eb73b438 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -2278,6 +2278,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const 
OMPRequiresDecl *D) {
   case OffloadArch::SM_90a:
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
   case OffloadArch::GFX600:
   case OffloadArch::GFX601:
   case OffloadArch::GFX602:
diff --git a/clang/test/Misc/target-invalid-cpu-note/nvptx.c 
b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
index 3afcdf8c9fe5c..ed9d4865c3ec9 100644
--- a/clang/test/Misc/target-invalid-cpu-note/nvptx.c
+++ b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
@@ -28,6 +28,8 @@
 // CHECK-SAME: {{^}}, sm_90a
 // CHECK-SAME: {{^}}, sm_100
 // CHECK-SAME: {{^}}, sm_100a
+// CHECK-SAME: {{^}}, sm_101
+// CHECK-SAME: {{^}}, sm_101a
 // CHECK-SAME: {{^}}, gfx600
 // CHECK-SAME: {{^}}, gfx601
 // CHECK-SAME: {{^}}, gfx602

From af2bf2fc8bcaaa8763086504f771b0a70810f2d3 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 14:58:59 -0800
Subject: [PATCH 2/4] Add support for sm120 as well.

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 8 ++--
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-inva

[clang] [CUDA] Add support for sm101 and sm120 target architectures (PR #127187)

2025-02-17 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek updated 
https://github.com/llvm/llvm-project/pull/127187

From a55c76bac1bd70878c777b5930553fac114d2fd5 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 01:34:16 -0800
Subject: [PATCH 1/3] Add support for sm101 target architecture (Tegra
 Blackwell)

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 4 
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-invalid-cpu-note/nvptx.c | 2 ++
 6 files changed, 19 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.td 
b/clang/include/clang/Basic/BuiltinsNVPTX.td
index 327dc88cffdb4..3853e7dc8fbaf 100644
--- a/clang/include/clang/Basic/BuiltinsNVPTX.td
+++ b/clang/include/clang/Basic/BuiltinsNVPTX.td
@@ -21,6 +21,10 @@ class SM newer_list> : 
SMFeatures {
 !strconcat(f, "|", newer.Features));
 }
 
+let Features = "sm_101a" in def SM_101a : SMFeatures;
+
+def SM_101 : SM<"101", [SM_101a]>;
+
 let Features = "sm_100a" in def SM_100a : SMFeatures;
 
 def SM_100 : SM<"100", [SM_100a]>;
diff --git a/clang/include/clang/Basic/Cuda.h b/clang/include/clang/Basic/Cuda.h
index f33ba46233a7a..380f51fed22a2 100644
--- a/clang/include/clang/Basic/Cuda.h
+++ b/clang/include/clang/Basic/Cuda.h
@@ -82,6 +82,8 @@ enum class OffloadArch {
   SM_90a,
   SM_100,
   SM_100a,
+  SM_101,
+  SM_101a,
   GFX600,
   GFX601,
   GFX602,
diff --git a/clang/lib/Basic/Cuda.cpp b/clang/lib/Basic/Cuda.cpp
index 1bfec0b37c5ee..e92a12b3ce3be 100644
--- a/clang/lib/Basic/Cuda.cpp
+++ b/clang/lib/Basic/Cuda.cpp
@@ -100,6 +100,8 @@ static const OffloadArchToStringMap arch_names[] = {
 SM(90a), // Hopper
 SM(100), // Blackwell
 SM(100a),// Blackwell
+SM(101), // Blackwell
+SM(101a),// Blackwell
 GFX(600),  // gfx600
 GFX(601),  // gfx601
 GFX(602),  // gfx602
@@ -230,6 +232,8 @@ CudaVersion MinVersionForOffloadArch(OffloadArch A) {
 return CudaVersion::CUDA_120;
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
 return CudaVersion::CUDA_128;
   default:
 llvm_unreachable("invalid enum");
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp 
b/clang/lib/Basic/Targets/NVPTX.cpp
index 7d13c1f145440..3f3c1bb653b04 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -292,6 +292,9 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
 return "1000";
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
+ return "1010";
   }
   llvm_unreachable("unhandled OffloadArch");
 }();
@@ -300,6 +303,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
 if (GPU == OffloadArch::SM_100a)
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM100_ALL", "1");
+if (GPU == OffloadArch::SM_101a)
+  Builder.defineMacro("__CUDA_ARCH_FEAT_SM101_ALL", "1");
   }
 }
 
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp 
b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index c13928f61a748..2cac1eb73b438 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -2278,6 +2278,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const 
OMPRequiresDecl *D) {
   case OffloadArch::SM_90a:
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
   case OffloadArch::GFX600:
   case OffloadArch::GFX601:
   case OffloadArch::GFX602:
diff --git a/clang/test/Misc/target-invalid-cpu-note/nvptx.c 
b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
index 3afcdf8c9fe5c..ed9d4865c3ec9 100644
--- a/clang/test/Misc/target-invalid-cpu-note/nvptx.c
+++ b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
@@ -28,6 +28,8 @@
 // CHECK-SAME: {{^}}, sm_90a
 // CHECK-SAME: {{^}}, sm_100
 // CHECK-SAME: {{^}}, sm_100a
+// CHECK-SAME: {{^}}, sm_101
+// CHECK-SAME: {{^}}, sm_101a
 // CHECK-SAME: {{^}}, gfx600
 // CHECK-SAME: {{^}}, gfx601
 // CHECK-SAME: {{^}}, gfx602

From af2bf2fc8bcaaa8763086504f771b0a70810f2d3 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 14:58:59 -0800
Subject: [PATCH 2/3] Add support for sm120 as well.

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 8 ++--
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-inva

[clang] [CUDA] Add support for sm101 target architecture (Tegra Blackwell) (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek created 
https://github.com/llvm/llvm-project/pull/127187

Add support for sm101 target architecture (Tegra Blackwell). It requires CUDA 
12.8.



From a55c76bac1bd70878c777b5930553fac114d2fd5 Mon Sep 17 00:00:00 2001
From: Sebastian Jodlowski 
Date: Fri, 14 Feb 2025 01:34:16 -0800
Subject: [PATCH] Add support for sm101 target architecture (Tegra Blackwell)

---
 clang/include/clang/Basic/BuiltinsNVPTX.td  | 4 
 clang/include/clang/Basic/Cuda.h| 2 ++
 clang/lib/Basic/Cuda.cpp| 4 
 clang/lib/Basic/Targets/NVPTX.cpp   | 5 +
 clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp| 2 ++
 clang/test/Misc/target-invalid-cpu-note/nvptx.c | 2 ++
 6 files changed, 19 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.td 
b/clang/include/clang/Basic/BuiltinsNVPTX.td
index 327dc88cffdb4..3853e7dc8fbaf 100644
--- a/clang/include/clang/Basic/BuiltinsNVPTX.td
+++ b/clang/include/clang/Basic/BuiltinsNVPTX.td
@@ -21,6 +21,10 @@ class SM newer_list> : 
SMFeatures {
 !strconcat(f, "|", newer.Features));
 }
 
+let Features = "sm_101a" in def SM_101a : SMFeatures;
+
+def SM_101 : SM<"101", [SM_101a]>;
+
 let Features = "sm_100a" in def SM_100a : SMFeatures;
 
 def SM_100 : SM<"100", [SM_100a]>;
diff --git a/clang/include/clang/Basic/Cuda.h b/clang/include/clang/Basic/Cuda.h
index f33ba46233a7a..380f51fed22a2 100644
--- a/clang/include/clang/Basic/Cuda.h
+++ b/clang/include/clang/Basic/Cuda.h
@@ -82,6 +82,8 @@ enum class OffloadArch {
   SM_90a,
   SM_100,
   SM_100a,
+  SM_101,
+  SM_101a,
   GFX600,
   GFX601,
   GFX602,
diff --git a/clang/lib/Basic/Cuda.cpp b/clang/lib/Basic/Cuda.cpp
index 1bfec0b37c5ee..e92a12b3ce3be 100644
--- a/clang/lib/Basic/Cuda.cpp
+++ b/clang/lib/Basic/Cuda.cpp
@@ -100,6 +100,8 @@ static const OffloadArchToStringMap arch_names[] = {
 SM(90a), // Hopper
 SM(100), // Blackwell
 SM(100a),// Blackwell
+SM(101), // Blackwell
+SM(101a),// Blackwell
 GFX(600),  // gfx600
 GFX(601),  // gfx601
 GFX(602),  // gfx602
@@ -230,6 +232,8 @@ CudaVersion MinVersionForOffloadArch(OffloadArch A) {
 return CudaVersion::CUDA_120;
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
 return CudaVersion::CUDA_128;
   default:
 llvm_unreachable("invalid enum");
diff --git a/clang/lib/Basic/Targets/NVPTX.cpp 
b/clang/lib/Basic/Targets/NVPTX.cpp
index 7d13c1f145440..3f3c1bb653b04 100644
--- a/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/clang/lib/Basic/Targets/NVPTX.cpp
@@ -292,6 +292,9 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
 return "1000";
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
+ return "1010";
   }
   llvm_unreachable("unhandled OffloadArch");
 }();
@@ -300,6 +303,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions 
&Opts,
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM90_ALL", "1");
 if (GPU == OffloadArch::SM_100a)
   Builder.defineMacro("__CUDA_ARCH_FEAT_SM100_ALL", "1");
+if (GPU == OffloadArch::SM_101a)
+  Builder.defineMacro("__CUDA_ARCH_FEAT_SM101_ALL", "1");
   }
 }
 
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp 
b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index c13928f61a748..2cac1eb73b438 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -2278,6 +2278,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(const 
OMPRequiresDecl *D) {
   case OffloadArch::SM_90a:
   case OffloadArch::SM_100:
   case OffloadArch::SM_100a:
+  case OffloadArch::SM_101:
+  case OffloadArch::SM_101a:
   case OffloadArch::GFX600:
   case OffloadArch::GFX601:
   case OffloadArch::GFX602:
diff --git a/clang/test/Misc/target-invalid-cpu-note/nvptx.c 
b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
index 3afcdf8c9fe5c..ed9d4865c3ec9 100644
--- a/clang/test/Misc/target-invalid-cpu-note/nvptx.c
+++ b/clang/test/Misc/target-invalid-cpu-note/nvptx.c
@@ -28,6 +28,8 @@
 // CHECK-SAME: {{^}}, sm_90a
 // CHECK-SAME: {{^}}, sm_100
 // CHECK-SAME: {{^}}, sm_100a
+// CHECK-SAME: {{^}}, sm_101
+// CHECK-SAME: {{^}}, sm_101a
 // CHECK-SAME: {{^}}, gfx600
 // CHECK-SAME: {{^}}, gfx601
 // CHECK-SAME: {{^}}, gfx602

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[clang] [CUDA] Add support for sm101 target architecture (Tegra Blackwell) (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 

https://github.com/jodelek ready_for_review 
https://github.com/llvm/llvm-project/pull/127187
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[clang] [CUDA] Add support for sm101 target architecture (Tegra Blackwell) (PR #127187)

2025-02-14 Thread Sebastian Jodłowski via cfe-commits 

jodelek wrote:

@Artem-B @durga4github @sergey-kozub 

https://github.com/llvm/llvm-project/pull/127187
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