[clang] 4df69c1 - [ARM] Make testcase warning pattern match more specific
Author: Ranjeet Singh Date: 2022-03-28T14:44:15+01:00 New Revision: 4df69c1ff19f75e302cfc3e022009fe971fc5c24 URL: https://github.com/llvm/llvm-project/commit/4df69c1ff19f75e302cfc3e022009fe971fc5c24 DIFF: https://github.com/llvm/llvm-project/commit/4df69c1ff19f75e302cfc3e022009fe971fc5c24.diff LOG: [ARM] Make testcase warning pattern match more specific Make the warning more specific as downstream compilers could produce other warnings. Reviewed By: tstellar Differential Revision: https://reviews.llvm.org/D122487 Added: Modified: clang/test/Driver/aarch64-security-options.c Removed: diff --git a/clang/test/Driver/aarch64-security-options.c b/clang/test/Driver/aarch64-security-options.c index 4bd73e06d255a..b4bb57e71aa79 100644 --- a/clang/test/Driver/aarch64-security-options.c +++ b/clang/test/Driver/aarch64-security-options.c @@ -52,4 +52,4 @@ // Check that the linker driver doesn't warn about -mbranch-protection=standard // as an unused option. -// LINKER-DRIVER-NOT: warning: +// LINKER-DRIVER-NOT: warning: argument unused during compilation: '-mbranch-protection=standard' ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] e4f50e5 - [ARM] Add missing target for Arm neon test case.
Author: Ranjeet Singh Date: 2020-10-01T00:32:33+01:00 New Revision: e4f50e587f077c246b7f29db0b7daddf583e2b64 URL: https://github.com/llvm/llvm-project/commit/e4f50e587f077c246b7f29db0b7daddf583e2b64 DIFF: https://github.com/llvm/llvm-project/commit/e4f50e587f077c246b7f29db0b7daddf583e2b64.diff LOG: [ARM] Add missing target for Arm neon test case. This is a follow-up from https://reviews.llvm.org/D61717. Where Richard described the issue with compiling arm_neon.h under -flax-vector-conversions=none. It looks like the example reproducer does actually work but what was missing was a test entry for that target. Differential Revision: https://reviews.llvm.org/D88546 Added: Modified: clang/test/Headers/arm-neon-header.c Removed: diff --git a/clang/test/Headers/arm-neon-header.c b/clang/test/Headers/arm-neon-header.c index f6362886010a..8f64633b44d5 100644 --- a/clang/test/Headers/arm-neon-header.c +++ b/clang/test/Headers/arm-neon-header.c @@ -22,5 +22,6 @@ // RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding --target=aarch64-none-eabi -march=armv8.2-a+fp16fml+crypto+dotprod -std=c11 -xc -flax-vector-conversions=none %s // RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding --target=aarch64_be-none-eabi -march=armv8.2-a+fp16fml+crypto+dotprod -std=c11 -xc -flax-vector-conversions=none %s +// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding --target=arm64-linux-gnu -arch +neon -std=c11 -xc -flax-vector-conversions=none %s #include ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libunwind] r299225 - [libunwind] Clean up macro usage.
Author: rsingh Date: Fri Mar 31 10:28:06 2017 New Revision: 299225 URL: http://llvm.org/viewvc/llvm-project?rev=299225&view=rev Log: [libunwind] Clean up macro usage. Convention in libunwind is to use !defined(FOOT) not !FOO. Differential Revision: https://reviews.llvm.org/D31078 Modified: libunwind/trunk/include/__libunwind_config.h libunwind/trunk/include/libunwind.h libunwind/trunk/include/unwind.h libunwind/trunk/src/AddressSpace.hpp libunwind/trunk/src/Unwind-EHABI.cpp libunwind/trunk/src/Unwind-EHABI.h libunwind/trunk/src/Unwind-sjlj.c libunwind/trunk/src/UnwindCursor.hpp libunwind/trunk/src/UnwindLevel1-gcc-ext.c libunwind/trunk/src/UnwindLevel1.c libunwind/trunk/src/Unwind_AppleExtras.cpp libunwind/trunk/src/config.h libunwind/trunk/src/libunwind.cpp libunwind/trunk/src/libunwind_ext.h Modified: libunwind/trunk/include/__libunwind_config.h URL: http://llvm.org/viewvc/llvm-project/libunwind/trunk/include/__libunwind_config.h?rev=299225&r1=299224&r2=299225&view=diff == --- libunwind/trunk/include/__libunwind_config.h (original) +++ libunwind/trunk/include/__libunwind_config.h Fri Mar 31 10:28:06 2017 @@ -12,14 +12,12 @@ #if defined(__arm__) && !defined(__USING_SJLJ_EXCEPTIONS__) && \ !defined(__ARM_DWARF_EH__) -#define _LIBUNWIND_ARM_EHABI 1 -#else -#define _LIBUNWIND_ARM_EHABI 0 +#define _LIBUNWIND_ARM_EHABI #endif #if defined(_LIBUNWIND_IS_NATIVE_ONLY) # if defined(__i386__) -# define _LIBUNWIND_TARGET_I386 1 +# define _LIBUNWIND_TARGET_I386 # define _LIBUNWIND_CONTEXT_SIZE 8 # define _LIBUNWIND_CURSOR_SIZE 19 # define _LIBUNWIND_HIGHEST_DWARF_REGISTER 9 @@ -57,7 +55,7 @@ # error "Unsupported architecture." # endif #else // !_LIBUNWIND_IS_NATIVE_ONLY -# define _LIBUNWIND_TARGET_I386 1 +# define _LIBUNWIND_TARGET_I386 # define _LIBUNWIND_TARGET_X86_64 1 # define _LIBUNWIND_TARGET_PPC 1 # define _LIBUNWIND_TARGET_AARCH64 1 Modified: libunwind/trunk/include/libunwind.h URL: http://llvm.org/viewvc/llvm-project/libunwind/trunk/include/libunwind.h?rev=299225&r1=299224&r2=299225&view=diff == --- libunwind/trunk/include/libunwind.h (original) +++ libunwind/trunk/include/libunwind.h Fri Mar 31 10:28:06 2017 @@ -72,7 +72,7 @@ typedef struct unw_cursor_t unw_cursor_t typedef struct unw_addr_space *unw_addr_space_t; typedef int unw_regnum_t; -#if _LIBUNWIND_ARM_EHABI +#if defined(_LIBUNWIND_ARM_EHABI) typedef uint32_t unw_word_t; typedef uint64_t unw_fpreg_t; #else Modified: libunwind/trunk/include/unwind.h URL: http://llvm.org/viewvc/llvm-project/libunwind/trunk/include/unwind.h?rev=299225&r1=299224&r2=299225&view=diff == --- libunwind/trunk/include/unwind.h (original) +++ libunwind/trunk/include/unwind.h Fri Mar 31 10:28:06 2017 @@ -36,7 +36,7 @@ typedef enum { _URC_HANDLER_FOUND = 6, _URC_INSTALL_CONTEXT = 7, _URC_CONTINUE_UNWIND = 8, -#if _LIBUNWIND_ARM_EHABI +#if defined(_LIBUNWIND_ARM_EHABI) _URC_FAILURE = 9 #endif } _Unwind_Reason_Code; @@ -51,7 +51,7 @@ typedef enum { typedef struct _Unwind_Context _Unwind_Context; // opaque -#if _LIBUNWIND_ARM_EHABI +#if defined(_LIBUNWIND_ARM_EHABI) typedef uint32_t _Unwind_State; static const _Unwind_State _US_VIRTUAL_UNWIND_FRAME = 0; @@ -168,7 +168,7 @@ extern void _Unwind_Resume(_Unwind_Excep #endif extern void _Unwind_DeleteException(_Unwind_Exception *exception_object); -#if _LIBUNWIND_ARM_EHABI +#if defined(_LIBUNWIND_ARM_EHABI) typedef enum { _UVRSC_CORE = 0, /* integer register */ _UVRSC_VFP = 1, /* vfp */ @@ -208,7 +208,7 @@ _Unwind_VRS_Pop(_Unwind_Context *context _Unwind_VRS_DataRepresentation representation); #endif -#if !_LIBUNWIND_ARM_EHABI +#if !defined(_LIBUNWIND_ARM_EHABI) extern uintptr_t _Unwind_GetGR(struct _Unwind_Context *context, int index); extern void _Unwind_SetGR(struct _Unwind_Context *context, int index, @@ -216,7 +216,7 @@ extern void _Unwind_SetGR(struct _Unwind extern uintptr_t _Unwind_GetIP(struct _Unwind_Context *context); extern void _Unwind_SetIP(struct _Unwind_Context *, uintptr_t new_value); -#else // _LIBUNWIND_ARM_EHABI +#else // defined(_LIBUNWIND_ARM_EHABI) #if defined(_LIBUNWIND_UNWIND_LEVEL1_EXTERNAL_LINKAGE) #define _LIBUNWIND_EXPORT_UNWIND_LEVEL1 extern @@ -255,7 +255,7 @@ void _Unwind_SetIP(struct _Unwind_Contex uintptr_t thumb_bit = _Unwind_GetGR(context, 15) & ((uintptr_t)0x1); _Unwind_SetGR(context, 15, value | thumb_bit); } -#endif // _LIBUNWIND_ARM_EHABI +#endif // defined(_LIBUNWIND_ARM_EHABI) extern uintptr_t _Unwind_GetRegionStart(struct _Unwind_Context *context); extern uintptr_t Modified: libunwind/trunk/src/AddressSpace.hpp URL: http://llvm.org/viewvc/llvm-project/libunwind/trunk/src/AddressSpace.hpp
[libcxxabi] r296136 - [libcxxabi] Disable calls to fprintf for baremetal targets.
Author: rsingh Date: Fri Feb 24 10:43:36 2017 New Revision: 296136 URL: http://llvm.org/viewvc/llvm-project?rev=296136&view=rev Log: [libcxxabi] Disable calls to fprintf for baremetal targets. We've been having issues with using libcxxabi and libunwind for baremetal targets because fprintf is dependent on io functions, this patch disables calls to fprintf when building for baremetal in release mode. Differential Revision: https://reviews.llvm.org/D30339 Modified: libcxxabi/trunk/src/abort_message.cpp Modified: libcxxabi/trunk/src/abort_message.cpp URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/src/abort_message.cpp?rev=296136&r1=296135&r2=296136&view=diff == --- libcxxabi/trunk/src/abort_message.cpp (original) +++ libcxxabi/trunk/src/abort_message.cpp Fri Feb 24 10:43:36 2017 @@ -35,6 +35,7 @@ __attribute__((visibility("hidden"), nor void abort_message(const char* format, ...) { // write message to stderr +#if !defined(NDEBUG) && !defined(LIBCXXABI_BAREMETAL) #ifdef __APPLE__ fprintf(stderr, "libc++abi.dylib: "); #endif @@ -43,6 +44,7 @@ void abort_message(const char* format, . vfprintf(stderr, format, list); va_end(list); fprintf(stderr, "\n"); +#endif #if defined(__APPLE__) && defined(HAVE_CRASHREPORTERCLIENT_H) // record message in crash report ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libunwind] r296135 - [libunwind] Disable calls to fprintf for baremetal targets.
Author: rsingh Date: Fri Feb 24 10:38:05 2017 New Revision: 296135 URL: http://llvm.org/viewvc/llvm-project?rev=296135&view=rev Log: [libunwind] Disable calls to fprintf for baremetal targets. We've been having issues with using libcxxabi and libunwind for baremetal targets because fprintf is dependent on io functions, this patch disables calls to fprintf when building for baremetal in release mode. Differential Revision: https://reviews.llvm.org/D30340 Modified: libunwind/trunk/src/config.h Modified: libunwind/trunk/src/config.h URL: http://llvm.org/viewvc/llvm-project/libunwind/trunk/src/config.h?rev=296135&r1=296134&r2=296135&view=diff == --- libunwind/trunk/src/config.h (original) +++ libunwind/trunk/src/config.h Fri Feb 24 10:38:05 2017 @@ -78,6 +78,12 @@ #define _LIBUNWIND_BUILD_ZERO_COST_APIS 0 #endif +#if defined(NDEBUG) && defined(_LIBUNWIND_IS_BAREMETAL) +#define _LIBUNWIND_ABORT(msg) \ + do { \ +abort(); \ + } while (0) +#else #define _LIBUNWIND_ABORT(msg) \ do { \ fprintf(stderr, "libunwind: %s %s:%d - %s\n", __func__, __FILE__, \ @@ -85,9 +91,14 @@ fflush(stderr); \ abort(); \ } while (0) +#endif +#if defined(NDEBUG) && defined(_LIBUNWIND_IS_BAREMETAL) +#define _LIBUNWIND_LOG(msg, ...) +#else #define _LIBUNWIND_LOG(msg, ...) \ fprintf(stderr, "libunwind: " msg "\n", __VA_ARGS__) +#endif #if defined(_LIBUNWIND_HAS_NO_THREADS) // only used with pthread calls, not needed for the single-threaded builds ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libcxxabi] r296146 - [libcxxabi] Fix condition typo in rL296136
Author: rsingh Date: Fri Feb 24 12:22:59 2017 New Revision: 296146 URL: http://llvm.org/viewvc/llvm-project?rev=296146&view=rev Log: [libcxxabi] Fix condition typo in rL296136 Made a mistake in the condition typo because LIBCXXABI_BAREMETAL is always defined, I should have been checking the contents to see if it's enabled. Differential Revision: https://reviews.llvm.org/D30343 Modified: libcxxabi/trunk/src/abort_message.cpp Modified: libcxxabi/trunk/src/abort_message.cpp URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/src/abort_message.cpp?rev=296146&r1=296145&r2=296146&view=diff == --- libcxxabi/trunk/src/abort_message.cpp (original) +++ libcxxabi/trunk/src/abort_message.cpp Fri Feb 24 12:22:59 2017 @@ -35,7 +35,7 @@ __attribute__((visibility("hidden"), nor void abort_message(const char* format, ...) { // write message to stderr -#if !defined(NDEBUG) && !defined(LIBCXXABI_BAREMETAL) +#if !defined(NDEBUG) || !LIBCXXABI_BAREMETAL #ifdef __APPLE__ fprintf(stderr, "libc++abi.dylib: "); #endif ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libcxxabi] r296612 - [libcxxabi] Clean up macro usage.
Author: rsingh Date: Wed Mar 1 05:42:01 2017 New Revision: 296612 URL: http://llvm.org/viewvc/llvm-project?rev=296612&view=rev Log: [libcxxabi] Clean up macro usage. Convention in libcxxabi is to use !defined(FOO) not !FOO. Differential Revision: https://reviews.llvm.org/D30459 Modified: libcxxabi/trunk/CMakeLists.txt libcxxabi/trunk/include/__cxxabi_config.h libcxxabi/trunk/include/cxxabi.h libcxxabi/trunk/src/abort_message.cpp libcxxabi/trunk/src/config.h libcxxabi/trunk/src/cxa_default_handlers.cpp libcxxabi/trunk/src/cxa_exception.cpp libcxxabi/trunk/src/cxa_exception.hpp libcxxabi/trunk/src/cxa_personality.cpp Modified: libcxxabi/trunk/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/CMakeLists.txt?rev=296612&r1=296611&r2=296612&view=diff == --- libcxxabi/trunk/CMakeLists.txt (original) +++ libcxxabi/trunk/CMakeLists.txt Wed Mar 1 05:42:01 2017 @@ -157,6 +157,11 @@ set(LIBCXXABI_LIBCXX_LIBRARY_PATH "" CAC option(LIBCXXABI_ENABLE_SHARED "Build libc++abi as a shared library." ON) option(LIBCXXABI_ENABLE_STATIC "Build libc++abi as a static library." ON) +option(LIBCXXABI_BAREMETAL "Build libc++abi for baremetal targets." OFF) +# The default terminate handler attempts to demangle uncaught exceptions, which +# causes extra I/O and demangling code to be pulled in. +option(LIBCXXABI_SILENT_TERMINATE "Set this to make the terminate handler default to a silent alternative" OFF) + if (NOT LIBCXXABI_ENABLE_SHARED AND NOT LIBCXXABI_ENABLE_STATIC) message(FATAL_ERROR "libc++abi must be built as either a shared or static library.") endif() @@ -432,11 +437,15 @@ endif() # Define LIBCXXABI_USE_LLVM_UNWINDER for conditional compilation. if (LIBCXXABI_USE_LLVM_UNWINDER) - add_definitions(-DLIBCXXABI_USE_LLVM_UNWINDER=1) + add_definitions(-DLIBCXXABI_USE_LLVM_UNWINDER) endif() if (LIBCXXABI_SILENT_TERMINATE) - add_definitions(-DLIBCXXABI_SILENT_TERMINATE=1) + add_definitions(-DLIBCXXABI_SILENT_TERMINATE) +endif() + +if (LIBCXXABI_BAREMETAL) +add_definitions(-DLIBCXXABI_BAREMETAL) endif() string(REPLACE ";" " " LIBCXXABI_CXX_FLAGS "${LIBCXXABI_CXX_FLAGS}") Modified: libcxxabi/trunk/include/__cxxabi_config.h URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/include/__cxxabi_config.h?rev=296612&r1=296611&r2=296612&view=diff == --- libcxxabi/trunk/include/__cxxabi_config.h (original) +++ libcxxabi/trunk/include/__cxxabi_config.h Wed Mar 1 05:42:01 2017 @@ -12,9 +12,7 @@ #if defined(__arm__) && !defined(__USING_SJLJ_EXCEPTIONS__) && \ !defined(__ARM_DWARF_EH__) -#define _LIBCXXABI_ARM_EHABI 1 -#else -#define _LIBCXXABI_ARM_EHABI 0 +#define _LIBCXXABI_ARM_EHABI #endif #if !defined(__has_attribute) Modified: libcxxabi/trunk/include/cxxabi.h URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/include/cxxabi.h?rev=296612&r1=296611&r2=296612&view=diff == --- libcxxabi/trunk/include/cxxabi.h (original) +++ libcxxabi/trunk/include/cxxabi.h Wed Mar 1 05:42:01 2017 @@ -55,7 +55,7 @@ __cxa_get_exception_ptr(void *exceptionO extern _LIBCXXABI_FUNC_VIS void * __cxa_begin_catch(void *exceptionObject) throw(); extern _LIBCXXABI_FUNC_VIS void __cxa_end_catch(); -#if _LIBCXXABI_ARM_EHABI +#if defined(_LIBCXXABI_ARM_EHABI) extern _LIBCXXABI_FUNC_VIS bool __cxa_begin_cleanup(void *exceptionObject) throw(); extern _LIBCXXABI_FUNC_VIS void __cxa_end_cleanup(); Modified: libcxxabi/trunk/src/abort_message.cpp URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/src/abort_message.cpp?rev=296612&r1=296611&r2=296612&view=diff == --- libcxxabi/trunk/src/abort_message.cpp (original) +++ libcxxabi/trunk/src/abort_message.cpp Wed Mar 1 05:42:01 2017 @@ -32,7 +32,7 @@ extern "C" void android_set_abort_messag void abort_message(const char* format, ...) { // write message to stderr -#if !defined(NDEBUG) || !LIBCXXABI_BAREMETAL +#if !defined(NDEBUG) || !defined(LIBCXXABI_BAREMETAL) #ifdef __APPLE__ fprintf(stderr, "libc++abi.dylib: "); #endif Modified: libcxxabi/trunk/src/config.h URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/src/config.h?rev=296612&r1=296611&r2=296612&view=diff == --- libcxxabi/trunk/src/config.h (original) +++ libcxxabi/trunk/src/config.h Wed Mar 1 05:42:01 2017 @@ -16,18 +16,4 @@ #include -// Set this in the CXXFLAGS when you need it, because otherwise we'd have to -// #if !defined(__linux__) && !defined(__APPLE__) && ... -// and so-on for *every* platform. -#ifndef LIBCXXABI_BAREMETAL -# define LIBCXXABI_BAREMETAL 0 -#endif - -// The default terminate handler attempts to de
Re: [PATCH] D16135: Macro Debug Info support in Clang
rs added a subscriber: rs. rs added a comment. Hi Amjad, are you still planning on getting this patch and https://reviews.llvm.org/D16077 committed ? It looks like these two patches are final pieces in the puzzle to get macro information in the DWARF debug output. I've downloaded the diffs and applied them myself on my local checkout and they seem to work fine. If you would like me to upload the rebased patches onto phabricator to save you the trouble of having to the fix conflicts downstream then let me know. Thanks, Ranjeet https://reviews.llvm.org/D16135 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D20325: Add ARM cdp intrinsics
rs marked an inline comment as done. rs added a comment. > It's been our stance for a long time to require docs to approve changes, > however small. I don't want to relax that which I think is a good constraint, > not for such a seemly irrelevant issue. > I also doubt this will be the only addition in the new ACLE, so why not > release the document, and then submit all changes then? > Or, maybe I am mistaken, and this is really that important... is it? Thanks for reviewing. It's not that important to have the intrinsic added before the document is released. I'll upload a new patch without the intrinsic in arm_acle.h and I'll move the assembly test to LLVM. Repository: rL LLVM http://reviews.llvm.org/D20325 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D20394: Fix cdp intrinsic
rs created this revision. rs added a reviewer: rengolin. rs added a subscriber: cfe-commits. Fixed cdp intrinsic to only accept compile time constant values, previously you could pass in a variable to the builtin which would result in illegal llvm assembly output. http://reviews.llvm.org/D20394 Files: include/clang/Basic/BuiltinsARM.def test/CodeGen/builtins-arm.c test/Sema/builtins-arm.c Index: test/Sema/builtins-arm.c === --- test/Sema/builtins-arm.c +++ test/Sema/builtins-arm.c @@ -48,6 +48,18 @@ } void test6(int a, int b, int c) { + __builtin_arm_cdp(a, 2, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, a, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, a, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, 3, a, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, 3, 4, 5, a); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + + __builtin_arm_cdp2(a, 2, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, a, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, 2, a, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, 2, 3, a, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, 2, 3, 4, 5, a); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_mrc( a, 0, 13, 0, 3); // expected-error {{argument to '__builtin_arm_mrc' must be a constant integer}} __builtin_arm_mrc(15, a, 13, 0, 3); // expected-error {{argument to '__builtin_arm_mrc' must be a constant integer}} __builtin_arm_mrc(15, 0, a, 0, 3); // expected-error {{argument to '__builtin_arm_mrc' must be a constant integer}} Index: test/CodeGen/builtins-arm.c === --- test/CodeGen/builtins-arm.c +++ test/CodeGen/builtins-arm.c @@ -84,6 +84,20 @@ // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) } +void cdp() { + // CHECK: define void @cdp() + // CHECK: call void @llvm.arm.cdp(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) + // CHECK-NEXT: ret void + __builtin_arm_cdp(1, 2, 3, 4, 5, 6); +} + +void cdp2() { + // CHECK: define void @cdp2() + // CHECK: call void @llvm.arm.cdp2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) + // CHECK-NEXT: ret void + __builtin_arm_cdp2(1, 2, 3, 4, 5, 6); +} + unsigned mrc() { // CHECK: define i32 @mrc() // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3) Index: include/clang/Basic/BuiltinsARM.def === --- include/clang/Basic/BuiltinsARM.def +++ include/clang/Basic/BuiltinsARM.def @@ -52,8 +52,8 @@ BUILTIN(__builtin_arm_mcr2, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc, "UiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc2, "UiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_cdp, "vUiUiUiUiUiUi", "") -BUILTIN(__builtin_arm_cdp2, "vUiUiUiUiUiUi", "") +BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") +BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcrr, "vUIiUIiUiUiUIi", "") BUILTIN(__builtin_arm_mcrr2, "vUIiUIiUiUiUIi", "") Index: test/Sema/builtins-arm.c === --- test/Sema/builtins-arm.c +++ test/Sema/builtins-arm.c @@ -48,6 +48,18 @@ } void test6(int a, int b, int c) { + __builtin_arm_cdp(a, 2, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, a, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, a, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, 3, a, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, 3, 4, 5, a); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + + __builtin_arm_cdp2(a, 2, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, a, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, 2, a, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, 2, 3, a, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a
Re: [PATCH] D20325: Add ARM cdp intrinsics
rs added a comment. Hi Renato, I've created 2 new reviews for this work http://reviews.llvm.org/D20394 which adds a test for the intrinsic in llvm and http://reviews.llvm.org/D20394 which fixes the builtin signature for the cdp intrinsic. Thanks, Ranjeet Repository: rL LLVM http://reviews.llvm.org/D20325 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D20325: Add ARM cdp intrinsics
rs added a comment. > http://reviews.llvm.org/D20394 which adds a test for the intrinsic in llvm Wrong link, should be http://reviews.llvm.org/D20393 Repository: rL LLVM http://reviews.llvm.org/D20325 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r270058 - [ARM] Fix cdp intrinsic
Author: rsingh Date: Thu May 19 08:04:34 2016 New Revision: 270058 URL: http://llvm.org/viewvc/llvm-project?rev=270058&view=rev Log: [ARM] Fix cdp intrinsic - Fixed cdp intrinsic to only accept compile time constant values previously you could pass in a variable to the builtin which would result in illegal llvm assembly output Differential Revision: http://reviews.llvm.org/D20394 Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def cfe/trunk/test/CodeGen/builtins-arm.c cfe/trunk/test/Sema/builtins-arm.c Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsARM.def?rev=270058&r1=270057&r2=270058&view=diff == --- cfe/trunk/include/clang/Basic/BuiltinsARM.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsARM.def Thu May 19 08:04:34 2016 @@ -52,8 +52,8 @@ BUILTIN(__builtin_arm_mcr, "vUIiUIiUiUIi BUILTIN(__builtin_arm_mcr2, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc, "UiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc2, "UiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_cdp, "vUiUiUiUiUiUi", "") -BUILTIN(__builtin_arm_cdp2, "vUiUiUiUiUiUi", "") +BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") +BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcrr, "vUIiUIiUiUiUIi", "") BUILTIN(__builtin_arm_mcrr2, "vUIiUIiUiUiUIi", "") Modified: cfe/trunk/test/CodeGen/builtins-arm.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm.c?rev=270058&r1=270057&r2=270058&view=diff == --- cfe/trunk/test/CodeGen/builtins-arm.c (original) +++ cfe/trunk/test/CodeGen/builtins-arm.c Thu May 19 08:04:34 2016 @@ -84,6 +84,20 @@ void prefetch(int i) { // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) } +void cdp() { + // CHECK: define void @cdp() + // CHECK: call void @llvm.arm.cdp(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) + // CHECK-NEXT: ret void + __builtin_arm_cdp(1, 2, 3, 4, 5, 6); +} + +void cdp2() { + // CHECK: define void @cdp2() + // CHECK: call void @llvm.arm.cdp2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) + // CHECK-NEXT: ret void + __builtin_arm_cdp2(1, 2, 3, 4, 5, 6); +} + unsigned mrc() { // CHECK: define i32 @mrc() // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3) Modified: cfe/trunk/test/Sema/builtins-arm.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/builtins-arm.c?rev=270058&r1=270057&r2=270058&view=diff == --- cfe/trunk/test/Sema/builtins-arm.c (original) +++ cfe/trunk/test/Sema/builtins-arm.c Thu May 19 08:04:34 2016 @@ -48,6 +48,18 @@ void test5() { } void test6(int a, int b, int c) { + __builtin_arm_cdp(a, 2, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, a, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, a, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, 3, a, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + __builtin_arm_cdp(1, 2, 3, 4, 5, a); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} + + __builtin_arm_cdp2(a, 2, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, a, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, 2, a, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, 2, 3, a, 5, 6); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_cdp2(1, 2, 3, 4, 5, a); // expected-error {{argument to '__builtin_arm_cdp2' must be a constant integer}} + __builtin_arm_mrc( a, 0, 13, 0, 3); // expected-error {{argument to '__builtin_arm_mrc' must be a constant integer}} __builtin_arm_mrc(15, a, 13, 0, 3); // expected-error {{argument to '__builtin_arm_mrc' must be a constant integer}} __builtin_arm_mrc(15, 0, a, 0, 3); // expected-error {{argument to '__builtin_arm_mrc' must be a constant integer}} ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D20563: Add load/store co-processor intrinsics
rs created this revision. rs added a reviewer: rengolin. rs added a subscriber: cfe-commits. Patch adds intrinsics for ldc, ldcl, ldc2, ldc2l, stc, stcl, stc2 and stc2l. http://reviews.llvm.org/D20563 Files: include/clang/Basic/BuiltinsARM.def test/CodeGen/builtins-arm.c test/Sema/builtins-arm.c Index: test/Sema/builtins-arm.c === --- test/Sema/builtins-arm.c +++ test/Sema/builtins-arm.c @@ -48,6 +48,30 @@ } void test6(int a, int b, int c) { + __builtin_arm_ldc(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc' must be a constant integer}} + __builtin_arm_ldc(1, a, &a); // expected-error {{argument to '__builtin_arm_ldc' must be a constant integer}} + + __builtin_arm_ldcl(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldcl' must be a constant integer}} + __builtin_arm_ldcl(1, a, &a); // expected-error {{argument to '__builtin_arm_ldcl' must be a constant integer}} + + __builtin_arm_ldc2(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc2' must be a constant integer}} + __builtin_arm_ldc2(1, a, &a); // expected-error {{argument to '__builtin_arm_ldc2' must be a constant integer}} + + __builtin_arm_ldc2l(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc2l' must be a constant integer}} + __builtin_arm_ldc2l(1, a, &a); // expected-error {{argument to '__builtin_arm_ldc2l' must be a constant integer}} + + __builtin_arm_stc(a, 2, &a); // expected-error {{argument to '__builtin_arm_stc' must be a constant integer}} + __builtin_arm_stc(1, a, &a); // expected-error {{argument to '__builtin_arm_stc' must be a constant integer}} + + __builtin_arm_stcl(a, 2, &a); // expected-error {{argument to '__builtin_arm_stcl' must be a constant integer}} + __builtin_arm_stcl(1, a, &a); // expected-error {{argument to '__builtin_arm_stcl' must be a constant integer}} + + __builtin_arm_stc2(a, 2, &a); // expected-error {{argument to '__builtin_arm_stc2' must be a constant integer}} + __builtin_arm_stc2(1, a, &a); // expected-error {{argument to '__builtin_arm_stc2' must be a constant integer}} + + __builtin_arm_stc2l(a, 2, &a); // expected-error {{argument to '__builtin_arm_stc2l' must be a constant integer}} + __builtin_arm_stc2l(1, a, &a); // expected-error {{argument to '__builtin_arm_stc2l' must be a constant integer}} + __builtin_arm_cdp(a, 2, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} __builtin_arm_cdp(1, a, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} __builtin_arm_cdp(1, 2, a, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} Index: test/CodeGen/builtins-arm.c === --- test/CodeGen/builtins-arm.c +++ test/CodeGen/builtins-arm.c @@ -84,6 +84,62 @@ // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) } +void ldc(const void *i) { + // CHECK: define void @ldc(i8* %i) + // CHECK: call void @llvm.arm.ldc(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc(1, 2, i); +} + +void ldcl(const void *i) { + // CHECK: define void @ldcl(i8* %i) + // CHECK: call void @llvm.arm.ldcl(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldcl(1, 2, i); +} + +void ldc2(const void *i) { + // CHECK: define void @ldc2(i8* %i) + // CHECK: call void @llvm.arm.ldc2(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc2(1, 2, i); +} + +void ldc2l(const void *i) { + // CHECK: define void @ldc2l(i8* %i) + // CHECK: call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc2l(1, 2, i); +} + +void stc(void *i) { + // CHECK: define void @stc(i8* %i) + // CHECK: call void @llvm.arm.stc(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc(1, 2, i); +} + +void stcl(void *i) { + // CHECK: define void @stcl(i8* %i) + // CHECK: call void @llvm.arm.stcl(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stcl(1, 2, i); +} + +void stc2(void *i) { + // CHECK: define void @stc2(i8* %i) + // CHECK: call void @llvm.arm.stc2(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc2(1, 2, i); +} + +void stc2l(void *i) { + // CHECK: define void @stc2l(i8* %i) + // CHECK: call void @llvm.arm.stc2l(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc2l(1, 2, i); +} + void cdp() { // CHECK: define void @cdp() // CHECK: call void @llvm.arm.cdp(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) Index: include/clang/Basic/BuiltinsARM.def === --- include/clang/Basic/BuiltinsARM.def +++ include/clang/Basic/BuiltinsARM.def @@ -48,6 +48,16 @@ BUILTIN(__builtin_arm_vcvtr_d, "fdi", "nc") // Coprocessor +BUILTIN(__builtin_arm_ldc, "vUIiUIivC*", "") +BUILTIN(__builtin_arm_ldcl, "vUIiUIivC*", ""
Re: [PATCH] D20563: Add load/store co-processor intrinsics
rs added a comment. LLVM part of the patch is here http://reviews.llvm.org/D20564 http://reviews.llvm.org/D20563 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D20563: Add load/store co-processor intrinsics
rs updated this revision to Diff 58314. http://reviews.llvm.org/D20563 Files: include/clang/Basic/BuiltinsARM.def test/CodeGen/builtins-arm.c test/Sema/builtins-arm.c Index: test/Sema/builtins-arm.c === --- test/Sema/builtins-arm.c +++ test/Sema/builtins-arm.c @@ -48,6 +48,38 @@ } void test6(int a, int b, int c) { + __builtin_arm_ldc(1, 2, &a); + __builtin_arm_ldc(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc' must be a constant integer}} + __builtin_arm_ldc(1, a, &a); // expected-error {{argument to '__builtin_arm_ldc' must be a constant integer}} + + __builtin_arm_ldcl(1, 2, &a); + __builtin_arm_ldcl(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldcl' must be a constant integer}} + __builtin_arm_ldcl(1, a, &a); // expected-error {{argument to '__builtin_arm_ldcl' must be a constant integer}} + + __builtin_arm_ldc2(1, 2, &a); + __builtin_arm_ldc2(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc2' must be a constant integer}} + __builtin_arm_ldc2(1, a, &a); // expected-error {{argument to '__builtin_arm_ldc2' must be a constant integer}} + + __builtin_arm_ldc2l(1, 2, &a); + __builtin_arm_ldc2l(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc2l' must be a constant integer}} + __builtin_arm_ldc2l(1, a, &a); // expected-error {{argument to '__builtin_arm_ldc2l' must be a constant integer}} + + __builtin_arm_stc(1, 2, &a); + __builtin_arm_stc(a, 2, &a); // expected-error {{argument to '__builtin_arm_stc' must be a constant integer}} + __builtin_arm_stc(1, a, &a); // expected-error {{argument to '__builtin_arm_stc' must be a constant integer}} + + __builtin_arm_stcl(1, 2, &a); + __builtin_arm_stcl(a, 2, &a); // expected-error {{argument to '__builtin_arm_stcl' must be a constant integer}} + __builtin_arm_stcl(1, a, &a); // expected-error {{argument to '__builtin_arm_stcl' must be a constant integer}} + + __builtin_arm_stc2(1, 2, &a); + __builtin_arm_stc2(a, 2, &a); // expected-error {{argument to '__builtin_arm_stc2' must be a constant integer}} + __builtin_arm_stc2(1, a, &a); // expected-error {{argument to '__builtin_arm_stc2' must be a constant integer}} + + __builtin_arm_stc2l(1, 2, &a); + __builtin_arm_stc2l(a, 2, &a); // expected-error {{argument to '__builtin_arm_stc2l' must be a constant integer}} + __builtin_arm_stc2l(1, a, &a); // expected-error {{argument to '__builtin_arm_stc2l' must be a constant integer}} + __builtin_arm_cdp(a, 2, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} __builtin_arm_cdp(1, a, 3, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} __builtin_arm_cdp(1, 2, a, 4, 5, 6); // expected-error {{argument to '__builtin_arm_cdp' must be a constant integer}} Index: test/CodeGen/builtins-arm.c === --- test/CodeGen/builtins-arm.c +++ test/CodeGen/builtins-arm.c @@ -84,6 +84,62 @@ // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) } +void ldc(const void *i) { + // CHECK: define void @ldc(i8* %i) + // CHECK: call void @llvm.arm.ldc(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc(1, 2, i); +} + +void ldcl(const void *i) { + // CHECK: define void @ldcl(i8* %i) + // CHECK: call void @llvm.arm.ldcl(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldcl(1, 2, i); +} + +void ldc2(const void *i) { + // CHECK: define void @ldc2(i8* %i) + // CHECK: call void @llvm.arm.ldc2(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc2(1, 2, i); +} + +void ldc2l(const void *i) { + // CHECK: define void @ldc2l(i8* %i) + // CHECK: call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc2l(1, 2, i); +} + +void stc(void *i) { + // CHECK: define void @stc(i8* %i) + // CHECK: call void @llvm.arm.stc(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc(1, 2, i); +} + +void stcl(void *i) { + // CHECK: define void @stcl(i8* %i) + // CHECK: call void @llvm.arm.stcl(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stcl(1, 2, i); +} + +void stc2(void *i) { + // CHECK: define void @stc2(i8* %i) + // CHECK: call void @llvm.arm.stc2(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc2(1, 2, i); +} + +void stc2l(void *i) { + // CHECK: define void @stc2l(i8* %i) + // CHECK: call void @llvm.arm.stc2l(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc2l(1, 2, i); +} + void cdp() { // CHECK: define void @cdp() // CHECK: call void @llvm.arm.cdp(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) Index: include/clang/Basic/BuiltinsARM.def === --- include/clang/Basic/BuiltinsARM.def +++ include/clang/Basic/BuiltinsARM.def @@ -48,6 +48,16 @@ BUILTIN(__builtin_ar
Re: [PATCH] D20563: Add load/store co-processor intrinsics
rs marked an inline comment as done. rs added a comment. Tim thanks for reviewing this patch. I've uploaded a new one with your suggested change. If I don't respond to any further comments after today it'll be because I'm on holiday and won't be back till next week. http://reviews.llvm.org/D20563 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r271275 - [ARM] Add load/store co-processor intrinsics.
Author: rsingh Date: Tue May 31 08:31:25 2016 New Revision: 271275 URL: http://llvm.org/viewvc/llvm-project?rev=271275&view=rev Log: [ARM] Add load/store co-processor intrinsics. Differential Revision: http://reviews.llvm.org/D20563 Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def cfe/trunk/test/CodeGen/builtins-arm.c cfe/trunk/test/Sema/builtins-arm.c Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsARM.def?rev=271275&r1=271274&r2=271275&view=diff == --- cfe/trunk/include/clang/Basic/BuiltinsARM.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsARM.def Tue May 31 08:31:25 2016 @@ -48,6 +48,16 @@ BUILTIN(__builtin_arm_vcvtr_f, "ffi", "n BUILTIN(__builtin_arm_vcvtr_d, "fdi", "nc") // Coprocessor +BUILTIN(__builtin_arm_ldc, "vUIiUIivC*", "") +BUILTIN(__builtin_arm_ldcl, "vUIiUIivC*", "") +BUILTIN(__builtin_arm_ldc2, "vUIiUIivC*", "") +BUILTIN(__builtin_arm_ldc2l, "vUIiUIivC*", "") + +BUILTIN(__builtin_arm_stc, "vUIiUIiv*", "") +BUILTIN(__builtin_arm_stcl, "vUIiUIiv*", "") +BUILTIN(__builtin_arm_stc2, "vUIiUIiv*", "") +BUILTIN(__builtin_arm_stc2l, "vUIiUIiv*", "") + BUILTIN(__builtin_arm_mcr, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcr2, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc, "UiUIiUIiUIiUIiUIi", "") Modified: cfe/trunk/test/CodeGen/builtins-arm.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm.c?rev=271275&r1=271274&r2=271275&view=diff == --- cfe/trunk/test/CodeGen/builtins-arm.c (original) +++ cfe/trunk/test/CodeGen/builtins-arm.c Tue May 31 08:31:25 2016 @@ -84,6 +84,62 @@ void prefetch(int i) { // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) } +void ldc(const void *i) { + // CHECK: define void @ldc(i8* %i) + // CHECK: call void @llvm.arm.ldc(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc(1, 2, i); +} + +void ldcl(const void *i) { + // CHECK: define void @ldcl(i8* %i) + // CHECK: call void @llvm.arm.ldcl(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldcl(1, 2, i); +} + +void ldc2(const void *i) { + // CHECK: define void @ldc2(i8* %i) + // CHECK: call void @llvm.arm.ldc2(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc2(1, 2, i); +} + +void ldc2l(const void *i) { + // CHECK: define void @ldc2l(i8* %i) + // CHECK: call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_ldc2l(1, 2, i); +} + +void stc(void *i) { + // CHECK: define void @stc(i8* %i) + // CHECK: call void @llvm.arm.stc(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc(1, 2, i); +} + +void stcl(void *i) { + // CHECK: define void @stcl(i8* %i) + // CHECK: call void @llvm.arm.stcl(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stcl(1, 2, i); +} + +void stc2(void *i) { + // CHECK: define void @stc2(i8* %i) + // CHECK: call void @llvm.arm.stc2(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc2(1, 2, i); +} + +void stc2l(void *i) { + // CHECK: define void @stc2l(i8* %i) + // CHECK: call void @llvm.arm.stc2l(i32 1, i32 2, i8* %i) + // CHECK-NEXT: ret void + __builtin_arm_stc2l(1, 2, i); +} + void cdp() { // CHECK: define void @cdp() // CHECK: call void @llvm.arm.cdp(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) Modified: cfe/trunk/test/Sema/builtins-arm.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/builtins-arm.c?rev=271275&r1=271274&r2=271275&view=diff == --- cfe/trunk/test/Sema/builtins-arm.c (original) +++ cfe/trunk/test/Sema/builtins-arm.c Tue May 31 08:31:25 2016 @@ -48,6 +48,38 @@ void test5() { } void test6(int a, int b, int c) { + __builtin_arm_ldc(1, 2, &a); + __builtin_arm_ldc(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc' must be a constant integer}} + __builtin_arm_ldc(1, a, &a); // expected-error {{argument to '__builtin_arm_ldc' must be a constant integer}} + + __builtin_arm_ldcl(1, 2, &a); + __builtin_arm_ldcl(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldcl' must be a constant integer}} + __builtin_arm_ldcl(1, a, &a); // expected-error {{argument to '__builtin_arm_ldcl' must be a constant integer}} + + __builtin_arm_ldc2(1, 2, &a); + __builtin_arm_ldc2(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc2' must be a constant integer}} + __builtin_arm_ldc2(1, a, &a); // expected-error {{argument to '__builtin_arm_ldc2' must be a constant integer}} + + __builtin_arm_ldc2l(1, 2, &a); + __builtin_arm_ldc2l(a, 2, &a); // expected-error {{argument to '__builtin_arm_ldc2l' must be a constant integer}} + __builtin_arm_ldc2l(1, a, &a); // expected-error {{argument
[PATCH] D21179: Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types
rs created this revision. rs added reviewers: t.p.northover, rengolin. rs added a subscriber: cfe-commits. Patch adds support for the intrinsics mrrc/mrrc2 and updates the existing mcrr/mcrr2 intrinsic definition to accept a single uint64 type as the input value instead of 2 uint32's as I think this makes the definition more compact. http://reviews.llvm.org/D21179 Files: include/clang/Basic/BuiltinsARM.def lib/CodeGen/CGBuiltin.cpp test/CodeGen/builtins-arm.c test/Sema/builtins-arm.c Index: test/Sema/builtins-arm.c === --- test/Sema/builtins-arm.c +++ test/Sema/builtins-arm.c @@ -116,11 +116,23 @@ __builtin_arm_mcr2(15, 0, b, 13, a, 3); // expected-error {{argument to '__builtin_arm_mcr2' must be a constant integer}} __builtin_arm_mcr2(15, 0, b, 13, 0, a); // expected-error {{argument to '__builtin_arm_mcr2' must be a constant integer}} - __builtin_arm_mcrr( a, 0, b, c, 0); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} - __builtin_arm_mcrr(15, a, b, c, 0); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} - __builtin_arm_mcrr(15, 0, b, c, a); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} - - __builtin_arm_mcrr2( a, 0, b, c, 0); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} - __builtin_arm_mcrr2(15, a, b, c, 0); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} - __builtin_arm_mcrr2(15, 0, b, c, a); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} + __builtin_arm_mcrr(15, 0, b, 0); + __builtin_arm_mcrr( a, 0, b, 0); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} + __builtin_arm_mcrr(15, a, b, 0); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} + __builtin_arm_mcrr(15, 0, b, a); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} + + __builtin_arm_mcrr2(15, 0, b, 0); + __builtin_arm_mcrr2( a, 0, b, 0); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} + __builtin_arm_mcrr2(15, a, b, 0); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} + __builtin_arm_mcrr2(15, 0, b, a); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} + + __builtin_arm_mrrc(15, 0, 0); + __builtin_arm_mrrc( a, 0, 0); // expected-error {{argument to '__builtin_arm_mrrc' must be a constant integer}} + __builtin_arm_mrrc(15, a, 0); // expected-error {{argument to '__builtin_arm_mrrc' must be a constant integer}} + __builtin_arm_mrrc(15, 0, a); // expected-error {{argument to '__builtin_arm_mrrc' must be a constant integer}} + + __builtin_arm_mrrc2(15, 0, 0); + __builtin_arm_mrrc2( a, 0, 0); // expected-error {{argument to '__builtin_arm_mrrc2' must be a constant integer}} + __builtin_arm_mrrc2(15, a, 0); // expected-error {{argument to '__builtin_arm_mrrc2' must be a constant integer}} + __builtin_arm_mrrc2(15, 0, a); // expected-error {{argument to '__builtin_arm_mrrc2' must be a constant integer}} } Index: test/CodeGen/builtins-arm.c === --- test/CodeGen/builtins-arm.c +++ test/CodeGen/builtins-arm.c @@ -1,5 +1,7 @@ // RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu cortex-a8 -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s +#include + void *f0() { return __builtin_thread_pointer(); @@ -180,16 +182,28 @@ __builtin_arm_mcr2(15, 0, a, 13, 0, 3); } -void mcrr(unsigned a, unsigned b) { - // CHECK: define void @mcrr(i32 [[A:%.*]], i32 [[B:%.*]]) - // CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 [[A]], i32 [[B]], i32 0) - __builtin_arm_mcrr(15, 0, a, b, 0); +void mcrr(uint64_t a) { + // CHECK: define void @mcrr(i64 %{{.*}}) + // CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) + __builtin_arm_mcrr(15, 0, a, 0); +} + +void mcrr2(uint64_t a) { + // CHECK: define void @mcrr2(i64 %{{.*}}) + // CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) + __builtin_arm_mcrr2(15, 0, a, 0); +} + +uint64_t mrrc() { + // CHECK: define i64 @mrrc() + // CHECK: call { i32, i32 } @llvm.arm.mrrc(i32 15, i32 0, i32 0) + return __builtin_arm_mrrc(15, 0, 0); } -void mcrr2(unsigned a, unsigned b) { - // CHECK: define void @mcrr2(i32 [[A:%.*]], i32 [[B:%.*]]) - // CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 [[A]], i32 [[B]], i32 0) - __builtin_arm_mcrr2(15, 0, a, b, 0); +uint64_t mrrc2() { + // CHECK: define i64 @mrrc2() + // CHECK: call { i32, i32 } @llvm.arm.mrrc2(i32 15, i32 0, i32 0) + return __builtin_arm_mrrc2(15, 0, 0); } unsigned rsr() { Index: lib/CodeGen/CGBuiltin.cpp === --- lib/CodeGen/
Re: [PATCH] D21179: Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types
rs added a comment. LLVM part of the patch is here http://reviews.llvm.org/D21178 http://reviews.llvm.org/D21179 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D21179: Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types
rs marked 3 inline comments as done. Comment at: test/CodeGen/builtins-arm.c:203 @@ -188,5 +202,3 @@ -void mcrr2(unsigned a, unsigned b) { - // CHECK: define void @mcrr2(i32 [[A:%.*]], i32 [[B:%.*]]) - // CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 [[A]], i32 [[B]], i32 0) - __builtin_arm_mcrr2(15, 0, a, b, 0); +uint64_t mrrc2() { + // CHECK: define i64 @mrrc2() rengolin wrote: > I'm assuming this is a "soon to be documented" move, right? > > It's really hard to review patches with these things changing all the time... >I'm assuming this is a "soon to be documented" move, right? Yes I've written the document myself which defines these intrinsics. >It's really hard to review patches with these things changing all the time... Sorry, I didn't know these sorts of thing change that often. http://reviews.llvm.org/D21179 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D21179: Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types
rs updated this revision to Diff 60504. rs added a comment. Hi Renato, please look again at this patch, I've addressed your comments. Thanks, Ranjeet http://reviews.llvm.org/D21179 Files: include/clang/Basic/BuiltinsARM.def lib/CodeGen/CGBuiltin.cpp test/CodeGen/builtins-arm.c test/Sema/builtins-arm.c Index: test/Sema/builtins-arm.c === --- test/Sema/builtins-arm.c +++ test/Sema/builtins-arm.c @@ -116,11 +116,23 @@ __builtin_arm_mcr2(15, 0, b, 13, a, 3); // expected-error {{argument to '__builtin_arm_mcr2' must be a constant integer}} __builtin_arm_mcr2(15, 0, b, 13, 0, a); // expected-error {{argument to '__builtin_arm_mcr2' must be a constant integer}} - __builtin_arm_mcrr( a, 0, b, c, 0); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} - __builtin_arm_mcrr(15, a, b, c, 0); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} - __builtin_arm_mcrr(15, 0, b, c, a); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} - - __builtin_arm_mcrr2( a, 0, b, c, 0); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} - __builtin_arm_mcrr2(15, a, b, c, 0); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} - __builtin_arm_mcrr2(15, 0, b, c, a); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} + __builtin_arm_mcrr(15, 0, b, 0); + __builtin_arm_mcrr( a, 0, b, 0); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} + __builtin_arm_mcrr(15, a, b, 0); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} + __builtin_arm_mcrr(15, 0, b, a); // expected-error {{argument to '__builtin_arm_mcrr' must be a constant integer}} + + __builtin_arm_mcrr2(15, 0, b, 0); + __builtin_arm_mcrr2( a, 0, b, 0); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} + __builtin_arm_mcrr2(15, a, b, 0); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} + __builtin_arm_mcrr2(15, 0, b, a); // expected-error {{argument to '__builtin_arm_mcrr2' must be a constant integer}} + + __builtin_arm_mrrc(15, 0, 0); + __builtin_arm_mrrc( a, 0, 0); // expected-error {{argument to '__builtin_arm_mrrc' must be a constant integer}} + __builtin_arm_mrrc(15, a, 0); // expected-error {{argument to '__builtin_arm_mrrc' must be a constant integer}} + __builtin_arm_mrrc(15, 0, a); // expected-error {{argument to '__builtin_arm_mrrc' must be a constant integer}} + + __builtin_arm_mrrc2(15, 0, 0); + __builtin_arm_mrrc2( a, 0, 0); // expected-error {{argument to '__builtin_arm_mrrc2' must be a constant integer}} + __builtin_arm_mrrc2(15, a, 0); // expected-error {{argument to '__builtin_arm_mrrc2' must be a constant integer}} + __builtin_arm_mrrc2(15, 0, a); // expected-error {{argument to '__builtin_arm_mrrc2' must be a constant integer}} } Index: test/CodeGen/builtins-arm.c === --- test/CodeGen/builtins-arm.c +++ test/CodeGen/builtins-arm.c @@ -1,5 +1,7 @@ // RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu cortex-a8 -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s +#include + void *f0() { return __builtin_thread_pointer(); @@ -180,16 +182,28 @@ __builtin_arm_mcr2(15, 0, a, 13, 0, 3); } -void mcrr(unsigned a, unsigned b) { - // CHECK: define void @mcrr(i32 [[A:%.*]], i32 [[B:%.*]]) - // CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 [[A]], i32 [[B]], i32 0) - __builtin_arm_mcrr(15, 0, a, b, 0); +void mcrr(uint64_t a) { + // CHECK: define void @mcrr(i64 %{{.*}}) + // CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) + __builtin_arm_mcrr(15, 0, a, 0); +} + +void mcrr2(uint64_t a) { + // CHECK: define void @mcrr2(i64 %{{.*}}) + // CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) + __builtin_arm_mcrr2(15, 0, a, 0); +} + +uint64_t mrrc() { + // CHECK: define i64 @mrrc() + // CHECK: call { i32, i32 } @llvm.arm.mrrc(i32 15, i32 0, i32 0) + return __builtin_arm_mrrc(15, 0, 0); } -void mcrr2(unsigned a, unsigned b) { - // CHECK: define void @mcrr2(i32 [[A:%.*]], i32 [[B:%.*]]) - // CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 [[A]], i32 [[B]], i32 0) - __builtin_arm_mcrr2(15, 0, a, b, 0); +uint64_t mrrc2() { + // CHECK: define i64 @mrrc2() + // CHECK: call { i32, i32 } @llvm.arm.mrrc2(i32 15, i32 0, i32 0) + return __builtin_arm_mrrc2(15, 0, 0); } unsigned rsr() { Index: lib/CodeGen/CGBuiltin.cpp === --- lib/CodeGen/CGBuiltin.cpp +++ lib/CodeGen/CGBuiltin.cpp @@ -3793,6 +3793,74 @@ return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); } + if (BuiltinID == ARM::BI__bu
r272777 - [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.
Author: rsingh Date: Wed Jun 15 06:32:18 2016 New Revision: 272777 URL: http://llvm.org/viewvc/llvm-project?rev=272777&view=rev Log: [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics. Patch adds intrinsics for mrrc/mrrc2. The intrinsics for mrrc/mrrc2 return a single uint64_t to represent two 32 bit values. The mcrr/mcrr2 intrinsic was changed to accept a single uint64_t instead of two 32 bit values as the input for consistency. Differential Revision: http://reviews.llvm.org/D21179 Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def cfe/trunk/lib/CodeGen/CGBuiltin.cpp cfe/trunk/test/CodeGen/builtins-arm.c cfe/trunk/test/Sema/builtins-arm.c Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsARM.def?rev=272777&r1=272776&r2=272777&view=diff == --- cfe/trunk/include/clang/Basic/BuiltinsARM.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsARM.def Wed Jun 15 06:32:18 2016 @@ -58,14 +58,16 @@ BUILTIN(__builtin_arm_stcl, "vUIiUIiv*", BUILTIN(__builtin_arm_stc2, "vUIiUIiv*", "") BUILTIN(__builtin_arm_stc2l, "vUIiUIiv*", "") +BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") +BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcr, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcr2, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc, "UiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc2, "UiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mcrr, "vUIiUIiUiUiUIi", "") -BUILTIN(__builtin_arm_mcrr2, "vUIiUIiUiUiUIi", "") +BUILTIN(__builtin_arm_mcrr, "vUIiUIiLLUiUIi", "") +BUILTIN(__builtin_arm_mcrr2, "vUIiUIiLLUiUIi", "") +BUILTIN(__builtin_arm_mrrc, "LLUiUIiUIiUIi", "") +BUILTIN(__builtin_arm_mrrc2, "LLUiUIiUIiUIi", "") // CRC32 BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc") Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=272777&r1=272776&r2=272777&view=diff == --- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original) +++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Wed Jun 15 06:32:18 2016 @@ -3793,6 +3793,74 @@ Value *CodeGenFunction::EmitARMBuiltinEx return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); } + if (BuiltinID == ARM::BI__builtin_arm_mcrr || + BuiltinID == ARM::BI__builtin_arm_mcrr2) { +Function *F; + +switch (BuiltinID) { +default: llvm_unreachable("unexpected builtin"); +case ARM::BI__builtin_arm_mcrr: + F = CGM.getIntrinsic(Intrinsic::arm_mcrr); + break; +case ARM::BI__builtin_arm_mcrr2: + F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); + break; +} + +// MCRR{2} instruction has 5 operands but +// the intrinsic has 4 because Rt and Rt2 +// are represented as a single unsigned 64 +// bit integer in the intrinsic definition +// but internally it's represented as 2 32 +// bit integers. + +Value *Coproc = EmitScalarExpr(E->getArg(0)); +Value *Opc1 = EmitScalarExpr(E->getArg(1)); +Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); +Value *CRm = EmitScalarExpr(E->getArg(3)); + +Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); +Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); +Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); +Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); + +return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); + } + + if (BuiltinID == ARM::BI__builtin_arm_mrrc || + BuiltinID == ARM::BI__builtin_arm_mrrc2) { +Function *F; + +switch (BuiltinID) { +default: llvm_unreachable("unexpected builtin"); +case ARM::BI__builtin_arm_mrrc: + F = CGM.getIntrinsic(Intrinsic::arm_mrrc); + break; +case ARM::BI__builtin_arm_mrrc2: + F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); + break; +} + +Value *Coproc = EmitScalarExpr(E->getArg(0)); +Value *Opc1 = EmitScalarExpr(E->getArg(1)); +Value *CRm = EmitScalarExpr(E->getArg(2)); +Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); + +// Returns an unsigned 64 bit integer, represented +// as two 32 bit integers. + +Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); +Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); +Rt = Builder.CreateZExt(Rt, Int64Ty); +Rt1 = Builder.CreateZExt(Rt1, Int64Ty); + +Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); +RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); +RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); + +return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); + } + if (BuiltinID == ARM::BI__builtin_arm_ldrexd || ((BuiltinID
r272790 - Reverting r272777 because one of the tests
Author: rsingh Date: Wed Jun 15 09:21:28 2016 New Revision: 272790 URL: http://llvm.org/viewvc/llvm-project?rev=272790&view=rev Log: Reverting r272777 because one of the tests added in the llvm patch is causing an assertion to fail. Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def cfe/trunk/lib/CodeGen/CGBuiltin.cpp cfe/trunk/test/CodeGen/builtins-arm.c cfe/trunk/test/Sema/builtins-arm.c Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsARM.def?rev=272790&r1=272789&r2=272790&view=diff == --- cfe/trunk/include/clang/Basic/BuiltinsARM.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsARM.def Wed Jun 15 09:21:28 2016 @@ -58,16 +58,14 @@ BUILTIN(__builtin_arm_stcl, "vUIiUIiv*", BUILTIN(__builtin_arm_stc2, "vUIiUIiv*", "") BUILTIN(__builtin_arm_stc2l, "vUIiUIiv*", "") -BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcr, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcr2, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc, "UiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc2, "UiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mcrr, "vUIiUIiLLUiUIi", "") -BUILTIN(__builtin_arm_mcrr2, "vUIiUIiLLUiUIi", "") -BUILTIN(__builtin_arm_mrrc, "LLUiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mrrc2, "LLUiUIiUIiUIi", "") +BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") +BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") +BUILTIN(__builtin_arm_mcrr, "vUIiUIiUiUiUIi", "") +BUILTIN(__builtin_arm_mcrr2, "vUIiUIiUiUiUIi", "") // CRC32 BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc") Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=272790&r1=272789&r2=272790&view=diff == --- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original) +++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Wed Jun 15 09:21:28 2016 @@ -3793,74 +3793,6 @@ Value *CodeGenFunction::EmitARMBuiltinEx return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); } - if (BuiltinID == ARM::BI__builtin_arm_mcrr || - BuiltinID == ARM::BI__builtin_arm_mcrr2) { -Function *F; - -switch (BuiltinID) { -default: llvm_unreachable("unexpected builtin"); -case ARM::BI__builtin_arm_mcrr: - F = CGM.getIntrinsic(Intrinsic::arm_mcrr); - break; -case ARM::BI__builtin_arm_mcrr2: - F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); - break; -} - -// MCRR{2} instruction has 5 operands but -// the intrinsic has 4 because Rt and Rt2 -// are represented as a single unsigned 64 -// bit integer in the intrinsic definition -// but internally it's represented as 2 32 -// bit integers. - -Value *Coproc = EmitScalarExpr(E->getArg(0)); -Value *Opc1 = EmitScalarExpr(E->getArg(1)); -Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); -Value *CRm = EmitScalarExpr(E->getArg(3)); - -Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); -Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); -Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); -Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); - -return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); - } - - if (BuiltinID == ARM::BI__builtin_arm_mrrc || - BuiltinID == ARM::BI__builtin_arm_mrrc2) { -Function *F; - -switch (BuiltinID) { -default: llvm_unreachable("unexpected builtin"); -case ARM::BI__builtin_arm_mrrc: - F = CGM.getIntrinsic(Intrinsic::arm_mrrc); - break; -case ARM::BI__builtin_arm_mrrc2: - F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); - break; -} - -Value *Coproc = EmitScalarExpr(E->getArg(0)); -Value *Opc1 = EmitScalarExpr(E->getArg(1)); -Value *CRm = EmitScalarExpr(E->getArg(2)); -Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); - -// Returns an unsigned 64 bit integer, represented -// as two 32 bit integers. - -Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); -Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); -Rt = Builder.CreateZExt(Rt, Int64Ty); -Rt1 = Builder.CreateZExt(Rt1, Int64Ty); - -Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); -RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); -RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); - -return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); - } - if (BuiltinID == ARM::BI__builtin_arm_ldrexd || ((BuiltinID == ARM::BI__builtin_arm_ldrex || BuiltinID == ARM::BI__builtin_arm_ldaex) && Modified: cfe/trunk/test/CodeGen/builtins-arm.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm.c?rev=272790&r1=272789&r2=272790&view=diff =
r272983 - [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.
Author: rsingh Date: Thu Jun 16 19:59:41 2016 New Revision: 272983 URL: http://llvm.org/viewvc/llvm-project?rev=272983&view=rev Log: [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics. Reapplying patch in r272777 which was reverted because the llvm patch which added support for generating the mcrr/mcrr2 instructions from the intrinsic was causing an assertion failure. This has now been fixed in llvm. Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def cfe/trunk/lib/CodeGen/CGBuiltin.cpp cfe/trunk/test/CodeGen/builtins-arm.c cfe/trunk/test/Sema/builtins-arm.c Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsARM.def?rev=272983&r1=272982&r2=272983&view=diff == --- cfe/trunk/include/clang/Basic/BuiltinsARM.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsARM.def Thu Jun 16 19:59:41 2016 @@ -57,14 +57,16 @@ BUILTIN(__builtin_arm_stcl, "vUIiUIiv*", BUILTIN(__builtin_arm_stc2, "vUIiUIiv*", "") BUILTIN(__builtin_arm_stc2l, "vUIiUIiv*", "") +BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") +BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcr, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mcr2, "vUIiUIiUiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc, "UiUIiUIiUIiUIiUIi", "") BUILTIN(__builtin_arm_mrc2, "UiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mcrr, "vUIiUIiUiUiUIi", "") -BUILTIN(__builtin_arm_mcrr2, "vUIiUIiUiUiUIi", "") +BUILTIN(__builtin_arm_mcrr, "vUIiUIiLLUiUIi", "") +BUILTIN(__builtin_arm_mcrr2, "vUIiUIiLLUiUIi", "") +BUILTIN(__builtin_arm_mrrc, "LLUiUIiUIiUIi", "") +BUILTIN(__builtin_arm_mrrc2, "LLUiUIiUIiUIi", "") // CRC32 BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc") Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=272983&r1=272982&r2=272983&view=diff == --- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original) +++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Thu Jun 16 19:59:41 2016 @@ -3800,6 +3800,74 @@ Value *CodeGenFunction::EmitARMBuiltinEx return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); } + if (BuiltinID == ARM::BI__builtin_arm_mcrr || + BuiltinID == ARM::BI__builtin_arm_mcrr2) { +Function *F; + +switch (BuiltinID) { +default: llvm_unreachable("unexpected builtin"); +case ARM::BI__builtin_arm_mcrr: + F = CGM.getIntrinsic(Intrinsic::arm_mcrr); + break; +case ARM::BI__builtin_arm_mcrr2: + F = CGM.getIntrinsic(Intrinsic::arm_mcrr2); + break; +} + +// MCRR{2} instruction has 5 operands but +// the intrinsic has 4 because Rt and Rt2 +// are represented as a single unsigned 64 +// bit integer in the intrinsic definition +// but internally it's represented as 2 32 +// bit integers. + +Value *Coproc = EmitScalarExpr(E->getArg(0)); +Value *Opc1 = EmitScalarExpr(E->getArg(1)); +Value *RtAndRt2 = EmitScalarExpr(E->getArg(2)); +Value *CRm = EmitScalarExpr(E->getArg(3)); + +Value *C1 = llvm::ConstantInt::get(Int64Ty, 32); +Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); +Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); +Rt2 = Builder.CreateTruncOrBitCast(Rt2, Int32Ty); + +return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); + } + + if (BuiltinID == ARM::BI__builtin_arm_mrrc || + BuiltinID == ARM::BI__builtin_arm_mrrc2) { +Function *F; + +switch (BuiltinID) { +default: llvm_unreachable("unexpected builtin"); +case ARM::BI__builtin_arm_mrrc: + F = CGM.getIntrinsic(Intrinsic::arm_mrrc); + break; +case ARM::BI__builtin_arm_mrrc2: + F = CGM.getIntrinsic(Intrinsic::arm_mrrc2); + break; +} + +Value *Coproc = EmitScalarExpr(E->getArg(0)); +Value *Opc1 = EmitScalarExpr(E->getArg(1)); +Value *CRm = EmitScalarExpr(E->getArg(2)); +Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); + +// Returns an unsigned 64 bit integer, represented +// as two 32 bit integers. + +Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); +Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); +Rt = Builder.CreateZExt(Rt, Int64Ty); +Rt1 = Builder.CreateZExt(Rt1, Int64Ty); + +Value *ShiftCast = llvm::ConstantInt::get(Int64Ty, 32); +RtAndRt2 = Builder.CreateShl(Rt, ShiftCast, "shl", true); +RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); + +return Builder.CreateBitCast(RtAndRt2, ConvertType(E->getType())); + } + if (BuiltinID == ARM::BI__builtin_arm_ldrexd || ((BuiltinID == ARM::BI__builtin_arm_ldrex || BuiltinID == ARM::BI__builtin_arm_ldaex) &&