r303857 - [X86] Adding avx512_vpopcntdq feature set and its intrinsics

2017-05-25 Thread Oren Ben Simhon via cfe-commits 
Author: orenb
Date: Thu May 25 08:44:11 2017
New Revision: 303857

URL: http://llvm.org/viewvc/llvm-project?rev=303857&view=rev
Log:
[X86] Adding avx512_vpopcntdq feature set and its intrinsics

AVX512_VPOPCNTDQ is a new feature set that was published by Intel.
The patch represents the Clang side of the addition of six intrinsics for two 
new machine instructions (vpopcntd and vpopcntq).
It also includes the addition of the new feature set.

Differential Revision: https://reviews.llvm.org/D33170


Added:
cfe/trunk/lib/Headers/avx512vpopcntdqintrin.h
cfe/trunk/test/CodeGen/avx512vpopcntdqintrin.c
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/immintrin.h
cfe/trunk/test/CodeGen/attr-target-x86.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=303857&r1=303856&r2=303857&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu May 25 08:44:11 2017
@@ -1107,6 +1107,9 @@ TARGET_BUILTIN(__builtin_ia32_vpconflict
 TARGET_BUILTIN(__builtin_ia32_vplzcntd_512_mask, "V16iV16iV16iUs", "", 
"avx512cd")
 TARGET_BUILTIN(__builtin_ia32_vplzcntq_512_mask, "V8LLiV8LLiV8LLiUc", "", 
"avx512cd")
 
+TARGET_BUILTIN(__builtin_ia32_vpopcntd_512, "V16iV16i", "", "avx512vpopcntdq")
+TARGET_BUILTIN(__builtin_ia32_vpopcntq_512, "V8LLiV8LLi", "", 
"avx512vpopcntdq")
+
 TARGET_BUILTIN(__builtin_ia32_vpermi2varhi128_mask, "V8sV8sV8sV8sUc", "", 
"avx512vl,avx512bw")
 TARGET_BUILTIN(__builtin_ia32_vpermi2varhi256_mask, "V16sV16sV16sV16sUs", "", 
"avx512vl,avx512bw")
 TARGET_BUILTIN(__builtin_ia32_vpermt2varhi128_mask, "V8sV8sV8sV8sUc", "", 
"avx512vl,avx512bw")

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=303857&r1=303856&r2=303857&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu May 25 08:44:11 2017
@@ -1741,6 +1741,7 @@ def mno_avx : Flag<["-"], "mno-avx">, Gr
 def mno_avx2 : Flag<["-"], "mno-avx2">, Group;
 def mno_avx512f : Flag<["-"], "mno-avx512f">, Group;
 def mno_avx512cd : Flag<["-"], "mno-avx512cd">, Group;
+def mno_avx512vpopcntdq : Flag<["-"], "mno-avx512vpopcntdq">, 
Group;
 def mno_avx512er : Flag<["-"], "mno-avx512er">, Group;
 def mno_avx512pf : Flag<["-"], "mno-avx512pf">, Group;
 def mno_avx512dq : Flag<["-"], "mno-avx512dq">, Group;
@@ -1941,6 +1942,7 @@ def mavx : Flag<["-"], "mavx">, Group, Group;
 def mavx512f : Flag<["-"], "mavx512f">, Group;
 def mavx512cd : Flag<["-"], "mavx512cd">, Group;
+def mavx512vpopcntdq : Flag<["-"], "mavx512vpopcntdq">, 
Group;
 def mavx512er : Flag<["-"], "mavx512er">, Group;
 def mavx512pf : Flag<["-"], "mavx512pf">, Group;
 def mavx512dq : Flag<["-"], "mavx512dq">, Group;

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=303857&r1=303856&r2=303857&view=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Thu May 25 08:44:11 2017
@@ -2624,6 +2624,7 @@ class X86TargetInfo : public TargetInfo
   bool HasFMA = false;
   bool HasF16C = false;
   bool HasAVX512CD = false;
+  bool HasAVX512VPOPCNTDQ = false;
   bool HasAVX512ER = false;
   bool HasAVX512PF = false;
   bool HasAVX512DQ = false;
@@ -3504,9 +3505,9 @@ void X86TargetInfo::setSSELevel(llvm::St
 LLVM_FALLTHROUGH;
   case AVX512F:
 Features["avx512f"] = Features["avx512cd"] = Features["avx512er"] =
-  Features["avx512pf"] = Features["avx512dq"] = Features["avx512bw"] =
-  Features["avx512vl"] = Features["avx512vbmi"] =
-  Features["avx512ifma"] = false;
+Features["avx512pf"] = Features["avx512dq"] = Features["avx512bw"] =
+Features["avx512vl"] = Features["avx512vbmi"] =
+Features["avx512ifma"] = Features["avx512vpopcntdq"] = false;
   }
 }
 
@@ -3616,7 +3617,8 @@ void X86TargetInfo::setFeatureEnabledImp
 setSSELevel(Features, AVX512F, Enabled);
   } else if (Name == "avx512cd" || Name == "avx512er" || Name == "avx512pf" ||
  Name == "avx512dq" || Name == "avx512bw" || Name == "avx512vl" ||
- Name == "avx512vbmi" || Name == "avx512ifma") {
+ Name == "avx512vbmi" || Name == "avx512ifma" ||
+ Name == "avx512vpopcntdq") {
 if (Enabled)
   setSSELevel(Features, AVX512F, Enabled);
 // Enable BWI instruction if VBMI is being enabled.
@@ -3700,6 +3702

r322063 - Added Control Flow Protection Flag

2018-01-09 Thread Oren Ben Simhon via cfe-commits 
Author: orenb
Date: Tue Jan  9 00:53:59 2018
New Revision: 322063

URL: http://llvm.org/viewvc/llvm-project?rev=322063&view=rev
Log:
Added Control Flow Protection Flag

Cf-protection is a target independent flag that instructs the back-end to 
instrument control flow mechanisms like: Branch, Return, etc.
For example in X86 this flag will be used to instrument Indirect Branch 
Tracking instructions.

Differential Revision: https://reviews.llvm.org/D40478

Change-Id: I5126e766c0e6b84118cae0ee8a20fe78cc373dea

Added:
cfe/trunk/test/CodeGen/x86-cf-protection.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td
cfe/trunk/include/clang/Basic/TargetInfo.h
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/include/clang/Frontend/CodeGenOptions.def
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/CodeGen/CodeGenFunction.cpp
cfe/trunk/lib/CodeGen/CodeGenModule.cpp
cfe/trunk/lib/Driver/ToolChains/Clang.cpp
cfe/trunk/lib/Frontend/CompilerInvocation.cpp
cfe/trunk/test/Driver/clang_f_opts.c

Modified: cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td?rev=322063&r1=322062&r2=322063&view=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td Tue Jan  9 00:53:59 
2018
@@ -203,6 +203,8 @@ def err_target_unsupported_execute_only
   "execute only is not supported for the %0 sub-architecture">;
 def err_opt_not_valid_with_opt : Error<
   "option '%0' cannot be specified with '%1'">;
+def err_opt_not_valid_without_opt : Error<
+  "option '%0' cannot be specified without '%1'">;
 
 // Source manager
 def err_cannot_open_file : Error<"cannot open file '%0': %1">, DefaultFatal;

Modified: cfe/trunk/include/clang/Basic/TargetInfo.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/TargetInfo.h?rev=322063&r1=322062&r2=322063&view=diff
==
--- cfe/trunk/include/clang/Basic/TargetInfo.h (original)
+++ cfe/trunk/include/clang/Basic/TargetInfo.h Tue Jan  9 00:53:59 2018
@@ -1051,6 +1051,18 @@ public:
 return false;
   }
 
+  /// Check if the target supports CFProtection branch.
+  virtual bool
+  checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const {
+return false;
+  }
+
+  /// Check if the target supports CFProtection branch.
+  virtual bool
+  checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const {
+return false;
+  }
+
   /// \brief Whether target allows to overalign ABI-specified preferred 
alignment
   virtual bool allowsLargerPreferedTypeAlignment() const { return true; }
 

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=322063&r1=322062&r2=322063&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Tue Jan  9 00:53:59 2018
@@ -1042,6 +1042,11 @@ def finstrument_functions_after_inlining
   HelpText<"Like -finstrument-functions, but insert the calls after inlining">;
 def finstrument_function_entry_bare : Flag<["-"], 
"finstrument-function-entry-bare">, Group, Flags<[CC1Option]>,
   HelpText<"Instrument function entry only, after inlining, without arguments 
to the instrumentation call">;
+def fcf_protection_EQ : Joined<["-"], "fcf-protection=">, Flags<[CoreOption, 
CC1Option]>, Group,
+  HelpText<"Instrument control-flow architecture protection. Options: return, 
branch, full, none.">, Values<"return,branch,full,none">;
+def fcf_protection : Flag<["-"], "fcf-protection">, Group, 
Flags<[CoreOption, CC1Option]>,
+  Alias, AliasArgs<["full"]>,
+  HelpText<"Enable cf-protection in 'full' mode">;
 
 def fxray_instrument : Flag<["-"], "fxray-instrument">, Group,
   Flags<[CC1Option]>,

Modified: cfe/trunk/include/clang/Frontend/CodeGenOptions.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Frontend/CodeGenOptions.def?rev=322063&r1=322062&r2=322063&view=diff
==
--- cfe/trunk/include/clang/Frontend/CodeGenOptions.def (original)
+++ cfe/trunk/include/clang/Frontend/CodeGenOptions.def Tue Jan  9 00:53:59 2018
@@ -80,7 +80,10 @@ CODEGENOPT(InstrumentFunctionsAfterInlin
   ///< -finstrument-functions-after-inlining is 
enabled.
 CODEGENOPT(InstrumentFunctionEntryBare , 1, 0) ///< Set when
///< -finstrument-function-entry-bare is 
enabled.
-
+CODEGENOPT(CFProtectionReturn , 1, 0) ///< if -fcf-protection is
+  ///< set to full or return.
+CODEGENOP

r327768 - Adding nocf_check attribute for cf-protection fine tuning

2018-03-17 Thread Oren Ben Simhon via cfe-commits 
Author: orenb
Date: Sat Mar 17 06:31:35 2018
New Revision: 327768

URL: http://llvm.org/viewvc/llvm-project?rev=327768&view=rev
Log:
Adding nocf_check attribute for cf-protection fine tuning

The patch adds nocf_check target independent attribute for disabling checks 
that were enabled by cf-protection flag.
The attribute can be appertained to functions and function pointers.
Attribute name follows GCC's similar attribute name.

Differential Revision: https://reviews.llvm.org/D41880

Added:
cfe/trunk/test/Sema/attr-nocf_check.c
cfe/trunk/test/Sema/attr-nocf_check.cpp
cfe/trunk/test/Sema/nocf_check_attr_not_allowed.c
Modified:
cfe/trunk/include/clang/AST/Type.h
cfe/trunk/include/clang/Basic/Attr.td
cfe/trunk/include/clang/Basic/AttrDocs.td
cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
cfe/trunk/include/clang/Basic/LangOptions.def
cfe/trunk/include/clang/CodeGen/CGFunctionInfo.h
cfe/trunk/include/clang/Sema/Sema.h
cfe/trunk/lib/AST/ASTContext.cpp
cfe/trunk/lib/AST/Type.cpp
cfe/trunk/lib/AST/TypePrinter.cpp
cfe/trunk/lib/CodeGen/CGCall.cpp
cfe/trunk/lib/Frontend/CompilerInvocation.cpp
cfe/trunk/lib/Sema/SemaDeclAttr.cpp
cfe/trunk/lib/Sema/SemaType.cpp
cfe/trunk/lib/Serialization/ASTReader.cpp
cfe/trunk/lib/Serialization/ASTWriter.cpp
cfe/trunk/test/CodeGen/attributes.c
cfe/trunk/test/CodeGen/cetintrin.c
cfe/trunk/test/CodeGen/x86-cf-protection.c
cfe/trunk/test/Misc/pragma-attribute-supported-attributes-list.test

Modified: cfe/trunk/include/clang/AST/Type.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/AST/Type.h?rev=327768&r1=327767&r2=327768&view=diff
==
--- cfe/trunk/include/clang/AST/Type.h (original)
+++ cfe/trunk/include/clang/AST/Type.h Sat Mar 17 06:31:35 2018
@@ -1511,7 +1511,7 @@ protected:
 
 /// Extra information which affects how the function is called, like
 /// regparm and the calling convention.
-unsigned ExtInfo : 11;
+unsigned ExtInfo : 12;
 
 /// Used only by FunctionProtoType, put here to pack with the
 /// other bitfields.
@@ -3147,24 +3147,24 @@ public:
   class ExtInfo {
 friend class FunctionType;
 
-// Feel free to rearrange or add bits, but if you go over 11,
+// Feel free to rearrange or add bits, but if you go over 12,
 // you'll need to adjust both the Bits field below and
 // Type::FunctionTypeBitfields.
 
-//   |  CC  |noreturn|produces|nocallersavedregs|regparm|
-//   |0 .. 4|   5|6   |   7 |8 .. 10|
+//   |  CC  |noreturn|produces|nocallersavedregs|regparm|nocfcheck|
+//   |0 .. 4|   5|6   |   7 |8 .. 10|11   |
 //
 // regparm is either 0 (no regparm attribute) or the regparm value+1.
 enum { CallConvMask = 0x1F };
 enum { NoReturnMask = 0x20 };
 enum { ProducesResultMask = 0x40 };
 enum { NoCallerSavedRegsMask = 0x80 };
+enum { NoCfCheckMask = 0x800 };
 enum {
   RegParmMask = ~(CallConvMask | NoReturnMask | ProducesResultMask |
-  NoCallerSavedRegsMask),
+  NoCallerSavedRegsMask | NoCfCheckMask),
   RegParmOffset = 8
 }; // Assumed to be the last field
-
 uint16_t Bits = CC_C;
 
 ExtInfo(unsigned Bits) : Bits(static_cast(Bits)) {}
@@ -3173,12 +3173,13 @@ public:
  // Constructor with no defaults. Use this when you know that you
  // have all the elements (when reading an AST file for example).
  ExtInfo(bool noReturn, bool hasRegParm, unsigned regParm, CallingConv cc,
- bool producesResult, bool noCallerSavedRegs) {
+ bool producesResult, bool noCallerSavedRegs, bool NoCfCheck) {
assert((!hasRegParm || regParm < 7) && "Invalid regparm value");
Bits = ((unsigned)cc) | (noReturn ? NoReturnMask : 0) |
   (producesResult ? ProducesResultMask : 0) |
   (noCallerSavedRegs ? NoCallerSavedRegsMask : 0) |
-  (hasRegParm ? ((regParm + 1) << RegParmOffset) : 0);
+  (hasRegParm ? ((regParm + 1) << RegParmOffset) : 0) | 
+  (NoCfCheck ? NoCfCheckMask : 0);
 }
 
 // Constructor with all defaults. Use when for example creating a
@@ -3192,10 +3193,11 @@ public:
 bool getNoReturn() const { return Bits & NoReturnMask; }
 bool getProducesResult() const { return Bits & ProducesResultMask; }
 bool getNoCallerSavedRegs() const { return Bits & NoCallerSavedRegsMask; }
+bool getNoCfCheck() const { return Bits & NoCfCheckMask; }
 bool getHasRegParm() const { return (Bits >> RegParmOffset) != 0; }
 
 unsigned getRegParm() const {
-  unsigned RegParm = Bits >> RegParmOffset;
+  unsigned RegParm = (Bits & RegParmMask) >> RegParmOffset;
   if (RegParm > 0)
 --RegParm;
   return RegParm;
@@ -3234,6 +3236,13 @@ public:
 return ExtInfo(Bits & ~NoCall

[PATCH] D25204: Register Calling Convention, Clang changes

2016-10-05 Thread Oren Ben Simhon via cfe-commits 
oren_ben_simhon added inline comments.


> AttrDocs.td:1267
> +
> +.. _`__regcall`: https://software.intel.com/en-us/node/512847
> +  }];

You might want to use the following link instead because it is most updated: 
https://software.intel.com/en-us/node/693069

> TargetInfo.cpp:3352
>// Keep track of the number of assigned registers.
> -  unsigned freeIntRegs = 6, freeSSERegs = 8;
> +  unsigned freeIntRegs = IsRegCall ? 11 : 6;
> +  unsigned freeSSERegs = IsRegCall ? 16 : 8;

According to the ABI, there are 12 free int regs for windows and 11 free int 
regs for non-windows (linux, OSX, etc). Is that taken into account somewhere?

> TargetInfo.cpp:3732
> +  } else if (IsRegCall) {
> +// RegCall gives us 16 SSE registers total, return or otherwise.
> +FreeSSERegs = 16;

Maybe i misinterpret the comment, but AFAIK, RegCall gives us 16 SSE registers 
for each (return values and passed arguments)

> regcall.c:26
> +void __regcall v3(int a, struct Small b, int c) {}
> +// Win32: define x86_regcallcc void @"\01__regcall3__v3@12"(i32 inreg %a, 
> i32 %b.0, i32 inreg %c)
> +// Win64: define x86_regcallcc void @"\01__regcall3__v3@24"(i32 %a, i32 
> %b.coerce, i32 %c)

I see that expended structures don't get InReg attribute. IMHO, If you know 
that the value should be saved in register then you InReg attribute should be 
added.

https://reviews.llvm.org/D25204



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D25204: Register Calling Convention, Clang changes

2016-10-06 Thread Oren Ben Simhon via cfe-commits 
oren_ben_simhon added inline comments.


> erichkeane wrote in AttrDocs.td:1267
> This has changed 2x since I started this project.  Is there a way to get a 
> STABLE link?  I imagine that much of this documentation is filled with broken 
> links (since MSDN breaks them constantly), but don't really want to add to it.

I am not sure if there is a constant link to the latest and greatest. When i 
contacted the documentation team they pointed me to the latest published 
compiler documention version 16

https://reviews.llvm.org/D25204



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r318995 - Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracking support (Clang side)

2017-11-26 Thread Oren Ben Simhon via cfe-commits 
Author: orenb
Date: Sun Nov 26 04:34:54 2017
New Revision: 318995

URL: http://llvm.org/viewvc/llvm-project?rev=318995&view=rev
Log:
Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracking 
support (Clang side)

Shadow stack solution introduces a new stack for return addresses only.
The stack has a Shadow Stack Pointer (SSP) that points to the last address to 
which we expect to return.
If we return to a different address an exception is triggered.
This patch includes shadow stack intrinsics as well as the corresponding CET 
header.
It includes CET clang flags for shadow stack and Indirect Branch Tracking.

For more information, please see the following:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

Differential Revision: https://reviews.llvm.org/D40224

Change-Id: I79ad0925a028bbc94c8ecad75f6daa2f214171f1

Added:
cfe/trunk/lib/Headers/cetintrin.h
cfe/trunk/test/CodeGen/cetintrin.c
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/include/clang/Basic/BuiltinsX86_64.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/immintrin.h
cfe/trunk/test/CodeGen/builtins-x86.c
cfe/trunk/test/Driver/x86-target-features.c
cfe/trunk/test/Preprocessor/x86_target_features.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=318995&r1=318994&r2=318995&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Sun Nov 26 04:34:54 2017
@@ -638,6 +638,16 @@ TARGET_BUILTIN(__builtin_ia32_xrstors, "
 TARGET_BUILTIN(__builtin_ia32_xsavec, "vv*ULLi", "", "xsavec")
 TARGET_BUILTIN(__builtin_ia32_xsaves, "vv*ULLi", "", "xsaves")
 
+// SHSTK
+TARGET_BUILTIN(__builtin_ia32_incsspd, "vUi", "u", "shstk")
+TARGET_BUILTIN(__builtin_ia32_rdsspd, "UiUi", "Un", "shstk")
+TARGET_BUILTIN(__builtin_ia32_saveprevssp, "v", "", "shstk")
+TARGET_BUILTIN(__builtin_ia32_rstorssp, "vv*", "", "shstk")
+TARGET_BUILTIN(__builtin_ia32_wrssd, "vUiv*", "", "shstk")
+TARGET_BUILTIN(__builtin_ia32_wrussd, "vUiv*", "", "shstk")
+TARGET_BUILTIN(__builtin_ia32_setssbsy, "v", "", "shstk")
+TARGET_BUILTIN(__builtin_ia32_clrssbsy, "vv*", "", "shstk")
+
 //CLFLUSHOPT
 TARGET_BUILTIN(__builtin_ia32_clflushopt, "vvC*", "", "clflushopt")
 

Modified: cfe/trunk/include/clang/Basic/BuiltinsX86_64.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86_64.def?rev=318995&r1=318994&r2=318995&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86_64.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86_64.def Sun Nov 26 04:34:54 2017
@@ -60,6 +60,10 @@ TARGET_BUILTIN(__builtin_ia32_xsaveopt64
 TARGET_BUILTIN(__builtin_ia32_xrstors64, "vv*ULLi", "", "xsaves")
 TARGET_BUILTIN(__builtin_ia32_xsavec64, "vv*ULLi", "", "xsavec")
 TARGET_BUILTIN(__builtin_ia32_xsaves64, "vv*ULLi", "", "xsaves")
+TARGET_BUILTIN(__builtin_ia32_incsspq, "vULLi", "u", "shstk")
+TARGET_BUILTIN(__builtin_ia32_rdsspq, "ULLiULLi", "Un", "shstk")
+TARGET_BUILTIN(__builtin_ia32_wrssq, "vULLiv*", "", "shstk")
+TARGET_BUILTIN(__builtin_ia32_wrussq, "vULLiv*", "", "shstk")
 TARGET_BUILTIN(__builtin_ia32_addcarryx_u64, "UcUcULLiULLiULLi*", "", "adx")
 TARGET_BUILTIN(__builtin_ia32_addcarry_u64, "UcUcULLiULLiULLi*", "", "")
 TARGET_BUILTIN(__builtin_ia32_subborrow_u64, "UcUcULLiULLiULLi*", "", "")

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=318995&r1=318994&r2=318995&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Sun Nov 26 04:34:54 2017
@@ -2537,7 +2537,10 @@ def mxsaveopt : Flag<["-"], "mxsaveopt">
 def mno_xsaveopt : Flag<["-"], "mno-xsaveopt">, Group;
 def mxsaves : Flag<["-"], "mxsaves">, Group;
 def mno_xsaves : Flag<["-"], "mno-xsaves">, Group;
-
+def mshstk : Flag<["-"], "mshstk">, Group;
+def mno_shstk : Flag<["-"], "mno-shstk">, Group;
+def mibt : Flag<["-"], "mibt">, Group;
+def mno_ibt : Flag<["-"], "mno-ibt">, Group;
 
 // These are legacy user-facing driver-level option spellings. They are always
 // aliases for options that are spelled using the more common Unix / GNU flag

Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=318995&r1=318994&r2=318995&view=diff
==
--- cfe/trunk/lib/Basic/Tar

r296296 - [X86] DAZ Macros Relocation

2017-02-26 Thread Oren Ben Simhon via cfe-commits 
Author: orenb
Date: Sun Feb 26 05:58:15 2017
New Revision: 296296

URL: http://llvm.org/viewvc/llvm-project?rev=296296&view=rev
Log:
[X86] DAZ Macros Relocation

The DAZ feature introduces the denormal zero support for x86.
Currently the definitions are located under SSE3 header, however there are some 
SSE2 targets that support the feature as well.

Differential Revision: https://reviews.llvm.org/D30194


Modified:
cfe/trunk/lib/Headers/emmintrin.h
cfe/trunk/lib/Headers/pmmintrin.h

Modified: cfe/trunk/lib/Headers/emmintrin.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/emmintrin.h?rev=296296&r1=296295&r2=296296&view=diff
==
--- cfe/trunk/lib/Headers/emmintrin.h (original)
+++ cfe/trunk/lib/Headers/emmintrin.h Sun Feb 26 05:58:15 2017
@@ -4810,4 +4810,12 @@ void _mm_pause(void);
 
 #define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
 
+#define _MM_DENORMALS_ZERO_ON   (0x0040)
+#define _MM_DENORMALS_ZERO_OFF  (0x)
+
+#define _MM_DENORMALS_ZERO_MASK (0x0040)
+
+#define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
+#define _MM_SET_DENORMALS_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & 
~_MM_DENORMALS_ZERO_MASK) | (x)))
+
 #endif /* __EMMINTRIN_H */

Modified: cfe/trunk/lib/Headers/pmmintrin.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/pmmintrin.h?rev=296296&r1=296295&r2=296296&view=diff
==
--- cfe/trunk/lib/Headers/pmmintrin.h (original)
+++ cfe/trunk/lib/Headers/pmmintrin.h Sun Feb 26 05:58:15 2017
@@ -257,14 +257,6 @@ _mm_movedup_pd(__m128d __a)
   return __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
 }
 
-#define _MM_DENORMALS_ZERO_ON   (0x0040)
-#define _MM_DENORMALS_ZERO_OFF  (0x)
-
-#define _MM_DENORMALS_ZERO_MASK (0x0040)
-
-#define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
-#define _MM_SET_DENORMALS_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & 
~_MM_DENORMALS_ZERO_MASK) | (x)))
-
 /// \brief Establishes a linear address memory range to be monitored and puts
 ///the processor in the monitor event pending state. Data stored in the
 ///monitored address range causes the processor to exit the pending state.


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

r301535 - [X86] Support of no_caller_saved_registers attribute

2017-04-27 Thread Oren Ben Simhon via cfe-commits 
Author: orenb
Date: Thu Apr 27 07:01:00 2017
New Revision: 301535

URL: http://llvm.org/viewvc/llvm-project?rev=301535&view=rev
Log:
[X86] Support of no_caller_saved_registers attribute

Implements the Clang part for no_caller_saved_registers attribute as appears 
here: 
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=5ed3cc7b66af4758f7849ed6f65f4365be8223be.

Differential Revision: https://reviews.llvm.org/D31871

Added:
cfe/trunk/test/CodeGenCXX/attr-x86-no_caller_saved_registers.cpp
cfe/trunk/test/SemaCXX/attr-non-x86-no_caller_saved_registers.cpp
cfe/trunk/test/SemaCXX/attr-x86-no_caller_saved_registers.cpp
Modified:
cfe/trunk/include/clang/AST/Type.h
cfe/trunk/include/clang/Basic/Attr.td
cfe/trunk/include/clang/Basic/AttrDocs.td
cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
cfe/trunk/include/clang/CodeGen/CGFunctionInfo.h
cfe/trunk/include/clang/Sema/Sema.h
cfe/trunk/lib/AST/ASTContext.cpp
cfe/trunk/lib/AST/TypePrinter.cpp
cfe/trunk/lib/CodeGen/CGCall.cpp
cfe/trunk/lib/Sema/SemaDecl.cpp
cfe/trunk/lib/Sema/SemaDeclAttr.cpp
cfe/trunk/lib/Sema/SemaType.cpp
cfe/trunk/lib/Serialization/ASTReader.cpp
cfe/trunk/lib/Serialization/ASTWriter.cpp

Modified: cfe/trunk/include/clang/AST/Type.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/AST/Type.h?rev=301535&r1=301534&r2=301535&view=diff
==
--- cfe/trunk/include/clang/AST/Type.h (original)
+++ cfe/trunk/include/clang/AST/Type.h Thu Apr 27 07:01:00 2017
@@ -1396,7 +1396,7 @@ protected:
 
 /// Extra information which affects how the function is called, like
 /// regparm and the calling convention.
-unsigned ExtInfo : 10;
+unsigned ExtInfo : 11;
 
 /// Used only by FunctionProtoType, put here to pack with the
 /// other bitfields.
@@ -2941,19 +2941,23 @@ class FunctionType : public Type {
   // * AST read and write
   // * Codegen
   class ExtInfo {
-// Feel free to rearrange or add bits, but if you go over 10,
+// Feel free to rearrange or add bits, but if you go over 11,
 // you'll need to adjust both the Bits field below and
 // Type::FunctionTypeBitfields.
 
-//   |  CC  |noreturn|produces|regparm|
-//   |0 .. 4|   5|6   | 7 .. 9|
+//   |  CC  |noreturn|produces|nocallersavedregs|regparm|
+//   |0 .. 4|   5|6   |   7 |8 .. 10|
 //
 // regparm is either 0 (no regparm attribute) or the regparm value+1.
 enum { CallConvMask = 0x1F };
 enum { NoReturnMask = 0x20 };
 enum { ProducesResultMask = 0x40 };
-enum { RegParmMask = ~(CallConvMask | NoReturnMask | ProducesResultMask),
-   RegParmOffset = 7 }; // Assumed to be the last field
+enum { NoCallerSavedRegsMask = 0x80 };
+enum {
+  RegParmMask = ~(CallConvMask | NoReturnMask | ProducesResultMask |
+  NoCallerSavedRegsMask),
+  RegParmOffset = 8
+}; // Assumed to be the last field
 
 uint16_t Bits;
 
@@ -2964,13 +2968,13 @@ class FunctionType : public Type {
public:
 // Constructor with no defaults. Use this when you know that you
 // have all the elements (when reading an AST file for example).
-ExtInfo(bool noReturn, bool hasRegParm, unsigned regParm, CallingConv cc,
-bool producesResult) {
-  assert((!hasRegParm || regParm < 7) && "Invalid regparm value");
-  Bits = ((unsigned) cc) |
- (noReturn ? NoReturnMask : 0) |
- (producesResult ? ProducesResultMask : 0) |
- (hasRegParm ? ((regParm + 1) << RegParmOffset) : 0);
+ ExtInfo(bool noReturn, bool hasRegParm, unsigned regParm, CallingConv cc,
+ bool producesResult, bool noCallerSavedRegs) {
+   assert((!hasRegParm || regParm < 7) && "Invalid regparm value");
+   Bits = ((unsigned)cc) | (noReturn ? NoReturnMask : 0) |
+  (producesResult ? ProducesResultMask : 0) |
+  (noCallerSavedRegs ? NoCallerSavedRegsMask : 0) |
+  (hasRegParm ? ((regParm + 1) << RegParmOffset) : 0);
 }
 
 // Constructor with all defaults. Use when for example creating a
@@ -2983,6 +2987,7 @@ class FunctionType : public Type {
 
 bool getNoReturn() const { return Bits & NoReturnMask; }
 bool getProducesResult() const { return Bits & ProducesResultMask; }
+bool getNoCallerSavedRegs() const { return Bits & NoCallerSavedRegsMask; }
 bool getHasRegParm() const { return (Bits >> RegParmOffset) != 0; }
 unsigned getRegParm() const {
   unsigned RegParm = Bits >> RegParmOffset;
@@ -3016,6 +3021,13 @@ class FunctionType : public Type {
 return ExtInfo(Bits & ~ProducesResultMask);
 }
 
+ExtInfo withNoCallerSavedRegs(bool noCallerSavedRegs) const {
+  if (noCallerSavedRegs)
+return ExtInfo(Bits | NoCallerSavedRegsMask);
+  else
+return ExtInfo(Bits & ~NoCallerSavedRegsMask);
+}
+

r302024 - Reusing an existing attribute diagnostic

2017-05-03 Thread Oren Ben Simhon via cfe-commits 
Author: orenb
Date: Wed May  3 09:05:00 2017
New Revision: 302024

URL: http://llvm.org/viewvc/llvm-project?rev=302024&view=rev
Log:
Reusing an existing attribute diagnostic

In a previous patch, a new generic error diagnostic for inconsistent attributes 
was added.
In this commit I reuse this diagnostic for ns_returns_retained attribute check.

Differential Revision: https://reviews.llvm.org/D32697

Modified:
cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
cfe/trunk/lib/Sema/SemaDecl.cpp
cfe/trunk/test/SemaObjCXX/arc-overloading.mm

Modified: cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td?rev=302024&r1=302023&r2=302024&view=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticSemaKinds.td Wed May  3 09:05:00 
2017
@@ -2820,9 +2820,6 @@ def warn_cconv_structors : Warning<
 def err_regparm_mismatch : Error<"function declared with regparm(%0) "
   "attribute was previously declared "
   "%plural{0:without the regparm|:with the regparm(%1)}1 attribute">;
-def err_returns_retained_mismatch : Error<
-  "function declared with the ns_returns_retained attribute "
-  "was previously declared without the ns_returns_retained attribute">;
 def err_function_attribute_mismatch : Error<
   "function declared with %0 attribute "
   "was previously declared without the %0 attribute">;

Modified: cfe/trunk/lib/Sema/SemaDecl.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaDecl.cpp?rev=302024&r1=302023&r2=302024&view=diff
==
--- cfe/trunk/lib/Sema/SemaDecl.cpp (original)
+++ cfe/trunk/lib/Sema/SemaDecl.cpp Wed May  3 09:05:00 2017
@@ -2951,7 +2951,8 @@ bool Sema::MergeFunctionDecl(FunctionDec
   // Merge ns_returns_retained attribute.
   if (OldTypeInfo.getProducesResult() != NewTypeInfo.getProducesResult()) {
 if (NewTypeInfo.getProducesResult()) {
-  Diag(New->getLocation(), diag::err_returns_retained_mismatch);
+  Diag(New->getLocation(), diag::err_function_attribute_mismatch)
+  << "'ns_returns_retained'";
   Diag(OldLocation, diag::note_previous_declaration);
   return true;
 }

Modified: cfe/trunk/test/SemaObjCXX/arc-overloading.mm
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/SemaObjCXX/arc-overloading.mm?rev=302024&r1=302023&r2=302024&view=diff
==
--- cfe/trunk/test/SemaObjCXX/arc-overloading.mm (original)
+++ cfe/trunk/test/SemaObjCXX/arc-overloading.mm Wed May  3 09:05:00 2017
@@ -199,4 +199,4 @@ class rdar10142572 {
 };
 
 id rdar10142572::f() { return 0; } // okay: merged down
-id __attribute__((ns_returns_retained)) rdar10142572::g() { return 0; } // 
expected-error{{function declared with the ns_returns_retained attribute was 
previously declared without the ns_returns_retained attribute}}
+id __attribute__((ns_returns_retained)) rdar10142572::g() { return 0; } // 
expected-error{{function declared with 'ns_returns_retained' attribute was 
previously declared without the 'ns_returns_retained' attribute}}


___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits