[PATCH] D38366: Fix a warning about casting a const pointer to void*
n.bozhenov created this revision. https://reviews.llvm.org/rL314336 introduced a new compile time warning about casting a const pointer to void*. Because of that the compiler fails to be built with `-Werror` flag. The suggested patch fixes the issue. https://reviews.llvm.org/D38366 Files: clang/lib/AST/ExternalASTMerger.cpp Index: clang/lib/AST/ExternalASTMerger.cpp === --- clang/lib/AST/ExternalASTMerger.cpp +++ clang/lib/AST/ExternalASTMerger.cpp @@ -212,7 +212,7 @@ } if (!DidCallback && LoggingEnabled()) logs() << "(ExternalASTMerger*)" << (void*)this - << " asserting for (DeclContext*)" << (void*)DC + << " asserting for (DeclContext*)" << (const void*)DC << ", (ASTContext*)" << (void*)&Target.AST << "\n"; assert(DidCallback && "Couldn't find a source context matching our DC"); Index: clang/lib/AST/ExternalASTMerger.cpp === --- clang/lib/AST/ExternalASTMerger.cpp +++ clang/lib/AST/ExternalASTMerger.cpp @@ -212,7 +212,7 @@ } if (!DidCallback && LoggingEnabled()) logs() << "(ExternalASTMerger*)" << (void*)this - << " asserting for (DeclContext*)" << (void*)DC + << " asserting for (DeclContext*)" << (const void*)DC << ", (ASTContext*)" << (void*)&Target.AST << "\n"; assert(DidCallback && "Couldn't find a source context matching our DC"); ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D38366: Fix a warning about casting a const pointer to void*
n.bozhenov abandoned this revision. n.bozhenov added a comment. Seems that it has been just fixed by https://reviews.llvm.org/rL314424 :-) Abandoning this review. https://reviews.llvm.org/D38366 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D33356: [Nios2] Changes in frontend to support Nios2 LLVM target
This revision was automatically updated to reflect the committed changes.
Closed by commit rL304994: Frontend support for Nios2 target. (authored by
n.bozhenov).
Changed prior to commit:
https://reviews.llvm.org/D33356?vs=100674&id=101941#toc
Repository:
rL LLVM
https://reviews.llvm.org/D33356
Files:
cfe/trunk/include/clang/Basic/BuiltinsNios2.def
cfe/trunk/include/clang/Basic/TargetBuiltins.h
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
cfe/trunk/test/Driver/nios2-cpu.c
Index: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
===
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
@@ -215,6 +215,21 @@
return "";
}
+static std::string getNios2TargetCPU(const ArgList &Args) {
+ Arg *A = Args.getLastArg(options::OPT_mcpu_EQ);
+ if (!A)
+A = Args.getLastArg(options::OPT_march_EQ);
+
+ if (!A)
+return "";
+
+ const char *name = A->getValue();
+ return llvm::StringSwitch(name)
+ .Case("r1", "nios2r1")
+ .Case("r2", "nios2r2")
+ .Default(name);
+}
+
static std::string getLanaiTargetCPU(const ArgList &Args) {
if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
return A->getValue();
@@ -267,6 +282,10 @@
return A->getValue();
return "";
+ case llvm::Triple::nios2: {
+return getNios2TargetCPU(Args);
+ }
+
case llvm::Triple::mips:
case llvm::Triple::mipsel:
case llvm::Triple::mips64:
Index: cfe/trunk/lib/Basic/Targets.cpp
===
--- cfe/trunk/lib/Basic/Targets.cpp
+++ cfe/trunk/lib/Basic/Targets.cpp
@@ -7702,6 +7702,148 @@
}
};
+class Nios2TargetInfo : public TargetInfo {
+ void setDataLayout() {
+if (BigEndian)
+ resetDataLayout("E-p:32:32:32-i8:8:32-i16:16:32-n32");
+else
+ resetDataLayout("e-p:32:32:32-i8:8:32-i16:16:32-n32");
+ }
+
+ static const Builtin::Info BuiltinInfo[];
+ std::string CPU;
+ std::string ABI;
+
+public:
+ Nios2TargetInfo(const llvm::Triple &triple, const TargetOptions &opts)
+ : TargetInfo(triple), CPU(opts.CPU), ABI(opts.ABI) {
+SizeType = UnsignedInt;
+PtrDiffType = SignedInt;
+MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
+setDataLayout();
+ }
+
+ StringRef getABI() const override { return ABI; }
+ bool setABI(const std::string &Name) override {
+if (Name == "o32" || Name == "eabi") {
+ ABI = Name;
+ return true;
+}
+return false;
+ }
+
+ bool setCPU(const std::string &Name) override {
+if (Name == "nios2r1" || Name == "nios2r2") {
+ CPU = Name;
+ return true;
+}
+return false;
+ }
+
+ void getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const override {
+DefineStd(Builder, "nios2", Opts);
+DefineStd(Builder, "NIOS2", Opts);
+
+Builder.defineMacro("__nios2");
+Builder.defineMacro("__NIOS2");
+Builder.defineMacro("__nios2__");
+Builder.defineMacro("__NIOS2__");
+ }
+
+ ArrayRef getTargetBuiltins() const override {
+return llvm::makeArrayRef(BuiltinInfo, clang::Nios2::LastTSBuiltin -
+ Builtin::FirstTSBuiltin);
+ }
+
+ bool isFeatureSupportedByCPU(StringRef Feature, StringRef CPU) const {
+const bool isR2 = CPU == "nios2r2";
+return llvm::StringSwitch(Feature)
+.Case("nios2r2mandatory", isR2)
+.Case("nios2r2bmx", isR2)
+.Case("nios2r2mpx", isR2)
+.Case("nios2r2cdx", isR2)
+.Default(false);
+ }
+
+ bool initFeatureMap(llvm::StringMap &Features,
+ DiagnosticsEngine &Diags, StringRef CPU,
+ const std::vector &FeatureVec) const override {
+static const char *allFeatures[] = {
+ "nios2r2mandatory", "nios2r2bmx", "nios2r2mpx", "nios2r2cdx"
+};
+for (const char *feature : allFeatures) {
+ Features[feature] = isFeatureSupportedByCPU(feature, CPU);
+}
+return true;
+ }
+
+ bool hasFeature(StringRef Feature) const override {
+return isFeatureSupportedByCPU(Feature, CPU);
+ }
+
+ BuiltinVaListKind getBuiltinVaListKind() const override {
+return TargetInfo::VoidPtrBuiltinVaList;
+ }
+
+ ArrayRef getGCCRegNames() const override {
+static const char *const GCCRegNames[] = {
+ // CPU register names
+ // Must match second column of GCCRegAliases
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
+ "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20",
+ "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30",
+ "r31",
+ // Floating point register names
+ "ctl0", "ctl1", "ctl2", "ctl3", "ctl4", "ctl5", "ctl6", "ctl7", "ctl8",
+ "ctl9", "ctl10", "ctl11", "ctl12", "ctl13", "ctl14", "ctl15"
+};
+return llvm::makeArrayRef(GCCRegNames);
+ }
+
+ bool validateAsm
[PATCH] D36453: [libclang] Fix PR34055 (incompatible update of clang-c/Index.h)
n.bozhenov created this revision. Fixes a regression introduced by r308218. https://reviews.llvm.org/D36453 Files: clang/include/clang-c/Index.h Index: clang/include/clang-c/Index.h === --- clang/include/clang-c/Index.h +++ clang/include/clang-c/Index.h @@ -3206,6 +3206,8 @@ CXCallingConv_X86RegCall = 8, CXCallingConv_IntelOclBicc = 9, CXCallingConv_Win64 = 10, + /* Alias for compatibility with older versions of API. */ + CXCallingConv_X86_64Win64 = CXCallingConv_Win64, CXCallingConv_X86_64SysV = 11, CXCallingConv_X86VectorCall = 12, CXCallingConv_Swift = 13, Index: clang/include/clang-c/Index.h === --- clang/include/clang-c/Index.h +++ clang/include/clang-c/Index.h @@ -3206,6 +3206,8 @@ CXCallingConv_X86RegCall = 8, CXCallingConv_IntelOclBicc = 9, CXCallingConv_Win64 = 10, + /* Alias for compatibility with older versions of API. */ + CXCallingConv_X86_64Win64 = CXCallingConv_Win64, CXCallingConv_X86_64SysV = 11, CXCallingConv_X86VectorCall = 12, CXCallingConv_Swift = 13, ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D36453: [libclang] Fix PR34055 (incompatible update of clang-c/Index.h)
n.bozhenov added a comment. If the patch is accepted, it should also be merged into 5.0, I believe. https://reviews.llvm.org/D36453 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D36453: [libclang] Fix PR34055 (incompatible update of clang-c/Index.h)
n.bozhenov closed this revision. n.bozhenov added a comment. committed r310359 https://reviews.llvm.org/D36453 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D32543: [X86] Clang option -fuse-init-array has no effect when generating for MCU target
This revision was automatically updated to reflect the committed changes.
Closed by commit rL302513: [X86] Clang option -fuse-init-array has no effect
when generating for MCU target (authored by n.bozhenov).
Changed prior to commit:
https://reviews.llvm.org/D32543?vs=97866&id=98262#toc
Repository:
rL LLVM
https://reviews.llvm.org/D32543
Files:
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
llvm/trunk/test/CodeGen/X86/constructor.ll
Index: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
===
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
@@ -87,7 +87,7 @@
if (TT.isOSFreeBSD())
return llvm::make_unique();
- if (TT.isOSLinux() || TT.isOSNaCl())
+ if (TT.isOSLinux() || TT.isOSNaCl() || TT.isOSIAMCU())
return llvm::make_unique();
if (TT.isOSFuchsia())
return llvm::make_unique();
Index: llvm/trunk/test/CodeGen/X86/constructor.ll
===
--- llvm/trunk/test/CodeGen/X86/constructor.ll
+++ llvm/trunk/test/CodeGen/X86/constructor.ll
@@ -3,6 +3,8 @@
; RUN: llc -mtriple x86_64-pc-linux < %s | FileCheck --check-prefix=INIT-ARRAY
%s
; RUN: llc -mtriple x86_64-unknown-freebsd < %s | FileCheck
--check-prefix=INIT-ARRAY %s
; RUN: llc -mtriple x86_64-unknown-nacl < %s | FileCheck --check-prefix=NACL %s
+; RUN: llc -mtriple i586-intel-elfiamcu -use-ctors < %s | FileCheck %s
--check-prefix=MCU-CTORS
+; RUN: llc -mtriple i586-intel-elfiamcu < %s | FileCheck %s
--check-prefix=MCU-INIT-ARRAY
@llvm.global_ctors = appending global [2 x { i32, void ()*, i8* }] [{ i32,
void ()*, i8* } { i32 65535, void ()* @f, i8* null}, { i32, void ()*, i8* } {
i32 15, void ()* @g, i8* @v }]
@v = weak_odr global i8 0
@@ -37,3 +39,6 @@
; NACL-NEXT: .section.init_array,"aw",@init_array
; NACL-NEXT: .p2align2
; NACL-NEXT: .long f
+
+; MCU-CTORS: .section.ctors,"aw",@progbits
+; MCU-INIT-ARRAY:.section.init_array,"aw",@init_array
Index: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
===
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
@@ -87,7 +87,7 @@
if (TT.isOSFreeBSD())
return llvm::make_unique();
- if (TT.isOSLinux() || TT.isOSNaCl())
+ if (TT.isOSLinux() || TT.isOSNaCl() || TT.isOSIAMCU())
return llvm::make_unique();
if (TT.isOSFuchsia())
return llvm::make_unique();
Index: llvm/trunk/test/CodeGen/X86/constructor.ll
===
--- llvm/trunk/test/CodeGen/X86/constructor.ll
+++ llvm/trunk/test/CodeGen/X86/constructor.ll
@@ -3,6 +3,8 @@
; RUN: llc -mtriple x86_64-pc-linux < %s | FileCheck --check-prefix=INIT-ARRAY %s
; RUN: llc -mtriple x86_64-unknown-freebsd < %s | FileCheck --check-prefix=INIT-ARRAY %s
; RUN: llc -mtriple x86_64-unknown-nacl < %s | FileCheck --check-prefix=NACL %s
+; RUN: llc -mtriple i586-intel-elfiamcu -use-ctors < %s | FileCheck %s --check-prefix=MCU-CTORS
+; RUN: llc -mtriple i586-intel-elfiamcu < %s | FileCheck %s --check-prefix=MCU-INIT-ARRAY
@llvm.global_ctors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @f, i8* null}, { i32, void ()*, i8* } { i32 15, void ()* @g, i8* @v }]
@v = weak_odr global i8 0
@@ -37,3 +39,6 @@
; NACL-NEXT: .section .init_array,"aw",@init_array
; NACL-NEXT: .p2align 2
; NACL-NEXT: .long f
+
+; MCU-CTORS: .section.ctors,"aw",@progbits
+; MCU-INIT-ARRAY:.section.init_array,"aw",@init_array
___
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