[clang] [llvm] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (PR #120265)

2025-01-06 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm updated 
https://github.com/llvm/llvm-project/pull/120265

>From 898c30b5b97e80b8bdeb024aec30d0e530d39d42 Mon Sep 17 00:00:00 2001
From: Nick Guy 
Date: Fri, 13 Dec 2024 13:39:24 +
Subject: [PATCH 1/5] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode
 intrinsic

---
 clang/include/clang/Basic/arm_sme.td  |  2 +
 .../sme-intrinsics/acle_sme_state_funs.c  | 38 +++-
 clang/utils/TableGen/SveEmitter.cpp   |  8 +---
 llvm/include/llvm/IR/IntrinsicsAArch64.td |  1 +
 .../Target/AArch64/AArch64ISelLowering.cpp|  9 
 .../CodeGen/AArch64/sme-intrinsics-state.ll   | 44 +++
 6 files changed, 74 insertions(+), 28 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-state.ll

diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index 6b31dec004a1e2..e66a023f998ed4 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -716,6 +716,8 @@ let SMETargetGuard = "sme2" in {
   def SVZERO_ZT : Inst<"svzero_zt", "vi", "", MergeNone, 
"aarch64_sme_zero_zt", [IsOverloadNone, IsStreamingCompatible, IsOutZT0], 
[ImmCheck<0, ImmCheck0_0>]>;
 }
 
+def IN_STREAMING_MODE :  Inst<"in_streaming_mode", "d", "", MergeNone, 
"aarch64_sme_in_streaming_mode", [IsOverloadNone, IsStreamingCompatible], []>;
+
 //
 // lookup table expand four contiguous registers
 //
diff --git a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c 
b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
index 9ba1527f269663..e880f7d7dbacd8 100644
--- a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
+++ b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
@@ -8,19 +8,13 @@
 
 // CHECK-LABEL: @test_in_streaming_mode(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3:[0-9]+]]
-// CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:ret i1 [[TMP0]]
 //
 // CPP-CHECK-LABEL: @_Z22test_in_streaming_modev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() 
#[[ATTR3:[0-9]+]]
-// CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CPP-CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:ret i1 [[TMP0]]
 //
 bool test_in_streaming_mode(void) __arm_streaming_compatible {
   return __arm_in_streaming_mode();
@@ -28,12 +22,12 @@ bool test_in_streaming_mode(void) 
__arm_streaming_compatible {
 
 // CHECK-LABEL: @test_za_disable(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CHECK-NEXT:ret void
 //
 // CPP-CHECK-LABEL: @_Z15test_za_disablev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CPP-CHECK-NEXT:ret void
 //
 void test_za_disable(void) __arm_streaming_compatible {
@@ -42,14 +36,14 @@ void test_za_disable(void) __arm_streaming_compatible {
 
 // CHECK-LABEL: @test_has_sme(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CHECK-NEXT:ret i1 [[TOBOOL_I]]
 //
 // CPP-CHECK-LABEL: @_Z12test_has_smev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
@@ -72,12 +66,12 @@ void test_svundef_za(void) __arm_streaming_compatible 
__arm_out("za") {
 
 // CHECK-LABEL: @test_sc_memcpy(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[CALL:%.*]] = tail call ptr @__arm_sc_memcpy(ptr noundef 
[[DEST:%.*]], ptr noundef [[SRC:%.*]], i64 nound

[clang] [llvm] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (PR #120265)

2025-01-06 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm updated 
https://github.com/llvm/llvm-project/pull/120265

>From 898c30b5b97e80b8bdeb024aec30d0e530d39d42 Mon Sep 17 00:00:00 2001
From: Nick Guy 
Date: Fri, 13 Dec 2024 13:39:24 +
Subject: [PATCH 1/6] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode
 intrinsic

---
 clang/include/clang/Basic/arm_sme.td  |  2 +
 .../sme-intrinsics/acle_sme_state_funs.c  | 38 +++-
 clang/utils/TableGen/SveEmitter.cpp   |  8 +---
 llvm/include/llvm/IR/IntrinsicsAArch64.td |  1 +
 .../Target/AArch64/AArch64ISelLowering.cpp|  9 
 .../CodeGen/AArch64/sme-intrinsics-state.ll   | 44 +++
 6 files changed, 74 insertions(+), 28 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-state.ll

diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index 6b31dec004a1e2..e66a023f998ed4 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -716,6 +716,8 @@ let SMETargetGuard = "sme2" in {
   def SVZERO_ZT : Inst<"svzero_zt", "vi", "", MergeNone, 
"aarch64_sme_zero_zt", [IsOverloadNone, IsStreamingCompatible, IsOutZT0], 
[ImmCheck<0, ImmCheck0_0>]>;
 }
 
+def IN_STREAMING_MODE :  Inst<"in_streaming_mode", "d", "", MergeNone, 
"aarch64_sme_in_streaming_mode", [IsOverloadNone, IsStreamingCompatible], []>;
+
 //
 // lookup table expand four contiguous registers
 //
diff --git a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c 
b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
index 9ba1527f269663..e880f7d7dbacd8 100644
--- a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
+++ b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
@@ -8,19 +8,13 @@
 
 // CHECK-LABEL: @test_in_streaming_mode(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3:[0-9]+]]
-// CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:ret i1 [[TMP0]]
 //
 // CPP-CHECK-LABEL: @_Z22test_in_streaming_modev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() 
#[[ATTR3:[0-9]+]]
-// CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CPP-CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:ret i1 [[TMP0]]
 //
 bool test_in_streaming_mode(void) __arm_streaming_compatible {
   return __arm_in_streaming_mode();
@@ -28,12 +22,12 @@ bool test_in_streaming_mode(void) 
__arm_streaming_compatible {
 
 // CHECK-LABEL: @test_za_disable(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CHECK-NEXT:ret void
 //
 // CPP-CHECK-LABEL: @_Z15test_za_disablev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CPP-CHECK-NEXT:ret void
 //
 void test_za_disable(void) __arm_streaming_compatible {
@@ -42,14 +36,14 @@ void test_za_disable(void) __arm_streaming_compatible {
 
 // CHECK-LABEL: @test_has_sme(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CHECK-NEXT:ret i1 [[TOBOOL_I]]
 //
 // CPP-CHECK-LABEL: @_Z12test_has_smev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
@@ -72,12 +66,12 @@ void test_svundef_za(void) __arm_streaming_compatible 
__arm_out("za") {
 
 // CHECK-LABEL: @test_sc_memcpy(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[CALL:%.*]] = tail call ptr @__arm_sc_memcpy(ptr noundef 
[[DEST:%.*]], ptr noundef [[SRC:%.*]], i64 nound

[clang] [clang] Emit @llvm.assume when we know the streaming mode of the function (PR #121917)

2025-01-07 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm created 
https://github.com/llvm/llvm-project/pull/121917

None

>From 27e9773135d1171c931aaa6b3f8c5f954b658969 Mon Sep 17 00:00:00 2001
From: Nick Guy 
Date: Tue, 7 Jan 2025 11:09:18 +
Subject: [PATCH] [clang] Emit @llvm.assume when we know the streaming mode of
 the function

---
 clang/lib/CodeGen/CGBuiltin.cpp   |  6 
 .../sme-intrinsics/acle_sme_state_funs.c  | 35 ---
 2 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index dcea32969fb990..3765285c58f6ca 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -11335,6 +11335,12 @@ Value 
*CodeGenFunction::EmitAArch64SMEBuiltinExpr(unsigned BuiltinID,
   unsigned SMEAttrs = FPT->getAArch64SMEAttributes();
   if (!(SMEAttrs & FunctionType::SME_PStateSMCompatibleMask)) {
 bool IsStreaming = SMEAttrs & FunctionType::SME_PStateSMEnabledMask;
+// Emit the llvm.assume intrinsic so that called functions can use the
+// streaming mode information discerned here
+Value* call = 
Builder.CreateCall(CGM.getIntrinsic(Builtin->LLVMIntrinsic));
+if (!IsStreaming)
+  call = Builder.CreateNot(call);
+Builder.CreateIntrinsic(Intrinsic::assume, {}, {call});
 return ConstantInt::getBool(Builder.getContext(), IsStreaming);
   }
 }
diff --git a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c 
b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
index 72f2d17fc6dc11..1e630e196fcb66 100644
--- a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
+++ b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
@@ -22,23 +22,32 @@ bool test_in_streaming_mode_streaming_compatible(void) 
__arm_streaming_compatibl
 
 // CHECK-LABEL: @test_in_streaming_mode_streaming(
 // CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP0]])
 // CHECK-NEXT:ret i1 true
 //
 // CPP-CHECK-LABEL: @_Z32test_in_streaming_mode_streamingv(
 // CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP0]])
 // CPP-CHECK-NEXT:ret i1 true
 //
 bool test_in_streaming_mode_streaming(void) __arm_streaming {
-//
   return __arm_in_streaming_mode();
 }
 
 // CHECK-LABEL: @test_in_streaming_mode_non_streaming(
 // CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:[[TMP1:%.*]] = xor i1 [[TMP0]], true
+// CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP1]])
 // CHECK-NEXT:ret i1 false
 //
 // CPP-CHECK-LABEL: @_Z36test_in_streaming_mode_non_streamingv(
 // CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:[[TMP1:%.*]] = xor i1 [[TMP0]], true
+// CPP-CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP1]])
 // CPP-CHECK-NEXT:ret i1 false
 //
 bool test_in_streaming_mode_non_streaming(void) {
@@ -47,12 +56,12 @@ bool test_in_streaming_mode_non_streaming(void) {
 
 // CHECK-LABEL: @test_za_disable(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR7:[0-9]+]]
+// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR8:[0-9]+]]
 // CHECK-NEXT:ret void
 //
 // CPP-CHECK-LABEL: @_Z15test_za_disablev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR7:[0-9]+]]
+// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR8:[0-9]+]]
 // CPP-CHECK-NEXT:ret void
 //
 void test_za_disable(void) __arm_streaming_compatible {
@@ -61,14 +70,14 @@ void test_za_disable(void) __arm_streaming_compatible {
 
 // CHECK-LABEL: @test_has_sme(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR7]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR8]]
 // CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CHECK-NEXT:ret i1 [[TOBOOL_I]]
 //
 // CPP-CHECK-LABEL: @_Z12test_has_smev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR7]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR8]]
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
@@ -91,12 +100,12 @@ void test_svundef_za(void) __arm_streaming_compatible

[clang] [llvm] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (PR #120265)

2025-01-07 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm closed 
https://github.com/llvm/llvm-project/pull/120265
___
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[clang] [clang] Emit @llvm.assume when we know the streaming mode of the function (PR #121917)

2025-01-07 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm updated 
https://github.com/llvm/llvm-project/pull/121917

>From 27e9773135d1171c931aaa6b3f8c5f954b658969 Mon Sep 17 00:00:00 2001
From: Nick Guy 
Date: Tue, 7 Jan 2025 11:09:18 +
Subject: [PATCH 1/2] [clang] Emit @llvm.assume when we know the streaming mode
 of the function

---
 clang/lib/CodeGen/CGBuiltin.cpp   |  6 
 .../sme-intrinsics/acle_sme_state_funs.c  | 35 ---
 2 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index dcea32969fb990..3765285c58f6ca 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -11335,6 +11335,12 @@ Value 
*CodeGenFunction::EmitAArch64SMEBuiltinExpr(unsigned BuiltinID,
   unsigned SMEAttrs = FPT->getAArch64SMEAttributes();
   if (!(SMEAttrs & FunctionType::SME_PStateSMCompatibleMask)) {
 bool IsStreaming = SMEAttrs & FunctionType::SME_PStateSMEnabledMask;
+// Emit the llvm.assume intrinsic so that called functions can use the
+// streaming mode information discerned here
+Value* call = 
Builder.CreateCall(CGM.getIntrinsic(Builtin->LLVMIntrinsic));
+if (!IsStreaming)
+  call = Builder.CreateNot(call);
+Builder.CreateIntrinsic(Intrinsic::assume, {}, {call});
 return ConstantInt::getBool(Builder.getContext(), IsStreaming);
   }
 }
diff --git a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c 
b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
index 72f2d17fc6dc11..1e630e196fcb66 100644
--- a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
+++ b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
@@ -22,23 +22,32 @@ bool test_in_streaming_mode_streaming_compatible(void) 
__arm_streaming_compatibl
 
 // CHECK-LABEL: @test_in_streaming_mode_streaming(
 // CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP0]])
 // CHECK-NEXT:ret i1 true
 //
 // CPP-CHECK-LABEL: @_Z32test_in_streaming_mode_streamingv(
 // CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP0]])
 // CPP-CHECK-NEXT:ret i1 true
 //
 bool test_in_streaming_mode_streaming(void) __arm_streaming {
-//
   return __arm_in_streaming_mode();
 }
 
 // CHECK-LABEL: @test_in_streaming_mode_non_streaming(
 // CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:[[TMP1:%.*]] = xor i1 [[TMP0]], true
+// CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP1]])
 // CHECK-NEXT:ret i1 false
 //
 // CPP-CHECK-LABEL: @_Z36test_in_streaming_mode_non_streamingv(
 // CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:[[TMP1:%.*]] = xor i1 [[TMP0]], true
+// CPP-CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP1]])
 // CPP-CHECK-NEXT:ret i1 false
 //
 bool test_in_streaming_mode_non_streaming(void) {
@@ -47,12 +56,12 @@ bool test_in_streaming_mode_non_streaming(void) {
 
 // CHECK-LABEL: @test_za_disable(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR7:[0-9]+]]
+// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR8:[0-9]+]]
 // CHECK-NEXT:ret void
 //
 // CPP-CHECK-LABEL: @_Z15test_za_disablev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR7:[0-9]+]]
+// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR8:[0-9]+]]
 // CPP-CHECK-NEXT:ret void
 //
 void test_za_disable(void) __arm_streaming_compatible {
@@ -61,14 +70,14 @@ void test_za_disable(void) __arm_streaming_compatible {
 
 // CHECK-LABEL: @test_has_sme(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR7]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR8]]
 // CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CHECK-NEXT:ret i1 [[TOBOOL_I]]
 //
 // CPP-CHECK-LABEL: @_Z12test_has_smev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR7]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR8]]
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
@@ -91,12 +100,12 @@ void test_svundef_za(void) __arm_streaming_compatible

[clang] [clang] Emit @llvm.assume before streaming_compatible functions when the streaming mode is known (PR #121917)

2025-01-07 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm edited 
https://github.com/llvm/llvm-project/pull/121917
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[clang] [clang] Emit @llvm.assume before streaming_compatible functions when the streaming mode is known (PR #121917)

2025-01-07 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm edited 
https://github.com/llvm/llvm-project/pull/121917
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[clang] [clang] Emit @llvm.assume when we know the streaming mode of the function (PR #121917)

2025-01-07 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm edited 
https://github.com/llvm/llvm-project/pull/121917
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[clang] [clang] Emit @llvm.assume when we know the streaming mode of the function (PR #121917)

2025-01-07 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm updated 
https://github.com/llvm/llvm-project/pull/121917

>From 27e9773135d1171c931aaa6b3f8c5f954b658969 Mon Sep 17 00:00:00 2001
From: Nick Guy 
Date: Tue, 7 Jan 2025 11:09:18 +
Subject: [PATCH 1/3] [clang] Emit @llvm.assume when we know the streaming mode
 of the function

---
 clang/lib/CodeGen/CGBuiltin.cpp   |  6 
 .../sme-intrinsics/acle_sme_state_funs.c  | 35 ---
 2 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index dcea32969fb990..3765285c58f6ca 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -11335,6 +11335,12 @@ Value 
*CodeGenFunction::EmitAArch64SMEBuiltinExpr(unsigned BuiltinID,
   unsigned SMEAttrs = FPT->getAArch64SMEAttributes();
   if (!(SMEAttrs & FunctionType::SME_PStateSMCompatibleMask)) {
 bool IsStreaming = SMEAttrs & FunctionType::SME_PStateSMEnabledMask;
+// Emit the llvm.assume intrinsic so that called functions can use the
+// streaming mode information discerned here
+Value* call = 
Builder.CreateCall(CGM.getIntrinsic(Builtin->LLVMIntrinsic));
+if (!IsStreaming)
+  call = Builder.CreateNot(call);
+Builder.CreateIntrinsic(Intrinsic::assume, {}, {call});
 return ConstantInt::getBool(Builder.getContext(), IsStreaming);
   }
 }
diff --git a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c 
b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
index 72f2d17fc6dc11..1e630e196fcb66 100644
--- a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
+++ b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
@@ -22,23 +22,32 @@ bool test_in_streaming_mode_streaming_compatible(void) 
__arm_streaming_compatibl
 
 // CHECK-LABEL: @test_in_streaming_mode_streaming(
 // CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP0]])
 // CHECK-NEXT:ret i1 true
 //
 // CPP-CHECK-LABEL: @_Z32test_in_streaming_mode_streamingv(
 // CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP0]])
 // CPP-CHECK-NEXT:ret i1 true
 //
 bool test_in_streaming_mode_streaming(void) __arm_streaming {
-//
   return __arm_in_streaming_mode();
 }
 
 // CHECK-LABEL: @test_in_streaming_mode_non_streaming(
 // CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:[[TMP1:%.*]] = xor i1 [[TMP0]], true
+// CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP1]])
 // CHECK-NEXT:ret i1 false
 //
 // CPP-CHECK-LABEL: @_Z36test_in_streaming_mode_non_streamingv(
 // CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:[[TMP1:%.*]] = xor i1 [[TMP0]], true
+// CPP-CHECK-NEXT:tail call void @llvm.assume(i1 [[TMP1]])
 // CPP-CHECK-NEXT:ret i1 false
 //
 bool test_in_streaming_mode_non_streaming(void) {
@@ -47,12 +56,12 @@ bool test_in_streaming_mode_non_streaming(void) {
 
 // CHECK-LABEL: @test_za_disable(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR7:[0-9]+]]
+// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR8:[0-9]+]]
 // CHECK-NEXT:ret void
 //
 // CPP-CHECK-LABEL: @_Z15test_za_disablev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR7:[0-9]+]]
+// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR8:[0-9]+]]
 // CPP-CHECK-NEXT:ret void
 //
 void test_za_disable(void) __arm_streaming_compatible {
@@ -61,14 +70,14 @@ void test_za_disable(void) __arm_streaming_compatible {
 
 // CHECK-LABEL: @test_has_sme(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR7]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR8]]
 // CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CHECK-NEXT:ret i1 [[TOBOOL_I]]
 //
 // CPP-CHECK-LABEL: @_Z12test_has_smev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR7]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR8]]
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
@@ -91,12 +100,12 @@ void test_svundef_za(void) __arm_streaming_compatible

[clang] [clang] Emit @llvm.assume when we know the streaming mode of the function (PR #121917)

2025-01-07 Thread Nicholas Guy via cfe-commits 

NickGuy-Arm wrote:

> I really don't see why we'd want to implement the optimization this way; 
> can't we just add an instcombine for calls to 
> `llvm.aarch64.sme.in.streaming.mode`?

If what this patch initially did was our actual goal, then that would be an 
option. However what we want to achieve with this is to make the state of the 
streaming mode known to potentially inlineable called functions, allowing for 
further inlining and identification/removal of dead code. Ive fixed the 
implementation to actually achieve this, and I'll update the description with a 
bit more context

https://github.com/llvm/llvm-project/pull/121917
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[clang] [clang] Emit @llvm.assume when we know the streaming mode of the function (PR #121917)

2025-01-07 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm edited 
https://github.com/llvm/llvm-project/pull/121917
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[clang] [llvm] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (PR #120265)

2024-12-17 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm created 
https://github.com/llvm/llvm-project/pull/120265

None

>From 898c30b5b97e80b8bdeb024aec30d0e530d39d42 Mon Sep 17 00:00:00 2001
From: Nick Guy 
Date: Fri, 13 Dec 2024 13:39:24 +
Subject: [PATCH] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode
 intrinsic

---
 clang/include/clang/Basic/arm_sme.td  |  2 +
 .../sme-intrinsics/acle_sme_state_funs.c  | 38 +++-
 clang/utils/TableGen/SveEmitter.cpp   |  8 +---
 llvm/include/llvm/IR/IntrinsicsAArch64.td |  1 +
 .../Target/AArch64/AArch64ISelLowering.cpp|  9 
 .../CodeGen/AArch64/sme-intrinsics-state.ll   | 44 +++
 6 files changed, 74 insertions(+), 28 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-state.ll

diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index 6b31dec004a1e2..e66a023f998ed4 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -716,6 +716,8 @@ let SMETargetGuard = "sme2" in {
   def SVZERO_ZT : Inst<"svzero_zt", "vi", "", MergeNone, 
"aarch64_sme_zero_zt", [IsOverloadNone, IsStreamingCompatible, IsOutZT0], 
[ImmCheck<0, ImmCheck0_0>]>;
 }
 
+def IN_STREAMING_MODE :  Inst<"in_streaming_mode", "d", "", MergeNone, 
"aarch64_sme_in_streaming_mode", [IsOverloadNone, IsStreamingCompatible], []>;
+
 //
 // lookup table expand four contiguous registers
 //
diff --git a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c 
b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
index 9ba1527f269663..e880f7d7dbacd8 100644
--- a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
+++ b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
@@ -8,19 +8,13 @@
 
 // CHECK-LABEL: @test_in_streaming_mode(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3:[0-9]+]]
-// CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:ret i1 [[TMP0]]
 //
 // CPP-CHECK-LABEL: @_Z22test_in_streaming_modev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() 
#[[ATTR3:[0-9]+]]
-// CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CPP-CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:ret i1 [[TMP0]]
 //
 bool test_in_streaming_mode(void) __arm_streaming_compatible {
   return __arm_in_streaming_mode();
@@ -28,12 +22,12 @@ bool test_in_streaming_mode(void) 
__arm_streaming_compatible {
 
 // CHECK-LABEL: @test_za_disable(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CHECK-NEXT:ret void
 //
 // CPP-CHECK-LABEL: @_Z15test_za_disablev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CPP-CHECK-NEXT:ret void
 //
 void test_za_disable(void) __arm_streaming_compatible {
@@ -42,14 +36,14 @@ void test_za_disable(void) __arm_streaming_compatible {
 
 // CHECK-LABEL: @test_has_sme(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CHECK-NEXT:ret i1 [[TOBOOL_I]]
 //
 // CPP-CHECK-LABEL: @_Z12test_has_smev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
@@ -72,12 +66,12 @@ void test_svundef_za(void) __arm_streaming_compatible 
__arm_out("za") {
 
 // CHECK-LABEL: @test_sc_memcpy(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[CALL:%.*]] = tail call ptr @__arm_sc_memcpy(ptr noundef 
[[DEST:%.*]], ptr noundef [[SRC:%.*]], i64 nou

[clang] [llvm] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (PR #120265)

2024-12-18 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm updated 
https://github.com/llvm/llvm-project/pull/120265

>From 898c30b5b97e80b8bdeb024aec30d0e530d39d42 Mon Sep 17 00:00:00 2001
From: Nick Guy 
Date: Fri, 13 Dec 2024 13:39:24 +
Subject: [PATCH 1/4] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode
 intrinsic

---
 clang/include/clang/Basic/arm_sme.td  |  2 +
 .../sme-intrinsics/acle_sme_state_funs.c  | 38 +++-
 clang/utils/TableGen/SveEmitter.cpp   |  8 +---
 llvm/include/llvm/IR/IntrinsicsAArch64.td |  1 +
 .../Target/AArch64/AArch64ISelLowering.cpp|  9 
 .../CodeGen/AArch64/sme-intrinsics-state.ll   | 44 +++
 6 files changed, 74 insertions(+), 28 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-state.ll

diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index 6b31dec004a1e2..e66a023f998ed4 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -716,6 +716,8 @@ let SMETargetGuard = "sme2" in {
   def SVZERO_ZT : Inst<"svzero_zt", "vi", "", MergeNone, 
"aarch64_sme_zero_zt", [IsOverloadNone, IsStreamingCompatible, IsOutZT0], 
[ImmCheck<0, ImmCheck0_0>]>;
 }
 
+def IN_STREAMING_MODE :  Inst<"in_streaming_mode", "d", "", MergeNone, 
"aarch64_sme_in_streaming_mode", [IsOverloadNone, IsStreamingCompatible], []>;
+
 //
 // lookup table expand four contiguous registers
 //
diff --git a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c 
b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
index 9ba1527f269663..e880f7d7dbacd8 100644
--- a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
+++ b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
@@ -8,19 +8,13 @@
 
 // CHECK-LABEL: @test_in_streaming_mode(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3:[0-9]+]]
-// CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:ret i1 [[TMP0]]
 //
 // CPP-CHECK-LABEL: @_Z22test_in_streaming_modev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() 
#[[ATTR3:[0-9]+]]
-// CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CPP-CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:ret i1 [[TMP0]]
 //
 bool test_in_streaming_mode(void) __arm_streaming_compatible {
   return __arm_in_streaming_mode();
@@ -28,12 +22,12 @@ bool test_in_streaming_mode(void) 
__arm_streaming_compatible {
 
 // CHECK-LABEL: @test_za_disable(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CHECK-NEXT:ret void
 //
 // CPP-CHECK-LABEL: @_Z15test_za_disablev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CPP-CHECK-NEXT:ret void
 //
 void test_za_disable(void) __arm_streaming_compatible {
@@ -42,14 +36,14 @@ void test_za_disable(void) __arm_streaming_compatible {
 
 // CHECK-LABEL: @test_has_sme(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CHECK-NEXT:ret i1 [[TOBOOL_I]]
 //
 // CPP-CHECK-LABEL: @_Z12test_has_smev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
@@ -72,12 +66,12 @@ void test_svundef_za(void) __arm_streaming_compatible 
__arm_out("za") {
 
 // CHECK-LABEL: @test_sc_memcpy(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[CALL:%.*]] = tail call ptr @__arm_sc_memcpy(ptr noundef 
[[DEST:%.*]], ptr noundef [[SRC:%.*]], i64 nound

[clang] [llvm] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (PR #120265)

2024-12-18 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm edited 
https://github.com/llvm/llvm-project/pull/120265
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[clang] [llvm] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (PR #120265)

2024-12-18 Thread Nicholas Guy via cfe-commits 

https://github.com/NickGuy-Arm updated 
https://github.com/llvm/llvm-project/pull/120265

>From 898c30b5b97e80b8bdeb024aec30d0e530d39d42 Mon Sep 17 00:00:00 2001
From: Nick Guy 
Date: Fri, 13 Dec 2024 13:39:24 +
Subject: [PATCH 1/2] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode
 intrinsic

---
 clang/include/clang/Basic/arm_sme.td  |  2 +
 .../sme-intrinsics/acle_sme_state_funs.c  | 38 +++-
 clang/utils/TableGen/SveEmitter.cpp   |  8 +---
 llvm/include/llvm/IR/IntrinsicsAArch64.td |  1 +
 .../Target/AArch64/AArch64ISelLowering.cpp|  9 
 .../CodeGen/AArch64/sme-intrinsics-state.ll   | 44 +++
 6 files changed, 74 insertions(+), 28 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-state.ll

diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index 6b31dec004a1e2..e66a023f998ed4 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -716,6 +716,8 @@ let SMETargetGuard = "sme2" in {
   def SVZERO_ZT : Inst<"svzero_zt", "vi", "", MergeNone, 
"aarch64_sme_zero_zt", [IsOverloadNone, IsStreamingCompatible, IsOutZT0], 
[ImmCheck<0, ImmCheck0_0>]>;
 }
 
+def IN_STREAMING_MODE :  Inst<"in_streaming_mode", "d", "", MergeNone, 
"aarch64_sme_in_streaming_mode", [IsOverloadNone, IsStreamingCompatible], []>;
+
 //
 // lookup table expand four contiguous registers
 //
diff --git a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c 
b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
index 9ba1527f269663..e880f7d7dbacd8 100644
--- a/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
+++ b/clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c
@@ -8,19 +8,13 @@
 
 // CHECK-LABEL: @test_in_streaming_mode(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3:[0-9]+]]
-// CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CHECK-NEXT:ret i1 [[TMP0]]
 //
 // CPP-CHECK-LABEL: @_Z22test_in_streaming_modev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() 
#[[ATTR3:[0-9]+]]
-// CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
-// CPP-CHECK-NEXT:[[AND_I:%.*]] = and i64 [[TMP1]], 1
-// CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp ne i64 [[AND_I]], 0
-// CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call i1 
@llvm.aarch64.sme.in.streaming.mode()
+// CPP-CHECK-NEXT:ret i1 [[TMP0]]
 //
 bool test_in_streaming_mode(void) __arm_streaming_compatible {
   return __arm_in_streaming_mode();
@@ -28,12 +22,12 @@ bool test_in_streaming_mode(void) 
__arm_streaming_compatible {
 
 // CHECK-LABEL: @test_za_disable(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CHECK-NEXT:ret void
 //
 // CPP-CHECK-LABEL: @_Z15test_za_disablev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR3]]
+// CPP-CHECK-NEXT:tail call void @__arm_za_disable() #[[ATTR5:[0-9]+]]
 // CPP-CHECK-NEXT:ret void
 //
 void test_za_disable(void) __arm_streaming_compatible {
@@ -42,14 +36,14 @@ void test_za_disable(void) __arm_streaming_compatible {
 
 // CHECK-LABEL: @test_has_sme(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call aarch64_sme_preservemost_from_x2 { 
i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CHECK-NEXT:ret i1 [[TOBOOL_I]]
 //
 // CPP-CHECK-LABEL: @_Z12test_has_smev(
 // CPP-CHECK-NEXT:  entry:
-// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR3]]
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call 
aarch64_sme_preservemost_from_x2 { i64, i64 } @__arm_sme_state() #[[ATTR5]]
 // CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { i64, i64 } [[TMP0]], 0
 // CPP-CHECK-NEXT:[[TOBOOL_I:%.*]] = icmp slt i64 [[TMP1]], 0
 // CPP-CHECK-NEXT:ret i1 [[TOBOOL_I]]
@@ -72,12 +66,12 @@ void test_svundef_za(void) __arm_streaming_compatible 
__arm_out("za") {
 
 // CHECK-LABEL: @test_sc_memcpy(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[CALL:%.*]] = tail call ptr @__arm_sc_memcpy(ptr noundef 
[[DEST:%.*]], ptr noundef [[SRC:%.*]], i64 nound

[clang] [clang] Emit @llvm.assume before streaming_compatible functions when the streaming mode is known (PR #121917)

2025-01-16 Thread Nicholas Guy via cfe-commits 

NickGuy-Arm wrote:

> The assumption cache mechanism is used by a number of passes...

@efriedma-quic @aemerson ping



> I'm not sure it's correct to mark int_aarch64_sme_in_streaming_mode 
> IntrNoMem...

That's fair, I had mistakenly assumed `IntrNoMem` to mean "I don't touch 
memory". I'll put up a separate PR to change it to use `IntrReadMem` shortly.

https://github.com/llvm/llvm-project/pull/121917
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