[clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)

2024-09-11 Thread Michal Terepeta via cfe-commits 


@@ -44,7 +44,7 @@ ArrayRef RISCVTargetInfo::getGCCRegNames() 
const {
   "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
 
   // CSRs
-  "fflags", "frm", "vtype", "vl", "vxsat", "vxrm"
+  "fflags", "frm", "vtype", "vl", "vxsat", "vxrm", "sf_vcix_state"

michalt wrote:

Should we stay with the `sf_` prefix then? Or is there some simple workaround? 

https://github.com/llvm/llvm-project/pull/106914
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[clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)

2024-09-29 Thread Michal Terepeta via cfe-commits 

michalt wrote:

Thanks everyone! 😄  Is there anything still blocking us from merging this?

https://github.com/llvm/llvm-project/pull/106914
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[clang] [llvm] [RISCV][VCIX] Add vcix_state to GNU inline assembly register set (PR #106914)

2024-09-19 Thread Michal Terepeta via cfe-commits 


@@ -44,7 +44,7 @@ ArrayRef RISCVTargetInfo::getGCCRegNames() 
const {
   "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
 
   // CSRs
-  "fflags", "frm", "vtype", "vl", "vxsat", "vxrm"
+  "fflags", "frm", "vtype", "vl", "vxsat", "vxrm", "sf_vcix_state"

michalt wrote:

@jrtc27 @kito-cheng Friendly ping 🙂 

https://github.com/llvm/llvm-project/pull/106914
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