[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-09-04 Thread Malay Sanghi via cfe-commits


@@ -0,0 +1,115 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-linux -mattr=+avx10.2-256 | FileCheck %s 
--check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx10.2-256 | FileCheck %s 
--check-prefix=X64
+
+;
+; 32-bit float to signed integer
+;
+
+declare  i32 @llvm.fptosi.sat.i32.f32 (float)
+declare  i64 @llvm.fptosi.sat.i64.f32 (float)

MalaySanghi wrote:

This will be a follow-up change. Mappings from public intrinsic to new ISA for 
vector types are not a part of this PR.

https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-09-04 Thread Malay Sanghi via cfe-commits


@@ -2122,6 +2122,36 @@ TARGET_BUILTIN(__builtin_ia32_vpdpwuud256, 
"V8iV8iV8iV8i", "nV:256:", "avxvnniin
 TARGET_BUILTIN(__builtin_ia32_vpdpwuuds128, "V4iV4iV4iV4i", "nV:128:", 
"avxvnniint16|avx10.2-256")
 TARGET_BUILTIN(__builtin_ia32_vpdpwuuds256, "V8iV8iV8iV8i", "nV:256:", 
"avxvnniint16|avx10.2-256")
 
+// AVX10.2 SATCVT-DS
+TARGET_BUILTIN(__builtin_ia32_vcvttssd2si32, "iV2dIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttssd2usi32, "UiV2dIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttsss2si32, "iV4fIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttsss2usi32, "UiV4fIi", "ncV:128:", 
"avx10.2-256")

MalaySanghi wrote:

Since the regular/unsaturated converts do not follow the sis32/usis32 
convention, should we skip this?

https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-09-04 Thread Malay Sanghi via cfe-commits


@@ -2122,6 +2122,36 @@ TARGET_BUILTIN(__builtin_ia32_vpdpwuud256, 
"V8iV8iV8iV8i", "nV:256:", "avxvnniin
 TARGET_BUILTIN(__builtin_ia32_vpdpwuuds128, "V4iV4iV4iV4i", "nV:128:", 
"avxvnniint16|avx10.2-256")
 TARGET_BUILTIN(__builtin_ia32_vpdpwuuds256, "V8iV8iV8iV8i", "nV:256:", 
"avxvnniint16|avx10.2-256")
 
+// AVX10.2 SATCVT-DS
+TARGET_BUILTIN(__builtin_ia32_vcvttssd2si32, "iV2dIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttssd2usi32, "UiV2dIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttsss2si32, "iV4fIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttsss2usi32, "UiV4fIi", "ncV:128:", 
"avx10.2-256")

MalaySanghi wrote:

okay. I misunderstood the reason behind the original comment.  I'm making this 
change

https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-09-04 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi deleted 
https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-09-06 Thread Malay Sanghi via cfe-commits


@@ -0,0 +1,443 @@
+/*===--- avx10_2satcvtdsintrin.h - AVX512SATCVTDS intrinsics 
===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===---===
+ */
+
+#ifndef __IMMINTRIN_H
+#error 
\
+"Never use  directly; include  
instead."
+#endif // __IMMINTRIN_H
+
+#ifndef __AVX10_2SATCVTDSINTRIN_H
+#define __AVX10_2SATCVTDSINTRIN_H
+
+/* Define the default attributes for the functions in this file. */
+#define __DEFAULT_FN_ATTRS 
\

MalaySanghi wrote:

I don't need the 128 version. So removing that and retaining this name

https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-09-09 Thread Malay Sanghi via cfe-commits


@@ -0,0 +1,443 @@
+/*===--- avx10_2satcvtdsintrin.h - AVX512SATCVTDS intrinsics 
===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===---===
+ */
+
+#ifndef __IMMINTRIN_H
+#error 
\
+"Never use  directly; include  
instead."
+#endif // __IMMINTRIN_H
+
+#ifndef __AVX10_2SATCVTDSINTRIN_H
+#define __AVX10_2SATCVTDSINTRIN_H
+
+/* Define the default attributes for the functions in this file. */
+#define __DEFAULT_FN_ATTRS 
\

MalaySanghi wrote:

done

https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support saturated converts (PR #102592)

2024-08-09 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

@phoebewang @KanRobert please review

https://github.com/llvm/llvm-project/pull/102592
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[clang] Revert "[X86] Add support for MS inp functions." (PR #95890)

2024-06-18 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi created 
https://github.com/llvm/llvm-project/pull/95890

Reverts llvm/llvm-project#93804
Revert commit 089dfeee8a8761c35a3a56e75281275871dd53bc. The original request 
can be fulfilled with alternative __inbyte/__inword/__indword

>From 1d96bd439d4631d0ff9d7005f27b770ce1d80a21 Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Tue, 18 Jun 2024 12:37:19 +0530
Subject: [PATCH] Revert "[X86] Add support for MS inp functions. (#93804)"

This reverts commit 089dfeee8a8761c35a3a56e75281275871dd53bc.
---
 clang/lib/Headers/intrin.h | 19 
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 25 --
 2 files changed, 44 deletions(-)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 1227f45d5432b..5ceb986a1f652 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,25 +329,6 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
-
-static inline int _inp(unsigned short port) {
-  int ret;
-  __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
-  return ret;
-}
-
-static inline unsigned short _inpw(unsigned short port) {
-  unsigned short ret;
-  __asm__ volatile("inw %w1, %w0" : "=a"(ret) : "Nd"(port));
-  return ret;
-}
-
-static inline unsigned long _inpd(unsigned short port) {
-  unsigned long ret;
-  __asm__ volatile("inl %w1, %k0" : "=a"(ret) : "Nd"(port));
-  return ret;
-}
-
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index 9566951b44d2d..aa557c8e19a83 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,31 +63,6 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
-
-int test_inp(unsigned short port) {
-  return _inp(port);
-}
-// CHECK-LABEL: i32 @test_inp(i16 noundef
-// CHECK-SAME:  [[PORT:%.*]])
-// CHECK:   [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:w}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-NEXT:  ret i32 [[TMP0]]
-
-unsigned short test_inpw(unsigned short port) {
-  return _inpw(port);
-}
-// CHECK-LABEL: i16 @test_inpw(i16 noundef
-// CHECK-SAME:  [[PORT:%.*]])
-// CHECK:   [[TMP0:%.*]] = tail call i16 asm sideeffect "inw ${1:w}, 
${0:w}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-NEXT:  ret i16 [[TMP0]]
-
-unsigned long test_inpd(unsigned short port) {
-  return _inpd(port);
-}
-// CHECK-LABEL: i32 @test_inpd(i16 noundef
-// CHECK-SAME:  [[PORT:%.*]])
-// CHECK:   [[TMP0:%.*]] = tail call i32 asm sideeffect "inl ${1:w}, 
${0:k}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-NEXT:  ret i32 [[TMP0]]
-
 #if defined(__x86_64__)
 
 char test__readgsbyte(unsigned long Offset) {

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[clang] Revert "[X86] Add support for MS inp functions." (PR #95890)

2024-06-18 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

@phoebewang please review and revert

https://github.com/llvm/llvm-project/pull/95890
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-06-18 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi closed 
https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-06-18 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

Closing. The original request can be fulfilled with 
__outbyte/__outword/__outdword

https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-06-18 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi reopened 
https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-06-19 Thread Malay Sanghi via cfe-commits


@@ -348,6 +348,20 @@ static inline unsigned long _inpd(unsigned short port) {
   return ret;
 }
 
+static inline int _outp(unsigned short port, int data) {

MalaySanghi wrote:

There's 2 differences between _outp and __outbyte.

First, the newer intrinsics don't return a value. 

Second, __outbyte signature is

```
void __outbyte(
   unsigned short Port,
   unsigned char Data
);
```

Note that the second input is unsigned char instead of int. This is likely 
because _outp is supposed to write a byte.

Other than that, I have verified that renaming to __outbyte works and is 
functionally equivalent. 
When lowered via microsoft's cl, the asm is identical.

https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-06-19 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93774

>From 17c3fc95c0753ec013b22ce0c539992b24b21055 Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Wed, 29 May 2024 22:40:47 -0700
Subject: [PATCH 1/4] Add support for _outp{|w|d}

---
 clang/lib/Headers/intrin.h | 17 +++
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 25 +-
 2 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 1227f45d5432b..b9d10a6941271 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -348,6 +348,23 @@ static inline unsigned long _inpd(unsigned short port) {
   return ret;
 }
 
+static inline int _outp(unsigned short port, int data) {
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static inline unsigned short
+_outpw(unsigned short port, unsigned short data) {
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static inline unsigned long _outpd(unsigned short port,
+   unsigned long data) {
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index 9566951b44d2d..79fa7028d8e05 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,7 +63,6 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) {
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
-
 int test_inp(unsigned short port) {
   return _inp(port);
 }
@@ -88,6 +87,30 @@ unsigned long test_inpd(unsigned short port) {
 // CHECK:   [[TMP0:%.*]] = tail call i32 asm sideeffect "inl ${1:w}, 
${0:k}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
 // CHECK-NEXT:  ret i32 [[TMP0]]
 
+int test_outp(unsigned short port, int data) {
+return _outp(port, data);
+}
+// CHECK-LABEL: i32 @test_outp(
+// CHECK-SAME:  [[PORT:%.*]], i32 noundef returned [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]
+// CHECK-NEXT:  ret i32 [[DATA]]
+
+unsigned short test_outpw(unsigned short port, unsigned short data) {
+return _outpw(port, data);
+}
+// CHECK-LABEL: i16 @test_outpw(
+// CHECK-SAME:  [[PORT:%.*]], i16 noundef returned zeroext [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]])
+// CHECK-NEXT:  ret i16 [[DATA]]
+
+unsigned long test_outpd(unsigned short port, unsigned long data) {
+return _outpd(port, data);
+}
+// CHECK-LABEL: i32 @test_outpd(
+// CHECK-SAME:  [[PORT:%.*]], i32 noundef returned [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outl ${0:k}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]])
+// CHECK-NEXT:  ret i32 [[DATA]]
+
 #if defined(__x86_64__)
 
 char test__readgsbyte(unsigned long Offset) {

>From f0f4675c6ef13655a089d78bada9f55bb9ce5123 Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 30 May 2024 00:01:45 -0700
Subject: [PATCH 2/4] remove memory constraint and fix definition.

---
 clang/lib/Headers/intrin.h | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index b9d10a6941271..92c7aa134c36d 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -349,25 +349,22 @@ static inline unsigned long _inpd(unsigned short port) {
 }
 
 static inline int _outp(unsigned short port, int data) {
-  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
 static inline unsigned short
 _outpw(unsigned short port, unsigned short data) {
-  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
 static inline unsigned long _outpd(unsigned short port,
unsigned long data) {
-  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
-#endif
-
-#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
 static __inline__ void __DEFAULT_FN_ATTRS __nop(void) {
   __asm__ volatile("nop");
 }

>From 794872bf7fc0ccbe9f2842f8624803f199d1a72f Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Fri, 31 May 2024 01:06:11 -0700
Subject: [PATCH 3/4] merge checks

---
 clang/lib/Headers/intrin.h |  8 
 clang/test

[clang] [X86]Add support for __outbyte/word/dword and __inbyte/word/dword (PR #93774)

2024-06-19 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi edited 
https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for __outbyte/word/dword and __inbyte/word/dword (PR #93774)

2024-06-19 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi edited 
https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for __outbyte/word/dword and __inbyte/word/dword (PR #93774)

2024-06-20 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93774

>From 17c3fc95c0753ec013b22ce0c539992b24b21055 Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Wed, 29 May 2024 22:40:47 -0700
Subject: [PATCH 1/5] Add support for _outp{|w|d}

---
 clang/lib/Headers/intrin.h | 17 +++
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 25 +-
 2 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 1227f45d5432b..b9d10a6941271 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -348,6 +348,23 @@ static inline unsigned long _inpd(unsigned short port) {
   return ret;
 }
 
+static inline int _outp(unsigned short port, int data) {
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static inline unsigned short
+_outpw(unsigned short port, unsigned short data) {
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static inline unsigned long _outpd(unsigned short port,
+   unsigned long data) {
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index 9566951b44d2d..79fa7028d8e05 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,7 +63,6 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) {
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
-
 int test_inp(unsigned short port) {
   return _inp(port);
 }
@@ -88,6 +87,30 @@ unsigned long test_inpd(unsigned short port) {
 // CHECK:   [[TMP0:%.*]] = tail call i32 asm sideeffect "inl ${1:w}, 
${0:k}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
 // CHECK-NEXT:  ret i32 [[TMP0]]
 
+int test_outp(unsigned short port, int data) {
+return _outp(port, data);
+}
+// CHECK-LABEL: i32 @test_outp(
+// CHECK-SAME:  [[PORT:%.*]], i32 noundef returned [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]
+// CHECK-NEXT:  ret i32 [[DATA]]
+
+unsigned short test_outpw(unsigned short port, unsigned short data) {
+return _outpw(port, data);
+}
+// CHECK-LABEL: i16 @test_outpw(
+// CHECK-SAME:  [[PORT:%.*]], i16 noundef returned zeroext [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]])
+// CHECK-NEXT:  ret i16 [[DATA]]
+
+unsigned long test_outpd(unsigned short port, unsigned long data) {
+return _outpd(port, data);
+}
+// CHECK-LABEL: i32 @test_outpd(
+// CHECK-SAME:  [[PORT:%.*]], i32 noundef returned [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outl ${0:k}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]])
+// CHECK-NEXT:  ret i32 [[DATA]]
+
 #if defined(__x86_64__)
 
 char test__readgsbyte(unsigned long Offset) {

>From f0f4675c6ef13655a089d78bada9f55bb9ce5123 Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 30 May 2024 00:01:45 -0700
Subject: [PATCH 2/5] remove memory constraint and fix definition.

---
 clang/lib/Headers/intrin.h | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index b9d10a6941271..92c7aa134c36d 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -349,25 +349,22 @@ static inline unsigned long _inpd(unsigned short port) {
 }
 
 static inline int _outp(unsigned short port, int data) {
-  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
 static inline unsigned short
 _outpw(unsigned short port, unsigned short data) {
-  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
 static inline unsigned long _outpd(unsigned short port,
unsigned long data) {
-  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
-#endif
-
-#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
 static __inline__ void __DEFAULT_FN_ATTRS __nop(void) {
   __asm__ volatile("nop");
 }

>From 794872bf7fc0ccbe9f2842f8624803f199d1a72f Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Fri, 31 May 2024 01:06:11 -0700
Subject: [PATCH 3/5] merge checks

---
 clang/lib/Headers/intrin.h |  8 
 clang/test

[clang] Revert "[X86] Add support for MS inp functions." (PR #95890)

2024-06-20 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi closed 
https://github.com/llvm/llvm-project/pull/95890
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[clang] Add support for _outp{|w|d} (PR #93774)

2024-05-29 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi created 
https://github.com/llvm/llvm-project/pull/93774

Supported: outp, outpw, _outp, _outpw, _outpd
These functions were removed from the Windows runtime library, but for kernel 
mode development it's still supported

>From 38359132ea0b3b56900ba48827c86a93c017223a Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Wed, 29 May 2024 22:40:47 -0700
Subject: [PATCH] Add support for _outp{|w|d}

---
 clang/lib/Headers/intrin.h | 20 +
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 85 ++
 2 files changed, 105 insertions(+)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..21a3f030216e6 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,26 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static __inline__ int __DEFAULT_FN_ATTRS _outp(unsigned short port, int data) {
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned short __DEFAULT_FN_ATTRS
+_outpw(unsigned short port, unsigned short data) {
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned long __DEFAULT_FN_ATTRS _outpd(unsigned short port,
+  unsigned long data) {
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+#define outp(port, data) _outp(port, data)
+#define outpw(R, D) _outpw(port, data)
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..e990ccd3449ac 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,91 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR3:[0-9]+]], !srcloc [[META4:![0-9]+]]
+// CHECK-I386-NEXT:ret i32 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR5:[0-9]+]], !srcloc [[META3:![0-9]+]]
+// CHECK-X64-NEXT:ret i32 [[DATA]]
+//
+int test_outp(unsigned short port, int data) {
+return _outp(port, data);
+}
+
+//
+// CHECK-I386-LABEL: define dso_local noundef zeroext i16 @test_outpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i16 noundef returned 
zeroext [[DATA:%.*]]) local_unnamed_addr #[[ATTR2]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]]) 
#[[ATTR3]], !srcloc [[META5:![0-9]+]]
+// CHECK-I386-NEXT:ret i16 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i16 @test_outpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i16 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]]) 
#[[ATTR5]], !srcloc [[META4:![0-9]+]]
+// CHECK-X64-NEXT:ret i16 [[DATA]]
+//
+unsigned short test_outpw(unsigned short port, unsigned short data) {
+return _outpw(port, data);
+}
+
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR2]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outl ${0:k}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR3]], !srcloc [[META6:![0-9]+]]
+// CHECK-I386-NEXT:ret i32 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i32 @test_outpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outl ${0:k}, ${1:w}", 

[clang] Add support for _outp{|w|d} (PR #93774)

2024-05-29 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

@FreddyLeaf @phoebewang please review

https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-05-29 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi edited 
https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-05-29 Thread Malay Sanghi via cfe-commits


@@ -329,6 +329,26 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static __inline__ int __DEFAULT_FN_ATTRS _outp(unsigned short port, int data) {
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned short __DEFAULT_FN_ATTRS
+_outpw(unsigned short port, unsigned short data) {
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned long __DEFAULT_FN_ATTRS _outpd(unsigned short port,
+  unsigned long data) {
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+#define outp(port, data) _outp(port, data)
+#define outpw(R, D) _outpw(port, data)

MalaySanghi wrote:

No, ms does not define one: 
https://learn.microsoft.com/en-us/cpp/c-runtime-library/outp-outpw-outpd?view=msvc-170

https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-05-30 Thread Malay Sanghi via cfe-commits


@@ -329,6 +329,26 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static __inline__ int __DEFAULT_FN_ATTRS _outp(unsigned short port, int data) {
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned short __DEFAULT_FN_ATTRS
+_outpw(unsigned short port, unsigned short data) {
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned long __DEFAULT_FN_ATTRS _outpd(unsigned short port,
+  unsigned long data) {
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+#define outp(port, data) _outp(port, data)
+#define outpw(R, D) _outpw(port, data)

MalaySanghi wrote:

I also seem to have made a mistake here.. the params for outpw are supposed to 
be port and data. Will fix

https://github.com/llvm/llvm-project/pull/93774
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93774

>From 38359132ea0b3b56900ba48827c86a93c017223a Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Wed, 29 May 2024 22:40:47 -0700
Subject: [PATCH 1/2] Add support for _outp{|w|d}

---
 clang/lib/Headers/intrin.h | 20 +
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 85 ++
 2 files changed, 105 insertions(+)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..21a3f030216e6 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,26 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static __inline__ int __DEFAULT_FN_ATTRS _outp(unsigned short port, int data) {
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned short __DEFAULT_FN_ATTRS
+_outpw(unsigned short port, unsigned short data) {
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned long __DEFAULT_FN_ATTRS _outpd(unsigned short port,
+  unsigned long data) {
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+#define outp(port, data) _outp(port, data)
+#define outpw(R, D) _outpw(port, data)
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..e990ccd3449ac 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,91 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR3:[0-9]+]], !srcloc [[META4:![0-9]+]]
+// CHECK-I386-NEXT:ret i32 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR5:[0-9]+]], !srcloc [[META3:![0-9]+]]
+// CHECK-X64-NEXT:ret i32 [[DATA]]
+//
+int test_outp(unsigned short port, int data) {
+return _outp(port, data);
+}
+
+//
+// CHECK-I386-LABEL: define dso_local noundef zeroext i16 @test_outpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i16 noundef returned 
zeroext [[DATA:%.*]]) local_unnamed_addr #[[ATTR2]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]]) 
#[[ATTR3]], !srcloc [[META5:![0-9]+]]
+// CHECK-I386-NEXT:ret i16 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i16 @test_outpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i16 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]]) 
#[[ATTR5]], !srcloc [[META4:![0-9]+]]
+// CHECK-X64-NEXT:ret i16 [[DATA]]
+//
+unsigned short test_outpw(unsigned short port, unsigned short data) {
+return _outpw(port, data);
+}
+
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR2]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outl ${0:k}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR3]], !srcloc [[META6:![0-9]+]]
+// CHECK-I386-NEXT:ret i32 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i32 @test_outpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outl ${0:k}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR5]], !srcloc [[META5:![0-9]+]]
+// CHECK-X64-NEXT:ret i32 [[DATA]]
+/

[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93774

>From 38359132ea0b3b56900ba48827c86a93c017223a Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Wed, 29 May 2024 22:40:47 -0700
Subject: [PATCH 1/3] Add support for _outp{|w|d}

---
 clang/lib/Headers/intrin.h | 20 +
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 85 ++
 2 files changed, 105 insertions(+)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..21a3f030216e6 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,26 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static __inline__ int __DEFAULT_FN_ATTRS _outp(unsigned short port, int data) {
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned short __DEFAULT_FN_ATTRS
+_outpw(unsigned short port, unsigned short data) {
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static __inline__ unsigned long __DEFAULT_FN_ATTRS _outpd(unsigned short port,
+  unsigned long data) {
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+#define outp(port, data) _outp(port, data)
+#define outpw(R, D) _outpw(port, data)
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..e990ccd3449ac 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,91 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR3:[0-9]+]], !srcloc [[META4:![0-9]+]]
+// CHECK-I386-NEXT:ret i32 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR5:[0-9]+]], !srcloc [[META3:![0-9]+]]
+// CHECK-X64-NEXT:ret i32 [[DATA]]
+//
+int test_outp(unsigned short port, int data) {
+return _outp(port, data);
+}
+
+//
+// CHECK-I386-LABEL: define dso_local noundef zeroext i16 @test_outpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i16 noundef returned 
zeroext [[DATA:%.*]]) local_unnamed_addr #[[ATTR2]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]]) 
#[[ATTR3]], !srcloc [[META5:![0-9]+]]
+// CHECK-I386-NEXT:ret i16 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i16 @test_outpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i16 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]]) 
#[[ATTR5]], !srcloc [[META4:![0-9]+]]
+// CHECK-X64-NEXT:ret i16 [[DATA]]
+//
+unsigned short test_outpw(unsigned short port, unsigned short data) {
+return _outpw(port, data);
+}
+
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR2]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outl ${0:k}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR3]], !srcloc [[META6:![0-9]+]]
+// CHECK-I386-NEXT:ret i32 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i32 @test_outpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outl ${0:k}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR5]], !srcloc [[META5:![0-9]+]]
+// CHECK-X64-NEXT:ret i32 [[DATA]]
+/

[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-05-30 Thread Malay Sanghi via cfe-commits


@@ -63,6 +63,91 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
+// CHECK-I386-NEXT:  [[ENTRY:.*:]]
+// CHECK-I386-NEXT:tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR3:[0-9]+]], !srcloc [[META4:![0-9]+]]
+// CHECK-I386-NEXT:ret i32 [[DATA]]
+//
+// CHECK-X64-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]], i32 noundef returned 
[[DATA:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
+// CHECK-X64-NEXT:  [[ENTRY:.*:]]
+// CHECK-X64-NEXT:tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]) 
#[[ATTR5:[0-9]+]], !srcloc [[META3:![0-9]+]]
+// CHECK-X64-NEXT:ret i32 [[DATA]]
+//

MalaySanghi wrote:

updated

https://github.com/llvm/llvm-project/pull/93774
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[clang] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi created 
https://github.com/llvm/llvm-project/pull/93804

support _inp, _inpw, _inpd, inp, inpw.
These functions were removed from the Windows runtime library, but aare still 
supported for kernel mode development.

>From de79bf75b68825440b939f030e1d659d26f3d2ea Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 30 May 2024 01:39:41 -0700
Subject: [PATCH] Add support for MS inp functions.

support _inp, _inpw, _inpd, inp, inpw.
These functions were removed from the Windows runtime library, but aare still 
supported for kernel mode development.
---
 clang/lib/Headers/intrin.h | 22 +++
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 76 ++
 2 files changed, 98 insertions(+)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..67a062d2166b0 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,28 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static inline int _inp(unsigned short port) {
+  int ret;
+  __asm__ volatile("inb %b1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned short _inpw(unsigned short port) {
+  unsigned short ret;
+  __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned long _inpd(unsigned short port) {
+  unsigned long ret;
+  __asm__ volatile("inb %k1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+#define inp(port) _inp((port))
+#define inpw(port) _inpw((port))
+
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..c51f2d53ca771 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw(unsigned short port) {
+  return _inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb 
${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i16 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i16 @test_inpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i16 [[TMP0]]
+
+unsigned long test_inpd(unsigned short port) {
+  return _inpd(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+int test_inp2(unsigned short port) {
+  return inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp2(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp2(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i

[clang] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

This could probably have been a part of 
https://github.com/llvm/llvm-project/pull/93774 . If that's preferred, I'll add 
this change as a new commit to that PR.

https://github.com/llvm/llvm-project/pull/93804
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[clang] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

tag @phoebewang @FreddyLeaf @RKSimon for review


https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi edited 
https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits


@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])

MalaySanghi wrote:

No, I had tried that. A variable (PORT in this case) is not allowed in 
CHECK-LABEL

https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits


@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]

MalaySanghi wrote:

Note that the 32b case has a zeroext but the 64b case doesn't

https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93804

>From de79bf75b68825440b939f030e1d659d26f3d2ea Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 30 May 2024 01:39:41 -0700
Subject: [PATCH 1/2] Add support for MS inp functions.

support _inp, _inpw, _inpd, inp, inpw.
These functions were removed from the Windows runtime library, but aare still 
supported for kernel mode development.
---
 clang/lib/Headers/intrin.h | 22 +++
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 76 ++
 2 files changed, 98 insertions(+)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..67a062d2166b0 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,28 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static inline int _inp(unsigned short port) {
+  int ret;
+  __asm__ volatile("inb %b1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned short _inpw(unsigned short port) {
+  unsigned short ret;
+  __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned long _inpd(unsigned short port) {
+  unsigned long ret;
+  __asm__ volatile("inb %k1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+#define inp(port) _inp((port))
+#define inpw(port) _inpw((port))
+
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..c51f2d53ca771 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw(unsigned short port) {
+  return _inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb 
${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i16 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i16 @test_inpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i16 [[TMP0]]
+
+unsigned long test_inpd(unsigned short port) {
+  return _inpd(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+int test_inp2(unsigned short port) {
+  return inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp2(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp2(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw2(unsigned short port) {
+  return inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw2(
+

[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits


@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]

MalaySanghi wrote:

Updated

https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93804

>From de79bf75b68825440b939f030e1d659d26f3d2ea Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 30 May 2024 01:39:41 -0700
Subject: [PATCH 1/3] Add support for MS inp functions.

support _inp, _inpw, _inpd, inp, inpw.
These functions were removed from the Windows runtime library, but aare still 
supported for kernel mode development.
---
 clang/lib/Headers/intrin.h | 22 +++
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 76 ++
 2 files changed, 98 insertions(+)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..67a062d2166b0 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,28 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static inline int _inp(unsigned short port) {
+  int ret;
+  __asm__ volatile("inb %b1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned short _inpw(unsigned short port) {
+  unsigned short ret;
+  __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned long _inpd(unsigned short port) {
+  unsigned long ret;
+  __asm__ volatile("inb %k1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+#define inp(port) _inp((port))
+#define inpw(port) _inpw((port))
+
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..c51f2d53ca771 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw(unsigned short port) {
+  return _inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb 
${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i16 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i16 @test_inpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i16 [[TMP0]]
+
+unsigned long test_inpd(unsigned short port) {
+  return _inpd(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+int test_inp2(unsigned short port) {
+  return inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp2(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp2(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw2(unsigned short port) {
+  return inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw2(
+

[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits


@@ -329,6 +329,28 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static inline int _inp(unsigned short port) {
+  int ret;
+  __asm__ volatile("inb %b1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned short _inpw(unsigned short port) {
+  unsigned short ret;
+  __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));

MalaySanghi wrote:

Thanks for spotting this. I Forgot to update opcode after pasting.

https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93804

>From de79bf75b68825440b939f030e1d659d26f3d2ea Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 30 May 2024 01:39:41 -0700
Subject: [PATCH 1/4] Add support for MS inp functions.

support _inp, _inpw, _inpd, inp, inpw.
These functions were removed from the Windows runtime library, but aare still 
supported for kernel mode development.
---
 clang/lib/Headers/intrin.h | 22 +++
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 76 ++
 2 files changed, 98 insertions(+)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..67a062d2166b0 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,28 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static inline int _inp(unsigned short port) {
+  int ret;
+  __asm__ volatile("inb %b1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned short _inpw(unsigned short port) {
+  unsigned short ret;
+  __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned long _inpd(unsigned short port) {
+  unsigned long ret;
+  __asm__ volatile("inb %k1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+#define inp(port) _inp((port))
+#define inpw(port) _inpw((port))
+
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..c51f2d53ca771 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw(unsigned short port) {
+  return _inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb 
${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i16 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i16 @test_inpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i16 [[TMP0]]
+
+unsigned long test_inpd(unsigned short port) {
+  return _inpd(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+int test_inp2(unsigned short port) {
+  return inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp2(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp2(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw2(unsigned short port) {
+  return inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw2(
+

[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits


@@ -63,6 +63,47 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-LABEL: i32 @test_inp(i16 noundef
+// CHECK-SAME:  [[PORT:%.*]])
+// CHECK:   [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-NEXT:  ret i32 [[TMP0]]
+
+unsigned short test_inpw(unsigned short port) {
+  return _inpw(port);
+}
+// CHECK-LABEL: i16 @test_inpw(i16 noundef
+// CHECK-SAME:  [[PORT:%.*]])
+// CHECK:   [[TMP0:%.*]] = tail call i16 asm sideeffect "inw ${1:w}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-NEXT:  ret i16 [[TMP0]]
+
+unsigned long test_inpd(unsigned short port) {
+  return _inpd(port);
+}
+// CHECK-LABEL: i32 @test_inpd(i16 noundef
+// CHECK-SAME:  [[PORT:%.*]])
+// CHECK:   [[TMP0:%.*]] = tail call i32 asm sideeffect "inl ${1:k}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])

MalaySanghi wrote:

In llvm-IR this remain ax. 
There were other issues which I fixed. I had only tested the outp end-end and 
modelled this after the outp intrinsic. I've tested this end-end now.
```
_ind(port)
```
becomes
```
%0 = tail call i32 asm sideeffect "inl ${1:w}, ${0:k}", 
"={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 %port) #3, !srcloc !6
```
and eventually
```
inl %dx, %eax
```

https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits


@@ -329,6 +329,28 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static inline int _inp(unsigned short port) {
+  int ret;
+  __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned short _inpw(unsigned short port) {
+  unsigned short ret;
+  __asm__ volatile("inw %w1, %w0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned long _inpd(unsigned short port) {
+  unsigned long ret;
+  __asm__ volatile("inl %w1, %k0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+#define inp(port) _inp((port))
+#define inpw(port) _inpw((port))

MalaySanghi wrote:

I don't have a strong preference. I can remove them

https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93804

>From de79bf75b68825440b939f030e1d659d26f3d2ea Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 30 May 2024 01:39:41 -0700
Subject: [PATCH 1/5] Add support for MS inp functions.

support _inp, _inpw, _inpd, inp, inpw.
These functions were removed from the Windows runtime library, but aare still 
supported for kernel mode development.
---
 clang/lib/Headers/intrin.h | 22 +++
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 76 ++
 2 files changed, 98 insertions(+)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..67a062d2166b0 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,28 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned 
__int64 *__dst,
 static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
   __asm__ volatile("hlt");
 }
+
+static inline int _inp(unsigned short port) {
+  int ret;
+  __asm__ volatile("inb %b1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned short _inpw(unsigned short port) {
+  unsigned short ret;
+  __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+static inline unsigned long _inpd(unsigned short port) {
+  unsigned long ret;
+  __asm__ volatile("inb %k1, %b0" : "=a"(ret) : "Nd"(port));
+  return ret;
+}
+
+#define inp(port) _inp((port))
+#define inpw(port) _inpw((port))
+
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..c51f2d53ca771 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) 
{
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
+
+int test_inp(unsigned short port) {
+  return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw(unsigned short port) {
+  return _inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb 
${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i16 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i16 @test_inpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i16 [[TMP0]]
+
+unsigned long test_inpd(unsigned short port) {
+  return _inpd(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+int test_inp2(unsigned short port) {
+  return inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp2(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT:  entry:
+// CHECK-I386-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb 
${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT:ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp2(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT:  entry:
+// CHECK-X64-NEXT:[[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, 
${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT:ret i32 [[TMP0]]
+
+unsigned short test_inpw2(unsigned short port) {
+  return inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw2(
+

[clang] [X86] Add support for MS inp functions. (PR #93804)

2024-05-30 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi edited 
https://github.com/llvm/llvm-project/pull/93804
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[clang] [X86]Add support for _outp{|w|d} (PR #93774)

2024-05-31 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi updated 
https://github.com/llvm/llvm-project/pull/93774

>From 17c3fc95c0753ec013b22ce0c539992b24b21055 Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Wed, 29 May 2024 22:40:47 -0700
Subject: [PATCH 1/3] Add support for _outp{|w|d}

---
 clang/lib/Headers/intrin.h | 17 +++
 clang/test/CodeGen/X86/ms-x86-intrinsics.c | 25 +-
 2 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 1227f45d5432b..b9d10a6941271 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -348,6 +348,23 @@ static inline unsigned long _inpd(unsigned short port) {
   return ret;
 }
 
+static inline int _outp(unsigned short port, int data) {
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static inline unsigned short
+_outpw(unsigned short port, unsigned short data) {
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
+static inline unsigned long _outpd(unsigned short port,
+   unsigned long data) {
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  return data;
+}
+
 #endif
 
 #if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c 
b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index 9566951b44d2d..79fa7028d8e05 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,7 +63,6 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) {
 // CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
 // CHECK: ret i64 [[RES]]
 
-
 int test_inp(unsigned short port) {
   return _inp(port);
 }
@@ -88,6 +87,30 @@ unsigned long test_inpd(unsigned short port) {
 // CHECK:   [[TMP0:%.*]] = tail call i32 asm sideeffect "inl ${1:w}, 
${0:k}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
 // CHECK-NEXT:  ret i32 [[TMP0]]
 
+int test_outp(unsigned short port, int data) {
+return _outp(port, data);
+}
+// CHECK-LABEL: i32 @test_outp(
+// CHECK-SAME:  [[PORT:%.*]], i32 noundef returned [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outb ${0:b}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]]
+// CHECK-NEXT:  ret i32 [[DATA]]
+
+unsigned short test_outpw(unsigned short port, unsigned short data) {
+return _outpw(port, data);
+}
+// CHECK-LABEL: i16 @test_outpw(
+// CHECK-SAME:  [[PORT:%.*]], i16 noundef returned zeroext [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outw ${0:w}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i16 [[DATA]], i16 [[PORT]])
+// CHECK-NEXT:  ret i16 [[DATA]]
+
+unsigned long test_outpd(unsigned short port, unsigned long data) {
+return _outpd(port, data);
+}
+// CHECK-LABEL: i32 @test_outpd(
+// CHECK-SAME:  [[PORT:%.*]], i32 noundef returned [[DATA:%.*]])
+// CHECK-NEXT:  tail call void asm sideeffect "outl ${0:k}, ${1:w}", 
"{ax},N{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 [[DATA]], i16 [[PORT]])
+// CHECK-NEXT:  ret i32 [[DATA]]
+
 #if defined(__x86_64__)
 
 char test__readgsbyte(unsigned long Offset) {

>From f0f4675c6ef13655a089d78bada9f55bb9ce5123 Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 30 May 2024 00:01:45 -0700
Subject: [PATCH 2/3] remove memory constraint and fix definition.

---
 clang/lib/Headers/intrin.h | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index b9d10a6941271..92c7aa134c36d 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -349,25 +349,22 @@ static inline unsigned long _inpd(unsigned short port) {
 }
 
 static inline int _outp(unsigned short port, int data) {
-  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outb %b0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
 static inline unsigned short
 _outpw(unsigned short port, unsigned short data) {
-  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outw %w0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
 static inline unsigned long _outpd(unsigned short port,
unsigned long data) {
-  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port) : "memory");
+  __asm__ volatile("outl %k0, %w1" : : "a"(data), "Nd"(port));
   return data;
 }
 
-#endif
-
-#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
 static __inline__ void __DEFAULT_FN_ATTRS __nop(void) {
   __asm__ volatile("nop");
 }

>From 794872bf7fc0ccbe9f2842f8624803f199d1a72f Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Fri, 31 May 2024 01:06:11 -0700
Subject: [PATCH 3/3] merge checks

---
 clang/lib/Headers/intrin.h |  8 
 clang/test

[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-08-26 Thread Malay Sanghi via cfe-commits


@@ -2122,6 +2122,36 @@ TARGET_BUILTIN(__builtin_ia32_vpdpwuud256, 
"V8iV8iV8iV8i", "nV:256:", "avxvnniin
 TARGET_BUILTIN(__builtin_ia32_vpdpwuuds128, "V4iV4iV4iV4i", "nV:128:", 
"avxvnniint16|avx10.2-256")
 TARGET_BUILTIN(__builtin_ia32_vpdpwuuds256, "V8iV8iV8iV8i", "nV:256:", 
"avxvnniint16|avx10.2-256")
 
+// AVX10.2 SATCVT-DS
+TARGET_BUILTIN(__builtin_ia32_vcvttssd2si32, "iV2dIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttssd2usi32, "UiV2dIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttsss2si32, "iV4fIi", "ncV:128:", 
"avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvttsss2usi32, "UiV4fIi", "ncV:128:", 
"avx10.2-256")

MalaySanghi wrote:

I don't mind using sis32. I modelled these after the existing converts, and 
they don't use it.

TARGET_BUILTIN(__builtin_ia32_vcvtss2si32, "iV4fIi", "ncV:128:", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vcvtss2usi32, "UiV4fIi", "ncV:128:", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vcvttsd2si32, "iV2dIi", "ncV:128:", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vcvttsd2usi32, "UiV2dIi", "ncV:128:", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vcvttss2si32, "iV4fIi", "ncV:128:", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vcvttss2usi32, "UiV4fIi", "ncV:128:", "avx512f")


https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-08-27 Thread Malay Sanghi via cfe-commits


@@ -45,6 +45,14 @@ bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, 
CallExpr *TheCall) {
   case X86::BI__builtin_ia32_vcvttsh2si64:

MalaySanghi wrote:

@phoebewang These don't have sis32/64 either.
I'm not sure what is the convention here.

https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-08-27 Thread Malay Sanghi via cfe-commits


@@ -0,0 +1,806 @@
+/*===--- avx10_2satcvtdsintrin.h - AVX512SATCVTDS intrinsics 
===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===---===
+ */
+
+#ifndef __IMMINTRIN_H
+#error 
\
+"Never use  directly; include  
instead."
+#endif // __IMMINTRIN_H
+
+#ifndef __AVX10_2SATCVTDSINTRIN_H
+#define __AVX10_2SATCVTDSINTRIN_H
+
+/* Define the default attributes for the functions in this file. */
+#define __DEFAULT_FN_ATTRS 
\
+  __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"),
\
+ __min_vector_width__(256)))
+
+#define __DEFAULT_FN_ATTRS128  
\
+  __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"),
\
+ __min_vector_width__(128)))
+
+#define _mm_cvtts_roundsd_i32(A, R)
\
+  ((int)__builtin_ia32_vcvttssd2si32((__v2df)(__m128)(A), (const int)(R)))
+
+#define _mm_cvtts_roundsd_si32(A, R)   
\
+  ((int)__builtin_ia32_vcvttssd2si32((__v2df)(__m128d)(A), (const int)(R)))
+   (const int)(R)))
+
+#define _mm_cvtts_roundsd_u32(A, R)   \

MalaySanghi wrote:

This formatting looks weird, but this was generated by git-clang-format

https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-09-13 Thread Malay Sanghi via cfe-commits


@@ -0,0 +1,52 @@
+// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s 
-triple=i386-unknown-unknown -target-feature +avx10.2-512 -emit-llvm -Wall 
-Werror -verify

MalaySanghi wrote:

Hi,
Thanks for bringing this to my notice. I'll send a patch next week

https://github.com/llvm/llvm-project/pull/102592
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[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

2024-09-13 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi edited 
https://github.com/llvm/llvm-project/pull/102592
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[clang] [X86][test] Avoid writing to a potentially write-protected dir (PR #108525)

2024-09-15 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi closed 
https://github.com/llvm/llvm-project/pull/108525
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[clang] [X86][test] Avoid writing to a potentially write-protected dir (PR #108525)

2024-09-15 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

> I have submitted it as 
> [a41bb71](https://github.com/llvm/llvm-project/commit/a41bb71f2216cef08ab04f1d730ae1701c145f3c)
>  (with 3 files). Sorry for the race, but I want it working :)

Apologies for missing that file and thanks for taking this up.

https://github.com/llvm/llvm-project/pull/108525
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[clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)

2024-11-06 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi created 
https://github.com/llvm/llvm-project/pull/115151

Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368

>From 3b6510da8fb3b9709839ea0c102355879b11aa6d Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Tue, 5 Nov 2024 13:37:54 +0800
Subject: [PATCH 1/2] [X86][AMX] Support AMX-MOVRS

Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
---
 clang/include/clang/Basic/BuiltinsX86_64.def  |  14 ++
 clang/include/clang/Driver/Options.td |   2 +
 clang/lib/Basic/Targets/X86.cpp   |   6 +
 clang/lib/Basic/Targets/X86.h |   1 +
 clang/lib/CodeGen/CGBuiltin.cpp   |  18 +-
 clang/lib/Headers/CMakeLists.txt  |   1 +
 clang/lib/Headers/amxmovrsintrin.h|  48 +
 clang/lib/Headers/amxtransposeintrin.h| 177 ++
 clang/lib/Headers/immintrin.h |   4 +
 clang/lib/Sema/SemaX86.cpp|   6 +
 clang/test/CodeGen/X86/amx_movrs.c|  25 +++
 clang/test/CodeGen/X86/amx_movrs_api.c|  34 
 clang/test/CodeGen/X86/amx_movrs_errors.c |  14 ++
 clang/test/CodeGen/X86/amx_movrs_tranpose.c   |  53 ++
 .../test/CodeGen/X86/amx_movrs_tranpose_api.c |  81 
 .../CodeGen/X86/amx_movrs_transpose_errors.c  |  22 +++
 llvm/include/llvm/IR/IntrinsicsX86.td |  48 +
 llvm/lib/Target/X86/X86.td|   3 +
 llvm/lib/Target/X86/X86ExpandPseudo.cpp   |  35 
 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp   | 109 ++-
 llvm/lib/Target/X86/X86ISelLowering.cpp   |  81 
 llvm/lib/Target/X86/X86InstrAMX.td|  91 +
 llvm/lib/Target/X86/X86InstrInfo.cpp  |   1 +
 llvm/lib/Target/X86/X86InstrPredicates.td |   1 +
 llvm/lib/Target/X86/X86LowerAMXType.cpp   |   8 +-
 llvm/lib/Target/X86/X86RegisterInfo.cpp   |  10 +-
 llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll | 108 +++
 .../X86/amx_movrs_transpose_intrinsics.ll |  92 +
 .../Disassembler/X86/AMX/x86-64-amx-movrs.txt |  98 ++
 llvm/test/MC/X86/AMX/x86-64-amx-movrs-att.s   |  89 +
 llvm/test/MC/X86/AMX/x86-64-amx-movrs-intel.s |  97 ++
 31 files changed, 1371 insertions(+), 6 deletions(-)
 create mode 100644 clang/lib/Headers/amxmovrsintrin.h
 create mode 100755 clang/test/CodeGen/X86/amx_movrs.c
 create mode 100755 clang/test/CodeGen/X86/amx_movrs_api.c
 create mode 100755 clang/test/CodeGen/X86/amx_movrs_errors.c
 create mode 100755 clang/test/CodeGen/X86/amx_movrs_tranpose.c
 create mode 100755 clang/test/CodeGen/X86/amx_movrs_tranpose_api.c
 create mode 100755 clang/test/CodeGen/X86/amx_movrs_transpose_errors.c
 create mode 100755 llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
 create mode 100755 llvm/test/CodeGen/X86/amx_movrs_transpose_intrinsics.ll
 create mode 100755 llvm/test/MC/Disassembler/X86/AMX/x86-64-amx-movrs.txt
 create mode 100755 llvm/test/MC/X86/AMX/x86-64-amx-movrs-att.s
 create mode 100755 llvm/test/MC/X86/AMX/x86-64-amx-movrs-intel.s

diff --git a/clang/include/clang/Basic/BuiltinsX86_64.def 
b/clang/include/clang/Basic/BuiltinsX86_64.def
index d95e8455a304b6..98235023bddc7b 100644
--- a/clang/include/clang/Basic/BuiltinsX86_64.def
+++ b/clang/include/clang/Basic/BuiltinsX86_64.def
@@ -117,7 +117,9 @@ TARGET_BUILTIN(__builtin_ia32_uwrmsr, "vULLiULLi", "n", 
"usermsr")
 // AMX internal builtin
 TARGET_BUILTIN(__builtin_ia32_tile_loadconfig_internal, "vvC*", "n", 
"amx-tile")
 TARGET_BUILTIN(__builtin_ia32_tileloadd64_internal, "V256iUsUsvC*z", "n", 
"amx-tile")
+TARGET_BUILTIN(__builtin_ia32_tileloaddrs64_internal, "V256iUsUsvC*z", "n", 
"amx-movrs")
 TARGET_BUILTIN(__builtin_ia32_tileloaddt164_internal, "V256iUsUsvC*z", "n", 
"amx-tile")
+TARGET_BUILTIN(__builtin_ia32_tileloaddrst164_internal, "V256iUsUsvC*z", "n", 
"amx-movrs")
 TARGET_BUILTIN(__builtin_ia32_tdpbssd_internal, "V256iUsUsUsV256iV256iV256i", 
"n", "amx-int8")
 TARGET_BUILTIN(__builtin_ia32_tdpbsud_internal, "V256iUsUsUsV256iV256iV256i", 
"n", "amx-int8")
 TARGET_BUILTIN(__builtin_ia32_tdpbusd_internal, "V256iUsUsUsV256iV256iV256i", 
"n", "amx-int8")
@@ -129,15 +131,27 @@ TARGET_BUILTIN(__builtin_ia32_tdpfp16ps_internal, 
"V256iUsUsUsV256iV256iV256i",
 TARGET_BUILTIN(__builtin_ia32_tcmmimfp16ps_internal, 
"V256iUsUsUsV256iV256iV256i", "n", "amx-complex")
 TARGET_BUILTIN(__builtin_ia32_tcmmrlfp16ps_internal, 
"V256iUsUsUsV256iV256iV256i", "n", "amx-complex")
 TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0_internal, "vUsUsUsV256i*V256i*vC*z", 
"n", "amx-transpose")
+TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0rs_internal, 
"vUsUsUsV256i*V256i*vC*z", "n", "amx-movrs,amx-transpose")
 TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0t1_internal, 
"vUsUsUsV256i*V256i*vC*z", "n", "amx-transpose")
+TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz0rst1_internal, 
"vUsUsUsV256i*V256i*vC*z", "n", "amx-movrs,amx-transpose")
 TARGET_BUILTIN(__builtin_ia32_t2rpntlvwz1_internal, "vUsUsUsV256i*V256i*vC*z", 
"n", "amx-trans

[clang] [llvm] [X86][AMX] Support AMX-MOVRS (PR #115151)

2024-11-06 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

@phoebewang 
please review

https://github.com/llvm/llvm-project/pull/115151
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[clang] [llvm] [X86][MOVRS] Support MOVRS (PR #116181)

2024-11-14 Thread Malay Sanghi via cfe-commits

https://github.com/MalaySanghi created 
https://github.com/llvm/llvm-project/pull/116181

Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368

>From 9b41bfbb54fd1225b3bb3325d2fc1c4ad57f50e3 Mon Sep 17 00:00:00 2001
From: Malay Sanghi 
Date: Thu, 14 Nov 2024 13:52:34 +0800
Subject: [PATCH] [X86][AMX] Support MOVRS

Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
---
 .icslock  |  0
 clang/docs/ReleaseNotes.rst   |  1 +
 clang/include/clang/Basic/BuiltinsX86.def |  3 +
 clang/include/clang/Basic/BuiltinsX86_64.def  |  6 ++
 clang/lib/Headers/CMakeLists.txt  |  1 +
 clang/lib/Headers/immintrin.h |  4 +
 clang/lib/Headers/movrsintrin.h   | 59 +++
 clang/test/CodeGen/X86/movrs-builtins.c   | 35 +++
 llvm/include/llvm/IR/IntrinsicsX86.td | 17 
 llvm/lib/Target/X86/X86DiscriminateMemOps.cpp |  3 +-
 llvm/lib/Target/X86/X86InstrMisc.td   | 24 +
 llvm/test/CodeGen/X86/movrs-builtins.ll   | 46 +
 .../CodeGen/X86/movrs-prefetch-builtins.ll| 14 +++
 llvm/test/MC/Disassembler/X86/movrs.txt   | 98 +++
 .../MC/Disassembler/X86/prefetchrst2-32.txt   | 26 +
 .../MC/Disassembler/X86/prefetchrst2-64.txt   | 26 +
 llvm/test/MC/X86/movrs-att-64.s   | 97 ++
 llvm/test/MC/X86/movrs-intel-64.s | 97 ++
 llvm/test/MC/X86/prefetchrst2-att-32.s| 25 +
 llvm/test/MC/X86/prefetchrst2-att-64.s| 25 +
 llvm/test/MC/X86/prefetchrst2-intel-32.s  | 25 +
 llvm/test/MC/X86/prefetchrst2-intel-64.s  | 25 +
 22 files changed, 656 insertions(+), 1 deletion(-)
 create mode 100644 .icslock
 create mode 100644 clang/lib/Headers/movrsintrin.h
 create mode 100644 clang/test/CodeGen/X86/movrs-builtins.c
 create mode 100644 llvm/test/CodeGen/X86/movrs-builtins.ll
 create mode 100644 llvm/test/CodeGen/X86/movrs-prefetch-builtins.ll
 create mode 100644 llvm/test/MC/Disassembler/X86/movrs.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/prefetchrst2-32.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/prefetchrst2-64.txt
 create mode 100644 llvm/test/MC/X86/movrs-att-64.s
 create mode 100644 llvm/test/MC/X86/movrs-intel-64.s
 create mode 100644 llvm/test/MC/X86/prefetchrst2-att-32.s
 create mode 100644 llvm/test/MC/X86/prefetchrst2-att-64.s
 create mode 100644 llvm/test/MC/X86/prefetchrst2-intel-32.s
 create mode 100644 llvm/test/MC/X86/prefetchrst2-intel-64.s

diff --git a/.icslock b/.icslock
new file mode 100644
index 00..e69de29bb2d1d6
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 3fc275b528d215..78ba70c624d18c 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -752,6 +752,7 @@ X86 Support
 - Support ISA of ``AMX-MOVRS``.
 - Support ISA of ``AMX-AVX512``.
 - Support ISA of ``AMX-TF32``.
+- Support ISA of ``MOVRS``.
 
 Arm and AArch64 Support
 ^^^
diff --git a/clang/include/clang/Basic/BuiltinsX86.def 
b/clang/include/clang/Basic/BuiltinsX86.def
index c93ea27f164e34..352b3a9ec594a7 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -660,6 +660,9 @@ TARGET_BUILTIN(__builtin_ia32_vpdpbuud256, "V8iV8iV8iV8i", 
"ncV:256:", "avxvnnii
 TARGET_BUILTIN(__builtin_ia32_vpdpbuuds128, "V4iV4iV4iV4i", "ncV:128:", 
"avxvnniint8|avx10.2-256")
 TARGET_BUILTIN(__builtin_ia32_vpdpbuuds256, "V8iV8iV8iV8i", "ncV:256:", 
"avxvnniint8|avx10.2-256")
 
+// MOVRS
+TARGET_BUILTIN(__builtin_ia32_prefetchrs, "vvC*", "nc", "movrs")
+
 TARGET_BUILTIN(__builtin_ia32_gather3div2df, "V2dV2dvC*V2OiUcIi", "nV:128:", 
"avx512vl")
 TARGET_BUILTIN(__builtin_ia32_gather3div2di, "V2OiV2OivC*V2OiUcIi", "nV:128:", 
"avx512vl")
 TARGET_BUILTIN(__builtin_ia32_gather3div4df, "V4dV4dvC*V4OiUcIi", "nV:256:", 
"avx512vl")
diff --git a/clang/include/clang/Basic/BuiltinsX86_64.def 
b/clang/include/clang/Basic/BuiltinsX86_64.def
index 8979ae9724b046..01caf338f8ef21 100644
--- a/clang/include/clang/Basic/BuiltinsX86_64.def
+++ b/clang/include/clang/Basic/BuiltinsX86_64.def
@@ -216,6 +216,12 @@ TARGET_BUILTIN(__builtin_ia32_aand64, "vv*SOi", "n", 
"raoint")
 TARGET_BUILTIN(__builtin_ia32_aor64, "vv*SOi", "n", "raoint")
 TARGET_BUILTIN(__builtin_ia32_axor64, "vv*SOi", "n", "raoint")
 
+// MOVRS
+TARGET_BUILTIN(__builtin_ia32_movrsqi, "ScvC*", "n", "movrs")
+TARGET_BUILTIN(__builtin_ia32_movrshi, "SsvC*", "n", "movrs")
+TARGET_BUILTIN(__builtin_ia32_movrssi, "SivC*", "n", "movrs")
+TARGET_BUILTIN(__builtin_ia32_movrsdi, "SLLivC*", "n", "movrs")
+
 // MOVRS and AVX10.2
 TARGET_BUILTIN(__builtin_ia32_vmovrsb128, "V16cV16cC*", "nV:128:", 
"movrs,avx10.2-256")
 TARGET_BUILTIN(__builtin_ia32_vmovrsb256, "V32cV32cC*", "nV:256:", 
"movrs,avx10.2-256")
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index 7227df93edece4..a6704edf589fa9 100644
--- a/clan

[clang] [llvm] [X86][MOVRS] Support MOVRS (PR #116181)

2024-11-14 Thread Malay Sanghi via cfe-commits

MalaySanghi wrote:

@phoebewang please review

https://github.com/llvm/llvm-project/pull/116181
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[clang] [llvm] [X86][MOVRS] Support MOVRS (PR #116181)

2024-11-14 Thread Malay Sanghi via cfe-commits




MalaySanghi wrote:

Apologies, this escaped my notice. Thanks phoebe for fixing this

https://github.com/llvm/llvm-project/pull/116181
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