[clang] [RISCV][Clang] Added builtin support for experimental Zimop extension (PR #79971)

2024-03-06 Thread Lyut Nersisyan via cfe-commits 

https://github.com/ln8-8 updated https://github.com/llvm/llvm-project/pull/79971

>From a2a37921c83511796e051520c887092a3f58a3ba Mon Sep 17 00:00:00 2001
From: ln8-8 
Date: Tue, 30 Jan 2024 13:02:22 +0400
Subject: [PATCH 1/3] [RISCV][Clang] Added builtin support for experimental
 Zimop extension

This change adds builtin of mop.r.[n] and mop.rr.[n] instructions for Zimop 
extension based on 
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md.
---
 clang/include/clang/Basic/BuiltinsRISCV.def   |   7 ++
 clang/lib/CodeGen/CGBuiltin.cpp   |  14 +++
 clang/lib/Sema/SemaChecking.cpp   |   8 ++
 .../test/CodeGen/RISCV/rvb-intrinsics/zimop.c | 105 ++
 4 files changed, 134 insertions(+)
 create mode 100644 clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c

diff --git a/clang/include/clang/Basic/BuiltinsRISCV.def 
b/clang/include/clang/Basic/BuiltinsRISCV.def
index 1528b18c82eade..7e2dda21830c5f 100644
--- a/clang/include/clang/Basic/BuiltinsRISCV.def
+++ b/clang/include/clang/Basic/BuiltinsRISCV.def
@@ -89,5 +89,12 @@ TARGET_BUILTIN(__builtin_riscv_sm3p1, "UiUi", "nc", "zksh")
 TARGET_BUILTIN(__builtin_riscv_ntl_load, "v.", "t", "zihintntl")
 TARGET_BUILTIN(__builtin_riscv_ntl_store, "v.", "t", "zihintntl")
 
+// Zimop extension
+TARGET_BUILTIN(__builtin_riscv_mopr_32, "UiUiUi", "nc", "experimental-zimop")
+TARGET_BUILTIN(__builtin_riscv_mopr_64, "UWiUWiUWi", "nc",
+"experimental-zimop,64bit")
+TARGET_BUILTIN(__builtin_riscv_moprr_32, "UiUiUiUi", "nc", 
"experimental-zimop")
+TARGET_BUILTIN(__builtin_riscv_moprr_64, "UWiUWiUWiUWi", "nc",
+ "experimental-zimop,64bit")
 #undef BUILTIN
 #undef TARGET_BUILTIN
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index f3ab5ad7b08ec8..28511f9e0beac2 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -21189,6 +21189,10 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
   case RISCV::BI__builtin_riscv_clmulh_64:
   case RISCV::BI__builtin_riscv_clmulr_32:
   case RISCV::BI__builtin_riscv_clmulr_64:
+  case RISCV::BI__builtin_riscv_mopr_32:
+  case RISCV::BI__builtin_riscv_mopr_64:
+  case RISCV::BI__builtin_riscv_moprr_32:
+  case RISCV::BI__builtin_riscv_moprr_64:
   case RISCV::BI__builtin_riscv_xperm4_32:
   case RISCV::BI__builtin_riscv_xperm4_64:
   case RISCV::BI__builtin_riscv_xperm8_32:
@@ -21237,6 +21241,16 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
   ID = Intrinsic::riscv_clmulr;
   break;
 
+// Zimop
+case RISCV::BI__builtin_riscv_mopr_32:
+case RISCV::BI__builtin_riscv_mopr_64:
+  ID = Intrinsic::riscv_mopr;
+  break;
+case RISCV::BI__builtin_riscv_moprr_32:
+case RISCV::BI__builtin_riscv_moprr_64:
+  ID = Intrinsic::riscv_moprr;
+  break;
+
 // Zbkx
 case RISCV::BI__builtin_riscv_xperm8_32:
 case RISCV::BI__builtin_riscv_xperm8_64:
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 502b24bcdf8b42..c2702bec29dd7d 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5588,6 +5588,14 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const 
TargetInfo &TI,
   // Check if rnum is in [0, 10]
   case RISCV::BI__builtin_riscv_aes64ks1i:
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, 10);
+  // Check if n of mop.r.[n] is in [0, 31]
+  case RISCV::BI__builtin_riscv_mopr_32:
+  case RISCV::BI__builtin_riscv_mopr_64:
+return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
+  // Check if n of mop.rr.[n] is in [0, 7]
+  case RISCV::BI__builtin_riscv_moprr_32:
+  case RISCV::BI__builtin_riscv_moprr_64:
+return SemaBuiltinConstantArgRange(TheCall, 2, 0, 7);
   // Check if value range for vxrm is in [0, 3]
   case RISCVVector::BI__builtin_rvv_vaaddu_vv:
   case RISCVVector::BI__builtin_rvv_vaaddu_vx:
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c 
b/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c
new file mode 100644
index 00..b4367e33bdc19f
--- /dev/null
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c
@@ -0,0 +1,105 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zimop 
-emit-llvm %s -o - \
+// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
+// RUN: | FileCheck %s  -check-prefix=RV32ZIMOP
+// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-zimop 
-emit-llvm %s -o - \
+// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
+// RUN: | FileCheck %s  -check-prefix=RV64ZIMOP
+
+#include 
+
+#if __riscv_xlen == 64
+// RV64ZIMOP-LABEL: @mopr_0_64(
+// RV64ZIMOP-NEXT:  entry:
+// RV64ZIMOP-NEXT:[[TMP0:%.*]] = call i64 @llvm.riscv.mopr.i64(i64 
[[A:%.*]], i64 0)
+// RV64ZIMOP-NEXT:ret i64 [[TMP0]]
+//
+uint64_t mopr_0_64(uint64_t a) {

[clang] [RISCV][Clang] Added builtin support for experimental Zimop extension (PR #79971)

2024-03-06 Thread Lyut Nersisyan via cfe-commits 


@@ -5588,6 +5588,14 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const 
TargetInfo &TI,
   // Check if rnum is in [0, 10]
   case RISCV::BI__builtin_riscv_aes64ks1i:
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, 10);
+  // Check if n of mop.r.[n] is in [0, 31]
+  case RISCV::BI__builtin_riscv_mopr_32:
+  case RISCV::BI__builtin_riscv_mopr_64:
+return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);

ln8-8 wrote:

Added zimop-invalid.s test


https://github.com/llvm/llvm-project/pull/79971
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[clang] [RISCV][Clang] Added builtin support for experimental Zimop extension (PR #79971)

2024-03-06 Thread Lyut Nersisyan via cfe-commits 


@@ -89,5 +89,13 @@ TARGET_BUILTIN(__builtin_riscv_sm3p1, "UiUi", "nc", "zksh")
 TARGET_BUILTIN(__builtin_riscv_ntl_load, "v.", "t", "zihintntl")
 TARGET_BUILTIN(__builtin_riscv_ntl_store, "v.", "t", "zihintntl")
 
+// Zimop extension

ln8-8 wrote:

Rebased

https://github.com/llvm/llvm-project/pull/79971
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[clang] [RISCV][Clang] Added builtin support for experimental Zimop extension (PR #79971)

2024-01-30 Thread Lyut Nersisyan via cfe-commits 

https://github.com/ln8-8 updated https://github.com/llvm/llvm-project/pull/79971

>From a2a37921c83511796e051520c887092a3f58a3ba Mon Sep 17 00:00:00 2001
From: ln8-8 
Date: Tue, 30 Jan 2024 13:02:22 +0400
Subject: [PATCH 1/2] [RISCV][Clang] Added builtin support for experimental
 Zimop extension

This change adds builtin of mop.r.[n] and mop.rr.[n] instructions for Zimop 
extension based on 
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md.
---
 clang/include/clang/Basic/BuiltinsRISCV.def   |   7 ++
 clang/lib/CodeGen/CGBuiltin.cpp   |  14 +++
 clang/lib/Sema/SemaChecking.cpp   |   8 ++
 .../test/CodeGen/RISCV/rvb-intrinsics/zimop.c | 105 ++
 4 files changed, 134 insertions(+)
 create mode 100644 clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c

diff --git a/clang/include/clang/Basic/BuiltinsRISCV.def 
b/clang/include/clang/Basic/BuiltinsRISCV.def
index 1528b18c82ead..7e2dda21830c5 100644
--- a/clang/include/clang/Basic/BuiltinsRISCV.def
+++ b/clang/include/clang/Basic/BuiltinsRISCV.def
@@ -89,5 +89,12 @@ TARGET_BUILTIN(__builtin_riscv_sm3p1, "UiUi", "nc", "zksh")
 TARGET_BUILTIN(__builtin_riscv_ntl_load, "v.", "t", "zihintntl")
 TARGET_BUILTIN(__builtin_riscv_ntl_store, "v.", "t", "zihintntl")
 
+// Zimop extension
+TARGET_BUILTIN(__builtin_riscv_mopr_32, "UiUiUi", "nc", "experimental-zimop")
+TARGET_BUILTIN(__builtin_riscv_mopr_64, "UWiUWiUWi", "nc",
+"experimental-zimop,64bit")
+TARGET_BUILTIN(__builtin_riscv_moprr_32, "UiUiUiUi", "nc", 
"experimental-zimop")
+TARGET_BUILTIN(__builtin_riscv_moprr_64, "UWiUWiUWiUWi", "nc",
+ "experimental-zimop,64bit")
 #undef BUILTIN
 #undef TARGET_BUILTIN
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index f3ab5ad7b08ec..28511f9e0beac 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -21189,6 +21189,10 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
   case RISCV::BI__builtin_riscv_clmulh_64:
   case RISCV::BI__builtin_riscv_clmulr_32:
   case RISCV::BI__builtin_riscv_clmulr_64:
+  case RISCV::BI__builtin_riscv_mopr_32:
+  case RISCV::BI__builtin_riscv_mopr_64:
+  case RISCV::BI__builtin_riscv_moprr_32:
+  case RISCV::BI__builtin_riscv_moprr_64:
   case RISCV::BI__builtin_riscv_xperm4_32:
   case RISCV::BI__builtin_riscv_xperm4_64:
   case RISCV::BI__builtin_riscv_xperm8_32:
@@ -21237,6 +21241,16 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
   ID = Intrinsic::riscv_clmulr;
   break;
 
+// Zimop
+case RISCV::BI__builtin_riscv_mopr_32:
+case RISCV::BI__builtin_riscv_mopr_64:
+  ID = Intrinsic::riscv_mopr;
+  break;
+case RISCV::BI__builtin_riscv_moprr_32:
+case RISCV::BI__builtin_riscv_moprr_64:
+  ID = Intrinsic::riscv_moprr;
+  break;
+
 // Zbkx
 case RISCV::BI__builtin_riscv_xperm8_32:
 case RISCV::BI__builtin_riscv_xperm8_64:
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 502b24bcdf8b4..c2702bec29dd7 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5588,6 +5588,14 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const 
TargetInfo &TI,
   // Check if rnum is in [0, 10]
   case RISCV::BI__builtin_riscv_aes64ks1i:
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, 10);
+  // Check if n of mop.r.[n] is in [0, 31]
+  case RISCV::BI__builtin_riscv_mopr_32:
+  case RISCV::BI__builtin_riscv_mopr_64:
+return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
+  // Check if n of mop.rr.[n] is in [0, 7]
+  case RISCV::BI__builtin_riscv_moprr_32:
+  case RISCV::BI__builtin_riscv_moprr_64:
+return SemaBuiltinConstantArgRange(TheCall, 2, 0, 7);
   // Check if value range for vxrm is in [0, 3]
   case RISCVVector::BI__builtin_rvv_vaaddu_vv:
   case RISCVVector::BI__builtin_rvv_vaaddu_vx:
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c 
b/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c
new file mode 100644
index 0..b4367e33bdc19
--- /dev/null
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c
@@ -0,0 +1,105 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zimop 
-emit-llvm %s -o - \
+// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
+// RUN: | FileCheck %s  -check-prefix=RV32ZIMOP
+// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-zimop 
-emit-llvm %s -o - \
+// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
+// RUN: | FileCheck %s  -check-prefix=RV64ZIMOP
+
+#include 
+
+#if __riscv_xlen == 64
+// RV64ZIMOP-LABEL: @mopr_0_64(
+// RV64ZIMOP-NEXT:  entry:
+// RV64ZIMOP-NEXT:[[TMP0:%.*]] = call i64 @llvm.riscv.mopr.i64(i64 
[[A:%.*]], i64 0)
+// RV64ZIMOP-NEXT:ret i64 [[TMP0]]
+//
+uint64_t mopr_0_64(uint64_t a) {
+  retur

[clang] [RISCV][Clang] Added builtin support for experimental Zimop extension (PR #79971)

2024-01-31 Thread Lyut Nersisyan via cfe-commits 

https://github.com/ln8-8 updated https://github.com/llvm/llvm-project/pull/79971

>From a2a37921c83511796e051520c887092a3f58a3ba Mon Sep 17 00:00:00 2001
From: ln8-8 
Date: Tue, 30 Jan 2024 13:02:22 +0400
Subject: [PATCH 1/3] [RISCV][Clang] Added builtin support for experimental
 Zimop extension

This change adds builtin of mop.r.[n] and mop.rr.[n] instructions for Zimop 
extension based on 
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md.
---
 clang/include/clang/Basic/BuiltinsRISCV.def   |   7 ++
 clang/lib/CodeGen/CGBuiltin.cpp   |  14 +++
 clang/lib/Sema/SemaChecking.cpp   |   8 ++
 .../test/CodeGen/RISCV/rvb-intrinsics/zimop.c | 105 ++
 4 files changed, 134 insertions(+)
 create mode 100644 clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c

diff --git a/clang/include/clang/Basic/BuiltinsRISCV.def 
b/clang/include/clang/Basic/BuiltinsRISCV.def
index 1528b18c82ead..7e2dda21830c5 100644
--- a/clang/include/clang/Basic/BuiltinsRISCV.def
+++ b/clang/include/clang/Basic/BuiltinsRISCV.def
@@ -89,5 +89,12 @@ TARGET_BUILTIN(__builtin_riscv_sm3p1, "UiUi", "nc", "zksh")
 TARGET_BUILTIN(__builtin_riscv_ntl_load, "v.", "t", "zihintntl")
 TARGET_BUILTIN(__builtin_riscv_ntl_store, "v.", "t", "zihintntl")
 
+// Zimop extension
+TARGET_BUILTIN(__builtin_riscv_mopr_32, "UiUiUi", "nc", "experimental-zimop")
+TARGET_BUILTIN(__builtin_riscv_mopr_64, "UWiUWiUWi", "nc",
+"experimental-zimop,64bit")
+TARGET_BUILTIN(__builtin_riscv_moprr_32, "UiUiUiUi", "nc", 
"experimental-zimop")
+TARGET_BUILTIN(__builtin_riscv_moprr_64, "UWiUWiUWiUWi", "nc",
+ "experimental-zimop,64bit")
 #undef BUILTIN
 #undef TARGET_BUILTIN
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index f3ab5ad7b08ec..28511f9e0beac 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -21189,6 +21189,10 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
   case RISCV::BI__builtin_riscv_clmulh_64:
   case RISCV::BI__builtin_riscv_clmulr_32:
   case RISCV::BI__builtin_riscv_clmulr_64:
+  case RISCV::BI__builtin_riscv_mopr_32:
+  case RISCV::BI__builtin_riscv_mopr_64:
+  case RISCV::BI__builtin_riscv_moprr_32:
+  case RISCV::BI__builtin_riscv_moprr_64:
   case RISCV::BI__builtin_riscv_xperm4_32:
   case RISCV::BI__builtin_riscv_xperm4_64:
   case RISCV::BI__builtin_riscv_xperm8_32:
@@ -21237,6 +21241,16 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
   ID = Intrinsic::riscv_clmulr;
   break;
 
+// Zimop
+case RISCV::BI__builtin_riscv_mopr_32:
+case RISCV::BI__builtin_riscv_mopr_64:
+  ID = Intrinsic::riscv_mopr;
+  break;
+case RISCV::BI__builtin_riscv_moprr_32:
+case RISCV::BI__builtin_riscv_moprr_64:
+  ID = Intrinsic::riscv_moprr;
+  break;
+
 // Zbkx
 case RISCV::BI__builtin_riscv_xperm8_32:
 case RISCV::BI__builtin_riscv_xperm8_64:
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 502b24bcdf8b4..c2702bec29dd7 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5588,6 +5588,14 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const 
TargetInfo &TI,
   // Check if rnum is in [0, 10]
   case RISCV::BI__builtin_riscv_aes64ks1i:
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, 10);
+  // Check if n of mop.r.[n] is in [0, 31]
+  case RISCV::BI__builtin_riscv_mopr_32:
+  case RISCV::BI__builtin_riscv_mopr_64:
+return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
+  // Check if n of mop.rr.[n] is in [0, 7]
+  case RISCV::BI__builtin_riscv_moprr_32:
+  case RISCV::BI__builtin_riscv_moprr_64:
+return SemaBuiltinConstantArgRange(TheCall, 2, 0, 7);
   // Check if value range for vxrm is in [0, 3]
   case RISCVVector::BI__builtin_rvv_vaaddu_vv:
   case RISCVVector::BI__builtin_rvv_vaaddu_vx:
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c 
b/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c
new file mode 100644
index 0..b4367e33bdc19
--- /dev/null
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/zimop.c
@@ -0,0 +1,105 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zimop 
-emit-llvm %s -o - \
+// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
+// RUN: | FileCheck %s  -check-prefix=RV32ZIMOP
+// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-zimop 
-emit-llvm %s -o - \
+// RUN: -disable-O0-optnone | opt -S -passes=mem2reg \
+// RUN: | FileCheck %s  -check-prefix=RV64ZIMOP
+
+#include 
+
+#if __riscv_xlen == 64
+// RV64ZIMOP-LABEL: @mopr_0_64(
+// RV64ZIMOP-NEXT:  entry:
+// RV64ZIMOP-NEXT:[[TMP0:%.*]] = call i64 @llvm.riscv.mopr.i64(i64 
[[A:%.*]], i64 0)
+// RV64ZIMOP-NEXT:ret i64 [[TMP0]]
+//
+uint64_t mopr_0_64(uint64_t a) {
+  retur

[clang] [RISCV][Clang] Added builtin support for experimental Zimop extension (PR #79971)

2024-01-31 Thread Lyut Nersisyan via cfe-commits 


@@ -89,5 +89,13 @@ TARGET_BUILTIN(__builtin_riscv_sm3p1, "UiUi", "nc", "zksh")
 TARGET_BUILTIN(__builtin_riscv_ntl_load, "v.", "t", "zihintntl")
 TARGET_BUILTIN(__builtin_riscv_ntl_store, "v.", "t", "zihintntl")
 
+// Zimop extension
+TARGET_BUILTIN(__builtin_riscv_mopr_32, "UiUiUi", "nc", "experimental-zimop")

ln8-8 wrote:

Added

https://github.com/llvm/llvm-project/pull/79971
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[clang] [RISCV][Clang] Added builtin support for experimental Zimop extension (PR #79971)

2024-01-31 Thread Lyut Nersisyan via cfe-commits 


@@ -21189,6 +21189,10 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned 
BuiltinID,
   case RISCV::BI__builtin_riscv_clmulh_64:
   case RISCV::BI__builtin_riscv_clmulr_32:
   case RISCV::BI__builtin_riscv_clmulr_64:
+  case RISCV::BI__builtin_riscv_mopr_32:

ln8-8 wrote:

Changed


https://github.com/llvm/llvm-project/pull/79971
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