[PATCH] D157890: Propagate the volatile qualifier of exp to store /load operations .

[Kishan Parmar via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2641d9b2807d: Propagate the volatile qualifier of exp  to  
store /load operations . (authored by umesh.kalappa0, committed by long5hot).
Herald added a subscriber: cfe-commits.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157890/new/

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Files:
  clang/include/clang/AST/Expr.h
  clang/lib/CodeGen/CGExpr.cpp
  clang/lib/CodeGen/CGExprComplex.cpp
  clang/lib/CodeGen/CGExprScalar.cpp
  clang/test/CodeGen/volatile.cpp

Index: clang/test/CodeGen/volatile.cpp
===
--- /dev/null
+++ clang/test/CodeGen/volatile.cpp
@@ -0,0 +1,43 @@
+// RUN: %clang_cc1 -O2 -triple=x86_64-unknown-linux-gnu -emit-llvm %s -o -  | FileCheck %s -check-prefix CHECK
+struct agg 
+{
+int a ;
+int b ;
+} t;
+struct agg a;
+int vt=10;
+_Complex float cf;
+int volatile vol =10;
+void f0() {
+const_cast(cf) = const_cast(cf) + 1;
+//  CHECK: %cf.real = load volatile float, ptr @cf
+//  CHECK: %cf.imag = load volatile float, ptr getelementptr
+//  CHECK: %add.r = fadd float %cf.real, 1.00e+00
+//  CHECK: %add.i = fadd float %cf.imag, 0.00e+00
+//  CHECK: store volatile float %add.r
+//  CHECK: store volatile float %add.i, ptr getelementptr
+  static_cast(cf) = static_cast(cf) + 1;
+//  CHECK: %cf.real1 = load volatile float, ptr @cf
+//  CHECK: %cf.imag2 = load volatile float, ptr getelementptr
+//  CHECK: %add.r3 = fadd float %cf.real1, 1.00e+00
+//  CHECK: %add.i4 = fadd float %cf.imag2, 0.00e+00
+//  CHECK: store volatile float %add.r3, ptr @cf
+//  CHECK: store volatile float %add.i4, ptr getelementptr
+const_cast(a.a) = const_cast(t.a) ;
+//  CHECK: %0 = load volatile i32, ptr @t
+//  CHECK: store volatile i32 %0, ptr @a
+static_cast(a.b) = static_cast(t.a) ;
+//  CHECK: %1 = load volatile i32, ptr @t
+//  CHECK: store volatile i32 %1, ptr getelementptr
+const_cast(vt) = const_cast(vt) + 1;
+//  CHECK: %2 = load volatile i32, ptr @vt
+//  CHECK: %add = add nsw i32 %2, 1
+//  CHECK: store volatile i32 %add, ptr @vt
+ static_cast(vt) = static_cast(vt) + 1;
+//  CHECK: %3 = load volatile i32, ptr @vt
+//  CHECK: %add5 = add nsw i32 %3, 1
+//  CHECK: store volatile i32 %add5, ptr @vt
+vt = const_cast(vol);
+//  %4 = load i32, ptr @vol
+//  store i32 %4, ptr @vt
+}
Index: clang/lib/CodeGen/CGExprScalar.cpp
===
--- clang/lib/CodeGen/CGExprScalar.cpp
+++ clang/lib/CodeGen/CGExprScalar.cpp
@@ -2225,7 +2225,9 @@
 return Visit(const_cast(E));
 
   case CK_NoOp: {
-llvm::Value *V = Visit(const_cast(E));
+llvm::Value *V = CE->changesVolatileQualification()
+ ? EmitLoadOfLValue(CE)
+ : Visit(const_cast(E));
 if (V) {
   // CK_NoOp can model a pointer qualification conversion, which can remove
   // an array bound and change the IR type.
Index: clang/lib/CodeGen/CGExprComplex.cpp
===
--- clang/lib/CodeGen/CGExprComplex.cpp
+++ clang/lib/CodeGen/CGExprComplex.cpp
@@ -177,11 +177,15 @@
   ComplexPairTy VisitImplicitCastExpr(ImplicitCastExpr *E) {
 // Unlike for scalars, we don't have to worry about function->ptr demotion
 // here.
+if (E->changesVolatileQualification())
+  return EmitLoadOfLValue(E);
 return EmitCast(E->getCastKind(), E->getSubExpr(), E->getType());
   }
   ComplexPairTy VisitCastExpr(CastExpr *E) {
 if (const auto *ECE = dyn_cast(E))
   CGF.CGM.EmitExplicitCastExprType(ECE, &CGF);
+if (E->changesVolatileQualification())
+   return EmitLoadOfLValue(E);
 return EmitCast(E->getCastKind(), E->getSubExpr(), E->getType());
   }
   ComplexPairTy VisitCallExpr(const CallExpr *E);
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -4802,6 +4802,9 @@
 // bound and change the IR type.
 // FIXME: Once pointee types are removed from IR, remove this.
 LValue LV = EmitLValue(E->getSubExpr());
+// Propagate the volatile qualifer to LValue, if exist in E.
+if (E->changesVolatileQualification())
+  LV.getQuals() = E->getType().getQualifiers();
 if (LV.isSimple()) {
   Address V = LV.getAddress(*this);
   if (V.isValid()) {
Index: clang/include/clang/AST/Expr.h
===
--- clang/include/clang/AST/Expr.h
+++ clang/include/clang/AST/Expr.h
@@ -3608,6 +3608,19 @@
 return FPOptionsOverride();
   }
 
+  /// Return
+  //  True : if this conversion changes the volatile-ness of a gl-value.
+  // Qualification conversions on gl-values currently use CK_NoOp, but
+  //

[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

ping!


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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

landing on this PR, from the conclusion of #55230 
 and D158632 
 conversation..
"If the llvm.fmuladd intrinsic reaches the backend, the backend is responsible 
for deciding how to represent it."


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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG696ea67f197f: Disable call to fma for soft-float (authored 
by long5hot).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156344/new/

https://reviews.llvm.org/D156344

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppcsoftops.ll


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, 
double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17297,7 +17297,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17297,7 +17297,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot updated this revision to Diff 544432.
long5hot added a comment.
Herald added subscribers: cfe-commits, MaskRay.
Herald added a project: clang.

After clang release/16.x there is a regression that -mabi=elfv1
or -mabi=elfv2 are being unused and throws warning. But clang-trunk
throws error for -mabi=elfv2 or elfv1. Intent of this patch to accept
elfv1 or elfv2 for -mabi.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D156344

Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppcsoftops.ll


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, 
double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABIName = "elfv1";
+  A->claim();
+} else if (V == "elfv2") {
+  ABIName = "elfv2";
+  A->claim();
 } else if (V != "altivec")
   // The ppc64 linux abis are all "altivec" abis by default. Accept and 
ignore
   // the option if given as we don't have backend support for any targets


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABI

[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot updated this revision to Diff 544437.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156344/new/

https://reviews.llvm.org/D156344

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppcsoftops.ll
  llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn


Index: llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
===
--- llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
+++ llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
@@ -1,11 +1,20 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("Opts") {
+  visibility = [ ":sancov" ]
+  args = [ "-gen-opt-parser-defs" ]
+}
+
 executable("sancov") {
   deps = [
+":Opts",
 "//llvm/lib/DebugInfo/DWARF",
 "//llvm/lib/DebugInfo/PDB",
 "//llvm/lib/DebugInfo/Symbolize",
 "//llvm/lib/MC",
 "//llvm/lib/MC/MCDisassembler",
 "//llvm/lib/Object",
+"//llvm/lib/Option",
 "//llvm/lib/Support",
 "//llvm/lib/Target:AllTargetsDescs",
 "//llvm/lib/Target:AllTargetsDisassemblers",
Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, 
double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:


Index: llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
===
--- llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
+++ llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
@@ -1,11 +1,20 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("Opts") {
+  visibility = [ ":sancov" ]
+  args = [ "-gen-opt-parser-defs" ]
+}
+
 executable("sancov") {
   deps = [
+":Opts",
 "//llvm/lib/DebugInfo/DWARF",
 "//llvm/lib/DebugInfo/PDB",
 "//llvm/lib/DebugInfo/Symbolize",
 "//llvm/lib/MC",
 "//llvm/lib/MC/MCDisassembler",
 "//llvm/lib/Object",
+"//llvm/lib/Option",
 "//llvm/lib/Support",
 "//llvm/lib/Target:AllTargetsDescs",
 "//llvm/lib/Target:AllTargetsDisassemblers",
Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,

[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot updated this revision to Diff 544438.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156344/new/

https://reviews.llvm.org/D156344

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppcsoftops.ll


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, 
double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
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[PATCH] D156351: clang driver throws error for -mabi=elfv2 or elfv2

[Kishan Parmar via Phabricator via cfe-commits]

long5hot created this revision.
Herald added a project: All.
long5hot requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay.
Herald added a project: clang.

After clang release/16.x there is a regression that -mabi=elfv1
or -mabi=elfv2 are being unused and throws warning. But clang-trunk
throws error for -mabi=elfv2 or elfv1. Intent of this patch to accept
elfv1 or elfv2 for -mabi.


Repository:
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Files:
  clang/lib/Driver/ToolChains/Clang.cpp


Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABIName = "elfv1";
+  A->claim();
+} else if (V == "elfv2") {
+  ABIName = "elfv2";
+  A->claim();
 } else if (V != "altivec")
   // The ppc64 linux abis are all "altivec" abis by default. Accept and 
ignore
   // the option if given as we don't have backend support for any targets


Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABIName = "elfv1";
+  A->claim();
+} else if (V == "elfv2") {
+  ABIName = "elfv2";
+  A->claim();
 } else if (V != "altivec")
   // The ppc64 linux abis are all "altivec" abis by default. Accept and ignore
   // the option if given as we don't have backend support for any targets
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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

Apologies for updating diff too many times, used arcanist first time. Won't 
happend again!


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[PATCH] D156351: clang driver throws error for -mabi=elfv2 or elfv2

[Kishan Parmar via Phabricator via cfe-commits]

long5hot updated this revision to Diff 544674.
long5hot added a comment.
Herald added a subscriber: kbarton.

failure is only when we do not give full target triple.
for e.x. --target=ppc64 -mabi=elfv2 
or even when OS option is unknown e.g. --target=powerpc64-unknown-gnu


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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/ppc-abi.c


Index: clang/test/Driver/ppc-abi.c
===
--- clang/test/Driver/ppc-abi.c
+++ clang/test/Driver/ppc-abi.c
@@ -15,6 +15,10 @@
 // RUN:   -mabi=elfv2 | FileCheck -check-prefix=CHECK-ELFv2 %s
 // RUN: %clang -target powerpc64le-unknown-linux-gnu %s -### -o %t.o 2>&1 \
 // RUN:   -mabi=altivec | FileCheck -check-prefix=CHECK-ELFv2 %s
+// RUN: %clang -target powerpc64le-unknown-unknown-gnu %s -### -o %t.o 2>&1 \
+// RUN:   -mabi=elfv1 | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv1 %s
+// RUN: %clang -target powerpc64le-unknown-unknown-gnu %s -### -o %t.o 2>&1 \
+// RUN:   -mabi=elfv2 | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv2 %s
 
 // RUN: %clang -target powerpc64-unknown-freebsd11 %s -### 2>&1 | FileCheck 
--check-prefix=CHECK-ELFv1 %s
 // RUN: %clang -target powerpc64-unknown-freebsd12 %s -### 2>&1 | FileCheck 
--check-prefix=CHECK-ELFv1 %s
@@ -31,6 +35,8 @@
 // CHECK-ELFv2-BE: "-target-abi" "elfv2"
 // CHECK-ELFv2-BE-PIE: "-mrelocation-model" "pic" "-pic-level" "2" 
"-pic-is-pie"
 // CHECK-ELFv2-BE-PIE: "-target-abi" "elfv2"
+// CHECK-UNKNOWN-ELFv1: "-target-abi" "elfv1"
+// CHECK-UNKNOWN-ELFv2: "-target-abi" "elfv2"
 
 // RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHECK-ELFv1-PIC %s
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABIName = "elfv1";
+  A->claim();
+} else if (V == "elfv2") {
+  ABIName = "elfv2";
+  A->claim();
 } else if (V != "altivec")
   // The ppc64 linux abis are all "altivec" abis by default. Accept and 
ignore
   // the option if given as we don't have backend support for any targets


Index: clang/test/Driver/ppc-abi.c
===
--- clang/test/Driver/ppc-abi.c
+++ clang/test/Driver/ppc-abi.c
@@ -15,6 +15,10 @@
 // RUN:   -mabi=elfv2 | FileCheck -check-prefix=CHECK-ELFv2 %s
 // RUN: %clang -target powerpc64le-unknown-linux-gnu %s -### -o %t.o 2>&1 \
 // RUN:   -mabi=altivec | FileCheck -check-prefix=CHECK-ELFv2 %s
+// RUN: %clang -target powerpc64le-unknown-unknown-gnu %s -### -o %t.o 2>&1 \
+// RUN:   -mabi=elfv1 | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv1 %s
+// RUN: %clang -target powerpc64le-unknown-unknown-gnu %s -### -o %t.o 2>&1 \
+// RUN:   -mabi=elfv2 | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv2 %s
 
 // RUN: %clang -target powerpc64-unknown-freebsd11 %s -### 2>&1 | FileCheck --check-prefix=CHECK-ELFv1 %s
 // RUN: %clang -target powerpc64-unknown-freebsd12 %s -### 2>&1 | FileCheck --check-prefix=CHECK-ELFv1 %s
@@ -31,6 +35,8 @@
 // CHECK-ELFv2-BE: "-target-abi" "elfv2"
 // CHECK-ELFv2-BE-PIE: "-mrelocation-model" "pic" "-pic-level" "2" "-pic-is-pie"
 // CHECK-ELFv2-BE-PIE: "-target-abi" "elfv2"
+// CHECK-UNKNOWN-ELFv1: "-target-abi" "elfv1"
+// CHECK-UNKNOWN-ELFv2: "-target-abi" "elfv2"
 
 // RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHECK-ELFv1-PIC %s
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABIName = "elfv1";
+  A->claim();
+} else if (V == "elfv2") {
+  ABIName = "elfv2";
+  A->claim();
 } else if (V != "altivec")
   // The ppc64 linux abis are all "altivec" abis by default. Accept and ignore
   // the option if given as we don't have backend support for any targets
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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

In D156344#4583559 , @shchenz wrote:

> compiler-rt builtins library should not just undefining fma for PPC, right 
> (see https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html)? 
> If so, maybe we should at least first try not generating fma for soft-float 
> at the first place where fmul + fadd is fused, like `tryEmitFMulAdd` in clang 
> front end?

I actually raised D154605  for that one, but 
it's only for X86.
I was relying on target-features containing "+fma", which is wrong. The review 
was raised just to get feedback from community working on various targets.
Plan is to disable fma-intrinsic from IR for all targets which doesn't support 
fma.


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[PATCH] D156351: clang driver throws error for -mabi=elfv2 or elfv2

[Kishan Parmar via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG065da3574b4f: clang driver throws error for -mabi=elfv2 or 
elfv2 (authored by long5hot).

Changed prior to commit:
  https://reviews.llvm.org/D156351?vs=544674&id=545359#toc

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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/ppc-abi.c


Index: clang/test/Driver/ppc-abi.c
===
--- clang/test/Driver/ppc-abi.c
+++ clang/test/Driver/ppc-abi.c
@@ -15,6 +15,10 @@
 // RUN:   -mabi=elfv2 | FileCheck -check-prefix=CHECK-ELFv2 %s
 // RUN: %clang -target powerpc64le-unknown-linux-gnu %s -### -o %t.o 2>&1 \
 // RUN:   -mabi=altivec | FileCheck -check-prefix=CHECK-ELFv2 %s
+// RUN: %clang --target=ppc64 -mabi=elfv1 %s -### -o %t.o 2>&1 \
+// RUN: | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv1 %s
+// RUN: %clang --target=ppc64 -mabi=elfv2 %s -### -o %t.o 2>&1 \
+// RUN: | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv2 %s
 
 // RUN: %clang -target powerpc64-unknown-freebsd11 %s -### 2>&1 | FileCheck 
--check-prefix=CHECK-ELFv1 %s
 // RUN: %clang -target powerpc64-unknown-freebsd12 %s -### 2>&1 | FileCheck 
--check-prefix=CHECK-ELFv1 %s
@@ -31,6 +35,8 @@
 // CHECK-ELFv2-BE: "-target-abi" "elfv2"
 // CHECK-ELFv2-BE-PIE: "-mrelocation-model" "pic" "-pic-level" "2" 
"-pic-is-pie"
 // CHECK-ELFv2-BE-PIE: "-target-abi" "elfv2"
+// CHECK-UNKNOWN-ELFv1: "-target-abi" "elfv1"
+// CHECK-UNKNOWN-ELFv2: "-target-abi" "elfv2"
 
 // RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHECK-ELFv1-PIC %s
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABIName = "elfv1";
+  A->claim();
+} else if (V == "elfv2") {
+  ABIName = "elfv2";
+  A->claim();
 } else if (V != "altivec")
   // The ppc64 linux abis are all "altivec" abis by default. Accept and 
ignore
   // the option if given as we don't have backend support for any targets


Index: clang/test/Driver/ppc-abi.c
===
--- clang/test/Driver/ppc-abi.c
+++ clang/test/Driver/ppc-abi.c
@@ -15,6 +15,10 @@
 // RUN:   -mabi=elfv2 | FileCheck -check-prefix=CHECK-ELFv2 %s
 // RUN: %clang -target powerpc64le-unknown-linux-gnu %s -### -o %t.o 2>&1 \
 // RUN:   -mabi=altivec | FileCheck -check-prefix=CHECK-ELFv2 %s
+// RUN: %clang --target=ppc64 -mabi=elfv1 %s -### -o %t.o 2>&1 \
+// RUN: | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv1 %s
+// RUN: %clang --target=ppc64 -mabi=elfv2 %s -### -o %t.o 2>&1 \
+// RUN: | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv2 %s
 
 // RUN: %clang -target powerpc64-unknown-freebsd11 %s -### 2>&1 | FileCheck --check-prefix=CHECK-ELFv1 %s
 // RUN: %clang -target powerpc64-unknown-freebsd12 %s -### 2>&1 | FileCheck --check-prefix=CHECK-ELFv1 %s
@@ -31,6 +35,8 @@
 // CHECK-ELFv2-BE: "-target-abi" "elfv2"
 // CHECK-ELFv2-BE-PIE: "-mrelocation-model" "pic" "-pic-level" "2" "-pic-is-pie"
 // CHECK-ELFv2-BE-PIE: "-target-abi" "elfv2"
+// CHECK-UNKNOWN-ELFv1: "-target-abi" "elfv1"
+// CHECK-UNKNOWN-ELFv2: "-target-abi" "elfv2"
 
 // RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
 // RUN:   | FileCheck -check-prefix=CHECK-ELFv1-PIC %s
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABIName = "elfv1";
+  A->claim();
+} else if (V == "elfv2") {
+  ABIName = "elfv2";
+  A->claim();
 } else if (V != "altivec")
   // The ppc64 linux abis are all "altivec" abis by default. Accept and ignore
   // the option if given as we don't have backend support for any targets
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[PATCH] D156351: clang driver throws error for -mabi=elfv2 or elfv2

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added inline comments.



Comment at: clang/test/Driver/ppc-abi.c:18
 // RUN:   -mabi=altivec | FileCheck -check-prefix=CHECK-ELFv2 %s
+// RUN: %clang --target=ppc64 -mabi=elfv1 %s -### -o %t.o 2>&1 \
+// RUN: | FileCheck -check-prefix=CHECK-UNKNOWN-ELFv1 %s

Did a small testCase change here, because of this [[ 
https://github.com/llvm/llvm-project/issues/64194 | #64194 ]] bug ..



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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

@nemanjai , @jhibbits  should i land on this commit, because as @shchenz  said, 
similiar to D158632  review we are having 
plan to do same for PPC.


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