[PATCH] D49629: [CMake] Fix the setting of LIBCXX_HEADER_DIR
keith.walker.arm added a comment. This change fixed a failing build here, so it looks correct to me. Repository: rCXX libc++ https://reviews.llvm.org/D49629 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D42569: [ARM] disable FPU features when using soft floating point.
keith.walker.arm added a comment. review request ping. There was one line in the compiler itself which is different to what had been previously reviewed and approved ... so hopefully that change is easily reviewed. However this change also resulted in updates to the associated tests, and the size of these test changes were the reason why I had put the change up for review again.The changes are mainly due to the order of the options being tested changing slightly. Repository: rC Clang https://reviews.llvm.org/D42569 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D67216: [cfi] Add flag to always generate call frame information
keith.walker.arm added a comment. I feel that using a -g option make more sense. Maybe -gdwarf-frame, or -gdwarf-frame-always might be more user friendly as it relates more to the DWARF section created rather than the section content. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D67216/new/ https://reviews.llvm.org/D67216 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D40256: [ARM] disable FPU features when using soft floating point.
keith.walker.arm updated this revision to Diff 123936. keith.walker.arm added a comment. I have updated the patch with the suggested change to use a list of features to disable. I checked that LLVM does indeed implicitly disable features if they are dependent on a feature that is explicitly disabled, so in theory we could just disable "vfp2" and "neon".However I found that this made the tests in clang more difficult to write and understand. For example if a test wants to check that "dotprod" is not enabled: - with the explicit disabling the check can be: CHECK-NO-DOTPROD-NOT: "--target-feature" "+dotprod" - with implicit disabling the check needs to be something like: CHECK-NO-DOTPROD: "--target-feature" "+dotprod" CHECK-NO-DOTPROD: "--target-feature" "-neon" I think this made the tests harder to understand as there is more implicit knowledge required to understand what is going on. For this reason I have gone for still explicitly disabling the dependent FP features, with a FIXME so that this could be improved in the future. https://reviews.llvm.org/D40256 Files: lib/Driver/ToolChains/Arch/ARM.cpp test/Driver/arm-cortex-cpus.c test/Driver/arm-dotprod.c test/Driver/arm-mfpu.c test/Preprocessor/arm-target-features.c Index: test/Driver/arm-dotprod.c === --- test/Driver/arm-dotprod.c +++ test/Driver/arm-dotprod.c @@ -4,8 +4,21 @@ // RUN: %clang -### -target arm -march=armv8.3a %s 2>&1 | FileCheck %s --check-prefix=CHECK-NONE // CHECK-NONE-NOT: "-target-feature" "+dotprod" -// RUN: %clang -### -target arm -march=armv8.2a+dotprod %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -march=armv8.3a+dotprod %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -mcpu=cortex-a75 %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -mcpu=cortex-a55 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -march=armv8.2a+dotprod %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -march=armv8.3a+dotprod %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -mcpu=cortex-a75 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -mcpu=cortex-a55 %s 2>&1 | FileCheck %s // CHECK: "+dotprod" + +// The following default to -msoft-float +// RUN: %clang -### -target arm -march=armv8.2a+dotprod %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -march=armv8.3a+dotprod %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -mcpu=cortex-a75 %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -mcpu=cortex-a55 %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// We rely on the backend disabling dotprod as it depends on neon, so check that +// neon is disabled after the dotprod was enabled. +// CHECK-NO-DOTPROD-NOT: "+dotprod" Index: test/Driver/arm-cortex-cpus.c === --- test/Driver/arm-cortex-cpus.c +++ test/Driver/arm-cortex-cpus.c @@ -284,13 +284,13 @@ // RUN: %clang -target arm -march=armebv8.2-a -mbig-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V82A-THUMB %s // CHECK-BE-V82A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv8.2a-{{.*}}" "-target-cpu" "generic" -// RUN: %clang -target armv8a -march=armv8.2-a+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-V82A-FP16 %s +// RUN: %clang -target armv8a-linux-eabi -march=armv8.2-a+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-V82A-FP16 %s // CHECK-V82A-FP16: "-cc1"{{.*}} "-triple" "armv8.2{{.*}}" "-target-cpu" "generic" {{.*}}"-target-feature" "+fullfp16" // Once we have CPUs with optional v8.2-A FP16, we will need a way to turn it // on and off. Cortex-A53 is a placeholder for now. -// RUN: %clang -target armv8a -mcpu=cortex-a53+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s -// RUN: %clang -target armv8a -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s +// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s +// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s // CHECK-CORTEX-A53-FP16: "-cc1" {{.*}}"-target-cpu" "cortex-a53" {{.*}}"-target-feature" "+fullfp16" // CHECK-CORTEX-A53-NOFP16: "-cc1" {{.*}}"-target-cpu" "cortex-a53" {{.*}}"-target-feature" "-fullfp16" Index: test/Driver/arm-mfpu.c === --- test/Driver/arm-mfpu.c +++ test/Driver/arm-mfpu.c @@ -2,6 +2,8 @@ // RUN: %clang -target arm-linux-eabi %s -### -o %t.o 2>&1 \ // RUN: | FileCheck --check-prefix=CHECK-DEFAULT %s +// CHECK-DEFAULT-NOT: "-target-feature" "+soft-float" +// CHECK-DEFAULT: "-target-feature" "+soft-float-
[PATCH] D40256: [ARM] disable FPU features when using soft floating point.
keith.walker.arm updated this revision to Diff 124579. keith.walker.arm added a comment. > What are these disabled "R-UN" lines? Oops! They shouldn't have been disabled in the patch. > Do we really need to check every combination like this? I don't think the > underlying logic actually varies. I have reduced the tests in the part to do a check against each architectural variant, and then just one check with the different -msoft-float/-mfpu=none options. https://reviews.llvm.org/D40256 Files: lib/Driver/ToolChains/Arch/ARM.cpp test/Driver/arm-cortex-cpus.c test/Driver/arm-dotprod.c test/Driver/arm-mfpu.c test/Preprocessor/arm-target-features.c Index: test/Driver/arm-dotprod.c === --- test/Driver/arm-dotprod.c +++ test/Driver/arm-dotprod.c @@ -4,8 +4,21 @@ // RUN: %clang -### -target arm -march=armv8.3a %s 2>&1 | FileCheck %s --check-prefix=CHECK-NONE // CHECK-NONE-NOT: "-target-feature" "+dotprod" -// RUN: %clang -### -target arm -march=armv8.2a+dotprod %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -march=armv8.3a+dotprod %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -mcpu=cortex-a75 %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -mcpu=cortex-a55 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -march=armv8.2a+dotprod %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -march=armv8.3a+dotprod %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -mcpu=cortex-a75 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -mcpu=cortex-a55 %s 2>&1 | FileCheck %s // CHECK: "+dotprod" + +// The following default to -msoft-float +// RUN: %clang -### -target arm -march=armv8.2a+dotprod %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -march=armv8.3a+dotprod %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -mcpu=cortex-a75 %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -mcpu=cortex-a55 %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// We rely on the backend disabling dotprod as it depends on neon, so check that +// neon is disabled after the dotprod was enabled. +// CHECK-NO-DOTPROD-NOT: "+dotprod" Index: test/Driver/arm-cortex-cpus.c === --- test/Driver/arm-cortex-cpus.c +++ test/Driver/arm-cortex-cpus.c @@ -284,13 +284,13 @@ // RUN: %clang -target arm -march=armebv8.2-a -mbig-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V82A-THUMB %s // CHECK-BE-V82A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv8.2a-{{.*}}" "-target-cpu" "generic" -// RUN: %clang -target armv8a -march=armv8.2-a+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-V82A-FP16 %s +// RUN: %clang -target armv8a-linux-eabi -march=armv8.2-a+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-V82A-FP16 %s // CHECK-V82A-FP16: "-cc1"{{.*}} "-triple" "armv8.2{{.*}}" "-target-cpu" "generic" {{.*}}"-target-feature" "+fullfp16" // Once we have CPUs with optional v8.2-A FP16, we will need a way to turn it // on and off. Cortex-A53 is a placeholder for now. -// RUN: %clang -target armv8a -mcpu=cortex-a53+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s -// RUN: %clang -target armv8a -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s +// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s +// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s // CHECK-CORTEX-A53-FP16: "-cc1" {{.*}}"-target-cpu" "cortex-a53" {{.*}}"-target-feature" "+fullfp16" // CHECK-CORTEX-A53-NOFP16: "-cc1" {{.*}}"-target-cpu" "cortex-a53" {{.*}}"-target-feature" "-fullfp16" Index: test/Driver/arm-mfpu.c === --- test/Driver/arm-mfpu.c +++ test/Driver/arm-mfpu.c @@ -2,6 +2,8 @@ // RUN: %clang -target arm-linux-eabi %s -### -o %t.o 2>&1 \ // RUN: | FileCheck --check-prefix=CHECK-DEFAULT %s +// CHECK-DEFAULT-NOT: "-target-feature" "+soft-float" +// CHECK-DEFAULT: "-target-feature" "+soft-float-abi" // CHECK-DEFAULT-NOT: "-target-feature" "+vfp2" // CHECK-DEFAULT-NOT: "-target-feature" "+vfp3" // CHECK-DEFAULT-NOT: "-target-feature" "+d16" @@ -19,6 +21,10 @@ // RUN: %clang -target arm-linux-eabi -mfpu=vfp %s -### -o %t.o 2>&1 \ // RUN: | FileCheck --check-prefix=CHECK-VFP %s +// RUN: %clang -target arm-linux-eabi -mfpu=vfp %s -mfloat-abi=soft -### -o %t.o 2>&1 \ +// RUN: | FileCheck --check-prefix=CHECK-SOFT-ABI-FP %s +// CHECK-VFP-NOT: "-target-feature" "+soft-float" +// CHECK-VFP: "-target-feature" "+soft-float-abi" // CHECK-VFP: "-target-feature" "+vfp2" // CH
[PATCH] D157620: [Thumb1] Do not allow Armv6-m XO and PI code
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGacc5db2bedd5: [Thumb1] Do not allow Armv6-m XO and PI code (authored by keith.walker.arm). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157620/new/ https://reviews.llvm.org/D157620 Files: clang/include/clang/Basic/DiagnosticCommonKinds.td clang/lib/Driver/ToolChains/Arch/ARM.cpp clang/test/Driver/arm-execute-only.c Index: clang/test/Driver/arm-execute-only.c === --- clang/test/Driver/arm-execute-only.c +++ clang/test/Driver/arm-execute-only.c @@ -20,3 +20,27 @@ // RUN: not %clang -### --target=arm-arm-none-eabi -march=armv8-m.main -mpure-code -mno-movt %s 2>&1 \ // RUN:| FileCheck %s -check-prefix CHECK-PURE-CODE-NO-MOVT // CHECK-PURE-CODE-NO-MOVT: error: option '-mpure-code' cannot be specified with '-mno-movt' + +// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m -mexecute-only -fropi %s 2>&1 \ +// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-ROPI +// CHECK-NO-EXECUTE-ROPI: error: option '-mexecute-only' cannot be specified with '-fropi' for the thumbv6m sub-architecture + +// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m -mexecute-only -frwpi %s 2>&1 \ +// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-RWPI +// CHECK-NO-EXECUTE-RWPI: error: option '-mexecute-only' cannot be specified with '-frwpi' for the thumbv6m sub-architecture + +// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m -mexecute-only -fpic %s 2>&1 \ +// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-PIC +// CHECK-NO-EXECUTE-PIC: error: option '-mexecute-only' cannot be specified with '-fpic' for the thumbv6m sub-architecture + +// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m -mexecute-only -fpie %s 2>&1 \ +// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-PIE +// CHECK-NO-EXECUTE-PIE: error: option '-mexecute-only' cannot be specified with '-fpie' for the thumbv6m sub-architecture + +// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m -mexecute-only -fPIC %s 2>&1 \ +// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-PIC2 +// CHECK-NO-EXECUTE-PIC2: error: option '-mexecute-only' cannot be specified with '-fPIC' for the thumbv6m sub-architecture + +// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m -mexecute-only -fPIE %s 2>&1 \ +// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-PIE2 +// CHECK-NO-EXECUTE-PIE2: error: option '-mexecute-only' cannot be specified with '-fPIE' for the thumbv6m sub-architecture Index: clang/lib/Driver/ToolChains/Arch/ARM.cpp === --- clang/lib/Driver/ToolChains/Arch/ARM.cpp +++ clang/lib/Driver/ToolChains/Arch/ARM.cpp @@ -847,7 +847,13 @@ llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2 && llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6M) D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName(); -else if (Arg *B = Args.getLastArg(options::OPT_mno_movt)) +else if (llvm::ARM::parseArch(Triple.getArchName()) == llvm::ARM::ArchKind::ARMV6M) { + if (Arg *PIArg = Args.getLastArg(options::OPT_fropi, options::OPT_frwpi, + options::OPT_fpic, options::OPT_fpie, + options::OPT_fPIC, options::OPT_fPIE)) +D.Diag(diag::err_opt_not_valid_with_opt_on_target) +<< A->getAsString(Args) << PIArg->getAsString(Args) << Triple.getArchName(); +} else if (Arg *B = Args.getLastArg(options::OPT_mno_movt)) D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args); Features.push_back("+execute-only"); Index: clang/include/clang/Basic/DiagnosticCommonKinds.td === --- clang/include/clang/Basic/DiagnosticCommonKinds.td +++ clang/include/clang/Basic/DiagnosticCommonKinds.td @@ -338,6 +338,8 @@ "-mcmse is not supported for %0">; def err_opt_not_valid_with_opt : Error< "option '%0' cannot be specified with '%1'">; +def err_opt_not_valid_with_opt_on_target : Error< + "option '%0' cannot be specified with '%1' for the %2 sub-architecture">; def err_opt_not_valid_without_opt : Error< "option '%0' cannot be specified without '%1'">; def err_opt_not_valid_on_target : Error< Index: clang/test/Driver/arm-execute-only.c === --- clang/test/Driver/arm-execute-only.c +++ clang/test/Driver/arm-execute-only.c @@ -20,3 +20,27 @@ // RUN: not %c
[PATCH] D40256: [ARM] disable FPU features when using soft floating point.
keith.walker.arm created this revision. Herald added subscribers: kristof.beyls, javed.absar, aemerson. To be compatible with GCC if soft floating point is in effect any FPU specified is effectively ignored, eg, -mfloat-abi=soft -fpu=neon If any floating point features which require FPU hardware are enabled they must be disable. There was some support for doing this for NEON, but it did not handle VFP, nor did it prevent the backend from emitting the build attribute Tag_FP_arch describing the generated code as using the floating point hardware if a FPU was specified (even though soft float does not use the FPU). Disabling the hardware floating point features for targets which are compiling for soft float has meant that some tests which were incorrectly checking for hardware support also needed to be updated. In such cases, where appropriate the tests have been updated to check compiling for soft float and a non-soft float variant (usually softfp). This was usually because the target specified in the test defaulted to soft float. https://reviews.llvm.org/D40256 Files: lib/Driver/ToolChains/Arch/ARM.cpp test/Driver/arm-cortex-cpus.c test/Driver/arm-dotprod.c test/Driver/arm-mfpu.c test/Preprocessor/arm-target-features.c Index: test/Driver/arm-dotprod.c === --- test/Driver/arm-dotprod.c +++ test/Driver/arm-dotprod.c @@ -4,8 +4,19 @@ // RUN: %clang -### -target arm -march=armv8.3a %s 2>&1 | FileCheck %s --check-prefix=CHECK-NONE // CHECK-NONE-NOT: "-target-feature" "+dotprod" -// RUN: %clang -### -target arm -march=armv8.2a+dotprod %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -march=armv8.3a+dotprod %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -mcpu=cortex-a75 %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -mcpu=cortex-a55 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -march=armv8.2a+dotprod %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -march=armv8.3a+dotprod %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -mcpu=cortex-a75 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -mcpu=cortex-a55 %s 2>&1 | FileCheck %s // CHECK: "+dotprod" + +// The following default to -msoft-float +// RUN: %clang -### -target arm -march=armv8.2a+dotprod %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -march=armv8.3a+dotprod %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -mcpu=cortex-a75 %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -mcpu=cortex-a55 %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// CHECK-NO-DOTPROD: "-dotprod" Index: test/Driver/arm-cortex-cpus.c === --- test/Driver/arm-cortex-cpus.c +++ test/Driver/arm-cortex-cpus.c @@ -284,13 +284,13 @@ // RUN: %clang -target arm -march=armebv8.2-a -mbig-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V82A-THUMB %s // CHECK-BE-V82A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv8.2a-{{.*}}" "-target-cpu" "generic" -// RUN: %clang -target armv8a -march=armv8.2-a+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-V82A-FP16 %s +// RUN: %clang -target armv8a-linux-eabi -march=armv8.2-a+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-V82A-FP16 %s // CHECK-V82A-FP16: "-cc1"{{.*}} "-triple" "armv8.2{{.*}}" "-target-cpu" "generic" {{.*}}"-target-feature" "+fullfp16" // Once we have CPUs with optional v8.2-A FP16, we will need a way to turn it // on and off. Cortex-A53 is a placeholder for now. -// RUN: %clang -target armv8a -mcpu=cortex-a53+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s -// RUN: %clang -target armv8a -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s +// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s +// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s // CHECK-CORTEX-A53-FP16: "-cc1" {{.*}}"-target-cpu" "cortex-a53" {{.*}}"-target-feature" "+fullfp16" // CHECK-CORTEX-A53-NOFP16: "-cc1" {{.*}}"-target-cpu" "cortex-a53" {{.*}}"-target-feature" "-fullfp16" Index: test/Driver/arm-mfpu.c === --- test/Driver/arm-mfpu.c +++ test/Driver/arm-mfpu.c @@ -2,6 +2,8 @@ // RUN: %clang -target arm-linux-eabi %s -### -o %t.o 2>&1 \ // RUN: | FileCheck --check-prefix=CHECK-DEFAULT %s +// CHECK-DEFAULT-NOT: "-target-feature" "+soft-float" +// CHECK-DEFAULT: "-target-feature" "+soft-float-abi" // CHECK-DEFAULT-NOT: "-target-feature" "+vfp2" // CHECK-DEFAULT-NOT: "-target-feature" "+vfp3" // CHECK-DEFAULT-NOT: "-target-feature"
[PATCH] D40256: [ARM] disable FPU features when using soft floating point.
keith.walker.arm added inline comments. Comment at: lib/Driver/ToolChains/Arch/ARM.cpp:406 +const bool HasVFPv4 = (std::find(ItBegin, ItEnd, "+vfpv4") != ItEnd); +const bool HasFParmv8 = (std::find(ItBegin, ItEnd, "+fp-armv8") != ItEnd); +const bool HasFullFP16 = (std::find(ItBegin, ItEnd, "+fullfp16") != ItEnd); efriedma wrote: > I don't like explicitly enumerating the features like this; it'll mess up if > there's ever a new feature which isn't explicitly enumerated here. Can we > just do `Features.push_back("-vfpv2")` and depend on that to implicitly > disable all the other vfp features? I'll check on whether disabling a feature on which other features depend automatically disables the other features is something that can be relied upon (It would seem sensible that one could but need to check). That would certainly mean the code could be simplified, although I would also need to check the impact on the what is checked in the testing (only test for the base feature being disabled because the dependent features are automatically disabled). Comment at: lib/Driver/ToolChains/Arch/ARM.cpp:419 +Features.push_back("-fullfp16"); + +const bool HasNeon = (std::find(ItBegin, ItEnd, "+neon") != ItEnd); compnerd wrote: > It would be nice to not have these explicitly listed. But at the very least, > I think that having a list and looping through it would be better: > > for (const auto Feature : {"vfpv2", "vfpv3", "vfpv4", "fp-armv8", > "fullfp16"}) > if (std::find(std::begin(Features), std::end(Features), "+" + Feature) > == std::end(Features)) > continue; > else > Features.push_back("-" + Feature); This certainly looks a better way to do it if we do need to provide a list of features rather than relying on disabling a base feature on which the other features depend. https://reviews.llvm.org/D40256 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D42569: [ARM] disable FPU features when using soft floating point.
keith.walker.arm created this revision. keith.walker.arm added reviewers: efriedma, compnerd. Herald added subscribers: cfe-commits, kristof.beyls, javed.absar, aemerson. This change was orignally approved in Differential Revision https://reviews.llvm.org/D40256 and committed in r319420 and subsequently reverted in r319425. The problem was identified due to creating a local string which was placed in a vector used by the calling function resulting in undefined behaviour; this revised patch fixes this issue with a call to Args.MakeArgString() and updates the test results due to the fix (order of expected options changed requiring more matching patterns) and other changes affecting the tests since this issue was previously approved (macro hex constants changing case). Due to the number of changed lines in the tests I though I should get this change re-reviewed and approved. To be compatible with GCC if soft floating point is in effect any FPU specified is effectively ignored, eg, -mfloat-abi=soft -fpu=neon If any floating point features which require FPU hardware are enabled they must be disable. There was some support for doing this for NEON, but it did not handle VFP, nor did it prevent the backend from emitting the build attribute Tag_FP_arch describing the generated code as using the floating point hardware if a FPU was specified (even though soft float does not use the FPU). Disabling the hardware floating point features for targets which are compiling for soft float has meant that some tests which were incorrectly checking for hardware support also needed to be updated. In such cases, where appropriate the tests have been updated to check compiling for soft float and a non-soft float variant (usually softfp). This was usually because the target specified in the test defaulted to soft float. Repository: rC Clang https://reviews.llvm.org/D42569 Files: lib/Driver/ToolChains/Arch/ARM.cpp test/Driver/arm-cortex-cpus.c test/Driver/arm-dotprod.c test/Driver/arm-mfpu.c test/Preprocessor/arm-target-features.c Index: test/Driver/arm-dotprod.c === --- test/Driver/arm-dotprod.c +++ test/Driver/arm-dotprod.c @@ -4,8 +4,21 @@ // RUN: %clang -### -target arm -march=armv8.3a %s 2>&1 | FileCheck %s --check-prefix=CHECK-NONE // CHECK-NONE-NOT: "-target-feature" "+dotprod" -// RUN: %clang -### -target arm -march=armv8.2a+dotprod %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -march=armv8.3a+dotprod %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -mcpu=cortex-a75 %s 2>&1 | FileCheck %s -// RUN: %clang -### -target arm -mcpu=cortex-a55 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -march=armv8.2a+dotprod %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -march=armv8.3a+dotprod %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -mcpu=cortex-a75 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target arm-linux-eabi -mcpu=cortex-a55 %s 2>&1 | FileCheck %s // CHECK: "+dotprod" + +// The following default to -msoft-float +// RUN: %clang -### -target arm -march=armv8.2a+dotprod %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -march=armv8.3a+dotprod %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -mcpu=cortex-a75 %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// RUN: %clang -### -target arm -mcpu=cortex-a55 %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-NO-DOTPROD +// We rely on the backend disabling dotprod as it depends on neon, so check that +// neon is disabled after the dotprod was enabled. +// CHECK-NO-DOTPROD-NOT: "+dotprod" Index: test/Driver/arm-cortex-cpus.c === --- test/Driver/arm-cortex-cpus.c +++ test/Driver/arm-cortex-cpus.c @@ -284,13 +284,13 @@ // RUN: %clang -target arm -march=armebv8.2-a -mbig-endian -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V82A-THUMB %s // CHECK-BE-V82A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv8.2a-{{.*}}" "-target-cpu" "generic" -// RUN: %clang -target armv8a -march=armv8.2-a+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-V82A-FP16 %s +// RUN: %clang -target armv8a-linux-eabi -march=armv8.2-a+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-V82A-FP16 %s // CHECK-V82A-FP16: "-cc1"{{.*}} "-triple" "armv8.2{{.*}}" "-target-cpu" "generic" {{.*}}"-target-feature" "+fullfp16" // Once we have CPUs with optional v8.2-A FP16, we will need a way to turn it // on and off. Cortex-A53 is a placeholder for now. -// RUN: %clang -target armv8a -mcpu=cortex-a53+fp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s -// RUN: %clang -target armv8a -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s +// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+fp16 -###
[PATCH] D101532: [AArch64] Change __ARM_FEATURE_FP16FML macro name to __ARM_FEATURE_FP16_FML
This revision was automatically updated to reflect the committed changes. Closed by commit rG109bf25e2c42: [AArch64] Change __ARM_FEATURE_FP16FML macro name to __ARM_FEATURE_FP16_FML (authored by keith.walker.arm). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101532/new/ https://reviews.llvm.org/D101532 Files: clang/include/clang/Basic/arm_neon.td clang/lib/Basic/Targets/AArch64.cpp clang/test/Preprocessor/aarch64-target-features.c Index: clang/test/Preprocessor/aarch64-target-features.c === --- clang/test/Preprocessor/aarch64-target-features.c +++ clang/test/Preprocessor/aarch64-target-features.c @@ -207,8 +207,8 @@ // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16+nofp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s -// CHECK-FULLFP16-FML: #define __ARM_FEATURE_FP16FML 1 -// CHECK-FULLFP16-NOFML-NOT: #define __ARM_FEATURE_FP16FML 1 +// CHECK-FULLFP16-FML: #define __ARM_FEATURE_FP16_FML 1 +// CHECK-FULLFP16-NOFML-NOT: #define __ARM_FEATURE_FP16_FML 1 // CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1 // CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1 // CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FP 0xE @@ -220,7 +220,7 @@ // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8-a+fp16+nosimd -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-SCALAR %s // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16fml+nosimd -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-SCALAR %s // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16+nosimd -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-SCALAR %s -// CHECK-FULLFP16-SCALAR-NOT: #define __ARM_FEATURE_FP16FML 1 +// CHECK-FULLFP16-SCALAR-NOT: #define __ARM_FEATURE_FP16_FML 1 // CHECK-FULLFP16-SCALAR: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1 // CHECK-FULLFP16-SCALAR-NOT: #define __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1 // CHECK-FULLFP16-SCALAR: #define __ARM_FP 0xE @@ -234,7 +234,7 @@ // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+nofp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+nofp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s // RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16fml+nofp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s -// CHECK-FULLFP16-NOFML-VECTOR-SCALAR-NOT: #define __ARM_FEATURE_FP16FML 1 +// CHECK-FULLFP16-NOFML-VECTOR-SCALAR-NOT: #define __ARM_FEATURE_FP16_FML 1 // CHECK-FULLFP16-NOFML-VECTOR-SCALAR-NOT: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1 // CHECK-FULLFP16-NOFML-VECTOR-SCALAR-NOT: #define __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1 // CHECK-FULLFP16-NOFML-VECTOR-SCALAR: #define __ARM_FP 0xE Index: clang/lib/Basic/Targets/AArch64.cpp === --- clang/lib/Basic/Targets/AArch64.cpp +++ clang/lib/Basic/Targets/AArch64.cpp @@ -352,7 +352,7 @@ Builder.defineMacro("__ARM_FEATURE_SVE_MATMUL_INT8", "1"); if ((FPU & NeonMode) && HasFP16FML) -Builder.defineMacro("__ARM_FEATURE_FP16FML", "1"); +Builder.defineMacro("__ARM_FEATURE_FP16_FML", "1"); if (Opts.hasSignReturnAddress()) { // Bitmask: Index: clang/include/clang/Basic/arm_neon.td === --- clang/include/clang/Basic/arm_neon.td +++ clang/include/clang/Basic/arm_neon.td @@ -1889,7 +1889,7 @@ } // v8.2-A FP16 fused multiply-add long instructions. -let ArchGuard = "defined(__ARM_FEATURE_FP16FML) && defined(__aarch64__)" in { +let ArchGuard = "defined(__ARM_FEATURE_FP16_FML) && defined(__aarch64__)" in { def VFMLAL_LOW : SInst<"vfmlal_low", ">>..", "hQh">; def VFMLSL_LOW : SInst<"vfmlsl_low", ">>..", "hQh">; def VFMLAL_HIGH : SInst<"vfmlal_high", ">>..", "hQh">; Index: clang/test/Preprocessor/aarch64-target-features.c ==