[libclc] r314634 - Let get_work_dim take exactly 0 arguments
Author: jketema
Date: Sun Oct 1 13:11:46 2017
New Revision: 314634
URL: http://llvm.org/viewvc/llvm-project?rev=314634&view=rev
Log:
Let get_work_dim take exactly 0 arguments
Reviewed-by: Jan Vesely
Modified:
libclc/trunk/amdgcn/lib/workitem/get_work_dim.cl
libclc/trunk/generic/include/clc/workitem/get_work_dim.h
libclc/trunk/r600/lib/workitem/get_work_dim.cl
Modified: libclc/trunk/amdgcn/lib/workitem/get_work_dim.cl
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/amdgcn/lib/workitem/get_work_dim.cl?rev=314634&r1=314633&r2=314634&view=diff
==
--- libclc/trunk/amdgcn/lib/workitem/get_work_dim.cl (original)
+++ libclc/trunk/amdgcn/lib/workitem/get_work_dim.cl Sun Oct 1 13:11:46 2017
@@ -1,6 +1,6 @@
#include
-_CLC_DEF uint get_work_dim()
+_CLC_DEF uint get_work_dim(void)
{
__attribute__((address_space(2))) uint * ptr =
(__attribute__((address_space(2))) uint *)
Modified: libclc/trunk/generic/include/clc/workitem/get_work_dim.h
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/generic/include/clc/workitem/get_work_dim.h?rev=314634&r1=314633&r2=314634&view=diff
==
--- libclc/trunk/generic/include/clc/workitem/get_work_dim.h (original)
+++ libclc/trunk/generic/include/clc/workitem/get_work_dim.h Sun Oct 1
13:11:46 2017
@@ -1 +1 @@
-_CLC_DECL uint get_work_dim();
+_CLC_DECL uint get_work_dim(void);
Modified: libclc/trunk/r600/lib/workitem/get_work_dim.cl
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/r600/lib/workitem/get_work_dim.cl?rev=314634&r1=314633&r2=314634&view=diff
==
--- libclc/trunk/r600/lib/workitem/get_work_dim.cl (original)
+++ libclc/trunk/r600/lib/workitem/get_work_dim.cl Sun Oct 1 13:11:46 2017
@@ -1,6 +1,6 @@
#include
-_CLC_DEF uint get_work_dim()
+_CLC_DEF uint get_work_dim(void)
{
__attribute__((address_space(7))) uint * ptr =
(__attribute__((address_space(7))) uint *)
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[libclc] r314633 - Do no circularly define NULL
Author: jketema Date: Sun Oct 1 13:10:14 2017 New Revision: 314633 URL: http://llvm.org/viewvc/llvm-project?rev=314633&view=rev Log: Do no circularly define NULL Reviewed-by: Jan Vesely Modified: libclc/trunk/generic/include/clc/clcmacros.h Modified: libclc/trunk/generic/include/clc/clcmacros.h URL: http://llvm.org/viewvc/llvm-project/libclc/trunk/generic/include/clc/clcmacros.h?rev=314633&r1=314632&r2=314633&view=diff == --- libclc/trunk/generic/include/clc/clcmacros.h (original) +++ libclc/trunk/generic/include/clc/clcmacros.h Sun Oct 1 13:10:14 2017 @@ -9,7 +9,7 @@ #define CLC_VERSION_1_2 120 #endif -#define NULL ((void*)NULL) +#define NULL ((void*)0) #define __kernel_exec(X, typen) __kernel \ __attribute__((work_group_size_hint(X, 1, 1))) \ ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libclc] r314925 - Add vstore_half helpers for ptx
Author: jketema
Date: Wed Oct 4 12:07:48 2017
New Revision: 314925
URL: http://llvm.org/viewvc/llvm-project?rev=314925&view=rev
Log:
Add vstore_half helpers for ptx
Reviewed-by: Jan Vesely
Added:
libclc/trunk/ptx/lib/SOURCES_3.9
libclc/trunk/ptx/lib/SOURCES_4.0
libclc/trunk/ptx/lib/SOURCES_5.0
libclc/trunk/ptx/lib/shared/
libclc/trunk/ptx/lib/shared/vstore_half_helpers.ll
Added: libclc/trunk/ptx/lib/SOURCES_3.9
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx/lib/SOURCES_3.9?rev=314925&view=auto
==
--- libclc/trunk/ptx/lib/SOURCES_3.9 (added)
+++ libclc/trunk/ptx/lib/SOURCES_3.9 Wed Oct 4 12:07:48 2017
@@ -0,0 +1 @@
+shared/vstore_half_helpers.ll
Added: libclc/trunk/ptx/lib/SOURCES_4.0
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx/lib/SOURCES_4.0?rev=314925&view=auto
==
--- libclc/trunk/ptx/lib/SOURCES_4.0 (added)
+++ libclc/trunk/ptx/lib/SOURCES_4.0 Wed Oct 4 12:07:48 2017
@@ -0,0 +1 @@
+shared/vstore_half_helpers.ll
Added: libclc/trunk/ptx/lib/SOURCES_5.0
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx/lib/SOURCES_5.0?rev=314925&view=auto
==
--- libclc/trunk/ptx/lib/SOURCES_5.0 (added)
+++ libclc/trunk/ptx/lib/SOURCES_5.0 Wed Oct 4 12:07:48 2017
@@ -0,0 +1 @@
+shared/vstore_half_helpers.ll
Added: libclc/trunk/ptx/lib/shared/vstore_half_helpers.ll
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx/lib/shared/vstore_half_helpers.ll?rev=314925&view=auto
==
--- libclc/trunk/ptx/lib/shared/vstore_half_helpers.ll (added)
+++ libclc/trunk/ptx/lib/shared/vstore_half_helpers.ll Wed Oct 4 12:07:48 2017
@@ -0,0 +1,35 @@
+define void @__clc_vstore_half_float_helper__private(float %data, half
addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+ %res = fptrunc float %data to half
+ store half %res, half addrspace(0)* %ptr
+ ret void
+}
+
+define void @__clc_vstore_half_float_helper__global(float %data, half
addrspace(1)* nocapture %ptr) nounwind alwaysinline {
+ %res = fptrunc float %data to half
+ store half %res, half addrspace(1)* %ptr
+ ret void
+}
+
+define void @__clc_vstore_half_float_helper__local(float %data, half
addrspace(3)* nocapture %ptr) nounwind alwaysinline {
+ %res = fptrunc float %data to half
+ store half %res, half addrspace(3)* %ptr
+ ret void
+}
+
+define void @__clc_vstore_half_double_helper__private(double %data, half
addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+ %res = fptrunc double %data to half
+ store half %res, half addrspace(0)* %ptr
+ ret void
+}
+
+define void @__clc_vstore_half_double_helper__global(double %data, half
addrspace(1)* nocapture %ptr) nounwind alwaysinline {
+ %res = fptrunc double %data to half
+ store half %res, half addrspace(1)* %ptr
+ ret void
+}
+
+define void @__clc_vstore_half_double_helper__local(double %data, half
addrspace(3)* nocapture %ptr) nounwind alwaysinline {
+ %res = fptrunc double %data to half
+ store half %res, half addrspace(3)* %ptr
+ ret void
+}
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[libclc] r314998 - Add vload_half helpers for ptx
Author: jketema
Date: Thu Oct 5 11:17:40 2017
New Revision: 314998
URL: http://llvm.org/viewvc/llvm-project?rev=314998&view=rev
Log:
Add vload_half helpers for ptx
The removes the vload_half unresolved calls from the nvptx libraries.
Reviewed-by: Jan Vesely
Added:
libclc/trunk/ptx/lib/shared/vload_half_helpers.ll
Modified:
libclc/trunk/ptx/lib/SOURCES_3.9
libclc/trunk/ptx/lib/SOURCES_4.0
libclc/trunk/ptx/lib/SOURCES_5.0
Modified: libclc/trunk/ptx/lib/SOURCES_3.9
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx/lib/SOURCES_3.9?rev=314998&r1=314997&r2=314998&view=diff
==
--- libclc/trunk/ptx/lib/SOURCES_3.9 (original)
+++ libclc/trunk/ptx/lib/SOURCES_3.9 Thu Oct 5 11:17:40 2017
@@ -1 +1,2 @@
+shared/vload_half_helpers.ll
shared/vstore_half_helpers.ll
Modified: libclc/trunk/ptx/lib/SOURCES_4.0
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx/lib/SOURCES_4.0?rev=314998&r1=314997&r2=314998&view=diff
==
--- libclc/trunk/ptx/lib/SOURCES_4.0 (original)
+++ libclc/trunk/ptx/lib/SOURCES_4.0 Thu Oct 5 11:17:40 2017
@@ -1 +1,2 @@
+shared/vload_half_helpers.ll
shared/vstore_half_helpers.ll
Modified: libclc/trunk/ptx/lib/SOURCES_5.0
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx/lib/SOURCES_5.0?rev=314998&r1=314997&r2=314998&view=diff
==
--- libclc/trunk/ptx/lib/SOURCES_5.0 (original)
+++ libclc/trunk/ptx/lib/SOURCES_5.0 Thu Oct 5 11:17:40 2017
@@ -1 +1,2 @@
+shared/vload_half_helpers.ll
shared/vstore_half_helpers.ll
Added: libclc/trunk/ptx/lib/shared/vload_half_helpers.ll
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx/lib/shared/vload_half_helpers.ll?rev=314998&view=auto
==
--- libclc/trunk/ptx/lib/shared/vload_half_helpers.ll (added)
+++ libclc/trunk/ptx/lib/shared/vload_half_helpers.ll Thu Oct 5 11:17:40 2017
@@ -0,0 +1,23 @@
+define float @__clc_vload_half_float_helper__private(half addrspace(0)*
nocapture %ptr) nounwind alwaysinline {
+ %data = load half, half addrspace(0)* %ptr
+ %res = fpext half %data to float
+ ret float %res
+}
+
+define float @__clc_vload_half_float_helper__global(half addrspace(1)*
nocapture %ptr) nounwind alwaysinline {
+ %data = load half, half addrspace(1)* %ptr
+ %res = fpext half %data to float
+ ret float %res
+}
+
+define float @__clc_vload_half_float_helper__local(half addrspace(3)*
nocapture %ptr) nounwind alwaysinline {
+ %data = load half, half addrspace(3)* %ptr
+ %res = fpext half %data to float
+ ret float %res
+}
+
+define float @__clc_vload_half_float_helper__constant(half addrspace(4)*
nocapture %ptr) nounwind alwaysinline {
+ %data = load half, half addrspace(4)* %ptr
+ %res = fpext half %data to float
+ ret float %res
+}
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[libclc] r315147 - Delete empy directory
Author: jketema Date: Sat Oct 7 02:10:44 2017 New Revision: 315147 URL: http://llvm.org/viewvc/llvm-project?rev=315147&view=rev Log: Delete empy directory Removed: libclc/trunk/ptx/lib/integer/ ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libclc] r315228 - Make ptx barrier work irrespective of the cl_mem_fence_flags
Author: jketema
Date: Mon Oct 9 11:36:48 2017
New Revision: 315228
URL: http://llvm.org/viewvc/llvm-project?rev=315228&view=rev
Log:
Make ptx barrier work irrespective of the cl_mem_fence_flags
This generates a "bar.sync 0” instruction, which not only causes the
threads to wait, but does acts as a memory fence, as required by
OpenCL. The fence does not differentiate between local and global
memory. Unfortunately, there is no similar instruction which does
not include a memory fence. Hence, we cannot optimize the case
where neither CLK_LOCAL_MEM_FENCE nor CLK_GLOBAL_MEM_FENCE is
passed.
Modified:
libclc/trunk/ptx-nvidiacl/lib/synchronization/barrier.cl
Modified: libclc/trunk/ptx-nvidiacl/lib/synchronization/barrier.cl
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx-nvidiacl/lib/synchronization/barrier.cl?rev=315228&r1=315227&r2=315228&view=diff
==
--- libclc/trunk/ptx-nvidiacl/lib/synchronization/barrier.cl (original)
+++ libclc/trunk/ptx-nvidiacl/lib/synchronization/barrier.cl Mon Oct 9
11:36:48 2017
@@ -1,8 +1,6 @@
#include
_CLC_DEF void barrier(cl_mem_fence_flags flags) {
- if (flags & CLK_LOCAL_MEM_FENCE) {
-__syncthreads();
- }
+ __syncthreads();
}
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[libclc] r315235 - Implement mem_fence on ptx
Author: jketema
Date: Mon Oct 9 12:43:04 2017
New Revision: 315235
URL: http://llvm.org/viewvc/llvm-project?rev=315235&view=rev
Log:
Implement mem_fence on ptx
PTX does not differentiate between read and write fences. Hence, these a
lowered to a mem_fence call. The mem_fence function compiles to the
“member.cta” instruction, which commits all outstanding reads and writes
of a thread such that these become visible to all other threads in the same
CTA (i.e., work-group). The instruction does not differentiate between
global and local memory. Hence, the flags parameter is ignored, except
for deciding whether a “member.cta” instruction should be issued at all.
Reviewed-by: Jan Vesely
Added:
libclc/trunk/ptx-nvidiacl/lib/mem_fence/
libclc/trunk/ptx-nvidiacl/lib/mem_fence/fence.cl
Modified:
libclc/trunk/ptx-nvidiacl/lib/SOURCES
Modified: libclc/trunk/ptx-nvidiacl/lib/SOURCES
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx-nvidiacl/lib/SOURCES?rev=315235&r1=315234&r2=315235&view=diff
==
--- libclc/trunk/ptx-nvidiacl/lib/SOURCES (original)
+++ libclc/trunk/ptx-nvidiacl/lib/SOURCES Mon Oct 9 12:43:04 2017
@@ -1,3 +1,4 @@
+mem_fence/fence.cl
synchronization/barrier.cl
workitem/get_global_id.cl
workitem/get_group_id.cl
Added: libclc/trunk/ptx-nvidiacl/lib/mem_fence/fence.cl
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/ptx-nvidiacl/lib/mem_fence/fence.cl?rev=315235&view=auto
==
--- libclc/trunk/ptx-nvidiacl/lib/mem_fence/fence.cl (added)
+++ libclc/trunk/ptx-nvidiacl/lib/mem_fence/fence.cl Mon Oct 9 12:43:04 2017
@@ -0,0 +1,15 @@
+#include
+
+_CLC_DEF void mem_fence(cl_mem_fence_flags flags) {
+ if (flags & (CLK_GLOBAL_MEM_FENCE | CLK_LOCAL_MEM_FENCE))
+ __nvvm_membar_cta();
+}
+
+// We do not have separate mechanism for read and write fences.
+_CLC_DEF void read_mem_fence(cl_mem_fence_flags flags) {
+ mem_fence(flags);
+}
+
+_CLC_DEF void write_mem_fence(cl_mem_fence_flags flags) {
+ mem_fence(flags);
+}
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[libclc] r294915 - Add the correct prefixes to the cl_khr_fp64 pragma
Author: jketema Date: Sun Feb 12 15:31:41 2017 New Revision: 294915 URL: http://llvm.org/viewvc/llvm-project?rev=294915&view=rev Log: Add the correct prefixes to the cl_khr_fp64 pragma Modified: libclc/trunk/generic/include/clc/shared/vstore.h Modified: libclc/trunk/generic/include/clc/shared/vstore.h URL: http://llvm.org/viewvc/llvm-project/libclc/trunk/generic/include/clc/shared/vstore.h?rev=294915&r1=294914&r2=294915&view=diff == --- libclc/trunk/generic/include/clc/shared/vstore.h (original) +++ libclc/trunk/generic/include/clc/shared/vstore.h Sun Feb 12 15:31:41 2017 @@ -29,7 +29,7 @@ _CLC_VECTOR_VSTORE_PRIM3(_half, half, float) #ifdef cl_khr_fp64 -#pragma cl_khr_fp64: enable +#pragma OPENCL EXTENSION cl_khr_fp64: enable _CLC_VECTOR_VSTORE_PRIM1(double) _CLC_VECTOR_VSTORE_PRIM3(_half, half, double) _CLC_VSTORE_DECL(_half, half, double, , __private) ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libclc] r294916 - Move BufferPtr into the block where it it being used
Author: jketema
Date: Sun Feb 12 15:33:49 2017
New Revision: 294916
URL: http://llvm.org/viewvc/llvm-project?rev=294916&view=rev
Log:
Move BufferPtr into the block where it it being used
The previous location outside the block would crash prepare-builtins
when no the builtins file accidentially not passed on the command line.
Modified:
libclc/trunk/utils/prepare-builtins.cpp
Modified: libclc/trunk/utils/prepare-builtins.cpp
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/utils/prepare-builtins.cpp?rev=294916&r1=294915&r2=294916&view=diff
==
--- libclc/trunk/utils/prepare-builtins.cpp (original)
+++ libclc/trunk/utils/prepare-builtins.cpp Sun Feb 12 15:33:49 2017
@@ -36,10 +36,10 @@ int main(int argc, char **argv) {
{
ErrorOr> BufferOrErr =
MemoryBuffer::getFile(InputFilename);
-std::unique_ptr &BufferPtr = BufferOrErr.get();
-if (std::error_code ec = BufferOrErr.getError())
+if (std::error_code ec = BufferOrErr.getError()) {
ErrorMessage = ec.message();
-else {
+} else {
+ std::unique_ptr &BufferPtr = BufferOrErr.get();
ErrorOr> ModuleOrErr =
expectedToErrorOrAndEmitErrors(Context,
parseBitcodeFile(BufferPtr.get()->getMemBufferRef(), Context));
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[PATCH] D13127: [ARM] Upgrade codegen for vld[234] and vst[234] to to communicate a 0 address space
jketema created this revision.
jketema added a reviewer: sbaranga.
jketema added a subscriber: cfe-commits.
Herald added subscribers: rengolin, aemerson.
This if the clang companion patch for http://reviews.llvm.org/D12985, which
upgrades the vld[234] and vst[234] to take pointers annotated with an address
space.
http://reviews.llvm.org/D13127
Files:
lib/CodeGen/CGBuiltin.cpp
test/CodeGen/vld_dup.c
Index: test/CodeGen/vld_dup.c
===
--- test/CodeGen/vld_dup.c
+++ test/CodeGen/vld_dup.c
@@ -41,10 +41,10 @@
// CHECK-NEXT: [[T190:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>,
<2 x i32> } [[T187]], <2 x i32> [[T189]], 3
v4 = vld3_dup_s64(v6);
-// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> }
@llvm.arm.neon.vld3.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
+// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> }
@llvm.arm.neon.vld3.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
v5 = vld4_dup_s64(v7);
-// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }
@llvm.arm.neon.vld4.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
+// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }
@llvm.arm.neon.vld4.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
return 0;
}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -2890,7 +2890,8 @@
case NEON::BI__builtin_neon_vld3q_v:
case NEON::BI__builtin_neon_vld4_v:
case NEON::BI__builtin_neon_vld4q_v: {
-Function *F = CGM.getIntrinsic(LLVMIntrinsic, Ty);
+llvm::Type *Tys[] = {Ty, Int8PtrTy};
+Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys);
Value *Align = getAlignmentValue32(PtrOp1);
Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint);
Ty = llvm::PointerType::getUnqual(Ops[1]->getType());
@@ -3019,14 +3020,18 @@
case NEON::BI__builtin_neon_vshr_n_v:
case NEON::BI__builtin_neon_vshrq_n_v:
return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n");
- case NEON::BI__builtin_neon_vst1_v:
- case NEON::BI__builtin_neon_vst1q_v:
case NEON::BI__builtin_neon_vst2_v:
case NEON::BI__builtin_neon_vst2q_v:
case NEON::BI__builtin_neon_vst3_v:
case NEON::BI__builtin_neon_vst3q_v:
case NEON::BI__builtin_neon_vst4_v:
- case NEON::BI__builtin_neon_vst4q_v:
+ case NEON::BI__builtin_neon_vst4q_v: {
+llvm::Type *Tys[] = {Int8PtrTy, Ty};
+Ops.push_back(getAlignmentValue32(PtrOp0));
+return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "");
+ }
+ case NEON::BI__builtin_neon_vst1_v:
+ case NEON::BI__builtin_neon_vst1q_v:
case NEON::BI__builtin_neon_vst2_lane_v:
case NEON::BI__builtin_neon_vst2q_lane_v:
case NEON::BI__builtin_neon_vst3_lane_v:
@@ -3794,7 +3799,8 @@
break;
default: llvm_unreachable("unknown vld_dup intrinsic?");
}
- Function *F = CGM.getIntrinsic(Int, Ty);
+ llvm::Type *Tys[] = {Ty, Int8PtrTy};
+ Function *F = CGM.getIntrinsic(Int, Tys);
llvm::Value *Align = getAlignmentValue32(PtrOp1);
Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup");
Ty = llvm::PointerType::getUnqual(Ops[1]->getType());
Index: test/CodeGen/vld_dup.c
===
--- test/CodeGen/vld_dup.c
+++ test/CodeGen/vld_dup.c
@@ -41,10 +41,10 @@
// CHECK-NEXT: [[T190:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T187]], <2 x i32> [[T189]], 3
v4 = vld3_dup_s64(v6);
-// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld3.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
+// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld3.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
v5 = vld4_dup_s64(v7);
-// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld4.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
+// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld4.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
return 0;
}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -2890,7 +2890,8 @@
case NEON::BI__builtin_neon_vld3q_v:
case NEON::BI__builtin_neon_vld4_v:
case NEON::BI__builtin_neon_vld4q_v: {
-Function *F = CGM.getIntrinsic(LLVMIntrinsic, Ty);
+llvm::Type *Tys[] = {Ty, Int8PtrTy};
+Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys);
Value *Align = getAlignmentValue32(PtrOp1);
Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint);
Ty = llvm::PointerType::getUnqual(Ops[1]->getType());
@@ -3019,14 +3020,18 @@
case NEON::BI__builtin_neon_vshr_n_v:
case NEON::BI__builtin_neon_vshrq_n_v:
return EmitNeonRShiftImm(Ops[0], Ops[1], Ty, Usgn, "vshr_n");
- case NEON::BI__builtin_neon_vst1_v:
- case NEON::BI__builtin
Re: [PATCH] D13127: [ARM] Upgrade codegen for vld[234] and vst[234] to to communicate a 0 address space
jketema updated this revision to Diff 35871.
jketema added a comment.
Sync with updates to the llvm part of this patch
http://reviews.llvm.org/D13127
Files:
lib/CodeGen/CGBuiltin.cpp
test/CodeGen/arm-neon-misc.c
test/CodeGen/arm-vector-align.c
test/CodeGen/vld_dup.c
Index: test/CodeGen/vld_dup.c
===
--- test/CodeGen/vld_dup.c
+++ test/CodeGen/vld_dup.c
@@ -14,7 +14,7 @@
int64_t v7[4];
v1 = vld3_dup_s32(v0);
-// CHECK: [[T168:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld3lane.v2i32(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
+// CHECK: [[T168:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld3lane.v2i32.p0i8(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
// CHECK-NEXT: [[T169:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T168]], 0
// CHECK-NEXT: [[T170:%.*]] = shufflevector <2 x i32> [[T169]], <2 x i32> [[T169]], <2 x i32> zeroinitializer
// CHECK-NEXT: [[T171:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T168]], <2 x i32> [[T170]], 0
@@ -26,7 +26,7 @@
// CHECK-NEXT: [[T177:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T174]], <2 x i32> [[T176]], 2
v3 = vld4_dup_s32(v2);
-// CHECK: [[T178:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld4lane.v2i32(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
+// CHECK: [[T178:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld4lane.v2i32.p0i8(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
// CHECK-NEXT: [[T179:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T178]], 0
// CHECK-NEXT: [[T180:%.*]] = shufflevector <2 x i32> [[T179]], <2 x i32> [[T179]], <2 x i32> zeroinitializer
// CHECK-NEXT: [[T181:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T178]], <2 x i32> [[T180]], 0
@@ -41,10 +41,10 @@
// CHECK-NEXT: [[T190:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T187]], <2 x i32> [[T189]], 3
v4 = vld3_dup_s64(v6);
-// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld3.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
+// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld3.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
v5 = vld4_dup_s64(v7);
-// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld4.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
+// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld4.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
return 0;
}
Index: test/CodeGen/arm-vector-align.c
===
--- test/CodeGen/arm-vector-align.c
+++ test/CodeGen/arm-vector-align.c
@@ -14,9 +14,9 @@
typedef float AlignedAddr __attribute__ ((aligned (16)));
void t1(AlignedAddr *addr1, AlignedAddr *addr2) {
// CHECK: @t1
-// CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %{{.*}}, i32 16)
+// CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32.p0i8(i8* %{{.*}}, i32 16)
float32x4_t a = vld1q_f32(addr1);
-// CHECK: call void @llvm.arm.neon.vst1.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16)
+// CHECK: call void @llvm.arm.neon.vst1.p0i8.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16)
vst1q_f32(addr2, a);
}
Index: test/CodeGen/arm-neon-misc.c
===
--- test/CodeGen/arm-neon-misc.c
+++ test/CodeGen/arm-neon-misc.c
@@ -14,20 +14,20 @@
void t1(uint64_t *src, uint8_t *dst) {
// CHECK: @t1
uint64x2_t q = vld1q_u64(src);
-// CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
+// CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64.p0i8
vst1q_lane_u64(dst, q, 1);
// CHECK: bitcast <16 x i8> %{{.*}} to <2 x i64>
// CHECK: shufflevector <2 x i64>
-// CHECK: call void @llvm.arm.neon.vst1.v1i64
+// CHECK: call void @llvm.arm.neon.vst1.p0i8.v1i64
}
void t2(uint64_t *src1, uint8_t *src2, uint64x2_t *dst) {
// CHECK: @t2
uint64x2_t q = vld1q_u64(src1);
-// CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
+// CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64.p0i8
q = vld1q_lane_u64(src2, q, 0);
// CHECK: shufflevector <2 x i64>
-// CHECK: call <1 x i64> @llvm.arm.neon.vld1.v1i64
+// CHECK: call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8
// CHECK: shufflevector <1 x i64>
*dst = q;
// CHECK: store <2 x i64>
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -2895,16 +2895,19 @@
return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]});
}
case NEON::BI__builtin_neon_vld1_v:
- case NEON::BI__builtin_neon_vld1q_
Re: [PATCH] D13127: [ARM] Upgrade codegen for vld[234] and vst[234] to to communicate a 0 address space
This revision was automatically updated to reflect the committed changes.
Closed by commit rL24: [ARM][NEON] Use address space in
vld([1234]|[234]lane) and vst([1234]|… (authored by jketema).
Changed prior to commit:
http://reviews.llvm.org/D13127?vs=35871&id=36082#toc
Repository:
rL LLVM
http://reviews.llvm.org/D13127
Files:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/arm-neon-misc.c
cfe/trunk/test/CodeGen/arm-vector-align.c
cfe/trunk/test/CodeGen/vld_dup.c
Index: cfe/trunk/test/CodeGen/vld_dup.c
===
--- cfe/trunk/test/CodeGen/vld_dup.c
+++ cfe/trunk/test/CodeGen/vld_dup.c
@@ -14,7 +14,7 @@
int64_t v7[4];
v1 = vld3_dup_s32(v0);
-// CHECK: [[T168:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld3lane.v2i32(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
+// CHECK: [[T168:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld3lane.v2i32.p0i8(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
// CHECK-NEXT: [[T169:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T168]], 0
// CHECK-NEXT: [[T170:%.*]] = shufflevector <2 x i32> [[T169]], <2 x i32> [[T169]], <2 x i32> zeroinitializer
// CHECK-NEXT: [[T171:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T168]], <2 x i32> [[T170]], 0
@@ -26,7 +26,7 @@
// CHECK-NEXT: [[T177:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32> } [[T174]], <2 x i32> [[T176]], 2
v3 = vld4_dup_s32(v2);
-// CHECK: [[T178:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld4lane.v2i32(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
+// CHECK: [[T178:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld4lane.v2i32.p0i8(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
// CHECK-NEXT: [[T179:%.*]] = extractvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T178]], 0
// CHECK-NEXT: [[T180:%.*]] = shufflevector <2 x i32> [[T179]], <2 x i32> [[T179]], <2 x i32> zeroinitializer
// CHECK-NEXT: [[T181:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T178]], <2 x i32> [[T180]], 0
@@ -41,10 +41,10 @@
// CHECK-NEXT: [[T190:%.*]] = insertvalue { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[T187]], <2 x i32> [[T189]], 3
v4 = vld3_dup_s64(v6);
-// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld3.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
+// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld3.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
v5 = vld4_dup_s64(v7);
-// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld4.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
+// CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld4.v1i64.p0i8(i8* {{.*}}, i32 {{[0-9]+}})
return 0;
}
Index: cfe/trunk/test/CodeGen/arm-vector-align.c
===
--- cfe/trunk/test/CodeGen/arm-vector-align.c
+++ cfe/trunk/test/CodeGen/arm-vector-align.c
@@ -14,9 +14,9 @@
typedef float AlignedAddr __attribute__ ((aligned (16)));
void t1(AlignedAddr *addr1, AlignedAddr *addr2) {
// CHECK: @t1
-// CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %{{.*}}, i32 16)
+// CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32.p0i8(i8* %{{.*}}, i32 16)
float32x4_t a = vld1q_f32(addr1);
-// CHECK: call void @llvm.arm.neon.vst1.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16)
+// CHECK: call void @llvm.arm.neon.vst1.p0i8.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16)
vst1q_f32(addr2, a);
}
Index: cfe/trunk/test/CodeGen/arm-neon-misc.c
===
--- cfe/trunk/test/CodeGen/arm-neon-misc.c
+++ cfe/trunk/test/CodeGen/arm-neon-misc.c
@@ -14,20 +14,20 @@
void t1(uint64_t *src, uint8_t *dst) {
// CHECK: @t1
uint64x2_t q = vld1q_u64(src);
-// CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
+// CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64.p0i8
vst1q_lane_u64(dst, q, 1);
// CHECK: bitcast <16 x i8> %{{.*}} to <2 x i64>
// CHECK: shufflevector <2 x i64>
-// CHECK: call void @llvm.arm.neon.vst1.v1i64
+// CHECK: call void @llvm.arm.neon.vst1.p0i8.v1i64
}
void t2(uint64_t *src1, uint8_t *src2, uint64x2_t *dst) {
// CHECK: @t2
uint64x2_t q = vld1q_u64(src1);
-// CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
+// CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64.p0i8
q = vld1q_lane_u64(src2, q, 0);
// CHECK: shufflevector <2 x i64>
-// CHECK: call <1 x i64> @llvm.arm.neon.vld1.v1i64
+// CHECK: call <1 x i64> @llvm.arm.neon.vld1.v1i64.p0i8
// CHECK: shufflevector <1 x i64>
*dst = q;
// CHECK: store <2 x i64>
Index: cfe/trunk/
r248888 - [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
Author: jketema
Date: Wed Sep 30 05:56:56 2015
New Revision: 24
URL: http://llvm.org/viewvc/llvm-project?rev=24&view=rev
Log:
[ARM][NEON] Use address space in vld([1234]|[234]lane) and
vst([1234]|[234]lane) instructions
This is the clang commit associated with llvm r248887.
This commit changes the interface of the vld[1234], vld[234]lane, and vst[1234],
vst[234]lane ARM neon intrinsics and associates an address space with the
pointer that these intrinsics take. This changes, e.g.,
<2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32)
to
<2 x i32> @llvm.arm.neon.vld1.v2i32.p0i8(i8*, i32)
This change ensures that address spaces are fully taken into account in the ARM
target during lowering of interleaved loads and stores.
Differential Revision: http://reviews.llvm.org/D13127
Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/arm-neon-misc.c
cfe/trunk/test/CodeGen/arm-vector-align.c
cfe/trunk/test/CodeGen/vld_dup.c
Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=24&r1=248887&r2=24&view=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Wed Sep 30 05:56:56 2015
@@ -2895,16 +2895,19 @@ Value *CodeGenFunction::EmitCommonNeonBu
return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0]});
}
case NEON::BI__builtin_neon_vld1_v:
- case NEON::BI__builtin_neon_vld1q_v:
+ case NEON::BI__builtin_neon_vld1q_v: {
+llvm::Type *Tys[] = {Ty, Int8PtrTy};
Ops.push_back(getAlignmentValue32(PtrOp0));
-return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Ty), Ops, "vld1");
+return EmitNeonCall(CGM.getIntrinsic(LLVMIntrinsic, Tys), Ops, "vld1");
+ }
case NEON::BI__builtin_neon_vld2_v:
case NEON::BI__builtin_neon_vld2q_v:
case NEON::BI__builtin_neon_vld3_v:
case NEON::BI__builtin_neon_vld3q_v:
case NEON::BI__builtin_neon_vld4_v:
case NEON::BI__builtin_neon_vld4q_v: {
-Function *F = CGM.getIntrinsic(LLVMIntrinsic, Ty);
+llvm::Type *Tys[] = {Ty, Int8PtrTy};
+Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys);
Value *Align = getAlignmentValue32(PtrOp1);
Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, NameHint);
Ty = llvm::PointerType::getUnqual(Ops[1]->getType());
@@ -2927,7 +2930,8 @@ Value *CodeGenFunction::EmitCommonNeonBu
case NEON::BI__builtin_neon_vld3q_lane_v:
case NEON::BI__builtin_neon_vld4_lane_v:
case NEON::BI__builtin_neon_vld4q_lane_v: {
-Function *F = CGM.getIntrinsic(LLVMIntrinsic, Ty);
+llvm::Type *Tys[] = {Ty, Int8PtrTy};
+Function *F = CGM.getIntrinsic(LLVMIntrinsic, Tys);
for (unsigned I = 2; I < Ops.size() - 1; ++I)
Ops[I] = Builder.CreateBitCast(Ops[I], Ty);
Ops.push_back(getAlignmentValue32(PtrOp1));
@@ -3046,9 +3050,11 @@ Value *CodeGenFunction::EmitCommonNeonBu
case NEON::BI__builtin_neon_vst3_lane_v:
case NEON::BI__builtin_neon_vst3q_lane_v:
case NEON::BI__builtin_neon_vst4_lane_v:
- case NEON::BI__builtin_neon_vst4q_lane_v:
+ case NEON::BI__builtin_neon_vst4q_lane_v: {
+llvm::Type *Tys[] = {Int8PtrTy, Ty};
Ops.push_back(getAlignmentValue32(PtrOp0));
-return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "");
+return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "");
+ }
case NEON::BI__builtin_neon_vsubhn_v: {
llvm::VectorType *SrcTy =
llvm::VectorType::getExtendedElementVectorType(VTy);
@@ -3776,7 +3782,8 @@ Value *CodeGenFunction::EmitARMBuiltinEx
Ops[1] = Builder.CreateShuffleVector(Ops[1], Ops[1], SV);
// Load the value as a one-element vector.
Ty = llvm::VectorType::get(VTy->getElementType(), 1);
- Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Ty);
+ llvm::Type *Tys[] = {Ty, Int8PtrTy};
+ Function *F = CGM.getIntrinsic(Intrinsic::arm_neon_vld1, Tys);
Value *Align = getAlignmentValue32(PtrOp0);
Value *Ld = Builder.CreateCall(F, {Ops[0], Align});
// Combine them.
@@ -3808,7 +3815,8 @@ Value *CodeGenFunction::EmitARMBuiltinEx
break;
default: llvm_unreachable("unknown vld_dup intrinsic?");
}
- Function *F = CGM.getIntrinsic(Int, Ty);
+ llvm::Type *Tys[] = {Ty, Int8PtrTy};
+ Function *F = CGM.getIntrinsic(Int, Tys);
llvm::Value *Align = getAlignmentValue32(PtrOp1);
Ops[1] = Builder.CreateCall(F, {Ops[1], Align}, "vld_dup");
Ty = llvm::PointerType::getUnqual(Ops[1]->getType());
@@ -3827,7 +3835,8 @@ Value *CodeGenFunction::EmitARMBuiltinEx
break;
default: llvm_unreachable("unknown vld_dup intrinsic?");
}
-Function *F = CGM.getIntrinsic(Int, Ty);
+llvm::Type *Tys[] = {Ty, Int8PtrTy};
+Function *F = CGM.getIntrinsic(Int, Tys);
llvm::StructType *STy = cast(F->getReturnType());
SmallVector Args;
@@ -3902,8 +3911,9 @@ Value *CodeGenFunction::EmitARMB
[libclc] r244987 - Remove files accidentally not removed in r244310
Author: jketema Date: Thu Aug 13 18:43:12 2015 New Revision: 244987 URL: http://llvm.org/viewvc/llvm-project?rev=244987&view=rev Log: Remove files accidentally not removed in r244310 Removed: libclc/trunk/generic/lib/LLVM3.6/ libclc/trunk/generic/lib/SOURCES_LLVM3.6 Removed: libclc/trunk/generic/lib/SOURCES_LLVM3.6 URL: http://llvm.org/viewvc/llvm-project/libclc/trunk/generic/lib/SOURCES_LLVM3.6?rev=244986&view=auto == --- libclc/trunk/generic/lib/SOURCES_LLVM3.6 (original) +++ libclc/trunk/generic/lib/SOURCES_LLVM3.6 (removed) @@ -1 +0,0 @@ -subnormal_helper_func.ll ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libclc] r244310 - Require LLVM >=3.7 and bump version to 0.2.0
Author: jketema
Date: Fri Aug 7 03:31:37 2015
New Revision: 244310
URL: http://llvm.org/viewvc/llvm-project?rev=244310&view=rev
Log:
Require LLVM >=3.7 and bump version to 0.2.0
v2: Also remove LLVM 3.6 traces from prepare-builtins.cpp
Patch by: EdB
Modified:
libclc/trunk/configure.py
libclc/trunk/utils/prepare-builtins.cpp
Modified: libclc/trunk/configure.py
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/configure.py?rev=244310&r1=244309&r2=244310&view=diff
==
--- libclc/trunk/configure.py (original)
+++ libclc/trunk/configure.py Fri Aug 7 03:31:37 2015
@@ -5,7 +5,7 @@ def c_compiler_rule(b, name, description
b.rule(name, command, description + " $out", depfile="$out.d")
version_major = 0;
-version_minor = 1;
+version_minor = 2;
version_patch = 0;
from optparse import OptionParser
@@ -66,12 +66,13 @@ def llvm_config(args):
sys.exit(1)
llvm_version = string.split(string.replace(llvm_config(['--version']), 'svn',
''), '.')
-if (int(llvm_version[0]) != 3 and int(llvm_version[1]) != 6):
-print "libclc requires LLVM 3.6"
-sys.exit(1)
-
+llvm_int_version = int(llvm_version[0]) * 100 + int(llvm_version[1]) * 10
llvm_string_version = 'LLVM' + llvm_version[0] + '.' + llvm_version[1]
+if llvm_int_version < 370:
+print "libclc requires LLVM >= 3.7"
+sys.exit(1)
+
llvm_system_libs = llvm_config(['--system-libs'])
llvm_bindir = llvm_config(['--bindir'])
llvm_core_libs = llvm_config(['--libs', 'core', 'bitreader', 'bitwriter']) + '
' + \
Modified: libclc/trunk/utils/prepare-builtins.cpp
URL:
http://llvm.org/viewvc/llvm-project/libclc/trunk/utils/prepare-builtins.cpp?rev=244310&r1=244309&r2=244310&view=diff
==
--- libclc/trunk/utils/prepare-builtins.cpp (original)
+++ libclc/trunk/utils/prepare-builtins.cpp Fri Aug 7 03:31:37 2015
@@ -14,10 +14,6 @@
#include
-#define LLVM_360 \
- (LLVM_VERSION_MAJOR == 3 && LLVM_VERSION_MINOR == 6)
-
-
using namespace llvm;
static cl::opt
@@ -43,20 +39,12 @@ int main(int argc, char **argv) {
if (std::error_code ec = BufferOrErr.getError())
ErrorMessage = ec.message();
else {
-#if LLVM_360
- ErrorOr
-#else
- ErrorOr>
-#endif
- ModuleOrErr =
+ ErrorOr> ModuleOrErr =
parseBitcodeFile(BufferPtr.get()->getMemBufferRef(), Context);
if (std::error_code ec = ModuleOrErr.getError())
ErrorMessage = ec.message();
-#if LLVM_360
- M = ModuleOrErr.get();
-#else
+
M = ModuleOrErr.get().release();
-#endif
}
}
___
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cfe-commits@lists.llvm.org
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Re: r269670 - [OpenCL] Add supported OpenCL extensions to target info.
Hi,
The below commit enables all OpenCL extensions for the SPIR target by default.
This incorrect, as SPIR allows you to specify which extensions are
enabled/disabled its metadata. This means that any SPIR generated by Clang may
now be rejected by specific OpenCL platforms, because they might not support
all extensions.
If possible I would like to see this commit reverted until that problem has
been addressed.
Regards,
Jeroen
> On 16 May 2016, at 18:06, Yaxun Liu via cfe-commits lists.llvm.org> wrote:
>
> Author: yaxunl
> Date: Mon May 16 12:06:34 2016
> New Revision: 269670
>
> URL: http://llvm.org/viewvc/llvm-project?rev=269670&view=rev
> Log:
> [OpenCL] Add supported OpenCL extensions to target info.
>
> Add supported OpenCL extensions to target info. It serves as default values
> to save the users of the burden setting each supported extensions and
> optional core features in command line.
>
> Re-commit after fixing build error due to missing override attribute.
>
> Differential Revision: http://reviews.llvm.org/D19484
>
> Added:
> cfe/trunk/include/clang/Basic/OpenCLOptions.h
> cfe/trunk/test/SemaOpenCL/extensions.cl
> Removed:
> cfe/trunk/test/SemaOpenCL/extension-fp64-cl1.1.cl
> cfe/trunk/test/SemaOpenCL/extension-fp64.cl
> cfe/trunk/test/SemaOpenCL/optional-core-fp64-cl1.2.cl
> cfe/trunk/test/SemaOpenCL/optional-core-fp64-cl2.0.cl
> Modified:
> cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td
> cfe/trunk/include/clang/Basic/LangOptions.h
> cfe/trunk/include/clang/Basic/OpenCLExtensions.def
> cfe/trunk/include/clang/Basic/TargetInfo.h
> cfe/trunk/include/clang/Basic/TargetOptions.h
> cfe/trunk/lib/Basic/Targets.cpp
> cfe/trunk/lib/Frontend/InitPreprocessor.cpp
> cfe/trunk/lib/Parse/ParsePragma.cpp
> cfe/trunk/lib/Sema/Sema.cpp
> cfe/trunk/test/CodeGenOpenCL/builtins-r600.cl
> cfe/trunk/test/CodeGenOpenCL/fpmath.cl
> cfe/trunk/test/CodeGenOpenCL/half.cl
> cfe/trunk/test/Lexer/opencl-half-literal.cl
> cfe/trunk/test/Misc/languageOptsOpenCL.cl
> cfe/trunk/test/PCH/opencl-extensions.cl
> cfe/trunk/test/Parser/opencl-astype.cl
> cfe/trunk/test/Parser/opencl-atomics-cl20.cl
> cfe/trunk/test/Parser/opencl-pragma.cl
> cfe/trunk/test/Parser/opencl-storage-class.cl
> cfe/trunk/test/SemaOpenCL/half.cl
> cfe/trunk/test/SemaOpenCL/invalid-kernel-parameters.cl
> cfe/trunk/test/SemaOpenCL/invalid-logical-ops-1.2.cl
>
> Modified: cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td?rev=269670&r1=269669&r2=269670&view=diff
> ==
> --- cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td (original)
> +++ cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td Mon May 16 12:06:34
> 2016
> @@ -926,6 +926,10 @@ def warn_pragma_expected_enable_disable
> "expected 'enable' or 'disable' - ignoring">, InGroup;
> def warn_pragma_unknown_extension : Warning<
> "unknown OpenCL extension %0 - ignoring">, InGroup;
> +def warn_pragma_unsupported_extension : Warning<
> + "unsupported OpenCL extension %0 - ignoring">, InGroup;
> +def warn_pragma_extension_is_core : Warning<
> + "OpenCL extension %0 is core feature or supported optional core feature -
> ignoring">, InGroup;
>
> // OpenCL errors.
> def err_opencl_taking_function_address_parser : Error<
>
> Modified: cfe/trunk/include/clang/Basic/LangOptions.h
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/LangOptions.h?rev=269670&r1=269669&r2=269670&view=diff
> ==
> --- cfe/trunk/include/clang/Basic/LangOptions.h (original)
> +++ cfe/trunk/include/clang/Basic/LangOptions.h Mon May 16 12:06:34 2016
> @@ -160,18 +160,6 @@ public:
>fp_contract(LangOpts.DefaultFPContract) {}
> };
>
> -/// \brief OpenCL volatile options
> -class OpenCLOptions {
> -public:
> -#define OPENCLEXT(nm) unsigned nm : 1;
> -#include "clang/Basic/OpenCLExtensions.def"
> -
> - OpenCLOptions() {
> -#define OPENCLEXT(nm) nm = 0;
> -#include "clang/Basic/OpenCLExtensions.def"
> - }
> -};
> -
> /// \brief Describes the kind of translation unit being processed.
> enum TranslationUnitKind {
> /// \brief The translation unit is a complete translation unit.
>
> Modified: cfe/trunk/include/clang/Basic/OpenCLExtensions.def
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/OpenCLExtensions.def?rev=269670&r1=269669&r2=269670&view=diff
> ==
> --- cfe/trunk/include/clang/Basic/OpenCLExtensions.def (original)
> +++ cfe/trunk/include/clang/Basic/OpenCLExtensions.def Mon May 16 12:06:34
> 2016
> @@ -11,25 +11,67 @@
> //
> //===--===//
>
> +// Macro OPENCLEXT or OPENCLEXT_INTERNAL can be d
Re: r263795 - Add -fnative-half-arguments-and-returns
Hi,
The below commit is, as it enables half arguments and returns by default for
OpenCL, while this is actually an extension that might not be supported on all
platforms. I think that this part of the commit should be reverted:
> --- cfe/trunk/lib/Frontend/CompilerInvocation.cpp (original)
> +++ cfe/trunk/lib/Frontend/CompilerInvocation.cpp Fri Mar 18 11:58:36 2016
> @@ -1434,6 +1434,7 @@ void CompilerInvocation::setLangDefaults
> Opts.LaxVectorConversions = 0;
> Opts.DefaultFPContract = 1;
> Opts.NativeHalfType = 1;
> +Opts.NativeHalfArgsAndReturns = 1;
> }
Best,
Jeroen
> On 18 Mar 2016, at 16:58, Pirama Arumuga Nainar via cfe-commits at lists.llvm.org> wrote:
>
> Author: pirama
> Date: Fri Mar 18 11:58:36 2016
> New Revision: 263795
>
> URL: http://llvm.org/viewvc/llvm-project?rev=263795&view=rev
> Log:
> Add -fnative-half-arguments-and-returns
>
> Summary:
> r246764 handled __fp16 arguments and returns for AAPCS, but skipped this
> handling for OpenCL. Simlar to OpenCL, RenderScript also handles __fp16
> type natively.
>
> This patch adds the -fnative-half-arguments-and-returns command line
> flag to allow such languages to skip this coercion of __fp16.
>
> Reviewers: srhines, olista01
>
> Subscribers: cfe-commits
>
> Differential Revision: http://reviews.llvm.org/D18138
>
> Modified:
>cfe/trunk/include/clang/Basic/LangOptions.def
>cfe/trunk/include/clang/Driver/CC1Options.td
>cfe/trunk/lib/CodeGen/TargetInfo.cpp
>cfe/trunk/lib/Frontend/CompilerInvocation.cpp
>cfe/trunk/test/CodeGen/arm-fp16-arguments.c
>
> Modified: cfe/trunk/include/clang/Basic/LangOptions.def
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/LangOptions.def?rev=263795&r1=263794&r2=263795&view=diff
> ==
> --- cfe/trunk/include/clang/Basic/LangOptions.def (original)
> +++ cfe/trunk/include/clang/Basic/LangOptions.def Fri Mar 18 11:58:36 2016
> @@ -163,6 +163,7 @@ LANGOPT(ShortEnums, 1, 0, "short
> LANGOPT(OpenCL, 1, 0, "OpenCL")
> LANGOPT(OpenCLVersion , 32, 0, "OpenCL version")
> LANGOPT(NativeHalfType, 1, 0, "Native half type support")
> +LANGOPT(NativeHalfArgsAndReturns, 1, 0, "Native half args and returns")
> LANGOPT(HalfArgsAndReturns, 1, 0, "half args and returns")
> LANGOPT(CUDA , 1, 0, "CUDA")
> LANGOPT(OpenMP, 1, 0, "OpenMP support")
>
> Modified: cfe/trunk/include/clang/Driver/CC1Options.td
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/CC1Options.td?rev=263795&r1=263794&r2=263795&view=diff
> ==
> --- cfe/trunk/include/clang/Driver/CC1Options.td (original)
> +++ cfe/trunk/include/clang/Driver/CC1Options.td Fri Mar 18 11:58:36 2016
> @@ -603,6 +603,8 @@ def fno_rtti_data : Flag<["-"], "fno-rtt
> HelpText<"Control emission of RTTI data">;
> def fnative_half_type: Flag<["-"], "fnative-half-type">,
> HelpText<"Use the native half type for __fp16 instead of promoting to
> float">;
> +def fnative_half_arguments_and_returns : Flag<["-"],
> "fnative-half-arguments-and-returns">,
> + HelpText<"Use the native __fp16 type for arguments and returns (and skip
> ABI-specific lowering)">;
> def fallow_half_arguments_and_returns : Flag<["-"],
> "fallow-half-arguments-and-returns">,
> HelpText<"Allow function arguments and returns of type half">;
>
>
> Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/TargetInfo.cpp?rev=263795&r1=263794&r2=263795&view=diff
> ==
> --- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original)
> +++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Fri Mar 18 11:58:36 2016
> @@ -5106,7 +5106,7 @@ ABIArgInfo ARMABIInfo::classifyArgumentT
> // __fp16 gets passed as if it were an int or float, but with the top 16
> bits
> // unspecified. This is not done for OpenCL as it handles the half type
> // natively, and does not need to interwork with AAPCS code.
> - if (Ty->isHalfType() && !getContext().getLangOpts().OpenCL) {
> + if (Ty->isHalfType() &&
> !getContext().getLangOpts().NativeHalfArgsAndReturns) {
> llvm::Type *ResType = IsEffectivelyAAPCS_VFP ?
> llvm::Type::getFloatTy(getVMContext()) :
> llvm::Type::getInt32Ty(getVMContext());
> @@ -5298,7 +5298,7 @@ ABIArgInfo ARMABIInfo::classifyReturnTyp
> // __fp16 gets returned as if it were an int or float, but with the top 16
> // bits unspecified. This is not done for OpenCL as it handles the half type
> // natively, and does not need to interwork with AAPCS code.
> - if (RetTy->isHalfType() && !getContext().getLangOpts().OpenCL) {
> + if (RetTy->isHalfType() &&
> !getContext().getLangOpts().NativeHalfArgsAndReturns) {
> llvm::Type *ResType = IsEffectivelyAAPCS_VFP ?
> llvm::Typ
Re: r269670 - [OpenCL] Add supported OpenCL extensions to target info.
Hi Anastasia, My apologies for my slow reply. My main issue was that the defaults have changed, which is somewhat annoying. However, digging deeper into this I’m noticing two serious problems: * When I do: #pragma OPENCL EXTENSION cl_khr_fp16 : disable the cl_khr_fp16 macro stays defined in code I compile down to the SPIR target, which means I cannot do conditional compilation based on which extensions are enabled/disabled. This means I now need to start pulling additional manual tricks to do conditional compilation of half precision code. * If I understand the patch correctly, it allows me to enable extensions for targets that do not support it. There does not seem a check against the initially enabled extensions, just a check for what is or isn’t supported in a particular version of OpenCL. This means I can now, e.g., enable sharing with Direct3D 11 for the nvptx target even though this target does not support this functionality. On top of the above, I do not understand why this patch introduces code for extensions like ICD, which is an OpenCL API concept and not a OpenCL C concept. Jeroen > On 20 May 2016, at 21:01, Anastasia Stulova wrote: > > Thanks Sam! > > @Jeroen, could you give us more details about your problem. > > Anastasia > > -Original Message- > From: Liu, Yaxun (Sam) [mailto:yaxun@amd.com] > Sent: 20 May 2016 20:52 > To: Anastasia Stulova; Jeroen Ketema > Cc: Clang Commits; nd > Subject: RE: r269670 - [OpenCL] Add supported OpenCL extensions to target > info. > > I think this feature can be implemented by keeping a record of enabled OpenCL > extensions by user's program. > > For optional core feature cl_khr_fp64, we just need to detect if double type > is used by user's program. > > Sam > > -Original Message- > From: Liu, Yaxun (Sam) > Sent: Friday, May 20, 2016 3:45 PM > To: 'Anastasia Stulova' ; Jeroen Ketema > > Cc: Clang Commits ; nd > Subject: RE: r269670 - [OpenCL] Add supported OpenCL extensions to target > info. > > Currently Clang does not emit opencl.used.extensions metadata, so the issue > mentioned does not exist. > > Also extensions supported by a target and extensions used by an OpenCL > program is different concept. > > I'd say Clang currently miss a feature to detect used extensions and emit the > metadata. > > Sam > > -Original Message- > From: Anastasia Stulova [mailto:anastasia.stul...@arm.com] > Sent: Friday, May 20, 2016 3:23 PM > To: Liu, Yaxun (Sam) ; Jeroen Ketema > > Cc: Clang Commits ; nd > Subject: Re: r269670 - [OpenCL] Add supported OpenCL extensions to target > info. > > Hi Sam, > > Has this been addressed? > > @Jeroen, as far as I am aware adding supported extensions is completely new > to Clang and shouldn't be braking any existing functionality that are related > to that. Could you elaborate on the problem. Would creating new Clang target > help? Otherwise, do you have any other proposal for the solution? > > Thanks, > Anastasia > > > > From: cfe-commits on behalf of Jeroen > Ketema via cfe-commits > Sent: 17 May 2016 12:49 > To: Yaxun Liu via cfe-commits > Subject: Re: r269670 - [OpenCL] Add supported OpenCL extensions to target > info. > > Hi, > > The below commit enables all OpenCL extensions for the SPIR target by > default. This incorrect, as SPIR allows you to specify which extensions are > enabled/disabled its metadata. This means that any SPIR generated by Clang > may now be rejected by specific OpenCL platforms, because they might not > support all extensions. > > If possible I would like to see this commit reverted until that problem has > been addressed. > > Regards, > > Jeroen > >> On 16 May 2016, at 18:06, Yaxun Liu via cfe-commits > lists.llvm.org> wrote: >> >> Author: yaxunl >> Date: Mon May 16 12:06:34 2016 >> New Revision: 269670 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=269670&view=rev >> Log: >> [OpenCL] Add supported OpenCL extensions to target info. >> >> Add supported OpenCL extensions to target info. It serves as default values >> to save the users of the burden setting each supported extensions and >> optional core features in command line. >> >> Re-commit after fixing build error due to missing override attribute. >> >> Differential Revision: http://reviews.llvm.org/D19484 >> >> Added: >> cfe/trunk/include/clang/Basic/OpenCLOptions.h >> cfe/trunk/test/SemaOpenCL/extensions.cl >> Removed: >> cfe/trunk/test/SemaOpenCL/extension-fp64-cl1.1.
Re: r269670 - [OpenCL] Add supported OpenCL extensions to target info.
;> Sent: Friday, May 20, 2016 3:23 PM >> To: Liu, Yaxun (Sam) ; Jeroen Ketema >> >> Cc: Clang Commits ; nd >> Subject: Re: r269670 - [OpenCL] Add supported OpenCL extensions to target >> info. >> >> Hi Sam, >> >> Has this been addressed? >> >> @Jeroen, as far as I am aware adding supported extensions is completely new >> to Clang and shouldn't be braking any existing functionality that are >> related to that. Could you elaborate on the problem. Would creating new >> Clang target help? Otherwise, do you have any other proposal for the >> solution? >> >> Thanks, >> Anastasia >> >> >> >> From: cfe-commits on behalf of >> Jeroen Ketema via cfe-commits >> Sent: 17 May 2016 12:49 >> To: Yaxun Liu via cfe-commits >> Subject: Re: r269670 - [OpenCL] Add supported OpenCL extensions to target >> info. >> >> Hi, >> >> The below commit enables all OpenCL extensions for the SPIR target by >> default. This incorrect, as SPIR allows you to specify which extensions are >> enabled/disabled its metadata. This means that any SPIR generated by Clang >> may now be rejected by specific OpenCL platforms, because they might not >> support all extensions. >> >> If possible I would like to see this commit reverted until that problem has >> been addressed. >> >> Regards, >> >> Jeroen >> >>> On 16 May 2016, at 18:06, Yaxun Liu via cfe-commits >> lists.llvm.org> wrote: >>> >>> Author: yaxunl >>> Date: Mon May 16 12:06:34 2016 >>> New Revision: 269670 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=269670&view=rev >>> Log: >>> [OpenCL] Add supported OpenCL extensions to target info. >>> >>> Add supported OpenCL extensions to target info. It serves as default values >>> to save the users of the burden setting each supported extensions and >>> optional core features in command line. >>> >>> Re-commit after fixing build error due to missing override attribute. >>> >>> Differential Revision: http://reviews.llvm.org/D19484 >>> >>> Added: >>> cfe/trunk/include/clang/Basic/OpenCLOptions.h >>> cfe/trunk/test/SemaOpenCL/extensions.cl >>> Removed: >>> cfe/trunk/test/SemaOpenCL/extension-fp64-cl1.1.cl >>> cfe/trunk/test/SemaOpenCL/extension-fp64.cl >>> cfe/trunk/test/SemaOpenCL/optional-core-fp64-cl1.2.cl >>> cfe/trunk/test/SemaOpenCL/optional-core-fp64-cl2.0.cl >>> Modified: >>> cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td >>> cfe/trunk/include/clang/Basic/LangOptions.h >>> cfe/trunk/include/clang/Basic/OpenCLExtensions.def >>> cfe/trunk/include/clang/Basic/TargetInfo.h >>> cfe/trunk/include/clang/Basic/TargetOptions.h >>> cfe/trunk/lib/Basic/Targets.cpp >>> cfe/trunk/lib/Frontend/InitPreprocessor.cpp >>> cfe/trunk/lib/Parse/ParsePragma.cpp >>> cfe/trunk/lib/Sema/Sema.cpp >>> cfe/trunk/test/CodeGenOpenCL/builtins-r600.cl >>> cfe/trunk/test/CodeGenOpenCL/fpmath.cl >>> cfe/trunk/test/CodeGenOpenCL/half.cl >>> cfe/trunk/test/Lexer/opencl-half-literal.cl >>> cfe/trunk/test/Misc/languageOptsOpenCL.cl >>> cfe/trunk/test/PCH/opencl-extensions.cl >>> cfe/trunk/test/Parser/opencl-astype.cl >>> cfe/trunk/test/Parser/opencl-atomics-cl20.cl >>> cfe/trunk/test/Parser/opencl-pragma.cl >>> cfe/trunk/test/Parser/opencl-storage-class.cl >>> cfe/trunk/test/SemaOpenCL/half.cl >>> cfe/trunk/test/SemaOpenCL/invalid-kernel-parameters.cl >>> cfe/trunk/test/SemaOpenCL/invalid-logical-ops-1.2.cl >>> >>> Modified: cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td >>> URL: >>> http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/Dia >>> g nosticParseKinds.td?rev=269670&r1=269669&r2=269670&view=diff >>> = >>> = >>> >>> --- cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td (original) >>> +++ cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td Mon May 16 >>> +++ 12:06:34 2016 >>> @@ -926,6 +926,10 @@ def warn_pragma_expected_enable_disable >>> "expected 'enable' or 'disable' - ignoring">, >>> InGroup; def warn_pragma_unknown_extension : Warning< >>> "unknown OpenCL extension %0 - ignoring"&g
Re: r269670 - [OpenCL] Add supported OpenCL extensions to target info.
used by user's program. >>> >>> Sam >>> >>> -Original Message- >>> From: Liu, Yaxun (Sam) >>> Sent: Friday, May 20, 2016 3:45 PM >>> To: 'Anastasia Stulova' ; Jeroen Ketema >>> >>> Cc: Clang Commits ; nd >>> Subject: RE: r269670 - [OpenCL] Add supported OpenCL extensions to target >>> info. >>> >>> Currently Clang does not emit opencl.used.extensions metadata, so the issue >>> mentioned does not exist. >>> >>> Also extensions supported by a target and extensions used by an OpenCL >>> program is different concept. >>> >>> I'd say Clang currently miss a feature to detect used extensions and emit >>> the metadata. >>> >>> Sam >>> >>> -Original Message- >>> From: Anastasia Stulova [mailto:anastasia.stul...@arm.com] >>> Sent: Friday, May 20, 2016 3:23 PM >>> To: Liu, Yaxun (Sam) ; Jeroen Ketema >>> >>> Cc: Clang Commits ; nd >>> Subject: Re: r269670 - [OpenCL] Add supported OpenCL extensions to target >>> info. >>> >>> Hi Sam, >>> >>> Has this been addressed? >>> >>> @Jeroen, as far as I am aware adding supported extensions is completely new >>> to Clang and shouldn't be braking any existing functionality that are >>> related to that. Could you elaborate on the problem. Would creating new >>> Clang target help? Otherwise, do you have any other proposal for the >>> solution? >>> >>> Thanks, >>> Anastasia >>> >>> >>> >>> From: cfe-commits on behalf of >>> Jeroen Ketema via cfe-commits >>> Sent: 17 May 2016 12:49 >>> To: Yaxun Liu via cfe-commits >>> Subject: Re: r269670 - [OpenCL] Add supported OpenCL extensions to target >>> info. >>> >>> Hi, >>> >>> The below commit enables all OpenCL extensions for the SPIR target by >>> default. This incorrect, as SPIR allows you to specify which extensions are >>> enabled/disabled its metadata. This means that any SPIR generated by Clang >>> may now be rejected by specific OpenCL platforms, because they might not >>> support all extensions. >>> >>> If possible I would like to see this commit reverted until that problem has >>> been addressed. >>> >>> Regards, >>> >>> Jeroen >>> >>>> On 16 May 2016, at 18:06, Yaxun Liu via cfe-commits >>> lists.llvm.org> wrote: >>>> >>>> Author: yaxunl >>>> Date: Mon May 16 12:06:34 2016 >>>> New Revision: 269670 >>>> >>>> URL: http://llvm.org/viewvc/llvm-project?rev=269670&view=rev >>>> Log: >>>> [OpenCL] Add supported OpenCL extensions to target info. >>>> >>>> Add supported OpenCL extensions to target info. It serves as default >>>> values to save the users of the burden setting each supported extensions >>>> and optional core features in command line. >>>> >>>> Re-commit after fixing build error due to missing override attribute. >>>> >>>> Differential Revision: http://reviews.llvm.org/D19484 >>>> >>>> Added: >>>> cfe/trunk/include/clang/Basic/OpenCLOptions.h >>>> cfe/trunk/test/SemaOpenCL/extensions.cl >>>> Removed: >>>> cfe/trunk/test/SemaOpenCL/extension-fp64-cl1.1.cl >>>> cfe/trunk/test/SemaOpenCL/extension-fp64.cl >>>> cfe/trunk/test/SemaOpenCL/optional-core-fp64-cl1.2.cl >>>> cfe/trunk/test/SemaOpenCL/optional-core-fp64-cl2.0.cl >>>> Modified: >>>> cfe/trunk/include/clang/Basic/DiagnosticParseKinds.td >>>> cfe/trunk/include/clang/Basic/LangOptions.h >>>> cfe/trunk/include/clang/Basic/OpenCLExtensions.def >>>> cfe/trunk/include/clang/Basic/TargetInfo.h >>>> cfe/trunk/include/clang/Basic/TargetOptions.h >>>> cfe/trunk/lib/Basic/Targets.cpp >>>> cfe/trunk/lib/Frontend/InitPreprocessor.cpp >>>> cfe/trunk/lib/Parse/ParsePragma.cpp >>>> cfe/trunk/lib/Sema/Sema.cpp >>>> cfe/trunk/test/CodeGenOpenCL/builtins-r600.cl >>>> cfe/trunk/test/CodeGenOpenCL/fpmath.cl >>>> cfe/trunk/test/CodeGenOpenCL/half.cl >>>> cfe/trunk/test/Lexer/opencl-half-literal.cl >>>> cfe/trunk/test/Misc/languageOptsOpenCL.cl >>>>
Re: r269670 - [OpenCL] Add supported OpenCL extensions to target info.
Hi Sam, > This commit does not change the initial state of the extensions. An extension > is supported is not the same as enabled. At the beginning all extensions are > disabled. I do not see this reflected in the code at all. Could you please: a. Point me to the location where this distinction is made. b. Convince me that I cannot enable an extension for a target if that target does not support the extension? Jeroen ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: r269670 - [OpenCL] Add supported OpenCL extensions to target info.
Hi Sam,
Thanks baring with me, and thanks a lot for your explanation! I indeed now
believe that this is correct; I got somewhat confused by all the macro magic
that is going on, and had missed that the enabled extensions are actually
stored in a class instance separate from the one with available options.
I still think it would be good if the extensions that only affect the host-side
are removed, in particular cl_khr_icd and cl_khr_terminate_context. We have a
runtime that indirectly includes both Clang’s OpenCLExtensions.def and the
Khronos extension header, and we run into problems when we include the
extension header before OpenCLExtensions.def, because the extension header
defines macros named cl_khr_icd and cl_khr_terminate_context. I admit this is a
somewhat special use-case though.
Thanks again,
Jeroen
> On 02 Jun 2016, at 21:53, Liu, Yaxun (Sam) wrote:
>
> Sorry for the delay.
>
> In ParsePragma.cpp:
>
> void Parser::HandlePragmaOpenCLExtension() {
> assert(Tok.is(tok::annot_pragma_opencl_extension));
> OpenCLExtData data =
> OpenCLExtData::getFromOpaqueValue(Tok.getAnnotationValue());
> unsigned state = data.getInt();
> IdentifierInfo *ename = data.getPointer();
> SourceLocation NameLoc = Tok.getLocation();
> ConsumeToken(); // The annotation token.
>
> OpenCLOptions &f = Actions.getOpenCLOptions();
> auto CLVer = getLangOpts().OpenCLVersion;
> auto &Supp = getTargetInfo().getSupportedOpenCLOpts();
> // OpenCL 1.1 9.1: "The all variant sets the behavior for all extensions,
> // overriding all previously issued extension directives, but only if the
> // behavior is set to disable."
> if (state == 0 && ename->isStr("all")) {
> #define OPENCLEXT(nm) \
>if (Supp.is_##nm##_supported_extension(CLVer)) \
> f.nm = 0;
> #include "clang/Basic/OpenCLExtensions.def"
> }
> #define OPENCLEXT(nm) else if (ename->isStr(#nm)) \
> if (Supp.is_##nm##_supported_extension(CLVer)) \
> f.nm = state; \
> else if (Supp.is_##nm##_supported_core(CLVer)) \
> PP.Diag(NameLoc, diag::warn_pragma_extension_is_core) << ename; \
> else \
> PP.Diag(NameLoc, diag::warn_pragma_unsupported_extension) << ename;
> #include "clang/Basic/OpenCLExtensions.def"
> else {
>PP.Diag(NameLoc, diag::warn_pragma_unknown_extension) << ename;
>return;
> }
> }
>
> Whether an extension is supported is represented by
> getTargetInfo().getSupportedOpenCLOpts(), which does not change with pragma.
>
> Whether an extension is enabled is reprented by Actions.getOpenCLOptions(),
> which changes with pragma.
>
> test/SemaOpenCL/extensions.cl contains examples of unsupported extensions.
>
> Sam
>
> -Original Message-
> From: Jeroen Ketema [mailto:j.ket...@imperial.ac.uk]
> Sent: Tuesday, May 31, 2016 6:07 PM
> To: Liu, Yaxun (Sam)
> Cc: Anastasia Stulova ; Clang Commits
> ; nd
> Subject: Re: r269670 - [OpenCL] Add supported OpenCL extensions to target
> info.
>
> Hi Sam,
>
>> This commit does not change the initial state of the extensions. An
>> extension is supported is not the same as enabled. At the beginning all
>> extensions are disabled.
>
> I do not see this reflected in the code at all. Could you please:
>
> a. Point me to the location where this distinction is made.
>
> b. Convince me that I cannot enable an extension for a target if that target
> does not support the extension?
>
> Jeroen
>
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