[clang] [llvm] [RISCV] Add back SiFive's cdiscard.d.l1 and cflush.d.l1 instructions. (PR #83896)
quic-garvgupt wrote: Hi @topperc, can you add instruction alias for cflush and cdiscard instructions when the rs1 is X0 to `sf.cflush.d.l1` and `sf.cflush.d.l1` respectively, as this register is optional according to spec? https://github.com/llvm/llvm-project/pull/83896 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Add back SiFive's cdiscard.d.l1 and cflush.d.l1 instructions. (PR #83896)
quic-garvgupt wrote: Also, I think we might need to update the extensions in the `RISCVProcessors.td` file under SIFIVE_S76 microcontroller? https://github.com/llvm/llvm-project/pull/83896 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Add back SiFive's cdiscard.d.l1 and cflush.d.l1 instructions. (PR #83896)
quic-garvgupt wrote: > > Hi @topperc, can you add instruction alias for cflush and cdiscard > > instructions when the rs1 is X0 to `sf.cflush.d.l1` and `sf.cflush.d.l1` > > respectively, as this register is optional according to spec? > > x0 has special meaning, but the spec never says it is "optional". Possibly I am mistaken here but this is what I inferred from the below text in the mannual - rs1 is optional, so if a user does not specify it then by default it will be X0. Apologies if I am missing something here but just wanted to be clear. >From the mannual - `Opcode 0xFC73, with **optional** rs1 field in bits [19:15]` https://github.com/llvm/llvm-project/pull/83896 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Add back SiFive's cdiscard.d.l1 and cflush.d.l1 instructions. (PR #83896)
quic-garvgupt wrote: > > Also, I think we might need to update the extensions in the > > `RISCVProcessors.td` file under SIFIVE_S76 microcontroller? > > This is a M-mode only extension, and we haven't historically been adding M or > S mode extensions to the -mcpu lists. Except for `xiangshan-nanhu` having > `Svinval`. But maybe there's a microcontroller vs application core > distinction we should be making? I see, I was not aware of this. Thanks for your reply https://github.com/llvm/llvm-project/pull/83896 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Add back SiFive's cdiscard.d.l1 and cflush.d.l1 instructions. (PR #83896)
quic-garvgupt wrote: Thanks for clearing the confusion around whether rs1 would be optional or not. Can we also add lit tests for the aliases? https://github.com/llvm/llvm-project/pull/83896 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Add back SiFive's cdiscard.d.l1 and cflush.d.l1 instructions. (PR #83896)
quic-garvgupt wrote: Thanks for the prompt reply and latest patchset. 1. Do we need to add documentation in RISCVUsage.rst file for xsfcease? 2. Also, as we are adding cease instruction in this PR, can we rename the PR to include the cease instruction as well? https://github.com/llvm/llvm-project/pull/83896 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Add back SiFive's cdiscard.d.l1, cflush.d.l1, and cease instructions. (PR #83896)
quic-garvgupt wrote: I believe the patch is ready to be merged now, but since I am not the reviewer here, someone else must approve it as well. Thanks again for the patch! https://github.com/llvm/llvm-project/pull/83896 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
quic-garvgupt wrote: ping! for merging this PR https://github.com/llvm/llvm-project/pull/81727 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV ba… (PR #81727)
https://github.com/quic-garvgupt created https://github.com/llvm/llvm-project/pull/81727 The below culprit patch enabled the generation of asynchronous unwind tables (-funwind-tables=2) by default for RISCV for both linux and RISCVToolChain baremetal object. However, since there are 2 baremetal toolchain objects for RISCV, this created a discrepancy between their behavior. Moreover, enabling the generation of asynchronous unwind tables based on whether `-gcc-toolchain` option is present or not doesn't seem to be the best criteria to decide on the same. This patch make the behavior consistent by disabling the unwind tables in RISCVToolChain Baremetal object. Culprit Patch - https://reviews.llvm.org/D145164 >From 42211bccd8ffc60751234ab5695be135ea8b6373 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 14 Feb 2024 03:00:20 -0800 Subject: [PATCH] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal The below culprit patch enabled the generation of asynchronous unwind tables (-funwind-tables=2) by default for RISCV for both linux and RISCVToolChain baremetal object. However, since there are 2 baremetal toolchain objects for RISCV, this created a discrepancy between their behavior. Moreover, enabling the generation of asynchronous unwind tables based on whether `-gcc-toolchain` option is present or not doesn't seem to be the best criteria to decide on the same. Culprit Patch - https://reviews.llvm.org/D145164 --- clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 5 + clang/lib/Driver/ToolChains/RISCVToolchain.h | 2 ++ clang/test/Driver/clang-translation.c | 8 3 files changed, 15 insertions(+) diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp index 85beb945cbf6fc..624099d21ae124 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp @@ -86,6 +86,11 @@ RISCVToolChain::GetUnwindLibType(const llvm::opt::ArgList &Args) const { return ToolChain::UNW_None; } +ToolChain::UnwindTableLevel RISCVToolChain::getDefaultUnwindTableLevel( +const llvm::opt::ArgList &Args) const { + return UnwindTableLevel::None; +} + void RISCVToolChain::addClangTargetOptions( const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args, diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.h b/clang/lib/Driver/ToolChains/RISCVToolchain.h index cec817ef7190be..fa0aa265d842bb 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.h +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.h @@ -28,6 +28,8 @@ class LLVM_LIBRARY_VISIBILITY RISCVToolChain : public Generic_ELF { RuntimeLibType GetDefaultRuntimeLibType() const override; UnwindLibType GetUnwindLibType(const llvm::opt::ArgList &Args) const override; + UnwindTableLevel + getDefaultUnwindTableLevel(const llvm::opt::ArgList &Args) const override; void AddClangSystemIncludeArgs(const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args) const override; diff --git a/clang/test/Driver/clang-translation.c b/clang/test/Driver/clang-translation.c index a7343ea18b2135..64d55f1b88ea6d 100644 --- a/clang/test/Driver/clang-translation.c +++ b/clang/test/Driver/clang-translation.c @@ -421,3 +421,11 @@ // MIPSN32R6EL: "-target-cpu" "mips64r6" // MIPSN32R6EL: "-target-abi" "n32" // MIPSN32R6EL: "-mfloat-abi" "hard" + +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// +// UWTABLE: "-funwind-tables=2" +// NOUWTABLE-NOT: "-funwind-tables=2" \ No newline at end of file ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV ba… (PR #81727)
quic-garvgupt wrote: Hi @jonathonpenix @apazos @kito-cheng @asb @MaskRay - Requesting for adding as reviewers to review the PR. Thanks in advance! https://github.com/llvm/llvm-project/pull/81727 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
quic-garvgupt wrote: Hi @asb, since Petr already gave a good-ahead to this patch in the meeting, let me know if we can merge this PR if there are no new changes need to be made https://github.com/llvm/llvm-project/pull/81727 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/81727 >From 42211bccd8ffc60751234ab5695be135ea8b6373 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 14 Feb 2024 03:00:20 -0800 Subject: [PATCH 1/2] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal The below culprit patch enabled the generation of asynchronous unwind tables (-funwind-tables=2) by default for RISCV for both linux and RISCVToolChain baremetal object. However, since there are 2 baremetal toolchain objects for RISCV, this created a discrepancy between their behavior. Moreover, enabling the generation of asynchronous unwind tables based on whether `-gcc-toolchain` option is present or not doesn't seem to be the best criteria to decide on the same. Culprit Patch - https://reviews.llvm.org/D145164 --- clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 5 + clang/lib/Driver/ToolChains/RISCVToolchain.h | 2 ++ clang/test/Driver/clang-translation.c | 8 3 files changed, 15 insertions(+) diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp index 85beb945cbf6fc..624099d21ae124 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp @@ -86,6 +86,11 @@ RISCVToolChain::GetUnwindLibType(const llvm::opt::ArgList &Args) const { return ToolChain::UNW_None; } +ToolChain::UnwindTableLevel RISCVToolChain::getDefaultUnwindTableLevel( +const llvm::opt::ArgList &Args) const { + return UnwindTableLevel::None; +} + void RISCVToolChain::addClangTargetOptions( const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args, diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.h b/clang/lib/Driver/ToolChains/RISCVToolchain.h index cec817ef7190be..fa0aa265d842bb 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.h +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.h @@ -28,6 +28,8 @@ class LLVM_LIBRARY_VISIBILITY RISCVToolChain : public Generic_ELF { RuntimeLibType GetDefaultRuntimeLibType() const override; UnwindLibType GetUnwindLibType(const llvm::opt::ArgList &Args) const override; + UnwindTableLevel + getDefaultUnwindTableLevel(const llvm::opt::ArgList &Args) const override; void AddClangSystemIncludeArgs(const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args) const override; diff --git a/clang/test/Driver/clang-translation.c b/clang/test/Driver/clang-translation.c index a7343ea18b2135..64d55f1b88ea6d 100644 --- a/clang/test/Driver/clang-translation.c +++ b/clang/test/Driver/clang-translation.c @@ -421,3 +421,11 @@ // MIPSN32R6EL: "-target-cpu" "mips64r6" // MIPSN32R6EL: "-target-abi" "n32" // MIPSN32R6EL: "-mfloat-abi" "hard" + +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// +// UWTABLE: "-funwind-tables=2" +// NOUWTABLE-NOT: "-funwind-tables=2" \ No newline at end of file >From 559f1d6e4221dc94cd035c0f568dea630dcb6f37 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 14 Feb 2024 03:00:20 -0800 Subject: [PATCH 2/2] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal The below culprit patch enabled the generation of asynchronous unwind tables (-funwind-tables=2) by default for RISCV for both linux and RISCVToolChain baremetal object. However, since there are 2 baremetal toolchain objects for RISCV, this created a discrepancy between their behavior. Moreover, enabling the generation of asynchronous unwind tables based on whether `-gcc-toolchain` option is present or not doesn't seem to be the best criteria to decide on the same. Culprit Patch - https://reviews.llvm.org/D145164 --- clang/test/Driver/riscv-features.c | 8 1 file changed, 8 insertions(+) diff --git a/clang/test/Driver/riscv-features.c b/clang/test/Driver/riscv-features.c index d3700f71aa7e1d..15832e79d2a491 100644 --- a/clang/test/Driver/riscv-features.c +++ b/clang/test/Driver/riscv-features.c @@ -35,6 +35,14 @@ // FAST-UNALIGNED-ACCESS: "-target-feature" "+fast-unaligned-access" // NO-FAST-UNALIGNED-ACCESS: "-target-feature" "-fast-unaligned-access" +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -#
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/81727 >From 42211bccd8ffc60751234ab5695be135ea8b6373 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 14 Feb 2024 03:00:20 -0800 Subject: [PATCH] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal The below culprit patch enabled the generation of asynchronous unwind tables (-funwind-tables=2) by default for RISCV for both linux and RISCVToolChain baremetal object. However, since there are 2 baremetal toolchain objects for RISCV, this created a discrepancy between their behavior. Moreover, enabling the generation of asynchronous unwind tables based on whether `-gcc-toolchain` option is present or not doesn't seem to be the best criteria to decide on the same. Culprit Patch - https://reviews.llvm.org/D145164 --- clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 5 + clang/lib/Driver/ToolChains/RISCVToolchain.h | 2 ++ clang/test/Driver/clang-translation.c | 8 3 files changed, 15 insertions(+) diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp index 85beb945cbf6fc..624099d21ae124 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp @@ -86,6 +86,11 @@ RISCVToolChain::GetUnwindLibType(const llvm::opt::ArgList &Args) const { return ToolChain::UNW_None; } +ToolChain::UnwindTableLevel RISCVToolChain::getDefaultUnwindTableLevel( +const llvm::opt::ArgList &Args) const { + return UnwindTableLevel::None; +} + void RISCVToolChain::addClangTargetOptions( const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args, diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.h b/clang/lib/Driver/ToolChains/RISCVToolchain.h index cec817ef7190be..fa0aa265d842bb 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.h +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.h @@ -28,6 +28,8 @@ class LLVM_LIBRARY_VISIBILITY RISCVToolChain : public Generic_ELF { RuntimeLibType GetDefaultRuntimeLibType() const override; UnwindLibType GetUnwindLibType(const llvm::opt::ArgList &Args) const override; + UnwindTableLevel + getDefaultUnwindTableLevel(const llvm::opt::ArgList &Args) const override; void AddClangSystemIncludeArgs(const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args) const override; diff --git a/clang/test/Driver/clang-translation.c b/clang/test/Driver/clang-translation.c index a7343ea18b2135..64d55f1b88ea6d 100644 --- a/clang/test/Driver/clang-translation.c +++ b/clang/test/Driver/clang-translation.c @@ -421,3 +421,11 @@ // MIPSN32R6EL: "-target-cpu" "mips64r6" // MIPSN32R6EL: "-target-abi" "n32" // MIPSN32R6EL: "-mfloat-abi" "hard" + +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// +// UWTABLE: "-funwind-tables=2" +// NOUWTABLE-NOT: "-funwind-tables=2" \ No newline at end of file ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/81727 >From 8cc7535ed4c05d4cf14cdedc26077eccf06c8d53 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 14 Feb 2024 03:00:20 -0800 Subject: [PATCH] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal The below culprit patch enabled the generation of asynchronous unwind tables (-funwind-tables=2) by default for RISCV for both linux and RISCVToolChain baremetal object. However, since there are 2 baremetal toolchain objects for RISCV, this created a discrepancy between their behavior. Moreover, enabling the generation of asynchronous unwind tables based on whether `-gcc-toolchain` option is present or not doesn't seem to be the best criteria to decide on the same. Culprit Patch - https://reviews.llvm.org/D145164 --- clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 5 + clang/lib/Driver/ToolChains/RISCVToolchain.h | 2 ++ clang/test/Driver/riscv-features.c | 8 3 files changed, 15 insertions(+) diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp index 85beb945cbf6fc..624099d21ae124 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp @@ -86,6 +86,11 @@ RISCVToolChain::GetUnwindLibType(const llvm::opt::ArgList &Args) const { return ToolChain::UNW_None; } +ToolChain::UnwindTableLevel RISCVToolChain::getDefaultUnwindTableLevel( +const llvm::opt::ArgList &Args) const { + return UnwindTableLevel::None; +} + void RISCVToolChain::addClangTargetOptions( const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args, diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.h b/clang/lib/Driver/ToolChains/RISCVToolchain.h index cec817ef7190be..fa0aa265d842bb 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.h +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.h @@ -28,6 +28,8 @@ class LLVM_LIBRARY_VISIBILITY RISCVToolChain : public Generic_ELF { RuntimeLibType GetDefaultRuntimeLibType() const override; UnwindLibType GetUnwindLibType(const llvm::opt::ArgList &Args) const override; + UnwindTableLevel + getDefaultUnwindTableLevel(const llvm::opt::ArgList &Args) const override; void AddClangSystemIncludeArgs(const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args) const override; diff --git a/clang/test/Driver/riscv-features.c b/clang/test/Driver/riscv-features.c index d3700f71aa7e1d..15832e79d2a491 100644 --- a/clang/test/Driver/riscv-features.c +++ b/clang/test/Driver/riscv-features.c @@ -35,6 +35,14 @@ // FAST-UNALIGNED-ACCESS: "-target-feature" "+fast-unaligned-access" // NO-FAST-UNALIGNED-ACCESS: "-target-feature" "-fast-unaligned-access" +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// +// UWTABLE: "-funwind-tables=2" +// NOUWTABLE-NOT: "-funwind-tables=2" + // RUN: %clang --target=riscv32-linux -### %s -fsyntax-only 2>&1 \ // RUN: | FileCheck %s -check-prefix=DEFAULT-LINUX // RUN: %clang --target=riscv64-linux -### %s -fsyntax-only 2>&1 \ ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
@@ -421,3 +421,11 @@ // MIPSN32R6EL: "-target-cpu" "mips64r6" // MIPSN32R6EL: "-target-abi" "n32" // MIPSN32R6EL: "-mfloat-abi" "hard" + +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE quic-garvgupt wrote: Done https://github.com/llvm/llvm-project/pull/81727 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
quic-garvgupt wrote: Hi @asb, I do not have write access, requesting to merge this PR on my behalf. Also, requesting to backport this PR onto the release branch. Thanks in advance! https://github.com/llvm/llvm-project/pull/81727 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/81727 >From 0d1f9be389a41ba2f1531bf13e8d1f14aadf9eeb Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 14 Feb 2024 03:00:20 -0800 Subject: [PATCH] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal The below culprit patch enabled the generation of asynchronous unwind tables (-funwind-tables=2) by default for RISCV for both linux and RISCVToolChain baremetal object. However, since there are 2 baremetal toolchain objects for RISCV, this created a discrepancy between their behavior. Moreover, enabling the generation of asynchronous unwind tables based on whether `-gcc-toolchain` option is present or not doesn't seem to be the best criteria to decide on the same. Culprit Patch - https://reviews.llvm.org/D145164 --- clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 5 + clang/lib/Driver/ToolChains/RISCVToolchain.h | 2 ++ clang/test/Driver/riscv-features.c | 8 3 files changed, 15 insertions(+) diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp index 85beb945cbf6fc..624099d21ae124 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp @@ -86,6 +86,11 @@ RISCVToolChain::GetUnwindLibType(const llvm::opt::ArgList &Args) const { return ToolChain::UNW_None; } +ToolChain::UnwindTableLevel RISCVToolChain::getDefaultUnwindTableLevel( +const llvm::opt::ArgList &Args) const { + return UnwindTableLevel::None; +} + void RISCVToolChain::addClangTargetOptions( const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args, diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.h b/clang/lib/Driver/ToolChains/RISCVToolchain.h index cec817ef7190be..fa0aa265d842bb 100644 --- a/clang/lib/Driver/ToolChains/RISCVToolchain.h +++ b/clang/lib/Driver/ToolChains/RISCVToolchain.h @@ -28,6 +28,8 @@ class LLVM_LIBRARY_VISIBILITY RISCVToolChain : public Generic_ELF { RuntimeLibType GetDefaultRuntimeLibType() const override; UnwindLibType GetUnwindLibType(const llvm::opt::ArgList &Args) const override; + UnwindTableLevel + getDefaultUnwindTableLevel(const llvm::opt::ArgList &Args) const override; void AddClangSystemIncludeArgs(const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList &CC1Args) const override; diff --git a/clang/test/Driver/riscv-features.c b/clang/test/Driver/riscv-features.c index a108383e29fb6b..fc5fb0f27e3af4 100644 --- a/clang/test/Driver/riscv-features.c +++ b/clang/test/Driver/riscv-features.c @@ -41,6 +41,14 @@ // FAST-UNALIGNED-ACCESS: "-target-feature" "+fast-unaligned-access" // NO-FAST-UNALIGNED-ACCESS: "-target-feature" "-fast-unaligned-access" +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv32-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -### %s 2>&1 | FileCheck %s -check-prefix=NOUWTABLE +// RUN: %clang --target=riscv64-unknown-elf --gcc-toolchain="" -fasynchronous-unwind-tables -### %s 2>&1 | FileCheck %s -check-prefix=UWTABLE +// +// UWTABLE: "-funwind-tables=2" +// NOUWTABLE-NOT: "-funwind-tables=2" + // RUN: %clang --target=riscv32-linux -### %s -fsyntax-only 2>&1 \ // RUN: | FileCheck %s -check-prefix=DEFAULT-LINUX // RUN: %clang --target=riscv64-linux -### %s -fsyntax-only 2>&1 \ ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (PR #81727)
quic-garvgupt wrote: Hi @MaskRay, please review the updated changes and if they are fine, please merge this PR on my behalf. Thanks! https://github.com/llvm/llvm-project/pull/81727 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
https://github.com/quic-garvgupt created https://github.com/llvm/llvm-project/pull/118809 Currently, LLVM has two RISC-V toolchain classes in Clang for baremetal development, creating unnecessary maintenance overhead. This patch extends the BareMetal toolchain to support an existing GCC installation, resolving this issue. The latest patchset preserves the behavior of both toolchain objects with minor differences. If no --sysroot option is passed on the command line or if the GCC installation is invalid, the sysroot will first be formed as per the RISCVToolChain baremetal object. If this path does not exist, the sysroot will be formed as per the BareMetal toolchain object. Additionally, the presence of --gcc-toolchain or --gcc-install-dir will imply that GNU linker is the default linker unless otherwise a differnt linker is passed through `-fuse-ld` flag. RFC - https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 >From b1bd1ee4f3a4966b50e0b35fd349091660e84576 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 13 Nov 2024 02:45:51 -0800 Subject: [PATCH] [RISCV] Merging RISCVToolChain and BareMetal toolchains Currently, LLVM has two RISC-V toolchain classes in Clang for baremetal development, creating unnecessary maintenance overhead. This patch extends the BareMetal toolchain to support an existing GCC installation, resolving this issue. The latest patchset preserves the behavior of both toolchain objects with minor differences. If no --sysroot option is passed on the command line or if the GCC installation is invalid, the sysroot will first be formed as per the RISCVToolChain baremetal object. If this path does not exist, the sysroot will be formed as per the BareMetal toolchain object. Additionally, the presence of --gcc-toolchain or --gcc-install-dir will imply that GNU linker is the default linker unless otherwise a differnt linker is passed through `-fuse-ld` flag. RFC - https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 --- clang/lib/Driver/Driver.cpp | 4 - clang/lib/Driver/ToolChains/BareMetal.cpp | 225 clang/lib/Driver/ToolChains/BareMetal.h | 34 ++- clang/test/Driver/arm-gnutools.c| 12 ++ clang/test/Driver/baremetal-multilib.yaml | 4 +- clang/test/Driver/baremetal-sysroot.cpp | 4 +- clang/test/Driver/baremetal.cpp | 123 ++- clang/test/Driver/riscv-args.c | 2 +- clang/test/Driver/riscv32-toolchain-extra.c | 4 +- clang/test/Driver/riscv32-toolchain.c | 6 +- clang/test/Driver/riscv64-toolchain-extra.c | 4 +- clang/test/Driver/riscv64-toolchain.c | 4 +- 12 files changed, 314 insertions(+), 112 deletions(-) create mode 100644 clang/test/Driver/arm-gnutools.c diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index 7de8341b8d2d61..c5185ccedd6201 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -6521,10 +6521,6 @@ const ToolChain &Driver::getToolChain(const ArgList &Args, break; case llvm::Triple::riscv32: case llvm::Triple::riscv64: -if (toolchains::RISCVToolChain::hasGCCToolchain(*this, Args)) - TC = - std::make_unique(*this, Target, Args); -else TC = std::make_unique(*this, Target, Args); break; case llvm::Triple::ve: diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp b/clang/lib/Driver/ToolChains/BareMetal.cpp index f9a73f60973e4c..1d065562e9a6ef 100644 --- a/clang/lib/Driver/ToolChains/BareMetal.cpp +++ b/clang/lib/Driver/ToolChains/BareMetal.cpp @@ -97,7 +97,8 @@ static bool findRISCVMultilibs(const Driver &D, return false; } -static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { +static std::string computeInstalledToolchainSysRoot(const Driver &D, +bool IncludeTriple) { if (!D.SysRoot.empty()) return D.SysRoot; @@ -110,20 +111,94 @@ static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { return std::string(SysRootDir); } +// GCC sysroot here means form sysroot from either --gcc-install-dir, or from +// --gcc-toolchain or if the toolchain is installed alongside clang in +// bin/../ directory if it is not explicitly specified on the command +// line through `--sysroot` option. libc here will be newlib. +std::string BareMetal::computeGCCSysRoot() const { + if (!getDriver().SysRoot.empty()) +return getDriver().SysRoot; + + SmallString<128> SysRootDir; + if (GCCInstallation.isValid()) { +StringRef LibDir = GCCInstallation.getParentLibPath(); +StringRef TripleStr = GCCInstallation.getTriple().str(); +llvm::sys::path::append(SysRootDir, LibDir, "..", TripleStr); + } else { +// Use the triple as provided to the driver. Unlike the parsed triple +// this has not been normalized to always contain e
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/118809 >From b74795d44846b79252bd3fb1f1e8179311725c74 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 13 Nov 2024 02:45:51 -0800 Subject: [PATCH] [RISCV] Merging RISCVToolChain and BareMetal toolchains Currently, LLVM has two RISC-V toolchain classes in Clang for baremetal development, creating unnecessary maintenance overhead. This patch extends the BareMetal toolchain to support an existing GCC installation, resolving this issue. The latest patchset preserves the behavior of both toolchain objects with minor differences. If no --sysroot option is passed on the command line or if the GCC installation is invalid, the sysroot will first be formed as per the RISCVToolChain baremetal object. If this path does not exist, the sysroot will be formed as per the BareMetal toolchain object. Additionally, the presence of --gcc-toolchain or --gcc-install-dir will imply that GNU linker is the default linker unless otherwise a differnt linker is passed through `-fuse-ld` flag. RFC - https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 --- clang/lib/Driver/Driver.cpp | 6 +- clang/lib/Driver/ToolChains/BareMetal.cpp | 226 clang/lib/Driver/ToolChains/BareMetal.h | 34 ++- clang/test/Driver/arm-gnutools.c| 12 ++ clang/test/Driver/baremetal-multilib.yaml | 4 +- clang/test/Driver/baremetal-sysroot.cpp | 4 +- clang/test/Driver/baremetal.cpp | 123 ++- clang/test/Driver/riscv-args.c | 2 +- clang/test/Driver/riscv32-toolchain-extra.c | 4 +- clang/test/Driver/riscv32-toolchain.c | 6 +- clang/test/Driver/riscv64-toolchain-extra.c | 4 +- clang/test/Driver/riscv64-toolchain.c | 4 +- 12 files changed, 316 insertions(+), 113 deletions(-) create mode 100644 clang/test/Driver/arm-gnutools.c diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index 7de8341b8d2d61..543ed9e301ef84 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -6521,11 +6521,7 @@ const ToolChain &Driver::getToolChain(const ArgList &Args, break; case llvm::Triple::riscv32: case llvm::Triple::riscv64: -if (toolchains::RISCVToolChain::hasGCCToolchain(*this, Args)) - TC = - std::make_unique(*this, Target, Args); -else - TC = std::make_unique(*this, Target, Args); +TC = std::make_unique(*this, Target, Args); break; case llvm::Triple::ve: TC = std::make_unique(*this, Target, Args); diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp b/clang/lib/Driver/ToolChains/BareMetal.cpp index f9a73f60973e4c..66a76d56ad8c48 100644 --- a/clang/lib/Driver/ToolChains/BareMetal.cpp +++ b/clang/lib/Driver/ToolChains/BareMetal.cpp @@ -97,7 +97,8 @@ static bool findRISCVMultilibs(const Driver &D, return false; } -static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { +static std::string computeInstalledToolchainSysRoot(const Driver &D, +bool IncludeTriple) { if (!D.SysRoot.empty()) return D.SysRoot; @@ -110,20 +111,95 @@ static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { return std::string(SysRootDir); } +// GCC sysroot here means form sysroot from either --gcc-install-dir, or from +// --gcc-toolchain or if the toolchain is installed alongside clang in +// bin/../ directory if it is not explicitly specified on the +// command line through `--sysroot` option. libc here will be newlib. +std::string BareMetal::computeGCCSysRoot() const { + if (!getDriver().SysRoot.empty()) +return getDriver().SysRoot; + + SmallString<128> SysRootDir; + if (GCCInstallation.isValid()) { +StringRef LibDir = GCCInstallation.getParentLibPath(); +StringRef TripleStr = GCCInstallation.getTriple().str(); +llvm::sys::path::append(SysRootDir, LibDir, "..", TripleStr); + } else { +// Use the triple as provided to the driver. Unlike the parsed triple +// this has not been normalized to always contain every field. +llvm::sys::path::append(SysRootDir, getDriver().Dir, "..", +getDriver().getTargetTriple()); + } + + if (!llvm::sys::fs::exists(SysRootDir)) +return std::string(); + + return std::string(SysRootDir); +} + +std::string BareMetal::computeSysRoot() const { + if (!SysRoot.empty()) +return SysRoot; + + std::string SysRoot = getDriver().SysRoot; + if (!SysRoot.empty() && llvm::sys::fs::exists(SysRoot)) +return SysRoot; + + // Verify the GCC installation from -gcc-install-dir, --gcc-toolchain, or + // alongside clang. If valid, form the sysroot. Otherwise, check + // lib/clang-runtimes above the driver. + SysRoot = computeGCCSysRoot(); + if (!SysRoot.empty()) +return SysRoot; + + SysRoot = + comp
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
@@ -503,12 +624,22 @@ void baremetal::Linker::ConstructJob(Compilation &C, const JobAction &JA, const llvm::Triple::ArchType Arch = TC.getArch(); const llvm::Triple &Triple = getToolChain().getEffectiveTriple(); - AddLinkerInputs(TC, Inputs, Args, CmdArgs, JA); + if (!D.SysRoot.empty()) +CmdArgs.push_back(Args.MakeArgString("--sysroot=" + D.SysRoot)); + Args.addAllArgs(CmdArgs, {options::OPT_u}); quic-garvgupt wrote: Sure, I will be making these changes in the next patchset. However, I wanted to clarify if there is any specific reason why, in the RISCVToolchain baremetal object, OPT_L and OPT_u are added separately before FilePathLibArgs, and then subsequently the rest of the OPT_* options are added. https://github.com/llvm/llvm-project/blob/89e919fb0df391da42dbfd48cd8de268335fe672/clang/lib/Driver/ToolChains/RISCVToolchain.cpp#L201 I understand that for gnuld, the order in which flags and object files appear on the command line is relevant, unlike for lld. Was this intentional? If so, I will maintain that behavior; otherwise, I will add them in a single `addAllArgs(...)` function. https://github.com/llvm/llvm-project/pull/118809 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
https://github.com/quic-garvgupt created https://github.com/llvm/llvm-project/pull/121829 This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. This is the first PR in the series of 3 PRs for merging and extending Baremetal toolchain object. The division of the PRs is as follows: - Teach Baremetal toolchain about GCC installation and make sysroot and assembler related changes. - Changes related to linker job and defaults for CXXStdlib and other runtime libs. - Finally removing the call to RISCVToolchain object. The above division will also ensure that riscv and arm specific tests are not modified in the same PR. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 Change-Id: Ibaeb569cf7e2cee03c022aa9ecd1abe29d5c30d4 >From 908c2dfa26c5fa7dea14945e4eba411ebe5b3e82 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 13 Dec 2024 05:31:56 -0800 Subject: [PATCH] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. This is the first PR in the series of 3 PRs for merging and extending Baremetal toolchain object. The division of the PRs is as follows: - Teach Baremetal toolchain about GCC installation and make sysroot and assembler related changes. - Changes related to linker job and defaults for CXXStdlib and other runtime libs. - Finally removing the call to RISCVToolchain object. The above division will also ensure that riscv and arm specific tests are not modified in the same PR. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 Change-Id: Ibaeb569cf7e2cee03c022aa9ecd1abe29d5c30d4 --- clang/lib/Driver/ToolChains/BareMetal.cpp | 121 +++--- clang/lib/Driver/ToolChains/BareMetal.h | 8 +- .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/include/c++/8.2.1/.keep | 0 .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtend.o | 0 .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../aarch64-none-elf/lib/crtbegin.o | 0 .../aarch64-none-elf/lib/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/include/c++/8.2.1/.keep | 0 .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/libstdc++.a | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/crtbegin.o | 0 .../armv6m-none-eabi/lib/crtend.o | 0 clang/test/Driver/aarch64-toolchain-extra.c | 28 clang/test/Driver/aarch64-toolchain.c | 61 + clang/test/Driver/arm-gnutools.c | 12 ++ clang/test/Driver/arm-toolchain-extra.c | 28 clang/test/Driver/arm-toolchain.c | 62 + clang/test/Driver/baremetal.cpp | 16 +++ 31 files changed, 320 insertions(+), 20 deletions(-) create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/include/c++/8.2.1/.keep create m
[clang] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
quic-garvgupt wrote: * **#121829** https://app.graphite.dev/github/pr/llvm/llvm-project/121829?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/121829?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) (PR #121821)
https://github.com/quic-garvgupt created https://github.com/llvm/llvm-project/pull/121821 This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. This is the first PR in the series of 3 PRs for merging and extending Baremetal toolchain object. The division of the PRs is as follows: - Teach Baremetal toolchain about GCC installation and make sysroot and assembler related changes. - Changes related to linker job and defaults for CXXStdlib and other runtime libs. - Finally removing the call to RISCVToolchain object. The above division will also ensure that riscv and arm specific tests are not modified in the same PR. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 >From f11eb9f6f7c7407f30593360b788bfd970298146 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 13 Dec 2024 05:31:56 -0800 Subject: [PATCH] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. This is the first PR in the series of 3 PRs for merging and extending Baremetal toolchain object. The division of the PRs is as follows: - Teach Baremetal toolchain about GCC installation and make sysroot and assembler related changes. - Changes related to linker job and defaults for CXXStdlib and other runtime libs. - Finally removing the call to RISCVToolchain object. The above division will also ensure that riscv and arm specific tests are not modified in the same PR. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 Change-Id: Ibaeb569cf7e2cee03c022aa9ecd1abe29d5c30d4 --- clang/lib/Driver/ToolChains/BareMetal.cpp | 121 +++--- clang/lib/Driver/ToolChains/BareMetal.h | 8 +- .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/include/c++/8.2.1/.keep | 0 .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtend.o | 0 .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../aarch64-none-elf/lib/crtbegin.o | 0 .../aarch64-none-elf/lib/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/include/c++/8.2.1/.keep | 0 .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/libstdc++.a | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/crtbegin.o | 0 .../armv6m-none-eabi/lib/crtend.o | 0 clang/test/Driver/aarch64-toolchain-extra.c | 28 clang/test/Driver/aarch64-toolchain.c | 61 + clang/test/Driver/arm-gnutools.c | 12 ++ clang/test/Driver/arm-toolchain-extra.c | 28 clang/test/Driver/arm-toolchain.c | 62 + clang/test/Driver/baremetal.cpp | 16 +++ 31 files changed, 320 insertions(+), 20 deletions(-) create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_aar
[clang] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) (PR #121821)
https://github.com/quic-garvgupt closed https://github.com/llvm/llvm-project/pull/121821 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
https://github.com/quic-garvgupt ready_for_review https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
https://github.com/quic-garvgupt edited https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/121829 >From 02d70a2c1fa746eafa87308f0c8109bb2c91164f Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 13 Dec 2024 05:31:56 -0800 Subject: [PATCH] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. This is the first PR in the series of 3 PRs for merging and extending Baremetal toolchain object. The division of the PRs is as follows: - Teach Baremetal toolchain about GCC installation and make sysroot and assembler related changes. - Changes related to linker job and defaults for CXXStdlib and other runtime libs. - Finally removing the call to RISCVToolchain object. The above division will also ensure that riscv and arm specific tests are not modified in the same PR. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 Change-Id: Ibaeb569cf7e2cee03c022aa9ecd1abe29d5c30d4 --- clang/lib/Driver/ToolChains/BareMetal.cpp | 121 +++--- clang/lib/Driver/ToolChains/BareMetal.h | 8 +- .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/include/c++/8.2.1/.keep | 0 .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtend.o | 0 .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../aarch64-none-elf/lib/crtbegin.o | 0 .../aarch64-none-elf/lib/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/include/c++/8.2.1/.keep | 0 .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/crtbegin.o | 0 .../armv6m-none-eabi/lib/crtend.o | 0 clang/test/Driver/aarch64-toolchain-extra.c | 28 clang/test/Driver/aarch64-toolchain.c | 61 + clang/test/Driver/arm-gnutools.c | 12 ++ clang/test/Driver/arm-toolchain-extra.c | 29 + clang/test/Driver/arm-toolchain.c | 62 + clang/test/Driver/baremetal.cpp | 16 +++ 30 files changed, 321 insertions(+), 20 deletions(-) create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o create mode 100644 cla
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
quic-garvgupt wrote: Hi @petrhosek, following up on our last RISC-V embedded sync-up, can you please review this patch? Thanks https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/118809 >From 569feb86c654be044781aa5968907a72ea882e88 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 13 Nov 2024 02:45:51 -0800 Subject: [PATCH] [WIP] Merging RISCVToolChain and BareMetal toolchains Currently, LLVM has two RISC-V toolchain classes in Clang for baremetal development, creating unnecessary maintenance overhead. This patch extends the BareMetal toolchain to support an existing GCC installation, resolving this issue. The latest patchset preserves the behavior of both toolchain objects with minor differences. If no --sysroot option is passed on the command line or if the GCC installation is invalid, the sysroot will first be formed as per the RISCVToolChain baremetal object. If this path does not exist, the sysroot will be formed as per the BareMetal toolchain object. Additionally, the presence of --gcc-toolchain or --gcc-install-dir will imply that GNU linker is the default linker unless otherwise a differnt linker is passed through `-fuse-ld` flag. RFC - https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 change-Id: Ie2cdefd3c95b25770a33319ce2e711c9300efc2e --- clang/lib/Driver/Driver.cpp | 4 - clang/lib/Driver/ToolChains/BareMetal.cpp | 247 ++ clang/lib/Driver/ToolChains/BareMetal.h | 29 +- .../lib/Driver/ToolChains/RISCVToolchain.cpp | 232 clang/lib/Driver/ToolChains/RISCVToolchain.h | 67 - clang/test/Driver/arm-gnutools.c | 12 + clang/test/Driver/baremetal-multilib.yaml | 2 +- clang/test/Driver/baremetal-sysroot.cpp | 2 +- clang/test/Driver/baremetal.cpp | 77 +++--- clang/test/Driver/riscv-args.c| 2 +- clang/test/Driver/riscv32-toolchain-extra.c | 7 +- clang/test/Driver/riscv32-toolchain.c | 22 +- clang/test/Driver/riscv64-toolchain-extra.c | 7 +- clang/test/Driver/riscv64-toolchain.c | 16 +- 14 files changed, 295 insertions(+), 431 deletions(-) delete mode 100644 clang/lib/Driver/ToolChains/RISCVToolchain.cpp delete mode 100644 clang/lib/Driver/ToolChains/RISCVToolchain.h create mode 100644 clang/test/Driver/arm-gnutools.c diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index fb73b62cf2daed..48b6361f588843 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -6557,10 +6557,6 @@ const ToolChain &Driver::getToolChain(const ArgList &Args, break; case llvm::Triple::riscv32: case llvm::Triple::riscv64: -if (toolchains::RISCVToolChain::hasGCCToolchain(*this, Args)) - TC = - std::make_unique(*this, Target, Args); -else TC = std::make_unique(*this, Target, Args); break; case llvm::Triple::ve: diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp b/clang/lib/Driver/ToolChains/BareMetal.cpp index eecaaa9a42930d..a2fecb297cd05a 100644 --- a/clang/lib/Driver/ToolChains/BareMetal.cpp +++ b/clang/lib/Driver/ToolChains/BareMetal.cpp @@ -97,7 +97,8 @@ static bool findRISCVMultilibs(const Driver &D, return false; } -static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { +static std::string computeInstalledToolchainSysRoot(const Driver &D, +bool IncludeTriple) { if (!D.SysRoot.empty()) return D.SysRoot; @@ -110,20 +111,95 @@ static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { return std::string(SysRootDir); } +// GCC sysroot here means form sysroot from either --gcc-install-dir, or from +// --gcc-toolchain or if the toolchain is installed alongside clang in +// bin/../ directory if it is not explicitly specified on the +// command line through `--sysroot` option. libc here will be newlib. +std::string BareMetal::computeGCCSysRoot() const { + if (!getDriver().SysRoot.empty()) +return getDriver().SysRoot; + + SmallString<128> SysRootDir; + if (GCCInstallation.isValid()) { +StringRef LibDir = GCCInstallation.getParentLibPath(); +StringRef TripleStr = GCCInstallation.getTriple().str(); +llvm::sys::path::append(SysRootDir, LibDir, "..", TripleStr); + } else { +// Use the triple as provided to the driver. Unlike the parsed triple +// this has not been normalized to always contain every field. +llvm::sys::path::append(SysRootDir, getDriver().Dir, "..", +getDriver().getTargetTriple()); + } + + if (!llvm::sys::fs::exists(SysRootDir)) +return std::string(); + + return std::string(SysRootDir); +} + +std::string BareMetal::computeSysRoot() const { + if (!SysRoot.empty()) +return SysRoot; + + std::string SysRoot = getDriver().SysRoot; + if (!SysRoot.empty() && llvm::sys::fs::exists(SysRoot)) +return SysRoot; + + // Verify the GCC installation from -gcc-install-dir, --gcc-toolchain,
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/118809 >From b58f9dd197c78b1e39676022a421ca0e6d5552a5 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Wed, 13 Nov 2024 02:45:51 -0800 Subject: [PATCH] [WIP] Merging RISCVToolChain and BareMetal toolchains Currently, LLVM has two RISC-V toolchain classes in Clang for baremetal development, creating unnecessary maintenance overhead. This patch extends the BareMetal toolchain to support an existing GCC installation, resolving this issue. The latest patchset preserves the behavior of both toolchain objects with minor differences. If no --sysroot option is passed on the command line or if the GCC installation is invalid, the sysroot will first be formed as per the RISCVToolChain baremetal object. If this path does not exist, the sysroot will be formed as per the BareMetal toolchain object. Additionally, the presence of --gcc-toolchain or --gcc-install-dir will imply that GNU linker is the default linker unless otherwise a differnt linker is passed through `-fuse-ld` flag. RFC - https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 change-Id: Ie2cdefd3c95b25770a33319ce2e711c9300efc2e --- clang/lib/Driver/CMakeLists.txt | 1 - clang/lib/Driver/Driver.cpp | 7 +- clang/lib/Driver/ToolChains/BareMetal.cpp | 247 ++ clang/lib/Driver/ToolChains/BareMetal.h | 29 +- .../lib/Driver/ToolChains/RISCVToolchain.cpp | 232 clang/lib/Driver/ToolChains/RISCVToolchain.h | 67 - clang/test/Driver/arm-gnutools.c | 12 + clang/test/Driver/baremetal-multilib.yaml | 2 +- clang/test/Driver/baremetal-sysroot.cpp | 2 +- clang/test/Driver/baremetal.cpp | 77 +++--- clang/test/Driver/riscv-args.c| 2 +- clang/test/Driver/riscv32-toolchain-extra.c | 7 +- clang/test/Driver/riscv32-toolchain.c | 22 +- clang/test/Driver/riscv64-toolchain-extra.c | 7 +- clang/test/Driver/riscv64-toolchain.c | 20 +- 15 files changed, 298 insertions(+), 436 deletions(-) delete mode 100644 clang/lib/Driver/ToolChains/RISCVToolchain.cpp delete mode 100644 clang/lib/Driver/ToolChains/RISCVToolchain.h create mode 100644 clang/test/Driver/arm-gnutools.c diff --git a/clang/lib/Driver/CMakeLists.txt b/clang/lib/Driver/CMakeLists.txt index 4fd10bf671512f..59c219e1f709b4 100644 --- a/clang/lib/Driver/CMakeLists.txt +++ b/clang/lib/Driver/CMakeLists.txt @@ -74,7 +74,6 @@ add_clang_library(clangDriver ToolChains/OHOS.cpp ToolChains/OpenBSD.cpp ToolChains/PS4CPU.cpp - ToolChains/RISCVToolchain.cpp ToolChains/Solaris.cpp ToolChains/SPIRV.cpp ToolChains/TCE.cpp diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index fb73b62cf2daed..e16b0af1790cc9 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -41,7 +41,6 @@ #include "ToolChains/PPCFreeBSD.h" #include "ToolChains/PPCLinux.h" #include "ToolChains/PS4CPU.h" -#include "ToolChains/RISCVToolchain.h" #include "ToolChains/SPIRV.h" #include "ToolChains/Solaris.h" #include "ToolChains/TCE.h" @@ -6557,11 +6556,7 @@ const ToolChain &Driver::getToolChain(const ArgList &Args, break; case llvm::Triple::riscv32: case llvm::Triple::riscv64: -if (toolchains::RISCVToolChain::hasGCCToolchain(*this, Args)) - TC = - std::make_unique(*this, Target, Args); -else - TC = std::make_unique(*this, Target, Args); +TC = std::make_unique(*this, Target, Args); break; case llvm::Triple::ve: TC = std::make_unique(*this, Target, Args); diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp b/clang/lib/Driver/ToolChains/BareMetal.cpp index eecaaa9a42930d..a2fecb297cd05a 100644 --- a/clang/lib/Driver/ToolChains/BareMetal.cpp +++ b/clang/lib/Driver/ToolChains/BareMetal.cpp @@ -97,7 +97,8 @@ static bool findRISCVMultilibs(const Driver &D, return false; } -static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { +static std::string computeInstalledToolchainSysRoot(const Driver &D, +bool IncludeTriple) { if (!D.SysRoot.empty()) return D.SysRoot; @@ -110,20 +111,95 @@ static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { return std::string(SysRootDir); } +// GCC sysroot here means form sysroot from either --gcc-install-dir, or from +// --gcc-toolchain or if the toolchain is installed alongside clang in +// bin/../ directory if it is not explicitly specified on the +// command line through `--sysroot` option. libc here will be newlib. +std::string BareMetal::computeGCCSysRoot() const { + if (!getDriver().SysRoot.empty()) +return getDriver().SysRoot; + + SmallString<128> SysRootDir; + if (GCCInstallation.isValid()) { +StringRef LibDir = GCCInstallation.getPa
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
@@ -6521,11 +6521,7 @@ const ToolChain &Driver::getToolChain(const ArgList &Args, break; case llvm::Triple::riscv32: case llvm::Triple::riscv64: -if (toolchains::RISCVToolChain::hasGCCToolchain(*this, Args)) - TC = - std::make_unique(*this, Target, Args); -else - TC = std::make_unique(*this, Target, Args); quic-garvgupt wrote: yes, I have deleted those files as a part of my current patchset https://github.com/llvm/llvm-project/pull/118809 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
@@ -110,20 +111,95 @@ static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { return std::string(SysRootDir); } +// GCC sysroot here means form sysroot from either --gcc-install-dir, or from +// --gcc-toolchain or if the toolchain is installed alongside clang in +// bin/../ directory if it is not explicitly specified on the +// command line through `--sysroot` option. libc here will be newlib. +std::string BareMetal::computeGCCSysRoot() const { + if (!getDriver().SysRoot.empty()) +return getDriver().SysRoot; + + SmallString<128> SysRootDir; + if (GCCInstallation.isValid()) { +StringRef LibDir = GCCInstallation.getParentLibPath(); +StringRef TripleStr = GCCInstallation.getTriple().str(); +llvm::sys::path::append(SysRootDir, LibDir, "..", TripleStr); + } else { +// Use the triple as provided to the driver. Unlike the parsed triple +// this has not been normalized to always contain every field. +llvm::sys::path::append(SysRootDir, getDriver().Dir, "..", +getDriver().getTargetTriple()); + } + + if (!llvm::sys::fs::exists(SysRootDir)) +return std::string(); + + return std::string(SysRootDir); +} + +std::string BareMetal::computeSysRoot() const { + if (!SysRoot.empty()) +return SysRoot; + + std::string SysRoot = getDriver().SysRoot; + if (!SysRoot.empty() && llvm::sys::fs::exists(SysRoot)) +return SysRoot; + + // Verify the GCC installation from -gcc-install-dir, --gcc-toolchain, or + // alongside clang. If valid, form the sysroot. Otherwise, check + // lib/clang-runtimes above the driver. + SysRoot = computeGCCSysRoot(); + if (!SysRoot.empty()) +return SysRoot; + + SysRoot = + computeInstalledToolchainSysRoot(getDriver(), /*IncludeTriple*/ true); + + return SysRoot; +} + +static void addMultilibsFilePaths(const Driver &D, const MultilibSet &Multilibs, + const Multilib &Multilib, + StringRef InstallPath, + ToolChain::path_list &Paths) { + if (const auto &PathsCallback = Multilibs.filePathsCallback()) +for (const auto &Path : PathsCallback(Multilib)) + addPathIfExists(D, InstallPath + Path, Paths); +} + BareMetal::BareMetal(const Driver &D, const llvm::Triple &Triple, const ArgList &Args) -: ToolChain(D, Triple, Args), - SysRoot(computeBaseSysRoot(D, /*IncludeTriple=*/true)) { - getProgramPaths().push_back(getDriver().Dir); - - findMultilibs(D, Triple, Args); - SmallString<128> SysRoot(computeSysRoot()); - if (!SysRoot.empty()) { -for (const Multilib &M : getOrderedMultilibs()) { - SmallString<128> Dir(SysRoot); - llvm::sys::path::append(Dir, M.osSuffix(), "lib"); - getFilePaths().push_back(std::string(Dir)); - getLibraryPaths().push_back(std::string(Dir)); +: Generic_ELF(D, Triple, Args) { + GCCInstallation.init(Triple, Args); + SysRoot = computeSysRoot(); + UseLD = + Args.getLastArgValue(options::OPT_fuse_ld_EQ).equals_insensitive("ld"); quic-garvgupt wrote: value will be "0". The function to decide the default linker is "getDefaultLinker" which calls "isUsingLd". I have made this function virtual which can be overridden in derived classes and can return false for all cases. https://github.com/llvm/llvm-project/pull/118809 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
@@ -78,8 +86,9 @@ class LLVM_LIBRARY_VISIBILITY BareMetal : public ToolChain { using OrderedMultilibs = llvm::iterator_range::const_reverse_iterator>; OrderedMultilibs getOrderedMultilibs() const; - + bool UseLD; quic-garvgupt wrote: please see my comment below https://github.com/llvm/llvm-project/pull/118809 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
@@ -110,20 +111,93 @@ static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { return std::string(SysRootDir); } +// GCC sysroot here means form sysroot from either --gcc-install-dir, or from +// --gcc-toolchain or if the toolchain is installed alongside clang in +// bin/../ directory if it is not explicitly specified on the +// command line through `--sysroot` option. libc here will be newlib. +std::string BareMetal::computeGCCSysRoot() const { + if (!getDriver().SysRoot.empty()) +return getDriver().SysRoot; + + SmallString<128> SysRootDir; + if (GCCInstallation.isValid()) { +StringRef LibDir = GCCInstallation.getParentLibPath(); +StringRef TripleStr = GCCInstallation.getTriple().str(); +llvm::sys::path::append(SysRootDir, LibDir, "..", TripleStr); + } else { +// Use the triple as provided to the driver. Unlike the parsed triple +// this has not been normalized to always contain every field. +llvm::sys::path::append(SysRootDir, getDriver().Dir, "..", +getDriver().getTargetTriple()); + } + + if (!llvm::sys::fs::exists(SysRootDir)) quic-garvgupt wrote: I understand that. However, to preserve the behavior of both the BareMetal and RISCVToolchain objects, I need to maintain this condition. If this returns empty, only then does the control transfer to compute the sysroot, as it was done previously in the BareMetal toolchain. (See line 152 under `BareMetal::computeSysRoot()` function) https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
quic-garvgupt wrote: Gentle Ping again! https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
quic-garvgupt wrote: Gentle Ping! https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
https://github.com/quic-garvgupt edited https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Merging RISCVToolChain and BareMetal toolchains (PR #118809)
quic-garvgupt wrote: I have divided this PR into three separate PRs to streamline the review process and ensured that ARM and RISCV tests are not modified in the same PR. Please review them and provide any feedback or comments. Thanks! [RISCV] Teach Barmetal toolchain about GCC installation(1/3) - https://github.com/llvm/llvm-project/pull/121831 [RISCV] Change linker job in Baremetal toolchain object accomodate GCCInstallation.(2/3) - https://github.com/llvm/llvm-project/pull/121830 [RISCV] Integrate RISCV target in baremetal toolchain object and deprecate RISCVToolchain object.(3/3) - https://github.com/llvm/llvm-project/pull/121829 https://github.com/llvm/llvm-project/pull/118809 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/121829 >From 03b91a8d408bacec17391b995611dbbb0ea62edd Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 13 Dec 2024 05:31:56 -0800 Subject: [PATCH] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. This is the first PR in the series of 3 PRs for merging and extending Baremetal toolchain object. The division of the PRs is as follows: - Teach Baremetal toolchain about GCC installation and make sysroot and assembler related changes. - Changes related to linker job and defaults for CXXStdlib and other runtime libs. - Finally removing the call to RISCVToolchain object. The above division will also ensure that riscv and arm specific tests are not modified in the same PR. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 Change-Id: Ibaeb569cf7e2cee03c022aa9ecd1abe29d5c30d4 --- clang/lib/Driver/ToolChains/BareMetal.cpp | 121 +++--- clang/lib/Driver/ToolChains/BareMetal.h | 13 +- .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/include/c++/8.2.1/.keep | 0 .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtend.o | 0 .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../aarch64-none-elf/lib/crtbegin.o | 0 .../aarch64-none-elf/lib/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/include/c++/8.2.1/.keep | 0 .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/crtbegin.o | 0 .../armv6m-none-eabi/lib/crtend.o | 0 clang/test/Driver/aarch64-toolchain-extra.c | 28 clang/test/Driver/aarch64-toolchain.c | 61 + clang/test/Driver/arm-gnutools.c | 12 ++ clang/test/Driver/arm-toolchain-extra.c | 29 + clang/test/Driver/arm-toolchain.c | 62 + clang/test/Driver/baremetal.cpp | 16 +++ 30 files changed, 326 insertions(+), 20 deletions(-) create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o create mode 100644 cla
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
quic-garvgupt wrote: It's been a few weeks since this patch was last reviewed. If everything looks good, could someone please provide an LGTM? I'd like to merge this patch soon. https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
@@ -110,20 +111,93 @@ static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { return std::string(SysRootDir); } +// GCC sysroot here means form sysroot from either --gcc-install-dir, or from +// --gcc-toolchain or if the toolchain is installed alongside clang in +// bin/../ directory if it is not explicitly specified on the +// command line through `--sysroot` option. libc here will be newlib. +std::string BareMetal::computeGCCSysRoot() const { + if (!getDriver().SysRoot.empty()) +return getDriver().SysRoot; + + SmallString<128> SysRootDir; + if (GCCInstallation.isValid()) { +StringRef LibDir = GCCInstallation.getParentLibPath(); +StringRef TripleStr = GCCInstallation.getTriple().str(); +llvm::sys::path::append(SysRootDir, LibDir, "..", TripleStr); + } else { +// Use the triple as provided to the driver. Unlike the parsed triple +// this has not been normalized to always contain every field. +llvm::sys::path::append(SysRootDir, getDriver().Dir, "..", +getDriver().getTargetTriple()); + } + + if (!llvm::sys::fs::exists(SysRootDir)) quic-garvgupt wrote: I agree that the condition can be removed if it is actually not needed. Though that has to be done as a part of new patch because for now, this patch aims to preserve the behavior as it was before. https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
quic-garvgupt wrote: Hi @petrhosek, I've addressed all your comments. Please review the changes and approve the PR if everything looks good. https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/121829 >From 9bb78235d2ba008dc49dc4746edbd9978a92396b Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 13 Dec 2024 05:31:56 -0800 Subject: [PATCH] [RISCV] Teach Barmetal toolchain about GCC installation(1/3) This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. This is the first PR in the series of 3 PRs for merging and extending Baremetal toolchain object. The division of the PRs is as follows: - Teach Baremetal toolchain about GCC installation and make sysroot and assembler related changes. - Changes related to linker job and defaults for CXXStdlib and other runtime libs. - Finally removing the call to RISCVToolchain object. The above division will also ensure that riscv and arm specific tests are not modified in the same PR. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 Change-Id: Ibaeb569cf7e2cee03c022aa9ecd1abe29d5c30d4 --- clang/lib/Driver/ToolChains/BareMetal.cpp | 97 --- clang/lib/Driver/ToolChains/BareMetal.h | 13 ++- .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/include/c++/8.2.1/.keep | 0 .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtend.o | 0 .../aarch64-none-elf/bin/ld | 1 + .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../aarch64-none-elf/lib/crtbegin.o | 0 .../aarch64-none-elf/lib/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/include/c++/8.2.1/.keep | 0 .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtend.o | 0 .../armv6m-none-eabi/bin/ld | 1 + .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/crtbegin.o | 0 .../armv6m-none-eabi/lib/crtend.o | 0 clang/test/Driver/aarch64-toolchain-extra.c | 28 ++ clang/test/Driver/aarch64-toolchain.c | 61 clang/test/Driver/arm-gnutools.c | 12 +++ clang/test/Driver/arm-toolchain-extra.c | 29 ++ clang/test/Driver/arm-toolchain.c | 62 clang/test/Driver/baremetal.cpp | 16 +++ 30 files changed, 304 insertions(+), 18 deletions(-) create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/bin/ld create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o create mode 100644 clang/test/Driver/Inp
[clang] [Driver] Teach Barmetal toolchain about GCC installation(1/3) (PR #121829)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/121829 >From e07a4cd4e0ff77f74b66695923bc998904c14746 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 13 Dec 2024 05:31:56 -0800 Subject: [PATCH] [Driver] Teach Barmetal toolchain about GCC installation This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Moreover, support for adding include paths for libstd C++ library is added as well. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 Change-Id: Ibaeb569cf7e2cee03c022aa9ecd1abe29d5c30d4 --- clang/lib/Driver/ToolChains/BareMetal.cpp | 130 ++ clang/lib/Driver/ToolChains/BareMetal.h | 14 +- .../aarch64-none-elf/include/c++/8.2.1/.keep | 0 .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../bin/aarch64-none-elf-ld | 1 + .../lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtend.o | 0 .../aarch64-none-elf/lib/crt0.o | 0 .../aarch64-none-elf/lib/crtbegin.o | 0 .../aarch64-none-elf/lib/crtend.o | 0 .../bin/aarch64-none-elf-ld | 1 + .../armv6m-none-eabi/include/c++/8.2.1/.keep | 0 .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../bin/armv6m-none-eabi-ld | 1 + .../lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtend.o | 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/crtbegin.o | 0 .../armv6m-none-eabi/lib/crtend.o | 0 .../bin/armv6m-none-eabi-ld | 1 + clang/test/Driver/aarch64-toolchain-extra.c | 28 clang/test/Driver/aarch64-toolchain.c | 61 clang/test/Driver/arm-gnutools.c | 12 ++ clang/test/Driver/arm-toolchain-extra.c | 29 clang/test/Driver/arm-toolchain.c | 62 + clang/test/Driver/baremetal.cpp | 16 +++ 28 files changed, 324 insertions(+), 32 deletions(-) create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/crt0.o create mode 100755 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/bin/aarch64-none-elf-ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtend.o create mode 100755 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/bin/aarch64-none-elf-ld create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/crt0.o create mode 100755 clang/test/Driver/Inputs/basic_arm_gcc_tree/bin/armv6m-none-eabi-ld create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/lib/gcc/armv6m-none-eabi/8.2.1/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_arm_nogcc_tree/armv6m-none-eabi/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_arm_nogcc_tree/armv6m-none-eabi/lib/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_arm_nogcc_tree/armv6m-none-eabi/lib/crtend.o create mode 100755 clang/test/Driver/Inputs/basic_arm_nogcc_tree/bin/armv6m-none-eabi-ld create mode 100644 clang/test/Driver/aarch64-toolchain-extra.c create mode 100644 clang/test/Driver/aarch64-toolchain.c create mode 100644 clan
[clang] [Driver] Teach Barmetal toolchain about GCC installation (PR #121829)
https://github.com/quic-garvgupt edited https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation (PR #121829)
@@ -110,20 +110,76 @@ static std::string computeBaseSysRoot(const Driver &D, bool IncludeTriple) { return std::string(SysRootDir); } +std::string BareMetal::computeSysRoot() const { + if (!SysRoot.empty()) +return SysRoot; + + std::string SysRoot = getDriver().SysRoot; + if (!SysRoot.empty()) +return SysRoot; + + // Verify the GCC installation from -gcc-install-dir, --gcc-toolchain, or + // alongside clang. If valid, form the sysroot. Otherwise, check + // lib/clang-runtimes above the driver. + SmallString<128> SysRootDir; + if (GCCInstallation.isValid()) { +StringRef LibDir = GCCInstallation.getParentLibPath(); +StringRef TripleStr = GCCInstallation.getTriple().str(); +llvm::sys::path::append(SysRootDir, LibDir, "..", TripleStr); + } else { +// Use the triple as provided to the driver. Unlike the parsed triple +// this has not been normalized to always contain every field. +llvm::sys::path::append(SysRootDir, getDriver().Dir, "..", +getDriver().getTargetTriple()); + } + + if (llvm::sys::fs::exists(SysRootDir)) +return std::string(SysRootDir); + SysRoot = computeBaseSysRoot(getDriver(), /*IncludeTriple*/ true); + + return SysRoot; quic-garvgupt wrote: Thanks for pointing this out!. I have fixed it in the next patchset https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation (PR #121829)
@@ -79,7 +87,6 @@ class LLVM_LIBRARY_VISIBILITY BareMetal : public ToolChain { OrderedMultilibs getOrderedMultilibs() const; std::string SysRoot; quic-garvgupt wrote: Removing this private variable was making the code messy because there have been updates to this variable in some member functions and the updated value is then further used in other functions. Removing this variable would need to pass this as an argument to all those functions which would make the code less readable. To avoid the confusion, all local variables for sysroot are named as `SysRootDir` and any references to this variable as `SysRoot` only https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation (PR #121829)
https://github.com/quic-garvgupt edited https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation (PR #121829)
quic-garvgupt wrote: Hi @petrhosek, I've addressed all your comments. Please review the changes and approve the PR if everything looks good. https://github.com/llvm/llvm-project/pull/121829 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver] Teach Barmetal toolchain about GCC installation (PR #121829)
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/121829 >From 1d0db96afab52903a267d600cab02c24900101af Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 13 Dec 2024 05:31:56 -0800 Subject: [PATCH] [Driver] Teach Barmetal toolchain about GCC installation This patch introduces the baretmetal toolchain object about GCC Installation. Currently, if `--gcc-installation` ot `--gcc-install-dir` options are passed on commandline, then sysroot will be formed from there if paths will be valid. Otherwise, it will be fallback to as it already existed in the Baremetal toolchaibn object. Moreover, support for adding include paths for libstd C++ library is added as well. Additionally, the restriction to always use integrated assembler is removed because with valid gcc installation, gnu assembler can be invoked as well. This patch currently adds and modifies arm related test only. The riscv specific test will be added in the last PR when driver code related to calling of RISCVToolchain object will be removed. Currently in this PR, there is no way to test riscv target. RFC: https://discourse.llvm.org/t/merging-riscvtoolchain-and-baremetal-toolchains/75524 Change-Id: Ibaeb569cf7e2cee03c022aa9ecd1abe29d5c30d4 --- clang/lib/Driver/ToolChains/BareMetal.cpp | 130 ++ clang/lib/Driver/ToolChains/BareMetal.h | 14 +- .../aarch64-none-elf/include/c++/8.2.1/.keep | 0 .../aarch64-none-elf/lib/.keep| 0 .../aarch64-none-elf/lib/crt0.o | 0 .../bin/aarch64-none-elf-ld | 1 + .../lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o | 0 .../lib/gcc/aarch64-none-elf/8.2.1/crtend.o | 0 .../aarch64-none-elf/lib/crt0.o | 0 .../aarch64-none-elf/lib/crtbegin.o | 0 .../aarch64-none-elf/lib/crtend.o | 0 .../bin/aarch64-none-elf-ld | 1 + .../armv6m-none-eabi/include/c++/8.2.1/.keep | 0 .../armv6m-none-eabi/lib/.keep| 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../bin/armv6m-none-eabi-ld | 1 + .../lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o | 0 .../lib/gcc/armv6m-none-eabi/8.2.1/crtend.o | 0 .../armv6m-none-eabi/lib/crt0.o | 0 .../armv6m-none-eabi/lib/crtbegin.o | 0 .../armv6m-none-eabi/lib/crtend.o | 0 .../bin/armv6m-none-eabi-ld | 1 + clang/test/Driver/aarch64-toolchain-extra.c | 28 clang/test/Driver/aarch64-toolchain.c | 61 clang/test/Driver/arm-gnutools.c | 12 ++ clang/test/Driver/arm-toolchain-extra.c | 29 clang/test/Driver/arm-toolchain.c | 62 + clang/test/Driver/baremetal.cpp | 16 +++ 28 files changed, 324 insertions(+), 32 deletions(-) create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/aarch64-none-elf/lib/crt0.o create mode 100755 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/bin/aarch64-none-elf-ld create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_gcc_tree/lib/gcc/aarch64-none-elf/8.2.1/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/aarch64-none-elf/lib/crtend.o create mode 100755 clang/test/Driver/Inputs/basic_aarch64_nogcc_tree/bin/aarch64-none-elf-ld create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/include/c++/8.2.1/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/.keep create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/armv6m-none-eabi/lib/crt0.o create mode 100755 clang/test/Driver/Inputs/basic_arm_gcc_tree/bin/armv6m-none-eabi-ld create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/lib/gcc/armv6m-none-eabi/8.2.1/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_arm_gcc_tree/lib/gcc/armv6m-none-eabi/8.2.1/crtend.o create mode 100644 clang/test/Driver/Inputs/basic_arm_nogcc_tree/armv6m-none-eabi/lib/crt0.o create mode 100644 clang/test/Driver/Inputs/basic_arm_nogcc_tree/armv6m-none-eabi/lib/crtbegin.o create mode 100644 clang/test/Driver/Inputs/basic_arm_nogcc_tree/armv6m-none-eabi/lib/crtend.o create mode 100755 clang/test/Driver/Inputs/basic_arm_nogcc_tree/bin/armv6m-none-eabi-ld create mode 100644 clang/test/Driver/aarch64-toolchain-extra.c create mode 100644 clang/test/Driver/aarch64-toolchain.c create mode 100644 clan