[clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)

2024-08-21 Thread Gang Chen via cfe-commits 

cmc-rep wrote:

@alex-t Just curious about the status of this PR. Both this PR and the 
register-allocation PR by CD will have significant impact to the generated 
code.  If we decide this is the right direction, then I feel it would be better 
to get it in earlier, so we can access its impact in our downstream work. 

https://github.com/llvm/llvm-project/pull/92809
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[clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)

2024-06-24 Thread Gang Chen via cfe-commits 


@@ -305,43 +304,43 @@ bool SIAnnotateControlFlow::handleLoop(BranchInst *Term) {
 }
 
 /// Close the last opened control flow
-bool SIAnnotateControlFlow::closeControlFlow(BasicBlock *BB) {
-  llvm::Loop *L = LI->getLoopFor(BB);
+bool SIAnnotateControlFlow::tryWaveReconverge(BasicBlock *BB) {

cmc-rep wrote:

This function is one core part of this change. It would be nice to have more 
comment with examples before the function header showing when and where 
wave_converge is inserted.

https://github.com/llvm/llvm-project/pull/92809
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[clang] [llvm] [AMDGPU] Change CF intrinsics lowering to reconverge on predecessors. (PR #92809)

2024-06-24 Thread Gang Chen via cfe-commits 


@@ -3172,8 +3172,8 @@ def int_amdgcn_loop : Intrinsic<[llvm_i1_ty],
   [llvm_anyint_ty], [IntrWillReturn, IntrNoCallback, IntrNoFree]
 >;
 
-def int_amdgcn_end_cf : Intrinsic<[], [llvm_anyint_ty],
-  [IntrWillReturn, IntrNoCallback, IntrNoFree]>;
+def int_amdgcn_wave_reconverge : Intrinsic<[], [llvm_anyint_ty],

cmc-rep wrote:

I second that, all these control-flow pseudo need to have their semantics 
documented

https://github.com/llvm/llvm-project/pull/92809
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[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-24 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep updated 
https://github.com/llvm/llvm-project/pull/113614

>From 166a4aec8a8ee813be0ee3045563cd45efd944c0 Mon Sep 17 00:00:00 2001
From: gangc 
Date: Thu, 24 Oct 2024 11:18:22 -0700
Subject: [PATCH 1/3] [AMDGPU] Add a type for the named barrier

---
 clang/include/clang/Basic/AMDGPUTypes.def |  8 
 .../include/clang/Serialization/ASTBitCodes.h |  2 +-
 clang/lib/CodeGen/CGDebugInfo.cpp |  7 
 clang/lib/CodeGen/CodeGenTypes.cpp|  4 ++
 clang/test/AST/ast-dump-amdgpu-types.c| 13 --
 .../CodeGen/amdgpu-barrier-type-debug-info.c  |  8 
 .../CodeGenCXX/amdgpu-barrier-typeinfo.cpp| 10 +
 clang/test/CodeGenHIP/amdgpu-barrier-type.hip | 42 +++
 clang/test/SemaCXX/amdgpu-barrier.cpp | 17 
 clang/test/SemaHIP/amdgpu-barrier.hip | 20 +
 clang/test/SemaOpenCL/amdgpu-barrier.cl   | 12 ++
 clang/test/SemaOpenMP/amdgpu-barrier.cpp  | 17 
 llvm/lib/IR/Type.cpp  |  8 
 13 files changed, 163 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
 create mode 100644 clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
 create mode 100644 clang/test/CodeGenHIP/amdgpu-barrier-type.hip
 create mode 100644 clang/test/SemaCXX/amdgpu-barrier.cpp
 create mode 100644 clang/test/SemaHIP/amdgpu-barrier.hip
 create mode 100644 clang/test/SemaOpenCL/amdgpu-barrier.cl
 create mode 100644 clang/test/SemaOpenMP/amdgpu-barrier.cpp

diff --git a/clang/include/clang/Basic/AMDGPUTypes.def 
b/clang/include/clang/Basic/AMDGPUTypes.def
index e47e544fdc82c1..6b98e311b4cf55 100644
--- a/clang/include/clang/Basic/AMDGPUTypes.def
+++ b/clang/include/clang/Basic/AMDGPUTypes.def
@@ -15,7 +15,15 @@
   AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
 #endif
 
+#ifndef AMDGPU_NAMED_BARRIER_TYPE
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope) \
+  AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
+#endif
+
 AMDGPU_OPAQUE_PTR_TYPE("__amdgpu_buffer_rsrc_t", AMDGPUBufferRsrc, 
AMDGPUBufferRsrcTy, 128, 128, 8)
 
+AMDGPU_NAMED_BARRIER_TYPE("__amdgpu_named_workgroup_barrier_t", 
AMDGPUNamedWorkgroupBarrier, AMDGPUNamedWorkgroupBarrierTy, 128, 32, 0)
+
 #undef AMDGPU_TYPE
 #undef AMDGPU_OPAQUE_PTR_TYPE
+#undef AMDGPU_NAMED_BARRIER_TYPE
\ No newline at end of file
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index 13173dc96e71ae..99232fd2135790 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1149,7 +1149,7 @@ enum PredefinedTypeIDs {
 ///
 /// Type IDs for non-predefined types will start at
 /// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 511;
+const unsigned NUM_PREDEF_TYPE_IDS = 512;
 
 // Ensure we do not overrun the predefined types we reserved
 // in the enum PredefinedTypeIDs above.
diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp 
b/clang/lib/CodeGen/CGDebugInfo.cpp
index 27bbbfc6f531a1..3f9e14a52fc801 100644
--- a/clang/lib/CodeGen/CGDebugInfo.cpp
+++ b/clang/lib/CodeGen/CGDebugInfo.cpp
@@ -909,6 +909,13 @@ llvm::DIType *CGDebugInfo::CreateType(const BuiltinType 
*BT) {
  TheCU, TheCU->getFile(), 0);  
\
 return SingletonId;
\
   }
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id: {  
 \
+if (!SingletonId)  
\
+  SingletonId =
\
+  DBuilder.createBasicType(Name, Width, llvm::dwarf::DW_ATE_unsigned); 
\
+return SingletonId;
+  }
 #include "clang/Basic/AMDGPUTypes.def"
   case BuiltinType::UChar:
   case BuiltinType::Char_U:
diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp 
b/clang/lib/CodeGen/CodeGenTypes.cpp
index f87184fc77832c..09191a4901f493 100644
--- a/clang/lib/CodeGen/CodeGenTypes.cpp
+++ b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -564,6 +564,10 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
 #define AMDGPU_OPAQUE_PTR_TYPE(Name, Id, SingletonId, Width, Align, AS)
\
   case BuiltinType::Id:
\
 return llvm::PointerType::get(getLLVMContext(), AS);
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id:
\
+return llvm::TargetExtType::get(getLLVMContext(), "amdgcn.named.barrier",  
\
+{}, {Scope});
 #include "clang/Basic/AMDGPUTypes.def"
 #define HLSL_INTANGIBLE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
 #include "clang/Basic/HLSLIntangibleTypes.def"
diff --git a/clang/test/AST/ast

[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-24 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep updated 
https://github.com/llvm/llvm-project/pull/113614

>From 166a4aec8a8ee813be0ee3045563cd45efd944c0 Mon Sep 17 00:00:00 2001
From: gangc 
Date: Thu, 24 Oct 2024 11:18:22 -0700
Subject: [PATCH 1/2] [AMDGPU] Add a type for the named barrier

---
 clang/include/clang/Basic/AMDGPUTypes.def |  8 
 .../include/clang/Serialization/ASTBitCodes.h |  2 +-
 clang/lib/CodeGen/CGDebugInfo.cpp |  7 
 clang/lib/CodeGen/CodeGenTypes.cpp|  4 ++
 clang/test/AST/ast-dump-amdgpu-types.c| 13 --
 .../CodeGen/amdgpu-barrier-type-debug-info.c  |  8 
 .../CodeGenCXX/amdgpu-barrier-typeinfo.cpp| 10 +
 clang/test/CodeGenHIP/amdgpu-barrier-type.hip | 42 +++
 clang/test/SemaCXX/amdgpu-barrier.cpp | 17 
 clang/test/SemaHIP/amdgpu-barrier.hip | 20 +
 clang/test/SemaOpenCL/amdgpu-barrier.cl   | 12 ++
 clang/test/SemaOpenMP/amdgpu-barrier.cpp  | 17 
 llvm/lib/IR/Type.cpp  |  8 
 13 files changed, 163 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
 create mode 100644 clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
 create mode 100644 clang/test/CodeGenHIP/amdgpu-barrier-type.hip
 create mode 100644 clang/test/SemaCXX/amdgpu-barrier.cpp
 create mode 100644 clang/test/SemaHIP/amdgpu-barrier.hip
 create mode 100644 clang/test/SemaOpenCL/amdgpu-barrier.cl
 create mode 100644 clang/test/SemaOpenMP/amdgpu-barrier.cpp

diff --git a/clang/include/clang/Basic/AMDGPUTypes.def 
b/clang/include/clang/Basic/AMDGPUTypes.def
index e47e544fdc82c1..6b98e311b4cf55 100644
--- a/clang/include/clang/Basic/AMDGPUTypes.def
+++ b/clang/include/clang/Basic/AMDGPUTypes.def
@@ -15,7 +15,15 @@
   AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
 #endif
 
+#ifndef AMDGPU_NAMED_BARRIER_TYPE
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope) \
+  AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
+#endif
+
 AMDGPU_OPAQUE_PTR_TYPE("__amdgpu_buffer_rsrc_t", AMDGPUBufferRsrc, 
AMDGPUBufferRsrcTy, 128, 128, 8)
 
+AMDGPU_NAMED_BARRIER_TYPE("__amdgpu_named_workgroup_barrier_t", 
AMDGPUNamedWorkgroupBarrier, AMDGPUNamedWorkgroupBarrierTy, 128, 32, 0)
+
 #undef AMDGPU_TYPE
 #undef AMDGPU_OPAQUE_PTR_TYPE
+#undef AMDGPU_NAMED_BARRIER_TYPE
\ No newline at end of file
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index 13173dc96e71ae..99232fd2135790 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1149,7 +1149,7 @@ enum PredefinedTypeIDs {
 ///
 /// Type IDs for non-predefined types will start at
 /// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 511;
+const unsigned NUM_PREDEF_TYPE_IDS = 512;
 
 // Ensure we do not overrun the predefined types we reserved
 // in the enum PredefinedTypeIDs above.
diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp 
b/clang/lib/CodeGen/CGDebugInfo.cpp
index 27bbbfc6f531a1..3f9e14a52fc801 100644
--- a/clang/lib/CodeGen/CGDebugInfo.cpp
+++ b/clang/lib/CodeGen/CGDebugInfo.cpp
@@ -909,6 +909,13 @@ llvm::DIType *CGDebugInfo::CreateType(const BuiltinType 
*BT) {
  TheCU, TheCU->getFile(), 0);  
\
 return SingletonId;
\
   }
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id: {  
 \
+if (!SingletonId)  
\
+  SingletonId =
\
+  DBuilder.createBasicType(Name, Width, llvm::dwarf::DW_ATE_unsigned); 
\
+return SingletonId;
+  }
 #include "clang/Basic/AMDGPUTypes.def"
   case BuiltinType::UChar:
   case BuiltinType::Char_U:
diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp 
b/clang/lib/CodeGen/CodeGenTypes.cpp
index f87184fc77832c..09191a4901f493 100644
--- a/clang/lib/CodeGen/CodeGenTypes.cpp
+++ b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -564,6 +564,10 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
 #define AMDGPU_OPAQUE_PTR_TYPE(Name, Id, SingletonId, Width, Align, AS)
\
   case BuiltinType::Id:
\
 return llvm::PointerType::get(getLLVMContext(), AS);
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id:
\
+return llvm::TargetExtType::get(getLLVMContext(), "amdgcn.named.barrier",  
\
+{}, {Scope});
 #include "clang/Basic/AMDGPUTypes.def"
 #define HLSL_INTANGIBLE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
 #include "clang/Basic/HLSLIntangibleTypes.def"
diff --git a/clang/test/AST/ast

[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-24 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep updated 
https://github.com/llvm/llvm-project/pull/113614

>From 166a4aec8a8ee813be0ee3045563cd45efd944c0 Mon Sep 17 00:00:00 2001
From: gangc 
Date: Thu, 24 Oct 2024 11:18:22 -0700
Subject: [PATCH 1/2] [AMDGPU] Add a type for the named barrier

---
 clang/include/clang/Basic/AMDGPUTypes.def |  8 
 .../include/clang/Serialization/ASTBitCodes.h |  2 +-
 clang/lib/CodeGen/CGDebugInfo.cpp |  7 
 clang/lib/CodeGen/CodeGenTypes.cpp|  4 ++
 clang/test/AST/ast-dump-amdgpu-types.c| 13 --
 .../CodeGen/amdgpu-barrier-type-debug-info.c  |  8 
 .../CodeGenCXX/amdgpu-barrier-typeinfo.cpp| 10 +
 clang/test/CodeGenHIP/amdgpu-barrier-type.hip | 42 +++
 clang/test/SemaCXX/amdgpu-barrier.cpp | 17 
 clang/test/SemaHIP/amdgpu-barrier.hip | 20 +
 clang/test/SemaOpenCL/amdgpu-barrier.cl   | 12 ++
 clang/test/SemaOpenMP/amdgpu-barrier.cpp  | 17 
 llvm/lib/IR/Type.cpp  |  8 
 13 files changed, 163 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
 create mode 100644 clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
 create mode 100644 clang/test/CodeGenHIP/amdgpu-barrier-type.hip
 create mode 100644 clang/test/SemaCXX/amdgpu-barrier.cpp
 create mode 100644 clang/test/SemaHIP/amdgpu-barrier.hip
 create mode 100644 clang/test/SemaOpenCL/amdgpu-barrier.cl
 create mode 100644 clang/test/SemaOpenMP/amdgpu-barrier.cpp

diff --git a/clang/include/clang/Basic/AMDGPUTypes.def 
b/clang/include/clang/Basic/AMDGPUTypes.def
index e47e544fdc82c1..6b98e311b4cf55 100644
--- a/clang/include/clang/Basic/AMDGPUTypes.def
+++ b/clang/include/clang/Basic/AMDGPUTypes.def
@@ -15,7 +15,15 @@
   AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
 #endif
 
+#ifndef AMDGPU_NAMED_BARRIER_TYPE
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope) \
+  AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
+#endif
+
 AMDGPU_OPAQUE_PTR_TYPE("__amdgpu_buffer_rsrc_t", AMDGPUBufferRsrc, 
AMDGPUBufferRsrcTy, 128, 128, 8)
 
+AMDGPU_NAMED_BARRIER_TYPE("__amdgpu_named_workgroup_barrier_t", 
AMDGPUNamedWorkgroupBarrier, AMDGPUNamedWorkgroupBarrierTy, 128, 32, 0)
+
 #undef AMDGPU_TYPE
 #undef AMDGPU_OPAQUE_PTR_TYPE
+#undef AMDGPU_NAMED_BARRIER_TYPE
\ No newline at end of file
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index 13173dc96e71ae..99232fd2135790 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1149,7 +1149,7 @@ enum PredefinedTypeIDs {
 ///
 /// Type IDs for non-predefined types will start at
 /// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 511;
+const unsigned NUM_PREDEF_TYPE_IDS = 512;
 
 // Ensure we do not overrun the predefined types we reserved
 // in the enum PredefinedTypeIDs above.
diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp 
b/clang/lib/CodeGen/CGDebugInfo.cpp
index 27bbbfc6f531a1..3f9e14a52fc801 100644
--- a/clang/lib/CodeGen/CGDebugInfo.cpp
+++ b/clang/lib/CodeGen/CGDebugInfo.cpp
@@ -909,6 +909,13 @@ llvm::DIType *CGDebugInfo::CreateType(const BuiltinType 
*BT) {
  TheCU, TheCU->getFile(), 0);  
\
 return SingletonId;
\
   }
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id: {  
 \
+if (!SingletonId)  
\
+  SingletonId =
\
+  DBuilder.createBasicType(Name, Width, llvm::dwarf::DW_ATE_unsigned); 
\
+return SingletonId;
+  }
 #include "clang/Basic/AMDGPUTypes.def"
   case BuiltinType::UChar:
   case BuiltinType::Char_U:
diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp 
b/clang/lib/CodeGen/CodeGenTypes.cpp
index f87184fc77832c..09191a4901f493 100644
--- a/clang/lib/CodeGen/CodeGenTypes.cpp
+++ b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -564,6 +564,10 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
 #define AMDGPU_OPAQUE_PTR_TYPE(Name, Id, SingletonId, Width, Align, AS)
\
   case BuiltinType::Id:
\
 return llvm::PointerType::get(getLLVMContext(), AS);
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id:
\
+return llvm::TargetExtType::get(getLLVMContext(), "amdgcn.named.barrier",  
\
+{}, {Scope});
 #include "clang/Basic/AMDGPUTypes.def"
 #define HLSL_INTANGIBLE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
 #include "clang/Basic/HLSLIntangibleTypes.def"
diff --git a/clang/test/AST/ast

[clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)

2024-11-04 Thread Gang Chen via cfe-commits 

cmc-rep wrote:

Also, I added the piece in AMDGPULowerModuleLDS during internal review because 
other reviewers want to see the functional completeness.

https://github.com/llvm/llvm-project/pull/114550
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[clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)

2024-11-01 Thread Gang Chen via cfe-commits 


@@ -920,6 +920,124 @@ class AMDGPULowerModuleLDS {
 return KernelToCreatedDynamicLDS;
   }
 
+  static GlobalVariable *uniquifyGVPerKernel(Module &M, GlobalVariable *GV,

cmc-rep wrote:

This is where the local pointer address is assigned for a named barrier before 
going into AMDGPUbackend

https://github.com/llvm/llvm-project/pull/114550
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[clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)

2024-11-01 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep edited 
https://github.com/llvm/llvm-project/pull/114550
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[clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)

2024-11-01 Thread Gang Chen via cfe-commits 


@@ -920,6 +920,124 @@ class AMDGPULowerModuleLDS {
 return KernelToCreatedDynamicLDS;
   }
 
+  static GlobalVariable *uniquifyGVPerKernel(Module &M, GlobalVariable *GV,

cmc-rep wrote:

I will add you to the internal review link. So you can see the review history.

https://github.com/llvm/llvm-project/pull/114550
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[clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)

2024-11-01 Thread Gang Chen via cfe-commits 


@@ -920,6 +920,124 @@ class AMDGPULowerModuleLDS {
 return KernelToCreatedDynamicLDS;
   }
 
+  static GlobalVariable *uniquifyGVPerKernel(Module &M, GlobalVariable *GV,

cmc-rep wrote:

This goes together with the change in AMDGPUMachineFunction.cpp

https://github.com/llvm/llvm-project/pull/114550
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[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep updated 
https://github.com/llvm/llvm-project/pull/113614

>From 166a4aec8a8ee813be0ee3045563cd45efd944c0 Mon Sep 17 00:00:00 2001
From: gangc 
Date: Thu, 24 Oct 2024 11:18:22 -0700
Subject: [PATCH 1/4] [AMDGPU] Add a type for the named barrier

---
 clang/include/clang/Basic/AMDGPUTypes.def |  8 
 .../include/clang/Serialization/ASTBitCodes.h |  2 +-
 clang/lib/CodeGen/CGDebugInfo.cpp |  7 
 clang/lib/CodeGen/CodeGenTypes.cpp|  4 ++
 clang/test/AST/ast-dump-amdgpu-types.c| 13 --
 .../CodeGen/amdgpu-barrier-type-debug-info.c  |  8 
 .../CodeGenCXX/amdgpu-barrier-typeinfo.cpp| 10 +
 clang/test/CodeGenHIP/amdgpu-barrier-type.hip | 42 +++
 clang/test/SemaCXX/amdgpu-barrier.cpp | 17 
 clang/test/SemaHIP/amdgpu-barrier.hip | 20 +
 clang/test/SemaOpenCL/amdgpu-barrier.cl   | 12 ++
 clang/test/SemaOpenMP/amdgpu-barrier.cpp  | 17 
 llvm/lib/IR/Type.cpp  |  8 
 13 files changed, 163 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
 create mode 100644 clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
 create mode 100644 clang/test/CodeGenHIP/amdgpu-barrier-type.hip
 create mode 100644 clang/test/SemaCXX/amdgpu-barrier.cpp
 create mode 100644 clang/test/SemaHIP/amdgpu-barrier.hip
 create mode 100644 clang/test/SemaOpenCL/amdgpu-barrier.cl
 create mode 100644 clang/test/SemaOpenMP/amdgpu-barrier.cpp

diff --git a/clang/include/clang/Basic/AMDGPUTypes.def 
b/clang/include/clang/Basic/AMDGPUTypes.def
index e47e544fdc82c1..6b98e311b4cf55 100644
--- a/clang/include/clang/Basic/AMDGPUTypes.def
+++ b/clang/include/clang/Basic/AMDGPUTypes.def
@@ -15,7 +15,15 @@
   AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
 #endif
 
+#ifndef AMDGPU_NAMED_BARRIER_TYPE
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope) \
+  AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
+#endif
+
 AMDGPU_OPAQUE_PTR_TYPE("__amdgpu_buffer_rsrc_t", AMDGPUBufferRsrc, 
AMDGPUBufferRsrcTy, 128, 128, 8)
 
+AMDGPU_NAMED_BARRIER_TYPE("__amdgpu_named_workgroup_barrier_t", 
AMDGPUNamedWorkgroupBarrier, AMDGPUNamedWorkgroupBarrierTy, 128, 32, 0)
+
 #undef AMDGPU_TYPE
 #undef AMDGPU_OPAQUE_PTR_TYPE
+#undef AMDGPU_NAMED_BARRIER_TYPE
\ No newline at end of file
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index 13173dc96e71ae..99232fd2135790 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1149,7 +1149,7 @@ enum PredefinedTypeIDs {
 ///
 /// Type IDs for non-predefined types will start at
 /// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 511;
+const unsigned NUM_PREDEF_TYPE_IDS = 512;
 
 // Ensure we do not overrun the predefined types we reserved
 // in the enum PredefinedTypeIDs above.
diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp 
b/clang/lib/CodeGen/CGDebugInfo.cpp
index 27bbbfc6f531a1..3f9e14a52fc801 100644
--- a/clang/lib/CodeGen/CGDebugInfo.cpp
+++ b/clang/lib/CodeGen/CGDebugInfo.cpp
@@ -909,6 +909,13 @@ llvm::DIType *CGDebugInfo::CreateType(const BuiltinType 
*BT) {
  TheCU, TheCU->getFile(), 0);  
\
 return SingletonId;
\
   }
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id: {  
 \
+if (!SingletonId)  
\
+  SingletonId =
\
+  DBuilder.createBasicType(Name, Width, llvm::dwarf::DW_ATE_unsigned); 
\
+return SingletonId;
+  }
 #include "clang/Basic/AMDGPUTypes.def"
   case BuiltinType::UChar:
   case BuiltinType::Char_U:
diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp 
b/clang/lib/CodeGen/CodeGenTypes.cpp
index f87184fc77832c..09191a4901f493 100644
--- a/clang/lib/CodeGen/CodeGenTypes.cpp
+++ b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -564,6 +564,10 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
 #define AMDGPU_OPAQUE_PTR_TYPE(Name, Id, SingletonId, Width, Align, AS)
\
   case BuiltinType::Id:
\
 return llvm::PointerType::get(getLLVMContext(), AS);
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id:
\
+return llvm::TargetExtType::get(getLLVMContext(), "amdgcn.named.barrier",  
\
+{}, {Scope});
 #include "clang/Basic/AMDGPUTypes.def"
 #define HLSL_INTANGIBLE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
 #include "clang/Basic/HLSLIntangibleTypes.def"
diff --git a/clang/test/AST/ast

[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep updated 
https://github.com/llvm/llvm-project/pull/113614

>From 166a4aec8a8ee813be0ee3045563cd45efd944c0 Mon Sep 17 00:00:00 2001
From: gangc 
Date: Thu, 24 Oct 2024 11:18:22 -0700
Subject: [PATCH 1/5] [AMDGPU] Add a type for the named barrier

---
 clang/include/clang/Basic/AMDGPUTypes.def |  8 
 .../include/clang/Serialization/ASTBitCodes.h |  2 +-
 clang/lib/CodeGen/CGDebugInfo.cpp |  7 
 clang/lib/CodeGen/CodeGenTypes.cpp|  4 ++
 clang/test/AST/ast-dump-amdgpu-types.c| 13 --
 .../CodeGen/amdgpu-barrier-type-debug-info.c  |  8 
 .../CodeGenCXX/amdgpu-barrier-typeinfo.cpp| 10 +
 clang/test/CodeGenHIP/amdgpu-barrier-type.hip | 42 +++
 clang/test/SemaCXX/amdgpu-barrier.cpp | 17 
 clang/test/SemaHIP/amdgpu-barrier.hip | 20 +
 clang/test/SemaOpenCL/amdgpu-barrier.cl   | 12 ++
 clang/test/SemaOpenMP/amdgpu-barrier.cpp  | 17 
 llvm/lib/IR/Type.cpp  |  8 
 13 files changed, 163 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
 create mode 100644 clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
 create mode 100644 clang/test/CodeGenHIP/amdgpu-barrier-type.hip
 create mode 100644 clang/test/SemaCXX/amdgpu-barrier.cpp
 create mode 100644 clang/test/SemaHIP/amdgpu-barrier.hip
 create mode 100644 clang/test/SemaOpenCL/amdgpu-barrier.cl
 create mode 100644 clang/test/SemaOpenMP/amdgpu-barrier.cpp

diff --git a/clang/include/clang/Basic/AMDGPUTypes.def 
b/clang/include/clang/Basic/AMDGPUTypes.def
index e47e544fdc82c1..6b98e311b4cf55 100644
--- a/clang/include/clang/Basic/AMDGPUTypes.def
+++ b/clang/include/clang/Basic/AMDGPUTypes.def
@@ -15,7 +15,15 @@
   AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
 #endif
 
+#ifndef AMDGPU_NAMED_BARRIER_TYPE
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope) \
+  AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
+#endif
+
 AMDGPU_OPAQUE_PTR_TYPE("__amdgpu_buffer_rsrc_t", AMDGPUBufferRsrc, 
AMDGPUBufferRsrcTy, 128, 128, 8)
 
+AMDGPU_NAMED_BARRIER_TYPE("__amdgpu_named_workgroup_barrier_t", 
AMDGPUNamedWorkgroupBarrier, AMDGPUNamedWorkgroupBarrierTy, 128, 32, 0)
+
 #undef AMDGPU_TYPE
 #undef AMDGPU_OPAQUE_PTR_TYPE
+#undef AMDGPU_NAMED_BARRIER_TYPE
\ No newline at end of file
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index 13173dc96e71ae..99232fd2135790 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1149,7 +1149,7 @@ enum PredefinedTypeIDs {
 ///
 /// Type IDs for non-predefined types will start at
 /// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 511;
+const unsigned NUM_PREDEF_TYPE_IDS = 512;
 
 // Ensure we do not overrun the predefined types we reserved
 // in the enum PredefinedTypeIDs above.
diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp 
b/clang/lib/CodeGen/CGDebugInfo.cpp
index 27bbbfc6f531a1..3f9e14a52fc801 100644
--- a/clang/lib/CodeGen/CGDebugInfo.cpp
+++ b/clang/lib/CodeGen/CGDebugInfo.cpp
@@ -909,6 +909,13 @@ llvm::DIType *CGDebugInfo::CreateType(const BuiltinType 
*BT) {
  TheCU, TheCU->getFile(), 0);  
\
 return SingletonId;
\
   }
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id: {  
 \
+if (!SingletonId)  
\
+  SingletonId =
\
+  DBuilder.createBasicType(Name, Width, llvm::dwarf::DW_ATE_unsigned); 
\
+return SingletonId;
+  }
 #include "clang/Basic/AMDGPUTypes.def"
   case BuiltinType::UChar:
   case BuiltinType::Char_U:
diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp 
b/clang/lib/CodeGen/CodeGenTypes.cpp
index f87184fc77832c..09191a4901f493 100644
--- a/clang/lib/CodeGen/CodeGenTypes.cpp
+++ b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -564,6 +564,10 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
 #define AMDGPU_OPAQUE_PTR_TYPE(Name, Id, SingletonId, Width, Align, AS)
\
   case BuiltinType::Id:
\
 return llvm::PointerType::get(getLLVMContext(), AS);
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id:
\
+return llvm::TargetExtType::get(getLLVMContext(), "amdgcn.named.barrier",  
\
+{}, {Scope});
 #include "clang/Basic/AMDGPUTypes.def"
 #define HLSL_INTANGIBLE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
 #include "clang/Basic/HLSLIntangibleTypes.def"
diff --git a/clang/test/AST/ast

[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-24 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep created 
https://github.com/llvm/llvm-project/pull/113614

None

>From 166a4aec8a8ee813be0ee3045563cd45efd944c0 Mon Sep 17 00:00:00 2001
From: gangc 
Date: Thu, 24 Oct 2024 11:18:22 -0700
Subject: [PATCH] [AMDGPU] Add a type for the named barrier

---
 clang/include/clang/Basic/AMDGPUTypes.def |  8 
 .../include/clang/Serialization/ASTBitCodes.h |  2 +-
 clang/lib/CodeGen/CGDebugInfo.cpp |  7 
 clang/lib/CodeGen/CodeGenTypes.cpp|  4 ++
 clang/test/AST/ast-dump-amdgpu-types.c| 13 --
 .../CodeGen/amdgpu-barrier-type-debug-info.c  |  8 
 .../CodeGenCXX/amdgpu-barrier-typeinfo.cpp| 10 +
 clang/test/CodeGenHIP/amdgpu-barrier-type.hip | 42 +++
 clang/test/SemaCXX/amdgpu-barrier.cpp | 17 
 clang/test/SemaHIP/amdgpu-barrier.hip | 20 +
 clang/test/SemaOpenCL/amdgpu-barrier.cl   | 12 ++
 clang/test/SemaOpenMP/amdgpu-barrier.cpp  | 17 
 llvm/lib/IR/Type.cpp  |  8 
 13 files changed, 163 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
 create mode 100644 clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
 create mode 100644 clang/test/CodeGenHIP/amdgpu-barrier-type.hip
 create mode 100644 clang/test/SemaCXX/amdgpu-barrier.cpp
 create mode 100644 clang/test/SemaHIP/amdgpu-barrier.hip
 create mode 100644 clang/test/SemaOpenCL/amdgpu-barrier.cl
 create mode 100644 clang/test/SemaOpenMP/amdgpu-barrier.cpp

diff --git a/clang/include/clang/Basic/AMDGPUTypes.def 
b/clang/include/clang/Basic/AMDGPUTypes.def
index e47e544fdc82c1..6b98e311b4cf55 100644
--- a/clang/include/clang/Basic/AMDGPUTypes.def
+++ b/clang/include/clang/Basic/AMDGPUTypes.def
@@ -15,7 +15,15 @@
   AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
 #endif
 
+#ifndef AMDGPU_NAMED_BARRIER_TYPE
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope) \
+  AMDGPU_TYPE(Name, Id, SingletonId, Width, Align)
+#endif
+
 AMDGPU_OPAQUE_PTR_TYPE("__amdgpu_buffer_rsrc_t", AMDGPUBufferRsrc, 
AMDGPUBufferRsrcTy, 128, 128, 8)
 
+AMDGPU_NAMED_BARRIER_TYPE("__amdgpu_named_workgroup_barrier_t", 
AMDGPUNamedWorkgroupBarrier, AMDGPUNamedWorkgroupBarrierTy, 128, 32, 0)
+
 #undef AMDGPU_TYPE
 #undef AMDGPU_OPAQUE_PTR_TYPE
+#undef AMDGPU_NAMED_BARRIER_TYPE
\ No newline at end of file
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index 13173dc96e71ae..99232fd2135790 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1149,7 +1149,7 @@ enum PredefinedTypeIDs {
 ///
 /// Type IDs for non-predefined types will start at
 /// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 511;
+const unsigned NUM_PREDEF_TYPE_IDS = 512;
 
 // Ensure we do not overrun the predefined types we reserved
 // in the enum PredefinedTypeIDs above.
diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp 
b/clang/lib/CodeGen/CGDebugInfo.cpp
index 27bbbfc6f531a1..3f9e14a52fc801 100644
--- a/clang/lib/CodeGen/CGDebugInfo.cpp
+++ b/clang/lib/CodeGen/CGDebugInfo.cpp
@@ -909,6 +909,13 @@ llvm::DIType *CGDebugInfo::CreateType(const BuiltinType 
*BT) {
  TheCU, TheCU->getFile(), 0);  
\
 return SingletonId;
\
   }
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id: {  
 \
+if (!SingletonId)  
\
+  SingletonId =
\
+  DBuilder.createBasicType(Name, Width, llvm::dwarf::DW_ATE_unsigned); 
\
+return SingletonId;
+  }
 #include "clang/Basic/AMDGPUTypes.def"
   case BuiltinType::UChar:
   case BuiltinType::Char_U:
diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp 
b/clang/lib/CodeGen/CodeGenTypes.cpp
index f87184fc77832c..09191a4901f493 100644
--- a/clang/lib/CodeGen/CodeGenTypes.cpp
+++ b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -564,6 +564,10 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
 #define AMDGPU_OPAQUE_PTR_TYPE(Name, Id, SingletonId, Width, Align, AS)
\
   case BuiltinType::Id:
\
 return llvm::PointerType::get(getLLVMContext(), AS);
+#define AMDGPU_NAMED_BARRIER_TYPE(Name, Id, SingletonId, Width, Align, Scope)  
\
+  case BuiltinType::Id:
\
+return llvm::TargetExtType::get(getLLVMContext(), "amdgcn.named.barrier",  
\
+{}, {Scope});
 #include "clang/Basic/AMDGPUTypes.def"
 #define HLSL_INTANGIBLE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
 #include "clang/Basic/HLSLIntangibleTypes.def"
diff --git a/clang/test/AST/a

[clang] [CLANG] bump NUM_PREDEF_TYPE_IDS (PR #113728)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep created 
https://github.com/llvm/llvm-project/pull/113728

Fix assertion problem

>From 1a67accc27c4bf69e91548cf552cbd69566cb42f Mon Sep 17 00:00:00 2001
From: gangc 
Date: Fri, 25 Oct 2024 11:53:34 -0700
Subject: [PATCH] [CLANG] bump NUM_PREDEF_TYPE_IDS

Fix assertion problem
---
 clang/include/clang/Serialization/ASTBitCodes.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index 99232fd2135790..3ddbc5fcd26c44 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1149,7 +1149,7 @@ enum PredefinedTypeIDs {
 ///
 /// Type IDs for non-predefined types will start at
 /// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 512;
+const unsigned NUM_PREDEF_TYPE_IDS = 513;
 
 // Ensure we do not overrun the predefined types we reserved
 // in the enum PredefinedTypeIDs above.

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[clang] [clang] update the number in no-external-type-id.cppm (PR #113738)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep edited 
https://github.com/llvm/llvm-project/pull/113738
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[clang] [clang] update the number in no-external-type-id.cppm (PR #113738)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep closed 
https://github.com/llvm/llvm-project/pull/113738
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[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-25 Thread Gang Chen via cfe-commits 

cmc-rep wrote:

fix to the test no-external-type-id.cppm: 
https://github.com/llvm/llvm-project/pull/113738

https://github.com/llvm/llvm-project/pull/113614
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[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep closed 
https://github.com/llvm/llvm-project/pull/113614
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[clang] [CLANG] bump NUM_PREDEF_TYPE_IDS (PR #113728)

2024-10-25 Thread Gang Chen via cfe-commits 

cmc-rep wrote:

Duplicate

https://github.com/llvm/llvm-project/pull/113728
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[clang] [llvm] [AMDGPU] Add a type for the named barrier (PR #113614)

2024-10-25 Thread Gang Chen via cfe-commits 

cmc-rep wrote:

Looks like I also need to fix the number in that test

https://github.com/llvm/llvm-project/pull/113614
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[clang] [clang] update the number in no-external-type-id.cppm (PR #113738)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep created 
https://github.com/llvm/llvm-project/pull/113738

None

>From 3315b2857de4d16a8ea1bfec5437296719fc4845 Mon Sep 17 00:00:00 2001
From: gangc 
Date: Fri, 25 Oct 2024 13:54:12 -0700
Subject: [PATCH] [clang] update the number in no-external-type-id.cppm

---
 clang/test/Modules/no-external-type-id.cppm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/clang/test/Modules/no-external-type-id.cppm 
b/clang/test/Modules/no-external-type-id.cppm
index 6385f3a8aa00b2..d067e574e72e37 100644
--- a/clang/test/Modules/no-external-type-id.cppm
+++ b/clang/test/Modules/no-external-type-id.cppm
@@ -23,7 +23,7 @@ export module b;
 import a;
 export int b();
 
-// CHECK: https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [CLANG] bump NUM_PREDEF_TYPE_IDS (PR #113728)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep closed 
https://github.com/llvm/llvm-project/pull/113728
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[clang] [clang] update the number in no-external-type-id.cppm (PR #113738)

2024-10-25 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep updated 
https://github.com/llvm/llvm-project/pull/113738

>From 3315b2857de4d16a8ea1bfec5437296719fc4845 Mon Sep 17 00:00:00 2001
From: gangc 
Date: Fri, 25 Oct 2024 13:54:12 -0700
Subject: [PATCH] [clang] update the number in no-external-type-id.cppm

---
 clang/test/Modules/no-external-type-id.cppm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/clang/test/Modules/no-external-type-id.cppm 
b/clang/test/Modules/no-external-type-id.cppm
index 6385f3a8aa00b2..d067e574e72e37 100644
--- a/clang/test/Modules/no-external-type-id.cppm
+++ b/clang/test/Modules/no-external-type-id.cppm
@@ -23,7 +23,7 @@ export module b;
 import a;
 export int b();
 
-// CHECK: https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)

2024-11-06 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep closed 
https://github.com/llvm/llvm-project/pull/114550
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[clang] [NFC][Clang] Don't check hardcode op num (PR #135375)

2025-04-11 Thread Gang Chen via cfe-commits 

https://github.com/cmc-rep approved this pull request.


https://github.com/llvm/llvm-project/pull/135375
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