from:"Ganesh Gopalasubramanian via cfe\-commits"

r354899 - [X86] AMD znver2 enablement

2019-02-26 Thread Ganesh Gopalasubramanian via cfe-commits

Author: ggopala
Date: Tue Feb 26 09:15:36 2019
New Revision: 354899

URL: http://llvm.org/viewvc/llvm-project?rev=354899&view=rev
Log:
[X86] AMD znver2 enablement

This patch enables the following

1) AMD family 17h "znver2" tune flag (-march, -mcpu).
2) ISAs that are enabled for "znver2" architecture.
3) For the time being, it uses the znver1 scheduler model.
4) Tests are updated.
5) This patch is the clang counterpart to D58343

Reviewers: craig.topper
Tags: #clang

Differential Revision: https://reviews.llvm.org/D58344

Modified:
cfe/trunk/include/clang/Basic/X86Target.def
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/test/CodeGen/target-builtin-noerror.c
cfe/trunk/test/Driver/x86-march.c
cfe/trunk/test/Frontend/x86-target-cpu.c
cfe/trunk/test/Misc/target-invalid-cpu-note.c
cfe/trunk/test/Preprocessor/predefined-arch-macros.c

Modified: cfe/trunk/include/clang/Basic/X86Target.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/X86Target.def?rev=354899&r1=354898&r2=354899&view=diff
==
--- cfe/trunk/include/clang/Basic/X86Target.def (original)
+++ cfe/trunk/include/clang/Basic/X86Target.def Tue Feb 26 09:15:36 2019
@@ -236,6 +236,7 @@ PROC_WITH_FEAT(BDVER4, "bdver4", PROC_64
 /// Zen architecture processors.
 //@{
 PROC_WITH_FEAT(ZNVER1, "znver1", PROC_64_BIT, FEATURE_AVX2)
+PROC_WITH_FEAT(ZNVER2, "znver2", PROC_64_BIT, FEATURE_AVX2)
 //@}
 
 /// This specification is deprecated and will be removed in the future.

Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=354899&r1=354898&r2=354899&view=diff
==
--- cfe/trunk/lib/Basic/Targets/X86.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/X86.cpp Tue Feb 26 09:15:36 2019
@@ -347,6 +347,11 @@ bool X86TargetInfo::initFeatureMap(
 setFeatureEnabledImpl(Features, "sahf", true);
 break;
 
+  case CK_ZNVER2:
+setFeatureEnabledImpl(Features, "clwb", true);
+setFeatureEnabledImpl(Features, "rdpid", true);
+setFeatureEnabledImpl(Features, "wbnoinvd", true);
+LLVM_FALLTHROUGH;
   case CK_ZNVER1:
 setFeatureEnabledImpl(Features, "adx", true);
 setFeatureEnabledImpl(Features, "aes", true);
@@ -1030,6 +1035,9 @@ void X86TargetInfo::getTargetDefines(con
   case CK_ZNVER1:
 defineCPUMacros(Builder, "znver1");
 break;
+  case CK_ZNVER2:
+defineCPUMacros(Builder, "znver2");
+break;
   case CK_Geode:
 defineCPUMacros(Builder, "geode");
 break;

Modified: cfe/trunk/test/CodeGen/target-builtin-noerror.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/target-builtin-noerror.c?rev=354899&r1=354898&r2=354899&view=diff
==
--- cfe/trunk/test/CodeGen/target-builtin-noerror.c (original)
+++ cfe/trunk/test/CodeGen/target-builtin-noerror.c Tue Feb 26 09:15:36 2019
@@ -120,4 +120,5 @@ void verifycpustrings() {
   (void)__builtin_cpu_is("tremont");
   (void)__builtin_cpu_is("westmere");
   (void)__builtin_cpu_is("znver1");
+  (void)__builtin_cpu_is("znver2");
 }

Modified: cfe/trunk/test/Driver/x86-march.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/x86-march.c?rev=354899&r1=354898&r2=354899&view=diff
==
--- cfe/trunk/test/Driver/x86-march.c (original)
+++ cfe/trunk/test/Driver/x86-march.c Tue Feb 26 09:15:36 2019
@@ -159,3 +159,7 @@
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver1 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=znver1
 // znver1: "-target-cpu" "znver1"
+//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver2 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=znver2
+// znver2: "-target-cpu" "znver2"

Modified: cfe/trunk/test/Frontend/x86-target-cpu.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Frontend/x86-target-cpu.c?rev=354899&r1=354898&r2=354899&view=diff
==
--- cfe/trunk/test/Frontend/x86-target-cpu.c (original)
+++ cfe/trunk/test/Frontend/x86-target-cpu.c Tue Feb 26 09:15:36 2019
@@ -35,5 +35,6 @@
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu btver1 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu btver2 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver1 -verify %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver2 -verify %s
 //
 // expected-no-diagnostics

Modified: cfe/trunk/test/Misc/target-invalid-cpu-note.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Misc/target-invalid-cpu-note.c?rev=354899&r1=354898&r2=354899&view=diff
==
--- cfe/trunk/test/M

[PATCH] D19796: Add new intrinsic support for MONITORX and MWAITX instructions.

2016-05-02 Thread Ganesh Gopalasubramanian via cfe-commits

GGanesh created this revision.
GGanesh added reviewers: echristo, craig.topper.
GGanesh added subscribers: cfe-commits, llvm-commits.
Herald added a subscriber: joker.eph.

This patch adds new intrinsics, new flag (-mwaitx) and flag enablement based on 
cpuid for the instructions MONITORX and MWAITX. Testcases that tests the 
intrinsics which uses the flag are also added.

These instructions provide similar capability to the MONITOR/MWAIT pair while 
adding a timer function, such that another termination of the MWAITX 
instruction occurs when the timer expires. The presence of the MONITORX and 
MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29.

The MONITORX and MWAITX instructions are intercepted by the same bits that 
intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be 
monitored. MWAITX instruction causes the processor to stop instruction 
execution and enter an implementation-dependent optimized state until 
occurrence of a class of events.

Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is 
"0F 01 FB". These opcode information is used in adding tests for the 
disassembler.

http://reviews.llvm.org/D19796

Files:
  include/clang/Basic/BuiltinsX86.def
  include/clang/Driver/Options.td
  lib/Basic/Targets.cpp
  lib/Headers/CMakeLists.txt
  lib/Headers/module.modulemap
  lib/Headers/mwaitxintrin.h
  lib/Headers/x86intrin.h
  test/CodeGen/builtins-x86.c

Index: test/CodeGen/builtins-x86.c
===
--- test/CodeGen/builtins-x86.c
+++ test/CodeGen/builtins-x86.c
@@ -281,6 +281,9 @@
   (void)__builtin_ia32_xsaves(tmp_vp, tmp_ULLi);
   (void)__builtin_ia32_xsaves64(tmp_vp, tmp_ULLi);
 
+  (void) __builtin_ia32_monitorx(tmp_vp, tmp_Ui, tmp_Ui);
+  (void) __builtin_ia32_mwaitx(tmp_Ui, tmp_Ui, tmp_Ui);
+
   tmp_V4f = __builtin_ia32_cvtpi2ps(tmp_V4f, tmp_V2i);
   tmp_V2i = __builtin_ia32_cvtps2pi(tmp_V4f);
   tmp_i = __builtin_ia32_cvtss2si(tmp_V4f);
Index: lib/Headers/x86intrin.h
===
--- lib/Headers/x86intrin.h
+++ lib/Headers/x86intrin.h
@@ -52,6 +52,8 @@
 
 #include 
 
+#include 
+
 /* FIXME: LWP */
 
 #endif /* __X86INTRIN_H */
Index: lib/Headers/mwaitxintrin.h
===
--- lib/Headers/mwaitxintrin.h
+++ lib/Headers/mwaitxintrin.h
@@ -0,0 +1,47 @@
+/*=== mwaitxintrin.h - MONITORX/MWAITX intrinsics --===
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ *===---===
+ */
+
+#ifndef __X86INTRIN_H
+#error "Never use  directly; include  instead."
+#endif
+
+#ifndef _MWAITXINTRIN_H
+#define _MWAITXINTRIN_H
+
+/* Define the default attributes for the functions in this file. */
+#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__,  __target__("mwaitx")))
+static __inline__ void __DEFAULT_FN_ATTRS
+_mm_monitorx(void const * __p, unsigned __extensions, unsigned __hints)
+{
+  __builtin_ia32_monitorx((void *)__p, __extensions, __hints);
+}
+
+static __inline__ void __DEFAULT_FN_ATTRS
+_mm_mwaitx(unsigned __extensions, unsigned __hints, unsigned __clock)
+{
+  __builtin_ia32_mwaitx(__extensions, __hints, __clock);
+}
+
+#undef __DEFAULT_FN_ATTRS 
+
+#endif /* _MWAITXINTRIN_H */
Index: lib/Headers/module.modulemap
===
--- lib/Headers/module.modulemap
+++ lib/Headers/module.modulemap
@@ -125,6 +125,10 @@
   export pclmul
 }
 
+explicit module mwaitx {
+  header "mwaitxintrin.h"
+}
+
 explicit module aes {
   header "__wmmintrin_aes.h"
 }
Index: lib/Headers/CMakeLists.txt
===
--- lib/Headers/CMakeLists.txt
+++ lib/Headers/CMakeLists.txt
@@ -78,6 +78,7 @@
   xsaveoptintrin.h
   xsavecin

Re: [PATCH] D19796: Add new intrinsic support for MONITORX and MWAITX instructions.

2016-05-09 Thread Ganesh Gopalasubramanian via cfe-commits

GGanesh added a comment.

PING!


http://reviews.llvm.org/D19796



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[clang] dbfc1ac - [X86] Update tests for znver3

2021-01-06 Thread Ganesh Gopalasubramanian via cfe-commits


Author: Ganesh Gopalasubramanian
Date: 2021-01-07T11:51:50+05:30
New Revision: dbfc1ac4d86c1c08dc5ccd90a0389254e13c6d01

URL: 
https://github.com/llvm/llvm-project/commit/dbfc1ac4d86c1c08dc5ccd90a0389254e13c6d01
DIFF: 
https://github.com/llvm/llvm-project/commit/dbfc1ac4d86c1c08dc5ccd90a0389254e13c6d01.diff

LOG: [X86] Update tests for znver3

Differential Revision: https://reviews.llvm.org/D92812

Added: 


Modified: 
clang/test/Driver/x86-march.c
clang/test/Frontend/x86-target-cpu.c
llvm/test/MC/X86/x86_long_nop.s

Removed: 




diff  --git a/clang/test/Driver/x86-march.c b/clang/test/Driver/x86-march.c
index 871f47109b40..515981eec506 100644
--- a/clang/test/Driver/x86-march.c
+++ b/clang/test/Driver/x86-march.c
@@ -179,6 +179,10 @@
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver2 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=znver2
 // znver2: "-target-cpu" "znver2"
+//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver3 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=znver3
+// znver3: "-target-cpu" "znver3"
 
 // RUN: %clang -target x86_64 -c -### %s -march=x86-64 2>&1 | FileCheck %s 
--check-prefix=x86-64
 // x86-64: "-target-cpu" "x86-64"

diff  --git a/clang/test/Frontend/x86-target-cpu.c 
b/clang/test/Frontend/x86-target-cpu.c
index 05b28f0f68fe..84b100f7e944 100644
--- a/clang/test/Frontend/x86-target-cpu.c
+++ b/clang/test/Frontend/x86-target-cpu.c
@@ -36,5 +36,6 @@
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu btver2 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver1 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver2 -verify %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver3 -verify %s
 //
 // expected-no-diagnostics

diff  --git a/llvm/test/MC/X86/x86_long_nop.s b/llvm/test/MC/X86/x86_long_nop.s
index 981a38f75972..17941a5cff9d 100644
--- a/llvm/test/MC/X86/x86_long_nop.s
+++ b/llvm/test/MC/X86/x86_long_nop.s
@@ -15,6 +15,8 @@
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s 
-mcpu=znver1 | llvm-objdump -d --no-show-raw-insn - | FileCheck %s 
--check-prefix=LNOP15
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=x86_64-pc-linux-gnu 
-mcpu=znver2 %s | llvm-objdump -d --no-show-raw-insn - | FileCheck %s 
--check-prefix=LNOP15
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s 
-mcpu=znver2 | llvm-objdump -d --no-show-raw-insn - | FileCheck %s 
--check-prefix=LNOP15
+# RUN: llvm-mc -filetype=obj -arch=x86 -triple=x86_64-pc-linux-gnu 
-mcpu=znver3 %s | llvm-objdump -d --no-show-raw-insn - | FileCheck %s 
--check-prefix=LNOP15
+# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s 
-mcpu=znver3 | llvm-objdump -d --no-show-raw-insn - | FileCheck %s 
--check-prefix=LNOP15
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu -mcpu=nehalem 
%s | llvm-objdump -d --no-show-raw-insn - | FileCheck --check-prefix=LNOP10 %s
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu 
-mcpu=westmere %s | llvm-objdump -d --no-show-raw-insn - | FileCheck 
--check-prefix=LNOP10 %s
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu 
-mcpu=sandybridge %s | llvm-objdump -d --no-show-raw-insn - | FileCheck 
--check-prefix=LNOP15 %s



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r354899 - [X86] AMD znver2 enablement

[PATCH] D19796: Add new intrinsic support for MONITORX and MWAITX instructions.

Re: [PATCH] D19796: Add new intrinsic support for MONITORX and MWAITX instructions.

[clang] dbfc1ac - [X86] Update tests for znver3

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