[clang-tools-extra] Changes to support running tests for Windows arm64 asan (PR #66973)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/66973
>From 141c9aa7f9b1a6f7b4f877a82c4ccf92ae2b8287 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Wed, 20 Sep 2023 22:58:08 -0400
Subject: [PATCH] Changes to support running tests for Windows arm64 asan 1.
Differentiate SANITIZER_WINDOWS64 for x64 and arm64 2. fix A Warning where
asserts needs messages 3. turn of interception tests that expect x86 assembly
---
compiler-rt/lib/interception/interception_win.cpp | 4 ++--
.../lib/interception/tests/interception_win_test.cpp | 2 ++
compiler-rt/lib/sanitizer_common/sanitizer_platform.h | 8
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/compiler-rt/lib/interception/interception_win.cpp
b/compiler-rt/lib/interception/interception_win.cpp
index 1b681ada37b170d..4c1c4ca098ee71e 100644
--- a/compiler-rt/lib/interception/interception_win.cpp
+++ b/compiler-rt/lib/interception/interception_win.cpp
@@ -462,7 +462,7 @@ static size_t GetInstructionSize(uptr address, size_t*
rel_offset = nullptr) {
return 4;
#endif
-#if SANITIZER_WINDOWS64
+#if SANITIZER_WINDOWSx64
if (memcmp((u8*)address, kPrologueWithShortJump1,
sizeof(kPrologueWithShortJump1)) == 0 ||
memcmp((u8*)address, kPrologueWithShortJump2,
@@ -544,7 +544,7 @@ static size_t GetInstructionSize(uptr address, size_t*
rel_offset = nullptr) {
return 7;
}
-#if SANITIZER_WINDOWS64
+#if SANITIZER_WINDOWSx64
switch (*(u8*)address) {
case 0xA1: // A1 XX XX XX XX XX XX XX XX :
// movabs eax, dword ptr ds:[]
diff --git a/compiler-rt/lib/interception/tests/interception_win_test.cpp
b/compiler-rt/lib/interception/tests/interception_win_test.cpp
index 9159ce405f2dc49..629cdf437f342ec 100644
--- a/compiler-rt/lib/interception/tests/interception_win_test.cpp
+++ b/compiler-rt/lib/interception/tests/interception_win_test.cpp
@@ -17,6 +17,7 @@
// Too slow for debug build
#if !SANITIZER_DEBUG
#if SANITIZER_WINDOWS
+#if !SANITIZER_WINDOWSARM64
#include
@@ -793,5 +794,6 @@ TEST(Interception, EmptyExportTable) {
} // namespace __interception
+#endif // !SANITIZER_WINDOWSARM64
#endif // SANITIZER_WINDOWS
#endif // #if !SANITIZER_DEBUG
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_platform.h
b/compiler-rt/lib/sanitizer_common/sanitizer_platform.h
index 3e1b078a0212f5e..9d2050518947679 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_platform.h
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_platform.h
@@ -260,6 +260,14 @@
# define SANITIZER_ARM64 0
#endif
+#if SANITIZER_WINDOWS64 && SANITIZER_ARM64
+# define SANITIZER_WINDOWSARM64 1
+# define SANITIZER_WINDOWSx64 0
+#else
+# define SANITIZER_WINDOWSARM64 0
+# define SANITIZER_WINDOWSx64 1
+#endif
+
#if SANITIZER_SOLARIS && SANITIZER_WORDSIZE == 32
# define SANITIZER_SOLARIS32 1
#else
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[clang] Changes to support running tests for Windows arm64 asan (PR #66973)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/66973
>From 141c9aa7f9b1a6f7b4f877a82c4ccf92ae2b8287 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Wed, 20 Sep 2023 22:58:08 -0400
Subject: [PATCH] Changes to support running tests for Windows arm64 asan 1.
Differentiate SANITIZER_WINDOWS64 for x64 and arm64 2. fix A Warning where
asserts needs messages 3. turn of interception tests that expect x86 assembly
---
compiler-rt/lib/interception/interception_win.cpp | 4 ++--
.../lib/interception/tests/interception_win_test.cpp | 2 ++
compiler-rt/lib/sanitizer_common/sanitizer_platform.h | 8
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/compiler-rt/lib/interception/interception_win.cpp
b/compiler-rt/lib/interception/interception_win.cpp
index 1b681ada37b170d..4c1c4ca098ee71e 100644
--- a/compiler-rt/lib/interception/interception_win.cpp
+++ b/compiler-rt/lib/interception/interception_win.cpp
@@ -462,7 +462,7 @@ static size_t GetInstructionSize(uptr address, size_t*
rel_offset = nullptr) {
return 4;
#endif
-#if SANITIZER_WINDOWS64
+#if SANITIZER_WINDOWSx64
if (memcmp((u8*)address, kPrologueWithShortJump1,
sizeof(kPrologueWithShortJump1)) == 0 ||
memcmp((u8*)address, kPrologueWithShortJump2,
@@ -544,7 +544,7 @@ static size_t GetInstructionSize(uptr address, size_t*
rel_offset = nullptr) {
return 7;
}
-#if SANITIZER_WINDOWS64
+#if SANITIZER_WINDOWSx64
switch (*(u8*)address) {
case 0xA1: // A1 XX XX XX XX XX XX XX XX :
// movabs eax, dword ptr ds:[]
diff --git a/compiler-rt/lib/interception/tests/interception_win_test.cpp
b/compiler-rt/lib/interception/tests/interception_win_test.cpp
index 9159ce405f2dc49..629cdf437f342ec 100644
--- a/compiler-rt/lib/interception/tests/interception_win_test.cpp
+++ b/compiler-rt/lib/interception/tests/interception_win_test.cpp
@@ -17,6 +17,7 @@
// Too slow for debug build
#if !SANITIZER_DEBUG
#if SANITIZER_WINDOWS
+#if !SANITIZER_WINDOWSARM64
#include
@@ -793,5 +794,6 @@ TEST(Interception, EmptyExportTable) {
} // namespace __interception
+#endif // !SANITIZER_WINDOWSARM64
#endif // SANITIZER_WINDOWS
#endif // #if !SANITIZER_DEBUG
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_platform.h
b/compiler-rt/lib/sanitizer_common/sanitizer_platform.h
index 3e1b078a0212f5e..9d2050518947679 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_platform.h
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_platform.h
@@ -260,6 +260,14 @@
# define SANITIZER_ARM64 0
#endif
+#if SANITIZER_WINDOWS64 && SANITIZER_ARM64
+# define SANITIZER_WINDOWSARM64 1
+# define SANITIZER_WINDOWSx64 0
+#else
+# define SANITIZER_WINDOWSARM64 0
+# define SANITIZER_WINDOWSx64 1
+#endif
+
#if SANITIZER_SOLARIS && SANITIZER_WORDSIZE == 32
# define SANITIZER_SOLARIS32 1
#else
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[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
@@ -18015,38 +18015,11 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *X = EmitScalarExpr(E->getArg(0));
Value *Y = EmitScalarExpr(E->getArg(1));
Value *S = EmitScalarExpr(E->getArg(2));
-llvm::Type *Xty = X->getType();
-llvm::Type *Yty = Y->getType();
-llvm::Type *Sty = S->getType();
-if (!Xty->isVectorTy() && !Yty->isVectorTy() && !Sty->isVectorTy()) {
- if (Xty->isFloatingPointTy()) {
-auto V = Builder.CreateFSub(Y, X);
-V = Builder.CreateFMul(S, V);
-return Builder.CreateFAdd(X, V, "dx.lerp");
- }
- llvm_unreachable("Scalar Lerp is only supported on floats.");
-}
-// A VectorSplat should have happened
-assert(Xty->isVectorTy() && Yty->isVectorTy() && Sty->isVectorTy() &&
- "Lerp of vector and scalar is not supported.");
-
-[[maybe_unused]] auto *XVecTy =
-E->getArg(0)->getType()->getAs();
-[[maybe_unused]] auto *YVecTy =
-E->getArg(1)->getType()->getAs();
-[[maybe_unused]] auto *SVecTy =
-E->getArg(2)->getType()->getAs();
-// A HLSLVectorTruncation should have happend
-assert(XVecTy->getNumElements() == YVecTy->getNumElements() &&
- XVecTy->getNumElements() == SVecTy->getNumElements() &&
- "Lerp requires vectors to be of the same size.");
-assert(XVecTy->getElementType()->isRealFloatingType() &&
- XVecTy->getElementType() == YVecTy->getElementType() &&
- XVecTy->getElementType() == SVecTy->getElementType() &&
- "Lerp requires float vectors to be of the same type.");
+if (!E->getArg(0)->getType()->hasFloatingRepresentation())
farzonl wrote:
`X->getType()` is a `Type` pointer. `E->getArg(0)->getType()` is a `QualType`.
Only QualTypes allow us to use `hasFloatingRepresentation`
https://github.com/llvm/llvm-project/pull/84526
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[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/84526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/84526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
@@ -5254,7 +5250,11 @@ bool CheckAllArgsHaveFloatRepresentation(Sema *S,
CallExpr *TheCall) {
QualType ExpectedType = S->Context.FloatTy;
for (unsigned i = 0; i < TheCall->getNumArgs(); ++i) {
QualType PassedType = TheCall->getArg(i)->getType();
-if (!PassedType->hasFloatingRepresentation()) {
+ExpectedType = PassedType->isHalfType() && S->getLangOpts().NativeHalfType
+ ? S->Context.HalfTy
+ : S->Context.FloatTy;
+if (PassedType == S->Context.DoubleTy ||
+!PassedType->hasFloatingRepresentation()) {
farzonl wrote:
I have a solution I think will make things more clear.
https://github.com/llvm/llvm-project/pull/84526
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[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84526
>From 7dde8faaad046b715027a0f9fb772af90b6ffb30 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 7 Mar 2024 20:48:46 -0500
Subject: [PATCH 1/4] [DXIL] exp, any, lerp, & rcp Intrinsic Lowering This
change implements lowering for #70076, #70100, #70072, & #70102 CGBuiltin.cpp
- - simplify lerp intrinsic IntrinsicsDirectX.td - simplify lerp intrinsic
SemaChecking.cpp - remove unnecessary check DXILIntrinsicExpansion.* - add
intrinsic to instruction expansion cases DXILOpLowering.cpp - make sure
DXILIntrinsicExpansion happens first DirectX.h - changes to support new pass
DirectXTargetMachine.cpp - changes to support new pass
---
clang/lib/CodeGen/CGBuiltin.cpp | 35 +---
clang/lib/Sema/SemaChecking.cpp | 2 -
clang/test/CodeGenHLSL/builtins/lerp.hlsl | 13 +-
llvm/include/llvm/IR/IntrinsicsDirectX.td | 5 +-
llvm/lib/Target/DirectX/CMakeLists.txt| 1 +
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 187 ++
.../Target/DirectX/DXILIntrinsicExpansion.h | 33
llvm/lib/Target/DirectX/DXILOpLowering.cpp| 6 +-
llvm/lib/Target/DirectX/DirectX.h | 6 +
.../Target/DirectX/DirectXTargetMachine.cpp | 2 +
llvm/test/CodeGen/DirectX/any.ll | 133 +
llvm/test/CodeGen/DirectX/exp-vec.ll | 23 +++
llvm/test/CodeGen/DirectX/exp.ll | 38
llvm/test/CodeGen/DirectX/lerp.ll | 64 ++
llvm/test/CodeGen/DirectX/rcp.ll | 63 ++
15 files changed, 564 insertions(+), 47 deletions(-)
create mode 100644 llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
create mode 100644 llvm/lib/Target/DirectX/DXILIntrinsicExpansion.h
create mode 100644 llvm/test/CodeGen/DirectX/any.ll
create mode 100644 llvm/test/CodeGen/DirectX/exp-vec.ll
create mode 100644 llvm/test/CodeGen/DirectX/exp.ll
create mode 100644 llvm/test/CodeGen/DirectX/lerp.ll
create mode 100644 llvm/test/CodeGen/DirectX/rcp.ll
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 93ab465079777b..25e4793c3e22d8 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18015,38 +18015,11 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *X = EmitScalarExpr(E->getArg(0));
Value *Y = EmitScalarExpr(E->getArg(1));
Value *S = EmitScalarExpr(E->getArg(2));
-llvm::Type *Xty = X->getType();
-llvm::Type *Yty = Y->getType();
-llvm::Type *Sty = S->getType();
-if (!Xty->isVectorTy() && !Yty->isVectorTy() && !Sty->isVectorTy()) {
- if (Xty->isFloatingPointTy()) {
-auto V = Builder.CreateFSub(Y, X);
-V = Builder.CreateFMul(S, V);
-return Builder.CreateFAdd(X, V, "dx.lerp");
- }
- llvm_unreachable("Scalar Lerp is only supported on floats.");
-}
-// A VectorSplat should have happened
-assert(Xty->isVectorTy() && Yty->isVectorTy() && Sty->isVectorTy() &&
- "Lerp of vector and scalar is not supported.");
-
-[[maybe_unused]] auto *XVecTy =
-E->getArg(0)->getType()->getAs();
-[[maybe_unused]] auto *YVecTy =
-E->getArg(1)->getType()->getAs();
-[[maybe_unused]] auto *SVecTy =
-E->getArg(2)->getType()->getAs();
-// A HLSLVectorTruncation should have happend
-assert(XVecTy->getNumElements() == YVecTy->getNumElements() &&
- XVecTy->getNumElements() == SVecTy->getNumElements() &&
- "Lerp requires vectors to be of the same size.");
-assert(XVecTy->getElementType()->isRealFloatingType() &&
- XVecTy->getElementType() == YVecTy->getElementType() &&
- XVecTy->getElementType() == SVecTy->getElementType() &&
- "Lerp requires float vectors to be of the same type.");
+if (!E->getArg(0)->getType()->hasFloatingRepresentation())
+ llvm_unreachable("lerp operand must have a float representation");
return Builder.CreateIntrinsic(
-/*ReturnType=*/Xty, Intrinsic::dx_lerp, ArrayRef{X, Y, S},
-nullptr, "dx.lerp");
+/*ReturnType=*/X->getType(), Intrinsic::dx_lerp,
+ArrayRef{X, Y, S}, nullptr, "dx.lerp");
}
case Builtin::BI__builtin_hlsl_elementwise_frac: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index a5f42b630c3fa2..8a2b7384a0b0d5 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5300,8 +5300,6 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
if (SemaBuiltinElementwiseTernaryMath(TheCall))
return true;
-if (CheckAllArgsHaveFloatRepresentation(this, TheCall))
- return true;
break;
}
case Builtin::BI__builtin_hlsl_mad: {
diff --git a/clang/test/CodeGenHLSL/builtins/lerp.hlsl
b/clang/test/CodeGenHLSL/builtins/le
[clang] [llvm] [HLSL] Implement `rsqrt` intrinsic (PR #84820)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84820
>From a46ecdee6356e744a80f3c29748e7c3482a89760 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 11 Mar 2024 15:17:35 -0400
Subject: [PATCH 1/3] [HLSL] Implement `rsqrt` intrinsic This change implements
#70074 - `hlsl_intrinsics.h - add the rsqrt api - `DXIL.td` add the llvm
intrinsic to DXIL op lowering map. - `Builtins.td` - add an hlsl builtin for
rsqrt. - `CGBuiltin.cpp` add the ir generation for the rsqrt intrinsic. -
`SemaChecking.cpp` - reuse the one arg float only checks. -
`IntrinsicsDirectX.td -add an `rsqrt` intrinsic.
---
clang/include/clang/Basic/Builtins.td | 6 +++
clang/lib/CodeGen/CGBuiltin.cpp | 8 +++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 32 +++
clang/lib/Sema/SemaChecking.cpp | 1 +
clang/test/CodeGenHLSL/builtins/rsqrt.hlsl| 53 +++
clang/test/SemaHLSL/BuiltIns/dot-warning.ll | 49 +
.../test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl | 27 ++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 1 +
llvm/lib/Target/DirectX/DXIL.td | 3 ++
llvm/test/CodeGen/DirectX/rsqrt.ll| 31 +++
10 files changed, 211 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/dot-warning.ll
create mode 100644 clang/test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/rsqrt.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index 9c703377ca8d3e..de0cfb4e46b8bd 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4590,6 +4590,12 @@ def HLSLRcp : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLRSqrt : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_rsqrt"];
+ let Attributes = [NoThrow, Const, CustomTypeChecking];
+ let Prototype = "void(...)";
+}
+
// Builtins for XRay.
def XRayCustomEvent : Builtin {
let Spellings = ["__xray_customevent"];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 20c35757939152..d2c83a5e405f42 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18077,6 +18077,14 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_rcp,
ArrayRef{Op0}, nullptr, "dx.rcp");
}
+ case Builtin::BI__builtin_hlsl_elementwise_rsqrt: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+if (!E->getArg(0)->getType()->hasFloatingRepresentation())
+ llvm_unreachable("rsqrt operand must have a float representation");
+return Builder.CreateIntrinsic(
+/*ReturnType=*/Op0->getType(), Intrinsic::dx_rsqrt,
+ArrayRef{Op0}, nullptr, "dx.rsqrt");
+ }
}
return nullptr;
}
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 45f8544392584e..71238a4f268ede 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -1153,6 +1153,38 @@ double3 rcp(double3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rcp)
double4 rcp(double4);
+//===--===//
+// rsqrt builtins
+//===--===//
+
+/// \fn T rsqrt(T x)
+/// \brief RReturns the reciprocal of the square root of the specified value \a
+/// x. \param x The specified input value.
+///
+/// This function uses the following formula: 1 / sqrt(x).
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+half rsqrt(half);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+half2 rsqrt(half2);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+half3 rsqrt(half3);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+half4 rsqrt(half4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+float rsqrt(float);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+float2 rsqrt(float2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+float3 rsqrt(float3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+float4 rsqrt(float4);
+
//===--===//
// round builtins
//===--===//
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index a5f42b630c3fa2..0dafff47ab4040 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5285,6 +5285,7 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *The
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
@@ -0,0 +1,105 @@
+; RUN: opt -S -dxil-op-lower < %s | FileCheck %s
+
+; Make sure dxil operation function calls for any are generated for float and
half.
+
+; CHECK:icmp ne i1 %{{.*}}, false
farzonl wrote:
That was my thinking as well, but all the other tests in this directory lacked
the space and I didn't want to go against the the grain.
https://github.com/llvm/llvm-project/pull/84526
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[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/84526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL] Implement `rsqrt` intrinsic (PR #84820)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84820
>From 9d3ae7bb5c40d2323a74c9d467c6c38f468ad038 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 14:27:21 -0400
Subject: [PATCH 1/4] rebase PR, add error checking for rsqrt
---
clang/include/clang/Basic/Builtins.td | 6 +++
clang/lib/CodeGen/CGBuiltin.cpp | 8 +++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 32 +++
clang/lib/Sema/SemaChecking.cpp | 1 +
clang/test/CodeGenHLSL/builtins/rsqrt.hlsl| 53 +++
clang/test/SemaHLSL/BuiltIns/dot-warning.ll | 49 +
.../test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl | 27 ++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 1 +
llvm/lib/Target/DirectX/DXIL.td | 4 ++
llvm/test/CodeGen/DirectX/rsqrt.ll| 31 +++
llvm/test/CodeGen/DirectX/rsqrt_error.ll | 14 +
11 files changed, 226 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/dot-warning.ll
create mode 100644 clang/test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/rsqrt.ll
create mode 100644 llvm/test/CodeGen/DirectX/rsqrt_error.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index 9c703377ca8d3e..de0cfb4e46b8bd 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4590,6 +4590,12 @@ def HLSLRcp : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLRSqrt : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_rsqrt"];
+ let Attributes = [NoThrow, Const, CustomTypeChecking];
+ let Prototype = "void(...)";
+}
+
// Builtins for XRay.
def XRayCustomEvent : Builtin {
let Spellings = ["__xray_customevent"];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 528a13fb275124..0a860c687921d9 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18089,6 +18089,14 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_rcp,
ArrayRef{Op0}, nullptr, "dx.rcp");
}
+ case Builtin::BI__builtin_hlsl_elementwise_rsqrt: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+if (!E->getArg(0)->getType()->hasFloatingRepresentation())
+ llvm_unreachable("rsqrt operand must have a float representation");
+return Builder.CreateIntrinsic(
+/*ReturnType=*/Op0->getType(), Intrinsic::dx_rsqrt,
+ArrayRef{Op0}, nullptr, "dx.rsqrt");
+ }
}
return nullptr;
}
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 45f8544392584e..71238a4f268ede 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -1153,6 +1153,38 @@ double3 rcp(double3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rcp)
double4 rcp(double4);
+//===--===//
+// rsqrt builtins
+//===--===//
+
+/// \fn T rsqrt(T x)
+/// \brief RReturns the reciprocal of the square root of the specified value \a
+/// x. \param x The specified input value.
+///
+/// This function uses the following formula: 1 / sqrt(x).
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+half rsqrt(half);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+half2 rsqrt(half2);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+half3 rsqrt(half3);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+half4 rsqrt(half4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+float rsqrt(float);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+float2 rsqrt(float2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+float3 rsqrt(float3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rsqrt)
+float4 rsqrt(float4);
+
//===--===//
// round builtins
//===--===//
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 124fb2b65438b5..9f1eb6106f5b53 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5286,6 +5286,7 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
break;
}
+ case Builtin::BI__builtin_hlsl_elementwise_rsqrt:
case Builtin::BI__builtin_hlsl_elementwise_rcp:
case Builtin::BI__builtin_hlsl_elementwise_frac: {
if (PrepareBuiltinElementwiseM
[clang] [llvm] [HLSL] implement the `isinf` intrinsic (PR #84927)
https://github.com/farzonl deleted https://github.com/llvm/llvm-project/pull/84927 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL] implement the `isinf` intrinsic (PR #84927)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84927
>From b21e8806ccc559d4326e26432cdce8ba13dc0984 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 11 Mar 2024 15:28:49 -0400
Subject: [PATCH 1/2] [HLSL] implement the `isinf` intrinsic This change
implements part 1 of 2 for #70095 - `hlsl_intrinsics.h - add the `isinf` api
- `Builtins.td` - add an hlsl builtin for `isinf`. - `CGBuiltin.cpp` add the
ir generation for `isinf` intrinsic. - `SemaChecking.cpp` - add a non-math
elementwise checks because this is a bool return. - `IntrinsicsDirectX.td -
add an `isinf` intrinsic.
DXIL.td lowering is left, but changes need to be made there before we
can support this case.
---
clang/include/clang/Basic/Builtins.td | 6 +++
clang/lib/CodeGen/CGBuiltin.cpp | 15 +++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 33 ++
clang/lib/Sema/SemaChecking.cpp | 16 +++
clang/test/CodeGenHLSL/builtins/isinf.hlsl| 45 +++
.../test/SemaHLSL/BuiltIns/isinf-errors.hlsl | 27 +++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 ++
7 files changed, 146 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/builtins/isinf.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index 9c703377ca8d3e..b3376b316cd222 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4572,6 +4572,12 @@ def HLSLFrac : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLIsinf : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_isinf"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "void(...)";
+}
+
def HLSLLerp : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_lerp"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 528a13fb275124..0d55322c275f41 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18062,6 +18062,21 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_frac,
ArrayRef{Op0}, nullptr, "dx.frac");
}
+ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+llvm::Type *Xty = Op0->getType();
+llvm::Type *retType = llvm::Type::getInt1Ty(this->getLLVMContext());
+if (Xty->isVectorTy()) {
+ auto *XVecTy = E->getArg(0)->getType()->getAs();
+ retType = llvm::VectorType::get(
+ retType, ElementCount::getFixed(XVecTy->getNumElements()));
+}
+if (!E->getArg(0)->getType()->hasFloatingRepresentation())
+ llvm_unreachable("isinf operand must have a float representation");
+return Builder.CreateIntrinsic(
+/*ReturnType=*/retType, Intrinsic::dx_isinf, ArrayRef{Op0},
+nullptr, "dx.isinf");
+ }
case Builtin::BI__builtin_hlsl_mad: {
Value *M = EmitScalarExpr(E->getArg(0));
Value *A = EmitScalarExpr(E->getArg(1));
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 45f8544392584e..2c3ab46d959137 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -525,6 +525,39 @@ float3 frac(float3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_frac)
float4 frac(float4);
+//===--===//
+// isinf builtins
+//===--===//
+
+/// \fn T isinf(T x)
+/// \brief Determines if the specified value \a x is infinite.
+/// \param x The specified input value.
+///
+/// Returns a value of the same size as the input, with a value set
+/// to True if the x parameter is +INF or -INF. Otherwise, False.
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool isinf(half);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool2 isinf(half2);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool3 isinf(half3);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool4 isinf(half4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool isinf(float);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool2 isinf(float2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool3 isinf(float3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool4 isinf(float4);
+
//===--===//
// lerp builtins
//===--===//
diff --git a/clang/lib/Sema/Se
[clang] [llvm] [HLSL] implement the `isinf` intrinsic (PR #84927)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84927
>From b21e8806ccc559d4326e26432cdce8ba13dc0984 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 11 Mar 2024 15:28:49 -0400
Subject: [PATCH 1/2] [HLSL] implement the `isinf` intrinsic This change
implements part 1 of 2 for #70095 - `hlsl_intrinsics.h - add the `isinf` api
- `Builtins.td` - add an hlsl builtin for `isinf`. - `CGBuiltin.cpp` add the
ir generation for `isinf` intrinsic. - `SemaChecking.cpp` - add a non-math
elementwise checks because this is a bool return. - `IntrinsicsDirectX.td -
add an `isinf` intrinsic.
DXIL.td lowering is left, but changes need to be made there before we
can support this case.
---
clang/include/clang/Basic/Builtins.td | 6 +++
clang/lib/CodeGen/CGBuiltin.cpp | 15 +++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 33 ++
clang/lib/Sema/SemaChecking.cpp | 16 +++
clang/test/CodeGenHLSL/builtins/isinf.hlsl| 45 +++
.../test/SemaHLSL/BuiltIns/isinf-errors.hlsl | 27 +++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 ++
7 files changed, 146 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/builtins/isinf.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index 9c703377ca8d3e..b3376b316cd222 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4572,6 +4572,12 @@ def HLSLFrac : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLIsinf : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_isinf"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "void(...)";
+}
+
def HLSLLerp : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_lerp"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 528a13fb275124..0d55322c275f41 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18062,6 +18062,21 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_frac,
ArrayRef{Op0}, nullptr, "dx.frac");
}
+ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+llvm::Type *Xty = Op0->getType();
+llvm::Type *retType = llvm::Type::getInt1Ty(this->getLLVMContext());
+if (Xty->isVectorTy()) {
+ auto *XVecTy = E->getArg(0)->getType()->getAs();
+ retType = llvm::VectorType::get(
+ retType, ElementCount::getFixed(XVecTy->getNumElements()));
+}
+if (!E->getArg(0)->getType()->hasFloatingRepresentation())
+ llvm_unreachable("isinf operand must have a float representation");
+return Builder.CreateIntrinsic(
+/*ReturnType=*/retType, Intrinsic::dx_isinf, ArrayRef{Op0},
+nullptr, "dx.isinf");
+ }
case Builtin::BI__builtin_hlsl_mad: {
Value *M = EmitScalarExpr(E->getArg(0));
Value *A = EmitScalarExpr(E->getArg(1));
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 45f8544392584e..2c3ab46d959137 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -525,6 +525,39 @@ float3 frac(float3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_frac)
float4 frac(float4);
+//===--===//
+// isinf builtins
+//===--===//
+
+/// \fn T isinf(T x)
+/// \brief Determines if the specified value \a x is infinite.
+/// \param x The specified input value.
+///
+/// Returns a value of the same size as the input, with a value set
+/// to True if the x parameter is +INF or -INF. Otherwise, False.
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool isinf(half);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool2 isinf(half2);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool3 isinf(half3);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool4 isinf(half4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool isinf(float);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool2 isinf(float2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool3 isinf(float3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool4 isinf(float4);
+
//===--===//
// lerp builtins
//===--===//
diff --git a/clang/lib/Sema/Se
[clang] [llvm] [HLSL] Implement `rsqrt` intrinsic (PR #84820)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/84820 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/84526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL] implement the `isinf` intrinsic (PR #84927)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84927
>From c240a73ea6edc4e7697ca3c7e4012849ec9a3583 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 16:54:12 -0400
Subject: [PATCH 1/3] address merge conflict
---
clang/include/clang/Basic/Builtins.td | 6 +++
clang/lib/CodeGen/CGBuiltin.cpp | 15 +++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 33 ++
clang/lib/Sema/SemaChecking.cpp | 16 +++
clang/test/CodeGenHLSL/builtins/isinf.hlsl| 45 +++
.../test/SemaHLSL/BuiltIns/isinf-errors.hlsl | 27 +++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 ++
7 files changed, 146 insertions(+)
create mode 100644 clang/test/CodeGenHLSL/builtins/isinf.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index de0cfb4e46b8bd..15fcdb3ced95c1 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4572,6 +4572,12 @@ def HLSLFrac : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void(...)";
}
+def HLSLIsinf : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_isinf"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "void(...)";
+}
+
def HLSLLerp : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_lerp"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 0a860c687921d9..2c8f17eebe2d52 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18062,6 +18062,21 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_frac,
ArrayRef{Op0}, nullptr, "dx.frac");
}
+ case Builtin::BI__builtin_hlsl_elementwise_isinf: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+llvm::Type *Xty = Op0->getType();
+llvm::Type *retType = llvm::Type::getInt1Ty(this->getLLVMContext());
+if (Xty->isVectorTy()) {
+ auto *XVecTy = E->getArg(0)->getType()->getAs();
+ retType = llvm::VectorType::get(
+ retType, ElementCount::getFixed(XVecTy->getNumElements()));
+}
+if (!E->getArg(0)->getType()->hasFloatingRepresentation())
+ llvm_unreachable("isinf operand must have a float representation");
+return Builder.CreateIntrinsic(
+/*ReturnType=*/retType, Intrinsic::dx_isinf, ArrayRef{Op0},
+nullptr, "dx.isinf");
+ }
case Builtin::BI__builtin_hlsl_mad: {
Value *M = EmitScalarExpr(E->getArg(0));
Value *A = EmitScalarExpr(E->getArg(1));
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 3bdb0a3d68b9de..718fb9a9b35c04 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -525,6 +525,39 @@ float3 frac(float3);
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_frac)
float4 frac(float4);
+//===--===//
+// isinf builtins
+//===--===//
+
+/// \fn T isinf(T x)
+/// \brief Determines if the specified value \a x is infinite.
+/// \param x The specified input value.
+///
+/// Returns a value of the same size as the input, with a value set
+/// to True if the x parameter is +INF or -INF. Otherwise, False.
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool isinf(half);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool2 isinf(half2);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool3 isinf(half3);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool4 isinf(half4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool isinf(float);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool2 isinf(float2);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool3 isinf(float3);
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_isinf)
+bool4 isinf(float4);
+
//===--===//
// lerp builtins
//===--===//
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 7ba02f6d3b793c..366ab1abbd8efd 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5268,6 +5268,15 @@ bool CheckAllArgsHaveFloatRepresentation(Sema *S,
CallExpr *TheCall) {
return false;
}
+void SetInputRepresentationReturnType(Sema *S, CallExpr *TheCall,
+ QualType ReturnType) {
+ auto *VecTyA = TheCall->getArg(0)->getTyp
[clang] [llvm] [HLSL] implement the `isinf` intrinsic (PR #84927)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/84927 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84526
>From 3f515637fc87a41db1df4ea7627679c7dd75503a Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 18:53:33 -0400
Subject: [PATCH 1/2] [DXIL] exp, any, lerp, & rcp Intrinsic Lowering This
change implements lowering for #70076, #70100, #70072, & #70102
`CGBuiltin.cpp` - - simplify `lerp` intrinsic `IntrinsicsDirectX.td` -
simplify `lerp` intrinsic `SemaChecking.cpp` - remove unnecessary check
`DXILIntrinsicExpansion.*` - add intrinsic to instruction expansion cases
`DXILOpLowering.cpp` - make sure `DXILIntrinsicExpansion` happens first
`DirectX.h` - changes to support new pass `DirectXTargetMachine.cpp` -
changes to support new pass
Why `any`, and `lerp` as instruction expansion just for DXIL?
- SPIR-V there is an
[OpAny](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpAny)
- SPIR-V has a GLSL lerp extension via
[Fmix](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FMix)
Why `exp` instruction expansion?
- We have an `exp2` opcode and `exp` reuses that opcode. So instruction
expansion is a convenient way to do preprocessing.
- Further SPIR-V has a GLSL exp extension via
[Exp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp) and
[Exp2](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp2)
Why `rcp` as instruction expansion?
This one is a bit of the odd man out and might have to move to `cgbuiltins`
when we better understand SPIRV requirements. However I included it because it
seems like [fast math mode has an AllowRecip
flag](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_fp_fast_math_mode)
which lets you compute the reciprocal without performing the division. We
don't have that in DXIL so thought to include it.
---
clang/include/clang/AST/Type.h| 5 +
clang/lib/CodeGen/CGBuiltin.cpp | 35 +---
clang/lib/Sema/SemaChecking.cpp | 51 +++--
.../CodeGenHLSL/builtins/lerp-builtin.hlsl| 22 ---
clang/test/CodeGenHLSL/builtins/lerp.hlsl | 27 ++-
clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl | 17 +-
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 +-
llvm/lib/Target/DirectX/CMakeLists.txt| 1 +
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 186 ++
.../Target/DirectX/DXILIntrinsicExpansion.h | 33
llvm/lib/Target/DirectX/DXILOpLowering.cpp| 6 +-
llvm/lib/Target/DirectX/DirectX.h | 6 +
.../Target/DirectX/DirectXTargetMachine.cpp | 2 +
llvm/test/CodeGen/DirectX/any.ll | 105 ++
llvm/test/CodeGen/DirectX/exp-vec.ll | 16 ++
llvm/test/CodeGen/DirectX/exp.ll | 29 +++
llvm/test/CodeGen/DirectX/lerp.ll | 53 +
llvm/test/CodeGen/DirectX/rcp.ll | 48 +
18 files changed, 557 insertions(+), 89 deletions(-)
create mode 100644 llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
create mode 100644 llvm/lib/Target/DirectX/DXILIntrinsicExpansion.h
create mode 100644 llvm/test/CodeGen/DirectX/any.ll
create mode 100644 llvm/test/CodeGen/DirectX/exp-vec.ll
create mode 100644 llvm/test/CodeGen/DirectX/exp.ll
create mode 100644 llvm/test/CodeGen/DirectX/lerp.ll
create mode 100644 llvm/test/CodeGen/DirectX/rcp.ll
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 1942b0e67f65a3..10916053cdfbf5 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -2244,6 +2244,7 @@ class alignas(TypeAlignment) Type : public
ExtQualsTypeCommonBase {
bool isFloatingType() const; // C99 6.2.5p11 (real floating + complex)
bool isHalfType() const; // OpenCL 6.1.1.1, NEON (IEEE 754-2008 half)
bool isFloat16Type() const; // C11 extension ISO/IEC TS 18661
+ bool isFloat32Type() const;
bool isBFloat16Type() const;
bool isFloat128Type() const;
bool isIbm128Type() const;
@@ -7452,6 +7453,10 @@ inline bool Type::isFloat16Type() const {
return isSpecificBuiltinType(BuiltinType::Float16);
}
+inline bool Type::isFloat32Type() const {
+ return isSpecificBuiltinType(BuiltinType::Float);
+}
+
inline bool Type::isBFloat16Type() const {
return isSpecificBuiltinType(BuiltinType::BFloat16);
}
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index b9d1a4912385e1..b09bf563622089 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18021,38 +18021,11 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *X = EmitScalarExpr(E->getArg(0));
Value *Y = EmitScalarExpr(E->getArg(1));
Value *S = EmitScalarExpr(E->getArg(2));
-llvm::Type *Xty = X->getType();
-llvm::Type *Yty = Y->getType();
-llvm::Type *Sty = S->getType();
-if (!Xty->isVectorTy() && !Yty->isVectorTy() && !Sty->isVectorTy()) {
- if (Xty->isFloatingPointTy()) {
-auto V
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/84526
>From 3f515637fc87a41db1df4ea7627679c7dd75503a Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 18:53:33 -0400
Subject: [PATCH 1/3] [DXIL] exp, any, lerp, & rcp Intrinsic Lowering This
change implements lowering for #70076, #70100, #70072, & #70102
`CGBuiltin.cpp` - - simplify `lerp` intrinsic `IntrinsicsDirectX.td` -
simplify `lerp` intrinsic `SemaChecking.cpp` - remove unnecessary check
`DXILIntrinsicExpansion.*` - add intrinsic to instruction expansion cases
`DXILOpLowering.cpp` - make sure `DXILIntrinsicExpansion` happens first
`DirectX.h` - changes to support new pass `DirectXTargetMachine.cpp` -
changes to support new pass
Why `any`, and `lerp` as instruction expansion just for DXIL?
- SPIR-V there is an
[OpAny](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpAny)
- SPIR-V has a GLSL lerp extension via
[Fmix](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FMix)
Why `exp` instruction expansion?
- We have an `exp2` opcode and `exp` reuses that opcode. So instruction
expansion is a convenient way to do preprocessing.
- Further SPIR-V has a GLSL exp extension via
[Exp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp) and
[Exp2](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp2)
Why `rcp` as instruction expansion?
This one is a bit of the odd man out and might have to move to `cgbuiltins`
when we better understand SPIRV requirements. However I included it because it
seems like [fast math mode has an AllowRecip
flag](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_fp_fast_math_mode)
which lets you compute the reciprocal without performing the division. We
don't have that in DXIL so thought to include it.
---
clang/include/clang/AST/Type.h| 5 +
clang/lib/CodeGen/CGBuiltin.cpp | 35 +---
clang/lib/Sema/SemaChecking.cpp | 51 +++--
.../CodeGenHLSL/builtins/lerp-builtin.hlsl| 22 ---
clang/test/CodeGenHLSL/builtins/lerp.hlsl | 27 ++-
clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl | 17 +-
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 +-
llvm/lib/Target/DirectX/CMakeLists.txt| 1 +
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 186 ++
.../Target/DirectX/DXILIntrinsicExpansion.h | 33
llvm/lib/Target/DirectX/DXILOpLowering.cpp| 6 +-
llvm/lib/Target/DirectX/DirectX.h | 6 +
.../Target/DirectX/DirectXTargetMachine.cpp | 2 +
llvm/test/CodeGen/DirectX/any.ll | 105 ++
llvm/test/CodeGen/DirectX/exp-vec.ll | 16 ++
llvm/test/CodeGen/DirectX/exp.ll | 29 +++
llvm/test/CodeGen/DirectX/lerp.ll | 53 +
llvm/test/CodeGen/DirectX/rcp.ll | 48 +
18 files changed, 557 insertions(+), 89 deletions(-)
create mode 100644 llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
create mode 100644 llvm/lib/Target/DirectX/DXILIntrinsicExpansion.h
create mode 100644 llvm/test/CodeGen/DirectX/any.ll
create mode 100644 llvm/test/CodeGen/DirectX/exp-vec.ll
create mode 100644 llvm/test/CodeGen/DirectX/exp.ll
create mode 100644 llvm/test/CodeGen/DirectX/lerp.ll
create mode 100644 llvm/test/CodeGen/DirectX/rcp.ll
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 1942b0e67f65a3..10916053cdfbf5 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -2244,6 +2244,7 @@ class alignas(TypeAlignment) Type : public
ExtQualsTypeCommonBase {
bool isFloatingType() const; // C99 6.2.5p11 (real floating + complex)
bool isHalfType() const; // OpenCL 6.1.1.1, NEON (IEEE 754-2008 half)
bool isFloat16Type() const; // C11 extension ISO/IEC TS 18661
+ bool isFloat32Type() const;
bool isBFloat16Type() const;
bool isFloat128Type() const;
bool isIbm128Type() const;
@@ -7452,6 +7453,10 @@ inline bool Type::isFloat16Type() const {
return isSpecificBuiltinType(BuiltinType::Float16);
}
+inline bool Type::isFloat32Type() const {
+ return isSpecificBuiltinType(BuiltinType::Float);
+}
+
inline bool Type::isBFloat16Type() const {
return isSpecificBuiltinType(BuiltinType::BFloat16);
}
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index b9d1a4912385e1..b09bf563622089 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18021,38 +18021,11 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
Value *X = EmitScalarExpr(E->getArg(0));
Value *Y = EmitScalarExpr(E->getArg(1));
Value *S = EmitScalarExpr(E->getArg(2));
-llvm::Type *Xty = X->getType();
-llvm::Type *Yty = Y->getType();
-llvm::Type *Sty = S->getType();
-if (!Xty->isVectorTy() && !Yty->isVectorTy() && !Sty->isVectorTy()) {
- if (Xty->isFloatingPointTy()) {
-auto V
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/84526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL] implement `clamp` intrinsic (PR #85424)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/85424
closes #70071
- `CGBuiltin.cpp` - Add the unsigned\generic clamp intrinsic emitter.
- `IntrinsicsDirectX.td` - add the `dx.clamp` & `dx.uclamp` intrinsics
- `DXILIntrinsicExpansion.cpp` - add the `clamp` instruction expansion while
maintaining vector form.
- `SemaChecking.cpp` - Add `clamp` builtin Sema Checks.
- `Builtins.td` - add a `clamp` builtin
- `hlsl_intrinsics.h` - add the `clamp` api
Why `clamp` as instruction expansion for DXIL?
1. SPIR-V has a GLSL `clamp` extension via:
-
[FClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FClamp)
-
[UClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#UClamp)
-
[SClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#SClamp)
2. Further Clamp lowers to `min(max( x, min_range ), max_range)` which we have
float, signed, & unsigned dixilOps.
>From 681f4bbbc4aba08e285864ded62a7f01e178bf38 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 15:26:26 -0400
Subject: [PATCH 1/2] [HLSL] Implement the intrinsic
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 8 ++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 110 ++
clang/lib/Sema/SemaChecking.cpp | 15 +-
.../CodeGenHLSL/builtins/clamp-builtin.hlsl | 8 ++
clang/test/CodeGenHLSL/builtins/clamp.hlsl| 134 ++
.../test/SemaHLSL/BuiltIns/clamp-errors.hlsl | 91
llvm/include/llvm/IR/IntrinsicsDirectX.td | 2 +-
llvm/lib/Target/DirectX/DXIL.td | 10 ++
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 48 +++
llvm/test/CodeGen/DirectX/clamp.ll| 64 +
llvm/test/CodeGen/DirectX/fmax.ll | 31
llvm/test/CodeGen/DirectX/fmin.ll | 31
llvm/test/CodeGen/DirectX/smax.ll | 31
llvm/test/CodeGen/DirectX/smin.ll | 31
llvm/test/CodeGen/DirectX/umax.ll | 29 ++--
llvm/test/CodeGen/DirectX/umin.ll | 31
17 files changed, 664 insertions(+), 16 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/clamp-builtin.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/clamp.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/clamp-errors.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/clamp.ll
create mode 100644 llvm/test/CodeGen/DirectX/fmax.ll
create mode 100644 llvm/test/CodeGen/DirectX/fmin.ll
create mode 100644 llvm/test/CodeGen/DirectX/smax.ll
create mode 100644 llvm/test/CodeGen/DirectX/smin.ll
create mode 100644 llvm/test/CodeGen/DirectX/umin.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index 58a2d22e7641fc..64599aaee0ced7 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4554,6 +4554,12 @@ def HLSLWaveActiveCountBits : LangBuiltin<"HLSL_LANG"> {
let Prototype = "unsigned int(bool)";
}
+def HLSLClamp : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_clamp"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "void(...)";
+}
+
def HLSLCreateHandle : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_create_handle"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index b09bf563622089..f831694fe9bc23 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17981,6 +17981,14 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/llvm::Type::getInt1Ty(getLLVMContext()),
Intrinsic::dx_any, ArrayRef{Op0}, nullptr, "dx.any");
}
+ case Builtin::BI__builtin_hlsl_elementwise_clamp: {
+Value *OpX = EmitScalarExpr(E->getArg(0));
+Value *OpMin = EmitScalarExpr(E->getArg(1));
+Value *OpMax = EmitScalarExpr(E->getArg(2));
+return Builder.CreateIntrinsic(
+/*ReturnType=*/OpX->getType(), Intrinsic::dx_clamp,
+ArrayRef{OpX, OpMin, OpMax}, nullptr, "dx.clamp");
+ }
case Builtin::BI__builtin_hlsl_dot: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
Value *Op1 = EmitScalarExpr(E->getArg(1));
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 718fb9a9b35c04..5e703772b7ee4f 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -252,6 +252,116 @@ double3 ceil(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_ceil)
double4 ceil(double4);
+//===--===//
+// clamp builtins
+//===--===//
+
+/// \fn T clamp(T X, T Min, T Max)
+/// \brief Clamps the specified value \a X to the specified
+/// minimum ( \a Min) and maximum (
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
@@ -0,0 +1,186 @@
+//===- DXILIntrinsicExpansion.cpp - Prepare LLVM Module for DXIL
encoding--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+///
+/// \file This file contains DXIL intrinsic expansions for those that don't
have
+// opcodes in DirectX Intermediate Language (DXIL).
+//===--===//
+
+#include "DXILIntrinsicExpansion.h"
+#include "DirectX.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/IR/IRBuilder.h"
+#include "llvm/IR/Instruction.h"
+#include "llvm/IR/Instructions.h"
+#include "llvm/IR/Intrinsics.h"
+#include "llvm/IR/IntrinsicsDirectX.h"
+#include "llvm/IR/Module.h"
+#include "llvm/IR/PassManager.h"
+#include "llvm/IR/Type.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/MathExtras.h"
+
+#define DEBUG_TYPE "dxil-intrinsic-expansion"
+
+using namespace llvm;
+
+static bool isIntrinsicExpansion(Function &F) {
+ switch (F.getIntrinsicID()) {
+ case Intrinsic::exp:
+ case Intrinsic::dx_any:
+ case Intrinsic::dx_lerp:
+ case Intrinsic::dx_rcp:
+return true;
+ }
+ return false;
+}
+
+static bool expandExpIntrinsic(CallInst *Orig) {
+ Value *X = Orig->getOperand(0);
+ IRBuilder<> Builder(Orig->getParent());
+ Builder.SetInsertPoint(Orig);
+ Type *Ty = X->getType();
+ Type *EltTy = Ty->getScalarType();
+ Constant *Log2eConst =
+ Ty->isVectorTy() ? ConstantVector::getSplat(
+ ElementCount::getFixed(
+ cast(Ty)->getNumElements()),
+ ConstantFP::get(EltTy, numbers::log2e))
+ : ConstantFP::get(EltTy, numbers::log2e);
+ Value *NewX = Builder.CreateFMul(Log2eConst, X);
+ auto *Exp2Call =
+ Builder.CreateIntrinsic(Ty, Intrinsic::exp2, {NewX}, nullptr, "dx.exp2");
+ Exp2Call->setTailCall(Orig->isTailCall());
+ Exp2Call->setAttributes(Orig->getAttributes());
+ Orig->replaceAllUsesWith(Exp2Call);
+ Orig->eraseFromParent();
+ return true;
+}
+
+static bool expandAnyIntrinsic(CallInst *Orig) {
+ Value *X = Orig->getOperand(0);
+ IRBuilder<> Builder(Orig->getParent());
+ Builder.SetInsertPoint(Orig);
+ Type *Ty = X->getType();
+ Type *EltTy = Ty->getScalarType();
+
+ if (!Ty->isVectorTy()) {
+Value *Cond = EltTy->isFloatingPointTy()
+ ? Builder.CreateFCmpUNE(X, ConstantFP::get(EltTy, 0))
+ : Builder.CreateICmpNE(X, ConstantInt::get(EltTy, 0));
+Orig->replaceAllUsesWith(Cond);
+ } else {
+auto *XVec = dyn_cast(Ty);
+Value *Cond =
+EltTy->isFloatingPointTy()
+? Builder.CreateFCmpUNE(
+ X, ConstantVector::getSplat(
+ ElementCount::getFixed(XVec->getNumElements()),
+ ConstantFP::get(EltTy, 0)))
+: Builder.CreateICmpNE(
+ X, ConstantVector::getSplat(
+ ElementCount::getFixed(XVec->getNumElements()),
+ ConstantInt::get(EltTy, 0)));
+Value *Result = Builder.CreateExtractElement(Cond, (uint64_t)0);
+for (unsigned I = 1; I < XVec->getNumElements(); I++) {
+ Value *Elt = Builder.CreateExtractElement(Cond, I);
+ Result = Builder.CreateOr(Result, Elt);
+}
+Orig->replaceAllUsesWith(Result);
+ }
+ Orig->eraseFromParent();
+ return true;
+}
+
+static bool expandLerpIntrinsic(CallInst *Orig) {
+ Value *X = Orig->getOperand(0);
+ Value *Y = Orig->getOperand(1);
+ Value *S = Orig->getOperand(2);
+ IRBuilder<> Builder(Orig->getParent());
+ Builder.SetInsertPoint(Orig);
+ auto *V = Builder.CreateFSub(Y, X);
+ V = Builder.CreateFMul(S, V);
+ auto *Result = Builder.CreateFAdd(X, V, "dx.lerp");
+ Orig->replaceAllUsesWith(Result);
+ Orig->eraseFromParent();
+ return true;
+}
+
+static bool expandRcpIntrinsic(CallInst *Orig) {
+ Value *X = Orig->getOperand(0);
+ IRBuilder<> Builder(Orig->getParent());
+ Builder.SetInsertPoint(Orig);
+ Type *Ty = X->getType();
+ Type *EltTy = Ty->getScalarType();
+ Constant *One =
+ Ty->isVectorTy()
+ ? ConstantVector::getSplat(
+ElementCount::getFixed(
+dyn_cast(Ty)->getNumElements()),
+ConstantFP::get(EltTy, 1.0))
+ : ConstantFP::get(EltTy, 1.0);
+ auto *Result = Builder.CreateFDiv(One, X, "dx.rcp");
+ Orig->replaceAllUsesWith(Result);
+ Orig->eraseFromParent();
+ return true;
+}
+
+static bool expandIntrinsic(Function &F, CallInst *Orig) {
+ switch (F.getIntrinsicID()) {
+ case Intrinsic::exp:
+return expandExpIntrinsic(Orig);
+ case Intrinsic::dx_any:
+
[clang] [llvm] [HLSL] implement `clamp` intrinsic (PR #85424)
@@ -132,12 +134,60 @@ static bool expandRcpIntrinsic(CallInst *Orig) {
return true;
}
+static Intrinsic::ID getCorrectMaxIntrinsic(Type *elemTy,
+Intrinsic::ID clampIntrinsic) {
farzonl wrote:
Will do.
As an aside this function started off generic until I found out I couldn't use
`getSignBit()` to distinguish unsigned clamp vs signed clamp. The only way I
could determine signed-ness was in codeGen.
https://github.com/llvm/llvm-project/pull/85424
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL] implement `clamp` intrinsic (PR #85424)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/85424
>From 681f4bbbc4aba08e285864ded62a7f01e178bf38 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 14 Mar 2024 15:26:26 -0400
Subject: [PATCH 1/3] [HLSL] Implement the intrinsic
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 8 ++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 110 ++
clang/lib/Sema/SemaChecking.cpp | 15 +-
.../CodeGenHLSL/builtins/clamp-builtin.hlsl | 8 ++
clang/test/CodeGenHLSL/builtins/clamp.hlsl| 134 ++
.../test/SemaHLSL/BuiltIns/clamp-errors.hlsl | 91
llvm/include/llvm/IR/IntrinsicsDirectX.td | 2 +-
llvm/lib/Target/DirectX/DXIL.td | 10 ++
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 48 +++
llvm/test/CodeGen/DirectX/clamp.ll| 64 +
llvm/test/CodeGen/DirectX/fmax.ll | 31
llvm/test/CodeGen/DirectX/fmin.ll | 31
llvm/test/CodeGen/DirectX/smax.ll | 31
llvm/test/CodeGen/DirectX/smin.ll | 31
llvm/test/CodeGen/DirectX/umax.ll | 29 ++--
llvm/test/CodeGen/DirectX/umin.ll | 31
17 files changed, 664 insertions(+), 16 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/clamp-builtin.hlsl
create mode 100644 clang/test/CodeGenHLSL/builtins/clamp.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/clamp-errors.hlsl
create mode 100644 llvm/test/CodeGen/DirectX/clamp.ll
create mode 100644 llvm/test/CodeGen/DirectX/fmax.ll
create mode 100644 llvm/test/CodeGen/DirectX/fmin.ll
create mode 100644 llvm/test/CodeGen/DirectX/smax.ll
create mode 100644 llvm/test/CodeGen/DirectX/smin.ll
create mode 100644 llvm/test/CodeGen/DirectX/umin.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index 58a2d22e7641fc..64599aaee0ced7 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4554,6 +4554,12 @@ def HLSLWaveActiveCountBits : LangBuiltin<"HLSL_LANG"> {
let Prototype = "unsigned int(bool)";
}
+def HLSLClamp : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_clamp"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "void(...)";
+}
+
def HLSLCreateHandle : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_create_handle"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index b09bf563622089..f831694fe9bc23 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -17981,6 +17981,14 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/llvm::Type::getInt1Ty(getLLVMContext()),
Intrinsic::dx_any, ArrayRef{Op0}, nullptr, "dx.any");
}
+ case Builtin::BI__builtin_hlsl_elementwise_clamp: {
+Value *OpX = EmitScalarExpr(E->getArg(0));
+Value *OpMin = EmitScalarExpr(E->getArg(1));
+Value *OpMax = EmitScalarExpr(E->getArg(2));
+return Builder.CreateIntrinsic(
+/*ReturnType=*/OpX->getType(), Intrinsic::dx_clamp,
+ArrayRef{OpX, OpMin, OpMax}, nullptr, "dx.clamp");
+ }
case Builtin::BI__builtin_hlsl_dot: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
Value *Op1 = EmitScalarExpr(E->getArg(1));
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 718fb9a9b35c04..5e703772b7ee4f 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -252,6 +252,116 @@ double3 ceil(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_ceil)
double4 ceil(double4);
+//===--===//
+// clamp builtins
+//===--===//
+
+/// \fn T clamp(T X, T Min, T Max)
+/// \brief Clamps the specified value \a X to the specified
+/// minimum ( \a Min) and maximum ( \a Max) range.
+/// \param X A value to clamp.
+/// \param Min The specified minimum range.
+/// \param Max The specified maximum range.
+///
+/// Returns The clamped value for the \a X parameter.
+/// For values of -INF or INF, clamp will behave as expected.
+/// However for values of NaN, the results are undefined.
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_clamp)
+half clamp(half, half, half);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_clamp)
+half2 clamp(half2, half2, half2);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_clamp)
+half3 clamp(half3, half3, half3);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_clamp)
+half4 clamp(half4, half4, half4);
+
+#ifdef
[clang] [llvm] [HLSL] implement `clamp` intrinsic (PR #85424)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/85424 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/84526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] `exp`, `any`, `lerp`, & `rcp` Intrinsic Lowering (PR #84526)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/84526 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] implement dot intrinsic lowering for integers (PR #85662)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/85662
this implements part 1 of 2 for #83626
- `CGBuiltin.cpp` - modified to have seperate cases for signed and unsigned
integers.
- `SemaChecking.cpp` - modified to prevent the generation of a double dot
product intrinsic if the builtin were to be called directly.
- `IntrinsicsDirectX.td` creation of the signed and unsigned dot intrinsics
needed for instruction expansion.
- `DXILIntrinsicExpansion.cpp` - handle instruction expansion cases for integer
dot product.
>From e7738ae379375ed40558b2e93cc67a5a726aadbc Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 15 Mar 2024 18:19:52 -0400
Subject: [PATCH] [DXIL] implement dot intrinsic lowering for integers this
implements part 1 of 2 for #83626 - `CGBuiltin.cpp` - modified to have
seperate cases for signed and unsigned integers. - `SemaChecking.cpp` -
modified to prevent the generation of a double dot product intrinsic if the
builtin were to be called directly. - `IntrinsicsDirectX.td` creation of the
signed and unsigned dot intrinsics needed for instruction expansion. -
`DXILIntrinsicExpansion.cpp` - handle instruction expansion cases for
integer dot product.
---
clang/lib/CodeGen/CGBuiltin.cpp | 14 ++-
clang/lib/Sema/SemaChecking.cpp | 15 +++
clang/test/CodeGenHLSL/builtins/dot.hlsl | 36 +++
clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl | 9 ++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 11 +-
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 36 +++
llvm/test/CodeGen/DirectX/idot.ll | 100 ++
7 files changed, 201 insertions(+), 20 deletions(-)
create mode 100644 llvm/test/CodeGen/DirectX/idot.ll
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index e965df810add54..e89691ab7921c3 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18036,6 +18036,17 @@ llvm::Value
*CodeGenFunction::EmitScalarOrConstFoldImmArg(unsigned ICEArguments,
return Arg;
}
+Intrinsic::ID getDotProductIntrinsic(QualType QT) {
+ if (QT->hasSignedIntegerRepresentation())
+return Intrinsic::dx_sdot;
+ if (QT->hasUnsignedIntegerRepresentation())
+return Intrinsic::dx_udot;
+
+ assert(QT->hasFloatingRepresentation());
+ return Intrinsic::dx_dot;
+ ;
+}
+
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
const CallExpr *E) {
if (!getLangOpts().HLSL)
@@ -18096,7 +18107,8 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
"Dot product requires vectors to be of the same size.");
return Builder.CreateIntrinsic(
-/*ReturnType=*/T0->getScalarType(), Intrinsic::dx_dot,
+/*ReturnType=*/T0->getScalarType(),
+getDotProductIntrinsic(E->getArg(0)->getType()),
ArrayRef{Op0, Op1}, nullptr, "dx.dot");
} break;
case Builtin::BI__builtin_hlsl_lerp: {
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index a0b256ab5579ee..384b929d37bc82 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5484,6 +5484,19 @@ bool CheckFloatOrHalfRepresentations(Sema *S, CallExpr
*TheCall) {
checkFloatorHalf);
}
+bool CheckNoDoubleVectors(Sema *S, CallExpr *TheCall) {
+ auto checkDoubleVector = [](clang::QualType PassedType) -> bool {
+if (PassedType->isVectorType() && PassedType->hasFloatingRepresentation())
{
+ clang::QualType BaseType =
+ PassedType->getAs()->getElementType();
+ return !BaseType->isHalfType() && !BaseType->isFloat32Type();
+}
+return false;
+ };
+ return CheckArgsTypesAreCorrect(S, TheCall, S->Context.FloatTy,
+ checkDoubleVector);
+}
+
void SetElementTypeAsReturnType(Sema *S, CallExpr *TheCall,
QualType ReturnType) {
auto *VecTyA = TheCall->getArg(0)->getType()->getAs();
@@ -5520,6 +5533,8 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
if (SemaBuiltinVectorToScalarMath(TheCall))
return true;
+if (CheckNoDoubleVectors(this, TheCall))
+ return true;
break;
}
case Builtin::BI__builtin_hlsl_elementwise_rcp: {
diff --git a/clang/test/CodeGenHLSL/builtins/dot.hlsl
b/clang/test/CodeGenHLSL/builtins/dot.hlsl
index c064d118caf3e7..0f993193c00cce 100644
--- a/clang/test/CodeGenHLSL/builtins/dot.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/dot.hlsl
@@ -11,15 +11,15 @@
// NATIVE_HALF: ret i16 %dx.dot
int16_t test_dot_short(int16_t p0, int16_t p1) { return dot(p0, p1); }
-// NATIVE_HALF: %dx.dot = call i16 @llvm.dx.dot.v2i16(<2 x i16> %0, <2 x i16>
%1)
+// NATIVE_HALF: %dx.dot = call i16 @llvm.dx.sdot.v2i16(<2 x i16> %0, <2 x i16>
%1)
// NATIVE_HALF: ret i16 %dx.dot
int16_t test_dot_short2(int16_t2 p0, int16_t2 p1
[clang] [llvm] [DXIL] implement dot intrinsic lowering for integers (PR #85662)
@@ -39,11 +39,44 @@ static bool isIntrinsicExpansion(Function &F) {
case Intrinsic::dx_uclamp:
case Intrinsic::dx_lerp:
case Intrinsic::dx_rcp:
+ case Intrinsic::dx_sdot:
+ case Intrinsic::dx_udot:
return true;
}
return false;
}
+static bool expandIntegerDot(CallInst *Orig, Intrinsic::ID DotIntrinsic) {
+ assert(DotIntrinsic == Intrinsic::dx_sdot ||
+ DotIntrinsic == Intrinsic::dx_udot);
+ Intrinsic::ID MadIntrinsic = DotIntrinsic == Intrinsic::dx_sdot
+ ? Intrinsic::dx_imad
+ : Intrinsic::dx_umad;
+ Value *A = Orig->getOperand(0);
+ Value *B = Orig->getOperand(1);
+ Type *ATy = A->getType();
+ Type *BTy = B->getType();
+ assert(ATy->isVectorTy() && BTy->isVectorTy());
+
+ IRBuilder<> Builder(Orig->getParent());
+ Builder.SetInsertPoint(Orig);
+
+ auto *AVec = dyn_cast(A->getType());
+ Value *Elt0 = Builder.CreateExtractElement(A, (uint64_t)0);
+ Value *Elt1 = Builder.CreateExtractElement(B, (uint64_t)0);
+ Value *Result = Builder.CreateMul(Elt0, Elt1);
+ for (unsigned I = 1; I < AVec->getNumElements(); I++) {
+Elt0 = Builder.CreateExtractElement(A, I);
+Elt1 = Builder.CreateExtractElement(B, I);
+Result = Builder.CreateIntrinsic(Result->getType(), MadIntrinsic,
+ ArrayRef{Elt0, Elt1, Result},
+ nullptr, "dx.mad");
farzonl wrote:
i thought about that, but then i would need to add a conditional to change the
string and it didn't seem worth it.
https://github.com/llvm/llvm-project/pull/85662
___
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[clang] [llvm] [DXIL] implement dot intrinsic lowering for integers (PR #85662)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/85662 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] implement dot intrinsic lowering for integers (PR #85662)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/85662
>From e7738ae379375ed40558b2e93cc67a5a726aadbc Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 15 Mar 2024 18:19:52 -0400
Subject: [PATCH 1/2] [DXIL] implement dot intrinsic lowering for integers this
implements part 1 of 2 for #83626 - `CGBuiltin.cpp` - modified to have
seperate cases for signed and unsigned integers. - `SemaChecking.cpp` -
modified to prevent the generation of a double dot product intrinsic if the
builtin were to be called directly. - `IntrinsicsDirectX.td` creation of the
signed and unsigned dot intrinsics needed for instruction expansion. -
`DXILIntrinsicExpansion.cpp` - handle instruction expansion cases for
integer dot product.
---
clang/lib/CodeGen/CGBuiltin.cpp | 14 ++-
clang/lib/Sema/SemaChecking.cpp | 15 +++
clang/test/CodeGenHLSL/builtins/dot.hlsl | 36 +++
clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl | 9 ++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 11 +-
.../Target/DirectX/DXILIntrinsicExpansion.cpp | 36 +++
llvm/test/CodeGen/DirectX/idot.ll | 100 ++
7 files changed, 201 insertions(+), 20 deletions(-)
create mode 100644 llvm/test/CodeGen/DirectX/idot.ll
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index e965df810add54..e89691ab7921c3 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18036,6 +18036,17 @@ llvm::Value
*CodeGenFunction::EmitScalarOrConstFoldImmArg(unsigned ICEArguments,
return Arg;
}
+Intrinsic::ID getDotProductIntrinsic(QualType QT) {
+ if (QT->hasSignedIntegerRepresentation())
+return Intrinsic::dx_sdot;
+ if (QT->hasUnsignedIntegerRepresentation())
+return Intrinsic::dx_udot;
+
+ assert(QT->hasFloatingRepresentation());
+ return Intrinsic::dx_dot;
+ ;
+}
+
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
const CallExpr *E) {
if (!getLangOpts().HLSL)
@@ -18096,7 +18107,8 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
"Dot product requires vectors to be of the same size.");
return Builder.CreateIntrinsic(
-/*ReturnType=*/T0->getScalarType(), Intrinsic::dx_dot,
+/*ReturnType=*/T0->getScalarType(),
+getDotProductIntrinsic(E->getArg(0)->getType()),
ArrayRef{Op0, Op1}, nullptr, "dx.dot");
} break;
case Builtin::BI__builtin_hlsl_lerp: {
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index a0b256ab5579ee..384b929d37bc82 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5484,6 +5484,19 @@ bool CheckFloatOrHalfRepresentations(Sema *S, CallExpr
*TheCall) {
checkFloatorHalf);
}
+bool CheckNoDoubleVectors(Sema *S, CallExpr *TheCall) {
+ auto checkDoubleVector = [](clang::QualType PassedType) -> bool {
+if (PassedType->isVectorType() && PassedType->hasFloatingRepresentation())
{
+ clang::QualType BaseType =
+ PassedType->getAs()->getElementType();
+ return !BaseType->isHalfType() && !BaseType->isFloat32Type();
+}
+return false;
+ };
+ return CheckArgsTypesAreCorrect(S, TheCall, S->Context.FloatTy,
+ checkDoubleVector);
+}
+
void SetElementTypeAsReturnType(Sema *S, CallExpr *TheCall,
QualType ReturnType) {
auto *VecTyA = TheCall->getArg(0)->getType()->getAs();
@@ -5520,6 +5533,8 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
if (SemaBuiltinVectorToScalarMath(TheCall))
return true;
+if (CheckNoDoubleVectors(this, TheCall))
+ return true;
break;
}
case Builtin::BI__builtin_hlsl_elementwise_rcp: {
diff --git a/clang/test/CodeGenHLSL/builtins/dot.hlsl
b/clang/test/CodeGenHLSL/builtins/dot.hlsl
index c064d118caf3e7..0f993193c00cce 100644
--- a/clang/test/CodeGenHLSL/builtins/dot.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/dot.hlsl
@@ -11,15 +11,15 @@
// NATIVE_HALF: ret i16 %dx.dot
int16_t test_dot_short(int16_t p0, int16_t p1) { return dot(p0, p1); }
-// NATIVE_HALF: %dx.dot = call i16 @llvm.dx.dot.v2i16(<2 x i16> %0, <2 x i16>
%1)
+// NATIVE_HALF: %dx.dot = call i16 @llvm.dx.sdot.v2i16(<2 x i16> %0, <2 x i16>
%1)
// NATIVE_HALF: ret i16 %dx.dot
int16_t test_dot_short2(int16_t2 p0, int16_t2 p1) { return dot(p0, p1); }
-// NATIVE_HALF: %dx.dot = call i16 @llvm.dx.dot.v3i16(<3 x i16> %0, <3 x i16>
%1)
+// NATIVE_HALF: %dx.dot = call i16 @llvm.dx.sdot.v3i16(<3 x i16> %0, <3 x i16>
%1)
// NATIVE_HALF: ret i16 %dx.dot
int16_t test_dot_short3(int16_t3 p0, int16_t3 p1) { return dot(p0, p1); }
-// NATIVE_HALF: %dx.dot = call i16 @llvm.dx.dot.v4i16(<4 x i16> %0, <4 x i16>
%1)
+// NATIVE_HALF: %dx.dot = call i16 @llvm.dx.sdot.v4i16(<4 x i16> %0, <4
[clang] [llvm] [DXIL] implement dot intrinsic lowering for integers (PR #85662)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/85662 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] implement dot intrinsic lowering for integers (PR #85662)
farzonl wrote: > Hi @farzonl, your commit is causing at least one test failure on a build bot: > https://lab.llvm.org/buildbot/#/builders/139/builds/61732 > > ``` > TEST 'Clang :: SemaHLSL/BuiltIns/dot-errors.hlsl' FAILED > > Exit Code: 1 > Command Output (stderr): > -- > RUN: at line 1: > /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/build/bin/clang > -cc1 -internal-isystem > /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/build/lib/clang/19/include > -nostdsysteminc -finclude-default-header -triple > dxil-pc-shadermodel6.6-library > /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl > -fnative-half-type -emit-llvm -disable-llvm-passes -verify > -verify-ignore-unexpected > + > /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/build/bin/clang > -cc1 -internal-isystem > /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/build/lib/clang/19/include > -nostdsysteminc -finclude-default-header -triple > dxil-pc-shadermodel6.6-library > /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl > -fnative-half-type -emit-llvm -disable-llvm-passes -verify > -verify-ignore-unexpected > error: 'expected-error' diagnostics expected but not seen: > File > /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl > Line 117 (directive at > /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl:118): > passing 'double2' (aka 'vector') to parameter of incompatible > type '__attribute__((__vector_size__(2 * sizeof(float float' (vector of 2 > 'float' values) > 1 error generated. > -- > > ``` > > Other failing buildbots include: > > * https://lab.llvm.org/buildbot/#/builders/216/builds/36204 > * https://lab.llvm.org/buildbot/#/builders/247/builds/15516 > * https://lab.llvm.org/buildbot/#/builders/280/builds/469 > > Can you take a look and revert if you need time to investigate? This is my own test case failing. need: essentially this as a return but thats gettign complicated.`BaseType->isFloatingType() && !BaseType->isHalfType() && !BaseType->isFloat32Type();` But it would be simpler to just have a double check so im going to do something like this ` return VecTy->getElementType()->isDoubleType();` https://github.com/llvm/llvm-project/pull/85662 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Fix for build break introduced by #85662 (PR #85839)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/85839
This change fixes a test case failure caused by pr #85662
>From 7c2833dc32d8d2573454cba99b9a2c65a166d702 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 19 Mar 2024 14:01:29 -0400
Subject: [PATCH] This change fixes a test case failure caused by pr #85662
---
clang/include/clang/AST/Type.h | 5 +
clang/lib/Sema/SemaChecking.cpp | 6 ++
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 10916053cdfbf5..be18535e3e4c8c 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -2245,6 +2245,7 @@ class alignas(TypeAlignment) Type : public
ExtQualsTypeCommonBase {
bool isHalfType() const; // OpenCL 6.1.1.1, NEON (IEEE 754-2008 half)
bool isFloat16Type() const; // C11 extension ISO/IEC TS 18661
bool isFloat32Type() const;
+ bool isDoubleType() const;
bool isBFloat16Type() const;
bool isFloat128Type() const;
bool isIbm128Type() const;
@@ -7457,6 +7458,10 @@ inline bool Type::isFloat32Type() const {
return isSpecificBuiltinType(BuiltinType::Float);
}
+inline bool Type::isDoubleType() const {
+ return isSpecificBuiltinType(BuiltinType::Double);
+}
+
inline bool Type::isBFloat16Type() const {
return isSpecificBuiltinType(BuiltinType::BFloat16);
}
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index f9112a29027acd..ef3ab16ba29b41 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5486,10 +5486,8 @@ bool CheckFloatOrHalfRepresentations(Sema *S, CallExpr
*TheCall) {
bool CheckNoDoubleVectors(Sema *S, CallExpr *TheCall) {
auto checkDoubleVector = [](clang::QualType PassedType) -> bool {
-if (const auto *VecTy = dyn_cast(PassedType)) {
- clang::QualType BaseType = VecTy->getElementType();
- return !BaseType->isHalfType() && !BaseType->isFloat32Type();
-}
+if (const auto *VecTy = PassedType->getAs())
+ return VecTy->getElementType()->isDoubleType();
return false;
};
return CheckArgsTypesAreCorrect(S, TheCall, S->Context.FloatTy,
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[clang] [llvm] [DXIL] implement dot intrinsic lowering for integers (PR #85662)
farzonl wrote: @nico @dyung @llvm-beanz this pr should fix the build break: https://github.com/llvm/llvm-project/pull/85839/files https://github.com/llvm/llvm-project/pull/85662 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [DXIL] implement dot intrinsic lowering for integers (PR #85662)
farzonl wrote: > Also failing on http://45.33.8.238/linux/133623/step_7.txt > > It's been broken for over an hour now. Time to revert and fix async? I have a PR up to fix this, but I would be equally happy with just adding an XFAIL to SemaHLSL/BuiltIns/dot-errors.hlsl if you feel like my PR would take to long to land. https://github.com/llvm/llvm-project/pull/85662 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Fix for build break introduced by #85662 (PR #85839)
farzonl wrote: I'm confident this change fixes the build break: ```bash python ../debug-llvm-build/bin/llvm-lit -sv clang/test/SemaHLSL/ llvm-lit: /mnt/DevDrive/projects/llvm-project/llvm/utils/lit/lit/llvm/config.py:502: note: using clang: /mnt/DevDrive/projects/debug-llvm-build/bin/clang Testing Time: 0.67s Total Discovered Tests: 43 Passed : 42 (97.67%) Expectedly Failed: 1 (2.33%) python ../debug-llvm-build/bin/llvm-lit -sv clang/test/CodeGenHLSL/ llvm-lit: /mnt/DevDrive/projects/llvm-project/llvm/utils/lit/lit/llvm/config.py:502: note: using clang: /mnt/DevDrive/projects/debug-llvm-build/bin/clang Testing Time: 0.88s Total Discovered Tests: 63 Passed: 63 (100.00%) python ../debug-llvm-build/bin/llvm-lit -sv clang/test/Sema llvm-lit: /mnt/DevDrive/projects/llvm-project/llvm/utils/lit/lit/llvm/config.py:502: note: using clang: /mnt/DevDrive/projects/debug-llvm-build/bin/clang Testing Time: 26.09s Total Discovered Tests: 979 Unsupported: 1 (0.10%) Passed : 978 (99.90%) ``` https://github.com/llvm/llvm-project/pull/85839 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Fix for build break introduced by #85662 (PR #85839)
farzonl wrote: builds should be back to green all 51 checks passed: https://github.com/llvm/llvm-project/commit/3ff67d8c8069b9f42efcbe90ad7edeb6d8117a31 https://github.com/llvm/llvm-project/pull/85839 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Add Float `Dot` Intrinsic Lowering (PR #86071)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/86071
Completes #83626
- `CGBuiltin.cpp` - modify `getDotProductIntrinsic` to be able to emit `dot2`,
`dot3`, and `dot4` intrinsics based on element count
- `IntrinsicsDirectX.td` - for floating point add `dot2`, `dot3`, and `dot4`
inntrinsics -`DXIL.td` add dxilop intrinsic lowering for `dot2`, `dot3`, &
`dot4`.
- `DXILOpLowering.cpp` - add vector arg flattening for dot product.
- `DXILOpBuilder.h` - modify `createDXILOpCall` to take a smallVector instead
of an iterator
- `DXILOpBuilder.cpp` - modify `createDXILOpCall` by moving the small vector up
to the calling function in `DXILOpLowering.cpp`.
- Moving one function up gives us access to the `CallInst` and `Function`
which were needed to distinguish the dot product intrinsics and get the
operands without using the iterator.
>From 7e794b6137d4ddb9d17a0412c637961cb622206a Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 19 Mar 2024 17:29:55 -0400
Subject: [PATCH] Add Float `Dot` Intrinsic Lowering Completes #83626 -
`CGBuiltin.cpp` - modify `getDotProductIntrinsic` to be able to emit
`dot2`, `dot3`, and `dot4` intrinsics based on element count -
`IntrinsicsDirectX.td` - for floating point add `dot2`,`dot3`, and `dot4`
inntrinsics -`DXIL.td` add dxilop intrinsic lowering for `dot2`,`dot3`, &
`dot4`. -`DXILOpLowering.cpp` - add vector arg flattening for dot product.
-`DXILOpBuilder.h` - modify `createDXILOpCall` to take a smallVector instead
of an iterator - `DXILOpBuilder.cpp` - modify createDXILOpCall by moving the
small vector up to the callee function in `DXILOpLowering.cpp`. Moving one
function up gives us access to the callInst and Function Which were
needed to distinguish the dot product intrinsics and get the operands
without using the iterator.
---
clang/lib/CodeGen/CGBuiltin.cpp| 25 +++---
clang/test/CodeGenHLSL/builtins/dot.hlsl | 28 +++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 10 ++-
llvm/lib/Target/DirectX/DXIL.td| 9 +++
llvm/lib/Target/DirectX/DXILOpBuilder.cpp | 8 +-
llvm/lib/Target/DirectX/DXILOpBuilder.h| 5 +-
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 55 -
llvm/test/CodeGen/DirectX/dot2_error.ll| 10 +++
llvm/test/CodeGen/DirectX/dot3_error.ll| 10 +++
llvm/test/CodeGen/DirectX/dot4_error.ll| 10 +++
llvm/test/CodeGen/DirectX/fdot.ll | 94 ++
11 files changed, 230 insertions(+), 34 deletions(-)
create mode 100644 llvm/test/CodeGen/DirectX/dot2_error.ll
create mode 100644 llvm/test/CodeGen/DirectX/dot3_error.ll
create mode 100644 llvm/test/CodeGen/DirectX/dot4_error.ll
create mode 100644 llvm/test/CodeGen/DirectX/fdot.ll
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 77cb269d43c5a8..a4b99181769326 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18036,15 +18036,22 @@ llvm::Value
*CodeGenFunction::EmitScalarOrConstFoldImmArg(unsigned ICEArguments,
return Arg;
}
-Intrinsic::ID getDotProductIntrinsic(QualType QT) {
+Intrinsic::ID getDotProductIntrinsic(QualType QT, int elementCount) {
+ if (QT->hasFloatingRepresentation()) {
+switch (elementCount) {
+case 2:
+ return Intrinsic::dx_dot2;
+case 3:
+ return Intrinsic::dx_dot3;
+case 4:
+ return Intrinsic::dx_dot4;
+}
+ }
if (QT->hasSignedIntegerRepresentation())
return Intrinsic::dx_sdot;
- if (QT->hasUnsignedIntegerRepresentation())
-return Intrinsic::dx_udot;
- assert(QT->hasFloatingRepresentation());
- return Intrinsic::dx_dot;
- ;
+ assert(QT->hasUnsignedIntegerRepresentation());
+ return Intrinsic::dx_udot;
}
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
@@ -18098,8 +18105,7 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
assert(T0->getScalarType() == T1->getScalarType() &&
"Dot product of vectors need the same element types.");
-[[maybe_unused]] auto *VecTy0 =
-E->getArg(0)->getType()->getAs();
+auto *VecTy0 = E->getArg(0)->getType()->getAs();
[[maybe_unused]] auto *VecTy1 =
E->getArg(1)->getType()->getAs();
// A HLSLVectorTruncation should have happend
@@ -18108,7 +18114,8 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateIntrinsic(
/*ReturnType=*/T0->getScalarType(),
-getDotProductIntrinsic(E->getArg(0)->getType()),
+getDotProductIntrinsic(E->getArg(0)->getType(),
+ VecTy0->getNumElements()),
ArrayRef{Op0, Op1}, nullptr, "dx.dot");
} break;
case Builtin::BI__builtin_hlsl_lerp: {
diff --git a/clang/test/CodeGenHLSL/builtins/dot.hlsl
b/clang/test/CodeGenHLSL/builtins/dot.hlsl
index 0f993193c00cce..307d71cce3cb6d 100644
--- a/clang/test/CodeGenHLSL/builtins/dot.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/dot.hlsl
@
[clang] [llvm] [DXIL] Add Float `Dot` Intrinsic Lowering (PR #86071)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/86071 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add clang_elementwise_builtin_alias (PR #86175)
@@ -2239,6 +2239,39 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl,
unsigned BuiltinID,
return true;
ICEArguments &= ~(1 << ArgNo);
}
+ // if the call has the elementwise attribute, then
+ // make sure that an elementwise expr is emitted.
+ if (FDecl->hasAttr()) {
+switch (FDecl->getNumParams()) {
+case 1: {
+ if (PrepareBuiltinElementwiseMathOneArgCall(TheCall))
+return ExprError();
+
+ QualType ArgTy = TheCall->getArg(0)->getType();
+ if (checkFPMathBuiltinElementType(
+ *this, TheCall->getArg(0)->getBeginLoc(), ArgTy, 1))
+return ExprError();
+ break;
+}
+case 2: {
+ if (SemaBuiltinElementwiseMath(TheCall))
+return ExprError();
+
+ QualType ArgTy = TheCall->getArg(0)->getType();
+ if (checkFPMathBuiltinElementType(
+ *this, TheCall->getArg(0)->getBeginLoc(), ArgTy, 1) ||
+ checkFPMathBuiltinElementType(
+ *this, TheCall->getArg(1)->getBeginLoc(), ArgTy, 2))
+return ExprError();
+ break;
+}
+case 3: {
+ if (SemaBuiltinElementwiseTernaryMath(TheCall))
farzonl wrote:
there are ternaryMath calls that are not floating point only so you really
want to do this instead:
```c++
if (SemaBuiltinElementwiseTernaryMath(
TheCall, /*CheckForFloatArgs*/
TheCall->getArg(0)->getType()->hasFloatingRepresentation()))
```
https://github.com/llvm/llvm-project/pull/86175
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[clang] Add clang_elementwise_builtin_alias (PR #86175)
@@ -2239,6 +2239,39 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl,
unsigned BuiltinID,
return true;
ICEArguments &= ~(1 << ArgNo);
}
+ // if the call has the elementwise attribute, then
+ // make sure that an elementwise expr is emitted.
+ if (FDecl->hasAttr()) {
+switch (FDecl->getNumParams()) {
+case 1: {
+ if (PrepareBuiltinElementwiseMathOneArgCall(TheCall))
+return ExprError();
+
+ QualType ArgTy = TheCall->getArg(0)->getType();
+ if (checkFPMathBuiltinElementType(
farzonl wrote:
not all one arg math builtin are floating point only.
https://github.com/llvm/llvm-project/pull/86175
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[clang] [HLSL] Remove double pow intrinsics (PR #86407)
farzonl wrote: @robincaloudis Thanks this is what I was looking for. https://github.com/llvm/llvm-project/pull/86407 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Remove double pow intrinsics (PR #86407)
https://github.com/farzonl approved this pull request. https://github.com/llvm/llvm-project/pull/86407 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Remove double pow intrinsics (PR #86407)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/86407 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] Remove double pow intrinsics (PR #86407)
farzonl wrote: > @llvm-beanz, thanks for the review. I miss write access. Can you merge the > PR? Thanks. I got you! https://github.com/llvm/llvm-project/pull/86407 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] remove double impelementation of log, sin, trunc intrinsics (PR #86440)
https://github.com/farzonl requested changes to this pull request. This isn't going to work. You have to also fix the tests aswell. https://github.com/llvm/llvm-project/pull/86440 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] remove double impelementation of log, sin, trunc intrinsics (PR #86440)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/86440 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] remove double impelementation of log, sin, trunc intrinsics (PR #86440)
https://github.com/farzonl approved this pull request. https://github.com/llvm/llvm-project/pull/86440 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] remove double impelementation of log, sin, trunc intrinsics (PR #86440)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/86440 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of double intrinsics via the builtins (PR #86555)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/86555
fixes #86551
closes #86552
Thanks to #86440 and #86407 it makes more sense for us to do type checks early
via Sema to prevent the generation of invalid intrinsics.
>From 8d2d3399cbd69da3af62e5b67ae2785f1edbce37 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 25 Mar 2024 14:10:07 -0400
Subject: [PATCH] [HLSL] prevent generation of double intrinsics via the
builtins fixes #86551 closes #86552
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 9 -
clang/lib/Sema/SemaChecking.cpp| 14 ++
.../SemaHLSL/BuiltIns/half-float-only-errors.hlsl | 12
clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl | 6 ++
4 files changed, 32 insertions(+), 9 deletions(-)
create mode 100644 clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index d9f27c0db57ce4..0f9504de3b4992 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -392,15 +392,6 @@ float3 cos(float3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
float4 cos(float4);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
-double cos(double);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
-double2 cos(double2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
-double3 cos(double3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
-double4 cos(double4);
-
//===--===//
// dot product builtins
//===--===//
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 246e3577809a79..578c2aa26fd6b0 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5624,6 +5624,20 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
TheCall, /*CheckForFloatArgs*/
TheCall->getArg(0)->getType()->hasFloatingRepresentation()))
return true;
+break;
+ }
+ // Note these are llvm builtins that we want to catch invalid intrinsic
+ // generation. Normal handling of these builitns will occur elsewhere.
+ case Builtin::BI__builtin_elementwise_cos:
+ case Builtin::BI__builtin_elementwise_sin:
+ case Builtin::BI__builtin_elementwise_log:
+ case Builtin::BI__builtin_elementwise_log2:
+ case Builtin::BI__builtin_elementwise_log10:
+ case Builtin::BI__builtin_elementwise_pow:
+ case Builtin::BI__builtin_elementwise_trunc: {
+if (CheckFloatOrHalfRepresentations(this, TheCall))
+ return true;
+break;
}
}
return false;
diff --git a/clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
new file mode 100644
index 00..66ab47df51e5e8
--- /dev/null
+++ b/clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sin
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log2
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log10
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_trunc
+
+
+double2 test_double_builtin(double2 p0) {
+return TEST_FUNC(p0);
+ // expected-error@-1 {{passing 'double2' (aka 'vector') to
parameter of incompatible type '__attribute__((__vector_size__(2 *
sizeof(float float' (vector of 2 'float' values)}}
+}
diff --git a/clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl
new file mode 100644
index 00..949028aacf24b6
--- /dev/null
+++ b/clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl
@@ -0,0 +1,6 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify
+
+double2 test_double_builtin(double2 p0, double2 p1) {
+return __builtin_elementwise_pow
[clang] [llvm] [HLSL][DXIL] implement `sqrt` intrinsic (PR #86560)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/86560
completes #86187
- fix hlsl_intrinsic to cover the correct cases
- move to using `__builtin_elementwise_sqrt`
- add lowering of `Intrinsic::sqrt` to dxilop 24.
>From 5d8b1439d0e6967a4827d60ca39f49a2ad975af7 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 25 Mar 2024 14:58:44 -0400
Subject: [PATCH] [HLSL][DXIL] implement sqrt intrinsic completes #86187 - fix
hlsl_intrinsic to cover the correct cases - move to using
`__builtin_elementwise_sqrt` - add lowering of `Intrinsic::sqrt` to dxilop
24.
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 28 +---
clang/test/CodeGenHLSL/builtins/sqrt.hlsl | 78 +++
llvm/lib/Target/DirectX/DXIL.td | 4 ++
llvm/test/CodeGen/DirectX/sqrt.ll | 20 ++
llvm/test/CodeGen/DirectX/sqrt_error.ll | 10 +++
5 files changed, 105 insertions(+), 35 deletions(-)
create mode 100644 llvm/test/CodeGen/DirectX/sqrt.ll
create mode 100644 llvm/test/CodeGen/DirectX/sqrt_error.ll
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index d9f27c0db57ce4..fcb64fde1b91f1 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -1366,14 +1366,26 @@ float4 sin(float4);
/// \param Val The input value.
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_sqrtf16)
-half sqrt(half In);
-
-_HLSL_BUILTIN_ALIAS(__builtin_sqrtf)
-float sqrt(float In);
-
-_HLSL_BUILTIN_ALIAS(__builtin_sqrt)
-double sqrt(double In);
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_sqrt)
+half sqrt(half);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_sqrt)
+half2 sqrt(half2);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_sqrt)
+half3 sqrt(half3);
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_sqrt)
+half4 sqrt(half4);
+
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_sqrt)
+float sqrt(float);
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_sqrt)
+float2 sqrt(float2);
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_sqrt)
+float3 sqrt(float3);
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_sqrt)
+float4 sqrt(float4);
//===--===//
// trunc builtins
diff --git a/clang/test/CodeGenHLSL/builtins/sqrt.hlsl
b/clang/test/CodeGenHLSL/builtins/sqrt.hlsl
index 2c2a09617cf86a..adbbf69a8e0685 100644
--- a/clang/test/CodeGenHLSL/builtins/sqrt.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/sqrt.hlsl
@@ -1,29 +1,53 @@
-// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
-// RUN: dxil-pc-shadermodel6.2-library %s -fnative-half-type \
-// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
+// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,NATIVE_HALF
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
+// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
+// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
-using hlsl::sqrt;
+// NATIVE_HALF: define noundef half @
+// NATIVE_HALF: %{{.*}} = call half @llvm.sqrt.f16(
+// NATIVE_HALF: ret half %{{.*}}
+// NO_HALF: define noundef float @"?test_sqrt_half@@YA$halff@$halff@@Z"(
+// NO_HALF: %{{.*}} = call float @llvm.sqrt.f32(
+// NO_HALF: ret float %{{.*}}
+half test_sqrt_half(half p0) { return sqrt(p0); }
+// NATIVE_HALF: define noundef <2 x half> @
+// NATIVE_HALF: %{{.*}} = call <2 x half> @llvm.sqrt.v2f16
+// NATIVE_HALF: ret <2 x half> %{{.*}}
+// NO_HALF: define noundef <2 x float> @
+// NO_HALF: %{{.*}} = call <2 x float> @llvm.sqrt.v2f32(
+// NO_HALF: ret <2 x float> %{{.*}}
+half2 test_sqrt_half2(half2 p0) { return sqrt(p0); }
+// NATIVE_HALF: define noundef <3 x half> @
+// NATIVE_HALF: %{{.*}} = call <3 x half> @llvm.sqrt.v3f16
+// NATIVE_HALF: ret <3 x half> %{{.*}}
+// NO_HALF: define noundef <3 x float> @
+// NO_HALF: %{{.*}} = call <3 x float> @llvm.sqrt.v3f32(
+// NO_HALF: ret <3 x float> %{{.*}}
+half3 test_sqrt_half3(half3 p0) { return sqrt(p0); }
+// NATIVE_HALF: define noundef <4 x half> @
+// NATIVE_HALF: %{{.*}} = call <4 x half> @llvm.sqrt.v4f16
+// NATIVE_HALF: ret <4 x half> %{{.*}}
+// NO_HALF: define noundef <4 x float> @
+// NO_HALF: %{{.*}} = call <4 x float> @llvm.sqrt.v4f32(
+// NO_HALF: ret <4 x float> %{{.*}}
+half4 test_sqrt_half4(half4 p0) { return sqrt(p0); }
-double sqrt_d(double x)
-{
- return sqrt(x);
-}
-
-// CHECK: define noundef double @"?sqrt_d@@YANN@Z"(
-// CHECK: call double @llvm.sqrt.f64(double %0)
-
-float sqrt_f(float x)
-{
- return sqrt(x);
-}
-
-// CHECK: define noundef float @"?sqrt_f@@YAMM@Z"(
-// CHECK: call float @llvm.sqrt.f32(float %0)
-
-half sqrt_h(half x)
-{
[clang] [llvm] [DXIL] Add Float `Dot` Intrinsic Lowering (PR #86071)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86071
>From db83effd2e9498fd7fd507b748a423390acefd5e Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 19 Mar 2024 17:29:55 -0400
Subject: [PATCH 1/2] Add Float `Dot` Intrinsic Lowering Completes #83626 -
`CGBuiltin.cpp` - modify `getDotProductIntrinsic` to be able to emit
`dot2`, `dot3`, and `dot4` intrinsics based on element count -
`IntrinsicsDirectX.td` - for floating point add `dot2`,`dot3`, and `dot4`
inntrinsics -`DXIL.td` add dxilop intrinsic lowering for `dot2`,`dot3`, &
`dot4`. -`DXILOpLowering.cpp` - add vector arg flattening for dot product.
-`DXILOpBuilder.h` - modify `createDXILOpCall` to take a smallVector instead
of an iterator - `DXILOpBuilder.cpp` - modify createDXILOpCall by moving the
small vector up to the callee function in `DXILOpLowering.cpp`. Moving one
function up gives us access to the callInst and Function Which were
needed to distinguish the dot product intrinsics and get the operands
without using the iterator.
---
clang/lib/CodeGen/CGBuiltin.cpp| 25 +++---
clang/test/CodeGenHLSL/builtins/dot.hlsl | 28 +++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 10 ++-
llvm/lib/Target/DirectX/DXIL.td| 9 +++
llvm/lib/Target/DirectX/DXILOpBuilder.cpp | 8 +-
llvm/lib/Target/DirectX/DXILOpBuilder.h| 5 +-
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 55 -
llvm/test/CodeGen/DirectX/dot2_error.ll| 10 +++
llvm/test/CodeGen/DirectX/dot3_error.ll| 10 +++
llvm/test/CodeGen/DirectX/dot4_error.ll| 10 +++
llvm/test/CodeGen/DirectX/fdot.ll | 94 ++
11 files changed, 230 insertions(+), 34 deletions(-)
create mode 100644 llvm/test/CodeGen/DirectX/dot2_error.ll
create mode 100644 llvm/test/CodeGen/DirectX/dot3_error.ll
create mode 100644 llvm/test/CodeGen/DirectX/dot4_error.ll
create mode 100644 llvm/test/CodeGen/DirectX/fdot.ll
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 2eaceeba617700..8f4817258e3b18 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18066,15 +18066,22 @@ llvm::Value
*CodeGenFunction::EmitScalarOrConstFoldImmArg(unsigned ICEArguments,
return Arg;
}
-Intrinsic::ID getDotProductIntrinsic(QualType QT) {
+Intrinsic::ID getDotProductIntrinsic(QualType QT, int elementCount) {
+ if (QT->hasFloatingRepresentation()) {
+switch (elementCount) {
+case 2:
+ return Intrinsic::dx_dot2;
+case 3:
+ return Intrinsic::dx_dot3;
+case 4:
+ return Intrinsic::dx_dot4;
+}
+ }
if (QT->hasSignedIntegerRepresentation())
return Intrinsic::dx_sdot;
- if (QT->hasUnsignedIntegerRepresentation())
-return Intrinsic::dx_udot;
- assert(QT->hasFloatingRepresentation());
- return Intrinsic::dx_dot;
- ;
+ assert(QT->hasUnsignedIntegerRepresentation());
+ return Intrinsic::dx_udot;
}
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
@@ -18128,8 +18135,7 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
assert(T0->getScalarType() == T1->getScalarType() &&
"Dot product of vectors need the same element types.");
-[[maybe_unused]] auto *VecTy0 =
-E->getArg(0)->getType()->getAs();
+auto *VecTy0 = E->getArg(0)->getType()->getAs();
[[maybe_unused]] auto *VecTy1 =
E->getArg(1)->getType()->getAs();
// A HLSLVectorTruncation should have happend
@@ -18138,7 +18144,8 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateIntrinsic(
/*ReturnType=*/T0->getScalarType(),
-getDotProductIntrinsic(E->getArg(0)->getType()),
+getDotProductIntrinsic(E->getArg(0)->getType(),
+ VecTy0->getNumElements()),
ArrayRef{Op0, Op1}, nullptr, "dx.dot");
} break;
case Builtin::BI__builtin_hlsl_lerp: {
diff --git a/clang/test/CodeGenHLSL/builtins/dot.hlsl
b/clang/test/CodeGenHLSL/builtins/dot.hlsl
index 0f993193c00cce..307d71cce3cb6d 100644
--- a/clang/test/CodeGenHLSL/builtins/dot.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/dot.hlsl
@@ -110,21 +110,21 @@ uint64_t test_dot_ulong4(uint64_t4 p0, uint64_t4 p1) {
return dot(p0, p1); }
// NO_HALF: ret float %dx.dot
half test_dot_half(half p0, half p1) { return dot(p0, p1); }
-// NATIVE_HALF: %dx.dot = call half @llvm.dx.dot.v2f16(<2 x half> %0, <2 x
half> %1)
+// NATIVE_HALF: %dx.dot = call half @llvm.dx.dot2.v2f16(<2 x half> %0, <2 x
half> %1)
// NATIVE_HALF: ret half %dx.dot
-// NO_HALF: %dx.dot = call float @llvm.dx.dot.v2f32(<2 x float> %0, <2 x
float> %1)
+// NO_HALF: %dx.dot = call float @llvm.dx.dot2.v2f32(<2 x float> %0, <2 x
float> %1)
// NO_HALF: ret float %dx.dot
half test_dot_half2(half2 p0, half2 p1) { return dot(p0, p1); }
-// NATIVE_HALF: %dx.dot = call half @llvm.dx.dot.v3f16(<3 x half> %0, <3 x
half> %1)
+// NATIVE_HALF: %dx.dot = cal
[clang] [llvm] [DXIL] Add Float `Dot` Intrinsic Lowering (PR #86071)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/86071 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL] implement `sqrt` intrinsic (PR #86560)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/86560 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of double intrinsics via the builtins (PR #86555)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86555
>From 29a8e760f348c5a3e4fbd0fa25b2711e12eab301 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Mon, 25 Mar 2024 14:10:07 -0400
Subject: [PATCH 1/2] [HLSL] prevent generation of double intrinsics via the
builtins fixes #86551 closes #86552
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 9 -
clang/lib/Sema/SemaChecking.cpp| 14 ++
.../SemaHLSL/BuiltIns/half-float-only-errors.hlsl | 12
clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl | 6 ++
4 files changed, 32 insertions(+), 9 deletions(-)
create mode 100644 clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
create mode 100644 clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index fcb64fde1b91f1..18472f728eefe0 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -392,15 +392,6 @@ float3 cos(float3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
float4 cos(float4);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
-double cos(double);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
-double2 cos(double2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
-double3 cos(double3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_cos)
-double4 cos(double4);
-
//===--===//
// dot product builtins
//===--===//
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 246e3577809a79..578c2aa26fd6b0 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5624,6 +5624,20 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
TheCall, /*CheckForFloatArgs*/
TheCall->getArg(0)->getType()->hasFloatingRepresentation()))
return true;
+break;
+ }
+ // Note these are llvm builtins that we want to catch invalid intrinsic
+ // generation. Normal handling of these builitns will occur elsewhere.
+ case Builtin::BI__builtin_elementwise_cos:
+ case Builtin::BI__builtin_elementwise_sin:
+ case Builtin::BI__builtin_elementwise_log:
+ case Builtin::BI__builtin_elementwise_log2:
+ case Builtin::BI__builtin_elementwise_log10:
+ case Builtin::BI__builtin_elementwise_pow:
+ case Builtin::BI__builtin_elementwise_trunc: {
+if (CheckFloatOrHalfRepresentations(this, TheCall))
+ return true;
+break;
}
}
return false;
diff --git a/clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
new file mode 100644
index 00..66ab47df51e5e8
--- /dev/null
+++ b/clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sin
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log2
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log10
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_trunc
+
+
+double2 test_double_builtin(double2 p0) {
+return TEST_FUNC(p0);
+ // expected-error@-1 {{passing 'double2' (aka 'vector') to
parameter of incompatible type '__attribute__((__vector_size__(2 *
sizeof(float float' (vector of 2 'float' values)}}
+}
diff --git a/clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl
b/clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl
new file mode 100644
index 00..949028aacf24b6
--- /dev/null
+++ b/clang/test/SemaHLSL/BuiltIns/pow-errors.hlsl
@@ -0,0 +1,6 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm
-disable-llvm-passes -verify
+
+double2 test_double_builtin(double2 p0, double2 p1) {
+return __builtin_elementwise_pow(p0,p1);
+ // expected-error@-1 {{passing 'double2' (aka 'vector') to
parameter of incompatible type '__attribute__((__vector_size__(2 *
sizeof(float float' (
[clang] [HLSL] enforce unsigned types for reversebits (PR #86720)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/86720
fixes #86719
- `SemaChecking.cpp` - Adds unsigned semaChecks to
`__builtin_elementwise_bitreverse`
- `hlsl_intrinsics.h` - remove signed `reversebits` apis
>From 0535f804c10c2c1a089a4c3c061d39b01f0ac0ee Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 26 Mar 2024 15:15:03 -0400
Subject: [PATCH] [HLSL] enforce unsigned types for reversebits fixes #86719
`SemaChecking.cpp` - Adds unsigned semaChecks to
`__builtin_elementwise_bitreverse` `hlsl_intrinsics.h` - remove signed
`reversebits` apis
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 31
clang/lib/Sema/SemaChecking.cpp | 13
.../CodeGenHLSL/builtins/reversebits.hlsl | 75 ---
.../SemaHLSL/BuiltIns/reversebits-errors.hlsl | 12 +++
4 files changed, 25 insertions(+), 106 deletions(-)
create mode 100644 clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 18472f728eefe0..d47eab453f8747 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -1147,19 +1147,6 @@ float4 pow(float4, float4);
/// \param Val The input value.
#ifdef __HLSL_ENABLE_16_BIT
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t reversebits(int16_t);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t2 reversebits(int16_t2);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t3 reversebits(int16_t3);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t4 reversebits(int16_t4);
-
_HLSL_AVAILABILITY(shadermodel, 6.2)
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint16_t reversebits(uint16_t);
@@ -1174,15 +1161,6 @@ _HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint16_t4 reversebits(uint16_t4);
#endif
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int reversebits(int);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int2 reversebits(int2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int3 reversebits(int3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int4 reversebits(int4);
-
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint reversebits(uint);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
@@ -1192,15 +1170,6 @@ uint3 reversebits(uint3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint4 reversebits(uint4);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t reversebits(int64_t);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t2 reversebits(int64_t2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t3 reversebits(int64_t3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t4 reversebits(int64_t4);
-
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint64_t reversebits(uint64_t);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index b4e87b61803234..d8a78cc0019ea4 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5541,6 +5541,14 @@ bool CheckNoDoubleVectors(Sema *S, CallExpr *TheCall) {
checkDoubleVector);
}
+bool CheckUnsignedIntRepresentation(Sema *S, CallExpr *TheCall) {
+ auto checkAllUnsignedTypes = [](clang::QualType PassedType) -> bool {
+return !PassedType->hasUnsignedIntegerRepresentation();
+ };
+ return CheckArgsTypesAreCorrect(S, TheCall, S->Context.UnsignedIntTy,
+ checkAllUnsignedTypes);
+}
+
void SetElementTypeAsReturnType(Sema *S, CallExpr *TheCall,
QualType ReturnType) {
auto *VecTyA = TheCall->getArg(0)->getType()->getAs();
@@ -5628,6 +5636,11 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
}
// Note these are llvm builtins that we want to catch invalid intrinsic
// generation. Normal handling of these builitns will occur elsewhere.
+ case Builtin::BI__builtin_elementwise_bitreverse: {
+if (CheckUnsignedIntRepresentation(this, TheCall))
+ return true;
+break;
+ }
case Builtin::BI__builtin_elementwise_cos:
case Builtin::BI__builtin_elementwise_sin:
case Builtin::BI__builtin_elementwise_log:
diff --git a/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
b/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
index 6da7d289f82e80..a319417e97a436 100644
--- a/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
@@ -3,31 +3,6 @@
// RUN: -emit-llvm -disable-llvm-passes -O3 -o - | FileCheck %s
#ifdef __HLSL_ENABLE_16_BIT
-// CHECK: define noundef i16 @
-// CHECK: call i16 @llvm
[clang] [HLSL] enforce unsigned types for reversebits (PR #86720)
@@ -54,31 +29,6 @@ uint16_t4 test_bitreverse_ushort4(uint16_t4 p0)
}
#endif
-// CHECK: define noundef i32 @
-// CHECK: call i32 @llvm.bitreverse.i32(
-int test_bitreverse_int(int p0)
-{
- return reversebits(p0);
-}
farzonl wrote:
errors specifically
`error: call to 'reversebits' is ambiguous`
because we can't distinguish int16_t, from int from int64_t to know which
unsigned api to use.
https://github.com/llvm/llvm-project/pull/86720
___
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[clang] [HLSL] enforce unsigned types for reversebits (PR #86720)
@@ -54,31 +29,6 @@ uint16_t4 test_bitreverse_ushort4(uint16_t4 p0)
}
#endif
-// CHECK: define noundef i32 @
-// CHECK: call i32 @llvm.bitreverse.i32(
-int test_bitreverse_int(int p0)
-{
- return reversebits(p0);
-}
farzonl wrote:
I noticed the same thing. Hence the discussion on the internal chat. I think
what we want is implicit conversions. I don't think we should be writing the
api in such a way to do that for us.
https://github.com/llvm/llvm-project/pull/86720
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[clang] [HLSL] enforce unsigned types for reversebits (PR #86720)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86720
>From 0535f804c10c2c1a089a4c3c061d39b01f0ac0ee Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 26 Mar 2024 15:15:03 -0400
Subject: [PATCH] [HLSL] enforce unsigned types for reversebits fixes #86719
`SemaChecking.cpp` - Adds unsigned semaChecks to
`__builtin_elementwise_bitreverse` `hlsl_intrinsics.h` - remove signed
`reversebits` apis
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 31
clang/lib/Sema/SemaChecking.cpp | 13
.../CodeGenHLSL/builtins/reversebits.hlsl | 75 ---
.../SemaHLSL/BuiltIns/reversebits-errors.hlsl | 12 +++
4 files changed, 25 insertions(+), 106 deletions(-)
create mode 100644 clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 18472f728eefe0..d47eab453f8747 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -1147,19 +1147,6 @@ float4 pow(float4, float4);
/// \param Val The input value.
#ifdef __HLSL_ENABLE_16_BIT
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t reversebits(int16_t);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t2 reversebits(int16_t2);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t3 reversebits(int16_t3);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t4 reversebits(int16_t4);
-
_HLSL_AVAILABILITY(shadermodel, 6.2)
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint16_t reversebits(uint16_t);
@@ -1174,15 +1161,6 @@ _HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint16_t4 reversebits(uint16_t4);
#endif
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int reversebits(int);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int2 reversebits(int2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int3 reversebits(int3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int4 reversebits(int4);
-
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint reversebits(uint);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
@@ -1192,15 +1170,6 @@ uint3 reversebits(uint3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint4 reversebits(uint4);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t reversebits(int64_t);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t2 reversebits(int64_t2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t3 reversebits(int64_t3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t4 reversebits(int64_t4);
-
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint64_t reversebits(uint64_t);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index b4e87b61803234..d8a78cc0019ea4 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5541,6 +5541,14 @@ bool CheckNoDoubleVectors(Sema *S, CallExpr *TheCall) {
checkDoubleVector);
}
+bool CheckUnsignedIntRepresentation(Sema *S, CallExpr *TheCall) {
+ auto checkAllUnsignedTypes = [](clang::QualType PassedType) -> bool {
+return !PassedType->hasUnsignedIntegerRepresentation();
+ };
+ return CheckArgsTypesAreCorrect(S, TheCall, S->Context.UnsignedIntTy,
+ checkAllUnsignedTypes);
+}
+
void SetElementTypeAsReturnType(Sema *S, CallExpr *TheCall,
QualType ReturnType) {
auto *VecTyA = TheCall->getArg(0)->getType()->getAs();
@@ -5628,6 +5636,11 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
}
// Note these are llvm builtins that we want to catch invalid intrinsic
// generation. Normal handling of these builitns will occur elsewhere.
+ case Builtin::BI__builtin_elementwise_bitreverse: {
+if (CheckUnsignedIntRepresentation(this, TheCall))
+ return true;
+break;
+ }
case Builtin::BI__builtin_elementwise_cos:
case Builtin::BI__builtin_elementwise_sin:
case Builtin::BI__builtin_elementwise_log:
diff --git a/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
b/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
index 6da7d289f82e80..a319417e97a436 100644
--- a/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
@@ -3,31 +3,6 @@
// RUN: -emit-llvm -disable-llvm-passes -O3 -o - | FileCheck %s
#ifdef __HLSL_ENABLE_16_BIT
-// CHECK: define noundef i16 @
-// CHECK: call i16 @llvm.bitreverse.i16(
-int16_t test_bitreverse_short(int16_t p0)
-{
- return reversebits(p0);
-}
-// CHECK: define noundef <2 x i16> @
-// CHECK: call <2 x i1
[clang] [HLSL] enforce unsigned types for reversebits (PR #86720)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86720
>From 13296921ee46ab93d703eb7446479ce8aa7fadce Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 26 Mar 2024 15:15:03 -0400
Subject: [PATCH] [HLSL] enforce unsigned types for reversebits fixes #86719
`SemaChecking.cpp` - Adds unsigned semaChecks to
`__builtin_elementwise_bitreverse` `hlsl_intrinsics.h` - remove signed
`reversebits` apis
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 31
clang/lib/Sema/SemaChecking.cpp | 13
.../CodeGenHLSL/builtins/reversebits.hlsl | 75 ---
.../SemaHLSL/BuiltIns/reversebits-errors.hlsl | 12 +++
4 files changed, 25 insertions(+), 106 deletions(-)
create mode 100644 clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 18472f728eefe0..d47eab453f8747 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -1147,19 +1147,6 @@ float4 pow(float4, float4);
/// \param Val The input value.
#ifdef __HLSL_ENABLE_16_BIT
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t reversebits(int16_t);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t2 reversebits(int16_t2);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t3 reversebits(int16_t3);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t4 reversebits(int16_t4);
-
_HLSL_AVAILABILITY(shadermodel, 6.2)
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint16_t reversebits(uint16_t);
@@ -1174,15 +1161,6 @@ _HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint16_t4 reversebits(uint16_t4);
#endif
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int reversebits(int);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int2 reversebits(int2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int3 reversebits(int3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int4 reversebits(int4);
-
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint reversebits(uint);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
@@ -1192,15 +1170,6 @@ uint3 reversebits(uint3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint4 reversebits(uint4);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t reversebits(int64_t);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t2 reversebits(int64_t2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t3 reversebits(int64_t3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t4 reversebits(int64_t4);
-
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint64_t reversebits(uint64_t);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 08449581330934..dedbd3a737de2e 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5541,6 +5541,14 @@ bool CheckNoDoubleVectors(Sema *S, CallExpr *TheCall) {
checkDoubleVector);
}
+bool CheckUnsignedIntRepresentation(Sema *S, CallExpr *TheCall) {
+ auto checkAllUnsignedTypes = [](clang::QualType PassedType) -> bool {
+return !PassedType->hasUnsignedIntegerRepresentation();
+ };
+ return CheckArgsTypesAreCorrect(S, TheCall, S->Context.UnsignedIntTy,
+ checkAllUnsignedTypes);
+}
+
void SetElementTypeAsReturnType(Sema *S, CallExpr *TheCall,
QualType ReturnType) {
auto *VecTyA = TheCall->getArg(0)->getType()->getAs();
@@ -5628,6 +5636,11 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
}
// Note these are llvm builtins that we want to catch invalid intrinsic
// generation. Normal handling of these builitns will occur elsewhere.
+ case Builtin::BI__builtin_elementwise_bitreverse: {
+if (CheckUnsignedIntRepresentation(this, TheCall))
+ return true;
+break;
+ }
case Builtin::BI__builtin_elementwise_cos:
case Builtin::BI__builtin_elementwise_sin:
case Builtin::BI__builtin_elementwise_log:
diff --git a/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
b/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
index 6da7d289f82e80..a319417e97a436 100644
--- a/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
@@ -3,31 +3,6 @@
// RUN: -emit-llvm -disable-llvm-passes -O3 -o - | FileCheck %s
#ifdef __HLSL_ENABLE_16_BIT
-// CHECK: define noundef i16 @
-// CHECK: call i16 @llvm.bitreverse.i16(
-int16_t test_bitreverse_short(int16_t p0)
-{
- return reversebits(p0);
-}
-// CHECK: define noundef <2 x i16> @
-// CHECK: call <2 x i1
[clang] [HLSL] enforce unsigned types for reversebits (PR #86720)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/86720
>From 13296921ee46ab93d703eb7446479ce8aa7fadce Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Tue, 26 Mar 2024 15:15:03 -0400
Subject: [PATCH 1/2] [HLSL] enforce unsigned types for reversebits fixes
#86719 `SemaChecking.cpp` - Adds unsigned semaChecks to
`__builtin_elementwise_bitreverse` `hlsl_intrinsics.h` - remove signed
`reversebits` apis
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 31
clang/lib/Sema/SemaChecking.cpp | 13
.../CodeGenHLSL/builtins/reversebits.hlsl | 75 ---
.../SemaHLSL/BuiltIns/reversebits-errors.hlsl | 12 +++
4 files changed, 25 insertions(+), 106 deletions(-)
create mode 100644 clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 18472f728eefe0..d47eab453f8747 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -1147,19 +1147,6 @@ float4 pow(float4, float4);
/// \param Val The input value.
#ifdef __HLSL_ENABLE_16_BIT
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t reversebits(int16_t);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t2 reversebits(int16_t2);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t3 reversebits(int16_t3);
-_HLSL_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int16_t4 reversebits(int16_t4);
-
_HLSL_AVAILABILITY(shadermodel, 6.2)
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint16_t reversebits(uint16_t);
@@ -1174,15 +1161,6 @@ _HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint16_t4 reversebits(uint16_t4);
#endif
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int reversebits(int);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int2 reversebits(int2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int3 reversebits(int3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int4 reversebits(int4);
-
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint reversebits(uint);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
@@ -1192,15 +1170,6 @@ uint3 reversebits(uint3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint4 reversebits(uint4);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t reversebits(int64_t);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t2 reversebits(int64_t2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t3 reversebits(int64_t3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
-int64_t4 reversebits(int64_t4);
-
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
uint64_t reversebits(uint64_t);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_bitreverse)
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 08449581330934..dedbd3a737de2e 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5541,6 +5541,14 @@ bool CheckNoDoubleVectors(Sema *S, CallExpr *TheCall) {
checkDoubleVector);
}
+bool CheckUnsignedIntRepresentation(Sema *S, CallExpr *TheCall) {
+ auto checkAllUnsignedTypes = [](clang::QualType PassedType) -> bool {
+return !PassedType->hasUnsignedIntegerRepresentation();
+ };
+ return CheckArgsTypesAreCorrect(S, TheCall, S->Context.UnsignedIntTy,
+ checkAllUnsignedTypes);
+}
+
void SetElementTypeAsReturnType(Sema *S, CallExpr *TheCall,
QualType ReturnType) {
auto *VecTyA = TheCall->getArg(0)->getType()->getAs();
@@ -5628,6 +5636,11 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
}
// Note these are llvm builtins that we want to catch invalid intrinsic
// generation. Normal handling of these builitns will occur elsewhere.
+ case Builtin::BI__builtin_elementwise_bitreverse: {
+if (CheckUnsignedIntRepresentation(this, TheCall))
+ return true;
+break;
+ }
case Builtin::BI__builtin_elementwise_cos:
case Builtin::BI__builtin_elementwise_sin:
case Builtin::BI__builtin_elementwise_log:
diff --git a/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
b/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
index 6da7d289f82e80..a319417e97a436 100644
--- a/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/reversebits.hlsl
@@ -3,31 +3,6 @@
// RUN: -emit-llvm -disable-llvm-passes -O3 -o - | FileCheck %s
#ifdef __HLSL_ENABLE_16_BIT
-// CHECK: define noundef i16 @
-// CHECK: call i16 @llvm.bitreverse.i16(
-int16_t test_bitreverse_short(int16_t p0)
-{
- return reversebits(p0);
-}
-// CHECK: define noundef <2 x i16> @
-// CHECK: call <2
[clang] [HLSL] enforce unsigned types for reversebits (PR #86720)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/86720 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of double intrinsics. (PR #86932)
farzonl wrote: I was writing up a ticket for floor and ceil. Nice catch! https://godbolt.org/z/q9a644e6W. https://github.com/llvm/llvm-project/pull/86932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of double intrinsics. (PR #86932)
@@ -1,12 +1,13 @@ -// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos -// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sin +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_ceil +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_floor // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log2 // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log10 +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sin // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sqrt // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_trunc farzonl wrote: in semaChecking You added `__builtin_elementwise_exp` and `__builtin_elementwise_exp2` you should add them to the tests https://github.com/llvm/llvm-project/pull/86932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of double intrinsics. (PR #86932)
farzonl wrote: So keep in mind there are some double cases that are valid for hlsl. so always check via dxc which can be easily used via [hlsl.godbolt](https://hlsl.godbolt.org/). https://github.com/llvm/llvm-project/pull/86932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of double intrinsics. (PR #86932)
@@ -1,12 +1,13 @@ -// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos -// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sin +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_ceil +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_floor // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log2 // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log10 +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sin // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sqrt // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_trunc farzonl wrote: `exp-errors.hlsl` covers clangs behavior of exp elementwise builtins. The `CheckHLSLBuiltinFunctionCall` function you added `exp` \ `exp2` is used to apply hlsl specific behaviors. Since this is a deviation from normal behvaior of the elementwise builtin it would be better to add the tests to `half-float-only-errors.hlsl` https://github.com/llvm/llvm-project/pull/86932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of double intrinsics. (PR #86932)
@@ -1,12 +1,13 @@ -// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos -// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sin +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_ceil +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_cos +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_floor // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log2 // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_log10 +// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sin // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_sqrt // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -verify -DTEST_FUNC=__builtin_elementwise_trunc farzonl wrote: There are a few expections to this rule `half-float-only-errors.hlsl` only covers unary functions. Since there weren't enough binary cases pow got its own file. https://github.com/llvm/llvm-project/pull/86932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of wrong double intrinsics. (PR #86932)
https://github.com/farzonl approved this pull request. https://github.com/llvm/llvm-project/pull/86932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of wrong double intrinsics. (PR #86932)
farzonl wrote: > thanks for review! can you merge that? Our process is two reviewers. I will after one more person takes a look. https://github.com/llvm/llvm-project/pull/86932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [HLSL] prevent generation of wrong double intrinsics. (PR #86932)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/86932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87034)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/87034
DO NOT MERGE
This is part of a proposal for how to unify spir-v and DirectX intrinsics.
The issue tracking this work is: #83882
>From 8f7fb8ece073c251f78a2133b42d8baccb89c7f3 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 7 +
clang/lib/CodeGen/CGHLSLRuntime.cpp | 5 +-
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 112 +
clang/lib/Sema/SemaChecking.cpp | 1 +
clang/test/CodeGenHLSL/builtins/all.hlsl | 233 ++
.../semantics/DispatchThreadID.hlsl | 13 +-
llvm/include/llvm/IR/CMakeLists.txt | 1 +
llvm/include/llvm/IR/Intrinsics.td| 1 +
llvm/include/llvm/IR/IntrinsicsDirectX.td | 1 -
llvm/include/llvm/IR/IntrinsicsHLSL.td| 17 ++
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 1 -
llvm/lib/IR/Function.cpp | 1 +
llvm/lib/Target/DirectX/DXIL.td | 2 +-
llvm/lib/Target/DirectX/DXILOpLowering.cpp| 1 +
.../Target/SPIRV/SPIRVInstructionSelector.cpp | 36 ++-
llvm/test/CodeGen/DirectX/comput_ids.ll | 4 +-
.../hlsl-intrinsics/SV_DispatchThreadID.ll| 8 +-
.../test/CodeGen/SPIRV/hlsl-intrinsics/all.ll | 95 +++
.../secondary/llvm/include/llvm/IR/BUILD.gn | 5 +
20 files changed, 522 insertions(+), 28 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/all.hlsl
create mode 100644 llvm/include/llvm/IR/IntrinsicsHLSL.td
create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index f421223ff087de..d6ceb450bd106b 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4587,6 +4587,12 @@ def GetDeviceSideMangledName : LangBuiltin<"CUDA_LANG"> {
}
// HLSL
+def HLSLAll : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_all"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "bool(...)";
+}
+
def HLSLAny : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_elementwise_any"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 287e763bad82dd..0a6d6b91c51e6f 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -45,6 +45,7 @@
#include "llvm/IR/IntrinsicsARM.h"
#include "llvm/IR/IntrinsicsBPF.h"
#include "llvm/IR/IntrinsicsDirectX.h"
+#include "llvm/IR/IntrinsicsHLSL.h"
#include "llvm/IR/IntrinsicsHexagon.h"
#include "llvm/IR/IntrinsicsNVPTX.h"
#include "llvm/IR/IntrinsicsPowerPC.h"
@@ -18192,6 +18193,12 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
return nullptr;
switch (BuiltinID) {
+ case Builtin::BI__builtin_hlsl_elementwise_all: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+return Builder.CreateIntrinsic(
+/*ReturnType=*/llvm::Type::getInt1Ty(getLLVMContext()),
+Intrinsic::hlsl_all, ArrayRef{Op0}, nullptr, "hlsl.all");
+ }
case Builtin::BI__builtin_hlsl_elementwise_any: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
return Builder.CreateIntrinsic(
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp
b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 794d93358b0a4c..da5424e77fcdf0 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -18,6 +18,7 @@
#include "clang/AST/Decl.h"
#include "clang/Basic/TargetOptions.h"
#include "llvm/IR/IntrinsicsDirectX.h"
+#include "llvm/IR/IntrinsicsHLSL.h"
#include "llvm/IR/IntrinsicsSPIRV.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
@@ -346,10 +347,8 @@ llvm::Value *CGHLSLRuntime::emitInputSemantic(IRBuilder<>
&B,
llvm::Function *ThreadIDIntrinsic;
switch (CGM.getTarget().getTriple().getArch()) {
case llvm::Triple::dxil:
- ThreadIDIntrinsic = CGM.getIntrinsic(Intrinsic::dx_thread_id);
- break;
case llvm::Triple::spirv:
- ThreadIDIntrinsic = CGM.getIntrinsic(Intrinsic::spv_thread_id);
+ ThreadIDIntrinsic = CGM.getIntrinsic(Intrinsic::hlsl_thread_id);
break;
default:
llvm_unreachable("Input semantic not supported by target");
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index a34e72402c0e64..762823de523aaa 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -100,6 +100,118 @@ double3 abs(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
double4 abs(double4);
+//===--===//
+// all builtins
+//===-
[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)
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Message-ID:
In-Reply-To:
@@ -5803,6 +5887,15 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
{NDRange, Kernel, Block}));
}
+ case Builtin::BI__builtin_hlsl_wave_get_lane_index: {
farzonl wrote:
I missed this PR. Can you move this to `Value
*CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID, const CallExpr *E)`
https://github.com/llvm/llvm-project/pull/80680
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[clang] [llvm] [HLSL][DXIL] HLSL's `round` should follow `roundeven` behavior (PR #87078)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/87078
fixes #86999
>From bbb30f792bb9fb28f68079146783d6e8d1f0682b Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Fri, 29 Mar 2024 10:44:37 -0400
Subject: [PATCH] [HLSL][DXIL] HLSL's `round` should follow `roundeven`
behavior fixes #86999
---
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 16 +++
clang/lib/Sema/SemaChecking.cpp | 1 +
clang/test/CodeGenHLSL/builtins/round.hlsl| 48 +--
.../BuiltIns/half-float-only-errors.hlsl | 1 +
llvm/lib/Target/DirectX/DXIL.td | 2 +-
llvm/test/CodeGen/DirectX/round.ll| 35 +-
llvm/test/CodeGen/DirectX/round_error.ll | 4 +-
7 files changed, 50 insertions(+), 57 deletions(-)
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index a34e72402c0e64..9fb6204f90c9a8 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -1248,25 +1248,25 @@ float4 rsqrt(float4);
/// rounded to the nearest even value.
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_round)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_roundeven)
half round(half);
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_round)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_roundeven)
half2 round(half2);
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_round)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_roundeven)
half3 round(half3);
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_round)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_roundeven)
half4 round(half4);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_round)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_roundeven)
float round(float);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_round)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_roundeven)
float2 round(float2);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_round)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_roundeven)
float3 round(float3);
-_HLSL_BUILTIN_ALIAS(__builtin_elementwise_round)
+_HLSL_BUILTIN_ALIAS(__builtin_elementwise_roundeven)
float4 round(float4);
//===--===//
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 2e4e18a3ebf759..2684535d8e53d1 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5650,6 +5650,7 @@ bool Sema::CheckHLSLBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
case Builtin::BI__builtin_elementwise_log2:
case Builtin::BI__builtin_elementwise_log10:
case Builtin::BI__builtin_elementwise_pow:
+ case Builtin::BI__builtin_elementwise_roundeven:
case Builtin::BI__builtin_elementwise_sin:
case Builtin::BI__builtin_elementwise_sqrt:
case Builtin::BI__builtin_elementwise_trunc: {
diff --git a/clang/test/CodeGenHLSL/builtins/round.hlsl
b/clang/test/CodeGenHLSL/builtins/round.hlsl
index b9f35bd3712d18..33d761dbdfbeae 100644
--- a/clang/test/CodeGenHLSL/builtins/round.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/round.hlsl
@@ -7,47 +7,47 @@
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
// NATIVE_HALF: define noundef half @
-// NATIVE_HALF: %elt.round = call half @llvm.round.f16(
-// NATIVE_HALF: ret half %elt.round
+// NATIVE_HALF: %elt.roundeven = call half @llvm.roundeven.f16(
+// NATIVE_HALF: ret half %elt.roundeven
// NO_HALF: define noundef float @"?test_round_half@@YA$halff@$halff@@Z"(
-// NO_HALF: %elt.round = call float @llvm.round.f32(
-// NO_HALF: ret float %elt.round
+// NO_HALF: %elt.roundeven = call float @llvm.roundeven.f32(
+// NO_HALF: ret float %elt.roundeven
half test_round_half(half p0) { return round(p0); }
// NATIVE_HALF: define noundef <2 x half> @
-// NATIVE_HALF: %elt.round = call <2 x half> @llvm.round.v2f16
-// NATIVE_HALF: ret <2 x half> %elt.round
+// NATIVE_HALF: %elt.roundeven = call <2 x half> @llvm.roundeven.v2f16
+// NATIVE_HALF: ret <2 x half> %elt.roundeven
// NO_HALF: define noundef <2 x float> @
-// NO_HALF: %elt.round = call <2 x float> @llvm.round.v2f32(
-// NO_HALF: ret <2 x float> %elt.round
+// NO_HALF: %elt.roundeven = call <2 x float> @llvm.roundeven.v2f32(
+// NO_HALF: ret <2 x float> %elt.roundeven
half2 test_round_half2(half2 p0) { return round(p0); }
// NATIVE_HALF: define noundef <3 x half> @
-// NATIVE_HALF: %elt.round = call <3 x half> @llvm.round.v3f16
-// NATIVE_HALF: ret <3 x half> %elt.round
+// NATIVE_HALF: %elt.roundeven = call <3 x half> @llvm.roundeven.v3f16
+// NATIVE_HALF: ret <3 x half> %elt.roundeven
// NO_HALF: define noundef <3 x float> @
-// NO_HALF: %elt.round = call <3 x float> @llvm.round.v3f32(
-// NO_HALF: ret <3 x float> %elt.round
+// NO_HALF: %elt.roundeven = call <3 x float> @llvm.roundeven.v3f32(
+// NO_HALF: ret <3
[clang] [llvm] [HLSL][DXIL] HLSL's `round` should follow `roundeven` behavior (PR #87078)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/87078 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87034)
https://github.com/farzonl closed https://github.com/llvm/llvm-project/pull/87034 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang] Move hlsl_wave_get_lane_index to EmitHLSLBuiltinExpr (PR #87131)
@@ -18317,6 +18307,14 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_rsqrt,
ArrayRef{Op0}, nullptr, "dx.rsqrt");
}
+ case Builtin::BI__builtin_hlsl_wave_get_lane_index: {
+auto *CI = EmitRuntimeCall(CGM.CreateRuntimeFunction(
+llvm::FunctionType::get(IntTy, {}, false),
"__hlsl_wave_get_lane_index",
+{}, false, true));
+if (getTarget().getTriple().isSPIRVLogical())
+ CI = dyn_cast(addControlledConvergenceToken(CI));
+return RValue::get(CI);
farzonl wrote:
this isn't going to work we don't return RValues from this function that
happens later see:
https://github.com/llvm/llvm-project/blob/a8b0ecd2605ff23f495a8af64e06c35f86834e54/clang/lib/CodeGen/CGBuiltin.cpp#L6192C3-L6193C27
https://github.com/llvm/llvm-project/pull/87131
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[clang] [Clang] Move hlsl_wave_get_lane_index to EmitHLSLBuiltinExpr (PR #87131)
@@ -18317,6 +18307,14 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
/*ReturnType=*/Op0->getType(), Intrinsic::dx_rsqrt,
ArrayRef{Op0}, nullptr, "dx.rsqrt");
}
+ case Builtin::BI__builtin_hlsl_wave_get_lane_index: {
+auto *CI = EmitRuntimeCall(CGM.CreateRuntimeFunction(
+llvm::FunctionType::get(IntTy, {}, false),
"__hlsl_wave_get_lane_index",
+{}, false, true));
+if (getTarget().getTriple().isSPIRVLogical())
+ CI = dyn_cast(addControlledConvergenceToken(CI));
+return RValue::get(CI);
farzonl wrote:
Please build the project and run the hlsl lit tests
https://github.com/llvm/llvm-project/pull/87131
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[clang] [clang][HLSL] Move hlsl_wave_get_lane_index to EmitHLSLBuiltinExpr (PR #87131)
farzonl wrote: Hi @marcauberer The change looks good. I'm 99% sure this won't have an effect on the SPIRV backend, however there is still that 1% chance it does. The tests I want to check landed in this PR https://github.com/llvm/llvm-project/pull/85979/files For convenience this is what you can pass to `llvm-lit`: - llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveGetLaneIndex.ll (really this one is the one im concerned about) - llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll - llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll Since you aren't changing anything in the SPIRV backend the github action didn't trigger. So if you could do one of two things after I approve, I would appreciate it, Option 1: build spirv backend and test the above test cases Should be a straight forward build ``` cmake -B -G Ninja -S llvm -DLLVM_ENABLE_PROJECTS="llvm;clang" -DCMAKE_C_COMPILER=clang -DCMAKE_CXX_COMPILER=clang++ -DCMAKE_BUILD_TYPE=Debug -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=SPIRV -DLLVM_INCLUDE_SPIRV_TOOLS_TESTS=ON ``` Option 2: watch or trigger the SPIR_V Test github actions https://github.com/llvm/llvm-project/actions/workflows/spirv-tests.yml make sure the tests pass if they don't and it is one of the tests listed above you might have to revert your change. https://github.com/llvm/llvm-project/pull/87131 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [clang][HLSL] Move hlsl_wave_get_lane_index to EmitHLSLBuiltinExpr (PR #87131)
https://github.com/farzonl approved this pull request. https://github.com/llvm/llvm-project/pull/87131 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [clang][HLSL] Move hlsl_wave_get_lane_index to EmitHLSLBuiltinExpr (PR #87131)
farzonl wrote: minor nit pick, you don't have to do this one: could you make the HLSL prefix first. It helps with some bookeeping we are doing. https://github.com/llvm/llvm-project/pull/87131 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/87171
DO NOT MERGE
This is part of a proposal for how to unify spir-v and DirectX intrinsics.
The issue tracking this work is: #83882
>From 02a78955fc1ccb78690b0cd87de51f73cf8785de Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 19 ++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 112 +++
clang/lib/Sema/SemaChecking.cpp | 1 +
clang/test/CodeGenHLSL/builtins/all.hlsl | 277 ++
llvm/include/llvm/IR/Intrinsics.td| 12 +
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 +-
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 3 +-
.../Target/SPIRV/SPIRVInstructionSelector.cpp | 19 ++
.../test/CodeGen/SPIRV/hlsl-intrinsics/all.ll | 95 ++
10 files changed, 545 insertions(+), 3 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/all.hlsl
create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index f421223ff087de..d6ceb450bd106b 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4587,6 +4587,12 @@ def GetDeviceSideMangledName : LangBuiltin<"CUDA_LANG"> {
}
// HLSL
+def HLSLAll : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_all"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "bool(...)";
+}
+
def HLSLAny : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_elementwise_any"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index bb007231c0b783..add7ec1fa0eb45 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -51,6 +51,7 @@
#include "llvm/IR/IntrinsicsR600.h"
#include "llvm/IR/IntrinsicsRISCV.h"
#include "llvm/IR/IntrinsicsS390.h"
+#include "llvm/IR/IntrinsicsSPIRV.h"
#include "llvm/IR/IntrinsicsVE.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/IR/IntrinsicsX86.h"
@@ -18176,12 +18177,30 @@ Intrinsic::ID getDotProductIntrinsic(QualType QT, int
elementCount) {
return Intrinsic::dx_udot;
}
+Intrinsic::ID getAllIntrinsic(const llvm::Triple::ArchType Arch) {
+ switch (Arch) {
+ case llvm::Triple::dxil:
+return Intrinsic::dx_all;
+ case llvm::Triple::spirv:
+return Intrinsic::spv_all;
+ default:
+llvm_unreachable("Input semantic not supported by target");
+ }
+}
+
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
const CallExpr *E) {
if (!getLangOpts().HLSL)
return nullptr;
switch (BuiltinID) {
+ case Builtin::BI__builtin_hlsl_elementwise_all: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+return Builder.CreateIntrinsic(
+/*ReturnType=*/llvm::Type::getInt1Ty(getLLVMContext()),
+getAllIntrinsic(CGM.getTarget().getTriple().getArch()),
+ArrayRef{Op0}, nullptr, "hlsl.all");
+ }
case Builtin::BI__builtin_hlsl_elementwise_any: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
return Builder.CreateIntrinsic(
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 9fb6204f90c9a8..06409c6fc77417 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -100,6 +100,118 @@ double3 abs(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
double4 abs(double4);
+//===--===//
+// all builtins
+//===--===//
+
+/// \fn bool all(T x)
+/// \brief Returns True if all components of the \a x parameter are non-zero;
+/// otherwise, false. \param x The input value.
+
+#ifdef __HLSL_ENABLE_16_BIT
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t4);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t4)
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
@@ -18176,12 +18177,30 @@ Intrinsic::ID getDotProductIntrinsic(QualType QT, int
elementCount) {
return Intrinsic::dx_udot;
}
+Intrinsic::ID getAllIntrinsic(const llvm::Triple::ArchType Arch) {
farzonl wrote:
this is a simple memchanism since we are only doing one intrinsic.
Long term EmitHLSLBuiltinExpr may need to invoke a map using
`llvm::Triple::ArchType Arch` ie a arch map of intrinsic maps. righting the
same switch statement over and over again to pick the right intrinsics could
become tedious.
```
spv_intrinsic =
archMap[llvm::Triple::spirv][Builtin::BI__builtin_hlsl_elementwise_all] -->
Intrinsic::spv_all;
dx_intrinsic =
archMap[llvm::Triple::dxil][Builtin::BI__builtin_hlsl_elementwise_all] -->
Intrinsic::dx_all;
```
https://github.com/llvm/llvm-project/pull/87171
___
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[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/87171
>From dcf4896ca4d86a34a731f31e7dc42e271a62a02f Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 19 ++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 112 +++
clang/lib/Sema/SemaChecking.cpp | 1 +
clang/test/CodeGenHLSL/builtins/all.hlsl | 277 ++
llvm/include/llvm/IR/Intrinsics.td| 12 +
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 +-
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 3 +-
.../Target/SPIRV/SPIRVInstructionSelector.cpp | 19 ++
.../test/CodeGen/SPIRV/hlsl-intrinsics/all.ll | 95 ++
10 files changed, 545 insertions(+), 3 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/all.hlsl
create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index f421223ff087de..d6ceb450bd106b 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4587,6 +4587,12 @@ def GetDeviceSideMangledName : LangBuiltin<"CUDA_LANG"> {
}
// HLSL
+def HLSLAll : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_all"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "bool(...)";
+}
+
def HLSLAny : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_elementwise_any"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index bb007231c0b783..add7ec1fa0eb45 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -51,6 +51,7 @@
#include "llvm/IR/IntrinsicsR600.h"
#include "llvm/IR/IntrinsicsRISCV.h"
#include "llvm/IR/IntrinsicsS390.h"
+#include "llvm/IR/IntrinsicsSPIRV.h"
#include "llvm/IR/IntrinsicsVE.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/IR/IntrinsicsX86.h"
@@ -18176,12 +18177,30 @@ Intrinsic::ID getDotProductIntrinsic(QualType QT, int
elementCount) {
return Intrinsic::dx_udot;
}
+Intrinsic::ID getAllIntrinsic(const llvm::Triple::ArchType Arch) {
+ switch (Arch) {
+ case llvm::Triple::dxil:
+return Intrinsic::dx_all;
+ case llvm::Triple::spirv:
+return Intrinsic::spv_all;
+ default:
+llvm_unreachable("Input semantic not supported by target");
+ }
+}
+
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
const CallExpr *E) {
if (!getLangOpts().HLSL)
return nullptr;
switch (BuiltinID) {
+ case Builtin::BI__builtin_hlsl_elementwise_all: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+return Builder.CreateIntrinsic(
+/*ReturnType=*/llvm::Type::getInt1Ty(getLLVMContext()),
+getAllIntrinsic(CGM.getTarget().getTriple().getArch()),
+ArrayRef{Op0}, nullptr, "hlsl.all");
+ }
case Builtin::BI__builtin_hlsl_elementwise_any: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
return Builder.CreateIntrinsic(
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 9fb6204f90c9a8..06409c6fc77417 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -100,6 +100,118 @@ double3 abs(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
double4 abs(double4);
+//===--===//
+// all builtins
+//===--===//
+
+/// \fn bool all(T x)
+/// \brief Returns True if all components of the \a x parameter are non-zero;
+/// otherwise, false. \param x The input value.
+
+#ifdef __HLSL_ENABLE_16_BIT
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t4);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t4);
+#endif
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(half);
+_HLSL_16BIT_AV
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/87171
>From dcf4896ca4d86a34a731f31e7dc42e271a62a02f Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH 1/2] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 19 ++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 112 +++
clang/lib/Sema/SemaChecking.cpp | 1 +
clang/test/CodeGenHLSL/builtins/all.hlsl | 277 ++
llvm/include/llvm/IR/Intrinsics.td| 12 +
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 +-
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 3 +-
.../Target/SPIRV/SPIRVInstructionSelector.cpp | 19 ++
.../test/CodeGen/SPIRV/hlsl-intrinsics/all.ll | 95 ++
10 files changed, 545 insertions(+), 3 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/all.hlsl
create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index f421223ff087de..d6ceb450bd106b 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4587,6 +4587,12 @@ def GetDeviceSideMangledName : LangBuiltin<"CUDA_LANG"> {
}
// HLSL
+def HLSLAll : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_all"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "bool(...)";
+}
+
def HLSLAny : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_elementwise_any"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index bb007231c0b783..add7ec1fa0eb45 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -51,6 +51,7 @@
#include "llvm/IR/IntrinsicsR600.h"
#include "llvm/IR/IntrinsicsRISCV.h"
#include "llvm/IR/IntrinsicsS390.h"
+#include "llvm/IR/IntrinsicsSPIRV.h"
#include "llvm/IR/IntrinsicsVE.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/IR/IntrinsicsX86.h"
@@ -18176,12 +18177,30 @@ Intrinsic::ID getDotProductIntrinsic(QualType QT, int
elementCount) {
return Intrinsic::dx_udot;
}
+Intrinsic::ID getAllIntrinsic(const llvm::Triple::ArchType Arch) {
+ switch (Arch) {
+ case llvm::Triple::dxil:
+return Intrinsic::dx_all;
+ case llvm::Triple::spirv:
+return Intrinsic::spv_all;
+ default:
+llvm_unreachable("Input semantic not supported by target");
+ }
+}
+
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
const CallExpr *E) {
if (!getLangOpts().HLSL)
return nullptr;
switch (BuiltinID) {
+ case Builtin::BI__builtin_hlsl_elementwise_all: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+return Builder.CreateIntrinsic(
+/*ReturnType=*/llvm::Type::getInt1Ty(getLLVMContext()),
+getAllIntrinsic(CGM.getTarget().getTriple().getArch()),
+ArrayRef{Op0}, nullptr, "hlsl.all");
+ }
case Builtin::BI__builtin_hlsl_elementwise_any: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
return Builder.CreateIntrinsic(
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 9fb6204f90c9a8..06409c6fc77417 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -100,6 +100,118 @@ double3 abs(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
double4 abs(double4);
+//===--===//
+// all builtins
+//===--===//
+
+/// \fn bool all(T x)
+/// \brief Returns True if all components of the \a x parameter are non-zero;
+/// otherwise, false. \param x The input value.
+
+#ifdef __HLSL_ENABLE_16_BIT
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t4);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t4);
+#endif
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(half);
+_HLSL_16BI
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl updated
https://github.com/llvm/llvm-project/pull/87171
>From 47518b4172cef216f1cc84e54b65e979b4c679c2 Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 28 Mar 2024 21:05:36 -0400
Subject: [PATCH 1/2] [HLSL][DXIL][SPIRV] Intrinsic unification PR
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 19 ++
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 112 +++
clang/lib/Sema/SemaChecking.cpp | 1 +
clang/test/CodeGenHLSL/builtins/all.hlsl | 277 ++
llvm/include/llvm/IR/Intrinsics.td| 12 +
llvm/include/llvm/IR/IntrinsicsDirectX.td | 4 +-
llvm/include/llvm/IR/IntrinsicsSPIRV.td | 3 +-
.../Target/SPIRV/SPIRVInstructionSelector.cpp | 19 ++
.../test/CodeGen/SPIRV/hlsl-intrinsics/all.ll | 95 ++
10 files changed, 545 insertions(+), 3 deletions(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/all.hlsl
create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/all.ll
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index f421223ff087de..d6ceb450bd106b 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4587,6 +4587,12 @@ def GetDeviceSideMangledName : LangBuiltin<"CUDA_LANG"> {
}
// HLSL
+def HLSLAll : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_elementwise_all"];
+ let Attributes = [NoThrow, Const];
+ let Prototype = "bool(...)";
+}
+
def HLSLAny : LangBuiltin<"HLSL_LANG"> {
let Spellings = ["__builtin_hlsl_elementwise_any"];
let Attributes = [NoThrow, Const];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index bb007231c0b783..add7ec1fa0eb45 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -51,6 +51,7 @@
#include "llvm/IR/IntrinsicsR600.h"
#include "llvm/IR/IntrinsicsRISCV.h"
#include "llvm/IR/IntrinsicsS390.h"
+#include "llvm/IR/IntrinsicsSPIRV.h"
#include "llvm/IR/IntrinsicsVE.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/IR/IntrinsicsX86.h"
@@ -18176,12 +18177,30 @@ Intrinsic::ID getDotProductIntrinsic(QualType QT, int
elementCount) {
return Intrinsic::dx_udot;
}
+Intrinsic::ID getAllIntrinsic(const llvm::Triple::ArchType Arch) {
+ switch (Arch) {
+ case llvm::Triple::dxil:
+return Intrinsic::dx_all;
+ case llvm::Triple::spirv:
+return Intrinsic::spv_all;
+ default:
+llvm_unreachable("Input semantic not supported by target");
+ }
+}
+
Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
const CallExpr *E) {
if (!getLangOpts().HLSL)
return nullptr;
switch (BuiltinID) {
+ case Builtin::BI__builtin_hlsl_elementwise_all: {
+Value *Op0 = EmitScalarExpr(E->getArg(0));
+return Builder.CreateIntrinsic(
+/*ReturnType=*/llvm::Type::getInt1Ty(getLLVMContext()),
+getAllIntrinsic(CGM.getTarget().getTriple().getArch()),
+ArrayRef{Op0}, nullptr, "hlsl.all");
+ }
case Builtin::BI__builtin_hlsl_elementwise_any: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
return Builder.CreateIntrinsic(
diff --git a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
index 9fb6204f90c9a8..06409c6fc77417 100644
--- a/clang/lib/Headers/hlsl/hlsl_intrinsics.h
+++ b/clang/lib/Headers/hlsl/hlsl_intrinsics.h
@@ -100,6 +100,118 @@ double3 abs(double3);
_HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs)
double4 abs(double4);
+//===--===//
+// all builtins
+//===--===//
+
+/// \fn bool all(T x)
+/// \brief Returns True if all components of the \a x parameter are non-zero;
+/// otherwise, false. \param x The input value.
+
+#ifdef __HLSL_ENABLE_16_BIT
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(int16_t4);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t2);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t3);
+_HLSL_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(uint16_t4);
+#endif
+
+_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
+_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all)
+bool all(half);
+_HLSL_16BI
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Intrinsic unification PR (PR #87171)
https://github.com/farzonl ready_for_review https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)
https://github.com/farzonl edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)
@@ -100,6 +100,118 @@ double3 abs(double3); _HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs) double4 abs(double4); +//===--===// +// all builtins +//===--===// + +/// \fn bool all(T x) +/// \brief Returns True if all components of the \a x parameter are non-zero; +/// otherwise, false. \param x The input value. + +#ifdef __HLSL_ENABLE_16_BIT +_HLSL_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int16_t); +_HLSL_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int16_t2); +_HLSL_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int16_t3); +_HLSL_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int16_t4); +_HLSL_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(uint16_t); +_HLSL_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(uint16_t2); +_HLSL_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(uint16_t3); +_HLSL_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(uint16_t4); +#endif + +_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(half); +_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(half2); +_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(half3); +_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2) +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(half4); + +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(bool); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(bool2); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(bool3); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(bool4); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) + +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int2); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int3); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int4); + +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(uint); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(uint2); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(uint3); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(uint4); + +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(float); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(float2); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(float3); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(float4); + +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int64_t); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int64_t2); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int64_t3); +_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_all) +bool all(int64_t4); farzonl wrote: @llvm-beanz what do you think about this? I kind of like it. https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)
@@ -0,0 +1,44 @@
+
+//===- CGHLSLUtils.h - Utility functions for HLSL CodeGen ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This File Provides utility function for HLSL code generation.
+// It is used to abstract away implementation details of backends.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_CODEGEN_CGHLSLUTILS_H
+#define LLVM_CLANG_LIB_CODEGEN_CGHLSLUTILS_H
+
+#include "llvm/IR/Intrinsics.h"
+#include "llvm/IR/IntrinsicsDirectX.h"
+#include "llvm/IR/IntrinsicsSPIRV.h"
+
+// Define the function generator macro
+#define GENERATE_HLSL_INTRINSIC_FUNCTION(name)
\
+ static llvm::Intrinsic::ID get_hlsl_##name##_intrinsic(
\
+ const llvm::Triple::ArchType Arch) {
\
+switch (Arch) {
\
+case llvm::Triple::dxil:
\
+ return llvm::Intrinsic::dx_##name;
\
+case llvm::Triple::spirv:
\
+ return llvm::Intrinsic::spv_##name;
\
+default:
\
+ llvm_unreachable("Input semantic not supported by target");
\
+}
\
+ }
+
+class CGHLSLUtils {
+public:
+ GENERATE_HLSL_INTRINSIC_FUNCTION(all)
farzonl wrote:
Not in this case, so will switch to a namespace. an earlier version had a
hleper function that I had private. I thought maybe at some point i'd add
something like that back and wanted a means to limit accessibility.
https://github.com/llvm/llvm-project/pull/87171
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[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)
@@ -0,0 +1,44 @@
+
+//===- CGHLSLUtils.h - Utility functions for HLSL CodeGen ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This File Provides utility function for HLSL code generation.
+// It is used to abstract away implementation details of backends.
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_CODEGEN_CGHLSLUTILS_H
+#define LLVM_CLANG_LIB_CODEGEN_CGHLSLUTILS_H
+
+#include "llvm/IR/Intrinsics.h"
+#include "llvm/IR/IntrinsicsDirectX.h"
+#include "llvm/IR/IntrinsicsSPIRV.h"
+
+// Define the function generator macro
+#define GENERATE_HLSL_INTRINSIC_FUNCTION(name)
\
+ static llvm::Intrinsic::ID get_hlsl_##name##_intrinsic(
\
+ const llvm::Triple::ArchType Arch) {
\
+switch (Arch) {
\
+case llvm::Triple::dxil:
\
+ return llvm::Intrinsic::dx_##name;
\
+case llvm::Triple::spirv:
\
+ return llvm::Intrinsic::spv_##name;
\
+default:
\
+ llvm_unreachable("Input semantic not supported by target");
\
+}
\
+ }
+
+class CGHLSLUtils {
+public:
+ GENERATE_HLSL_INTRINSIC_FUNCTION(all)
farzonl wrote:
Looks like the common way to specify something belongs in CG via namespaces is
to put it under `clang::CodgeGen`. So will make this an `HLSLUtils` namespace
like so
`namespace clang::CodeGen::HLSLUtils {...}`
https://github.com/llvm/llvm-project/pull/87171
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[clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
https://github.com/farzonl created
https://github.com/llvm/llvm-project/pull/81190
This change implements #70073
HLSL has a dot intrinsic defined here:
https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-dot
The intrinsic itself is defined as a HLSL_LANG LangBuiltin in Builtins.td This
is used to associate all the dot product typdef defined hlsl_intrinsics.h with
a single intrinsic check in CGBuiltin.cpp
In IntrinsicsDirectX.td we define the llvmIR for the dot product. A few goals
were in mind for this IR. First it should operate on only vectors. Second the
return type should be the vector element type. Third the second parameter
vector should be of the same size as the first parameter. Finally `a dot b`
should be the same as `b dot a`.
In CGBuiltin.cpp hlsl has built on top of existing clang intrinsics via
EmitBuiltinExpr. Dot product though is a target specific intrinsic and so
needed to establish a pattern for Target builtins via EmitDXILBuiltinExpr. The
call chain looks like this now: EmitBuiltinExpr -> EmitTargetBuiltinExpr ->
EmitTargetArchBuiltinExpr -> EmitDXILBuiltinExp
EmitDXILBuiltinExp dot product intrinsics makes a destinction between vectors
and scalars. This is because HLSL supports dot product on scalars which
simplifies down to multiply.
>From c966e50e1be171ce6a642083508faf43ae5f220a Mon Sep 17 00:00:00 2001
From: Farzon Lotfi
Date: Thu, 8 Feb 2024 11:08:59 -0500
Subject: [PATCH] [HLSL] Implementation of dot intrinsic This change implements
#70073
HLSL has a dot intrinsic defined here:
https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-dot
The intrinsic itself is defined as a HLSL_LANG LangBuiltin in Builtins.td
This is used to associate all the dot product typdef defined hlsl_intrinsics.h
with a single intrinsic check in CGBuiltin.cpp
In IntrinsicsDirectX.td we define the llvmIR for the dot product.
A few goals were in mind for this IR. First it should operate on only
vectors. Second the return type should be the vector element type. Third
the second parameter vector should be of the same size as the first
parameter. Finally `a dot b` should be the same as `b dot a`.
In CGBuiltin.cpp hlsl has built on top of existing clang intrinsics via
EmitBuiltinExpr. Dot
product though is a target specific intrinsic and so needed to establish
a pattern for Target builtins via EmitDXILBuiltinExpr.
The call chain looks like this now: EmitBuiltinExpr -> EmitTargetBuiltinExpr ->
EmitTargetArchBuiltinExpr -> EmitDXILBuiltinExp
EmitDXILBuiltinExp dot product intrinsics makes a destinction
between vectors and scalars. This is because HLSL supports dot product on
scalars which simplifies down to multiply.
---
clang/include/clang/Basic/Builtins.td | 6 +
clang/lib/CodeGen/CGBuiltin.cpp | 49
clang/lib/CodeGen/CodeGenFunction.h | 1 +
clang/lib/Headers/hlsl/hlsl_intrinsics.h | 86 +++
clang/test/CodeGenHLSL/builtins/dot.hlsl | 260 ++
llvm/include/llvm/IR/IntrinsicsDirectX.td | 7 +-
6 files changed, 408 insertions(+), 1 deletion(-)
create mode 100644 clang/test/CodeGenHLSL/builtins/dot.hlsl
diff --git a/clang/include/clang/Basic/Builtins.td
b/clang/include/clang/Basic/Builtins.td
index 31a2bdeb2d3e5..1d6fd969900ea 100644
--- a/clang/include/clang/Basic/Builtins.td
+++ b/clang/include/clang/Basic/Builtins.td
@@ -4518,6 +4518,12 @@ def HLSLCreateHandle : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void*(unsigned char)";
}
+def HLSLDotProduct : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_dot"];
+ let Attributes = [NoThrow, Const, CustomTypeChecking];
+ let Prototype = "void(...)";
+}
+
// Builtins for XRay.
def XRayCustomEvent : Builtin {
let Spellings = ["__xray_customevent"];
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index a7a410dab1a01..6916f40d265c7 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -44,6 +44,7 @@
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsARM.h"
#include "llvm/IR/IntrinsicsBPF.h"
+#include "llvm/IR/IntrinsicsDirectX.h"
#include "llvm/IR/IntrinsicsHexagon.h"
#include "llvm/IR/IntrinsicsNVPTX.h"
#include "llvm/IR/IntrinsicsPowerPC.h"
@@ -6018,6 +6019,8 @@ static Value *EmitTargetArchBuiltinExpr(CodeGenFunction
*CGF,
case llvm::Triple::bpfeb:
case llvm::Triple::bpfel:
return CGF->EmitBPFBuiltinExpr(BuiltinID, E);
+ case llvm::Triple::dxil:
+return CGF->EmitDXILBuiltinExpr(BuiltinID, E);
case llvm::Triple::x86:
case llvm::Triple::x86_64:
return CGF->EmitX86BuiltinExpr(BuiltinID, E);
@@ -17895,6 +17898,52 @@ llvm::Value
*CodeGenFunction::EmitScalarOrConstFoldImmArg(unsigned ICEArguments,
return Arg;
}
+Value *CodeGenFunction::EmitDXILBuiltinExpr(unsigned BuiltinID,
+const CallExpr *E) {
+ switch (BuiltinID) {
+ case Builtin::BI__builtin_hlsl_
[clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)
@@ -4518,6 +4518,12 @@ def HLSLCreateHandle : LangBuiltin<"HLSL_LANG"> {
let Prototype = "void*(unsigned char)";
}
+def HLSLDotProduct : LangBuiltin<"HLSL_LANG"> {
+ let Spellings = ["__builtin_hlsl_dot"];
+ let Attributes = [NoThrow, Const, CustomTypeChecking];
+ let Prototype = "void(...)";
farzonl wrote:
Thats a place holder `clang\lib\Sema\SemaExpr.cpp` has these
`hasCustomTypechecking` checks that call `CheckBuiltinFunctionCall` in
`clang\lib\Sema\SemaChecking.cpp` I want to do custom type checking but that
piece was dragging the pr and I wanted to get some feedback. Since it isn't
ready yet so I pulled it from the pr and disabled code gen for the bad cases as
a stop gap
https://github.com/llvm/llvm-project/pull/81190
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