[PATCH] D26544: [PPC] support for arithmetic builtins in the FE

2016-11-16 Thread Ehsan Amiri via cfe-commits 
amehsan added inline comments.



Comment at: lib/Headers/altivec.h:350
+__tempc = __tempc & 0x0001;
+unsigned long long __longa = (unsigned long long) __tempa;
+unsigned long long __longb = (unsigned long long) __tempb;

kbarton wrote:
> nemanjai wrote:
> > I think it's a little more clear and obvious what is happening if you 
> > actually have just a single cast and mask - i.e.
> > ``` unsigned long long __longa = ((unsigned long long) __a[i]) & 
> > 0x;```
> Is a mask actually needed? This seems to be what is done in the vec_addec 
> function below, without the cast. I agree that is cleaner.
> 
> The other minor nit is to pick a single value for the mask (1, 0x01, 
> 0x0001) and use it consistently. 
To come up with this code pattern I looked at the following pieces of codes:


```
unsigned long long f (int t) {
  return (unsigned long long)  t;
}
```
When compiled with optimization  produces 

```
define i64 @f(i32 signext %t) local_unnamed_addr #0 {
entry:
  %conv = sext i32 %t to i64
  ret i64 %conv
}

```
Which is incorrect. Also 


```
unsigned long long f (int t) {
  return (unsigned long long)(unsigned)  t;
}
~

```

results in 

```
define i64 @f(i32 signext %t) local_unnamed_addr #0 {
entry:
  %conv = zext i32 %t to i64
  ret i64 %conv
}

```

and 


```
.Lfunc_begin0:
# BB#0: # %entry
clrldi   3, 3, 32
blr

```

So I think the code here is optimal and correct and there is no need to change 
it.



Comment at: lib/Headers/altivec.h:10516
+ vector signed __int128 __c) {
+  return __builtin_altivec_vsubecuq(__a, __b, __c);
+}

kbarton wrote:
> Why do we mask the carries for sign/unsigned ints, but not __128 ints?
for quadword, hardware does the masking (implicitly, by only looking at the 
rightmost bit)


https://reviews.llvm.org/D26544



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[PATCH] D26544: [PPC] support for arithmetic builtins in the FE

2016-11-17 Thread Ehsan Amiri via cfe-commits 
amehsan updated the summary for this revision.
amehsan updated this revision to Diff 78376.

https://reviews.llvm.org/D26544

Files:
  lib/Headers/altivec.h
  test/CodeGen/builtins-ppc-altivec.c
  test/CodeGen/builtins-ppc-p8vector.c
  test/CodeGen/builtins-ppc-quadword.c
  test/CodeGen/builtins-ppc-vsx.c

Index: test/CodeGen/builtins-ppc-vsx.c
===
--- test/CodeGen/builtins-ppc-vsx.c
+++ test/CodeGen/builtins-ppc-vsx.c
@@ -69,6 +69,18 @@
 // CHECK: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
 // CHECK-LE: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
 
+  res_vd = vec_abs(vd);
+// CHECK: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}})
+// CHECK-LE: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}})
+
+  res_vf = vec_nabs(vf);
+// CHECK: [[VEC:%[0-9]+]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
+// CHECK-NEXT: fsub <4 x float> , [[VEC]]
+
+  res_vd = vec_nabs(vd);
+// CHECK: [[VECD:%[0-9]+]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}})
+// CHECK: fsub <2 x double> , [[VECD]]
+
   dummy();
 // CHECK: call void @dummy()
 // CHECK-LE: call void @dummy()
@@ -1080,4 +1092,12 @@
 // CHECK: fmul <2 x double>
 // CHECK-LE: uitofp <2 x i64> %{{.*}} to <2 x double>
 // CHECK-LE: fmul <2 x double>
+
+  res_vf = vec_neg(vf);
+// CHECK: fsub <4 x float> , {{%[0-9]+}}
+// CHECK-LE: fsub <4 x float> , {{%[0-9]+}}
+
+  res_vd = vec_neg(vd);
+// CHECK: fsub <2 x double> , {{%[0-9]+}}
+// CHECK-LE: fsub <2 x double> , {{%[0-9]+}}
 }
Index: test/CodeGen/builtins-ppc-quadword.c
===
--- test/CodeGen/builtins-ppc-quadword.c
+++ test/CodeGen/builtins-ppc-quadword.c
@@ -119,11 +119,32 @@
 // CHECK-LE: @llvm.ppc.altivec.vsubeuqm
 // CHECK-PPC: error: assigning to '__vector __int128' (vector of 1 '__int128' value) from incompatible type 'int'
   
+  /* vec_sube */
+  res_vlll = vec_sube(vlll, vlll, vlll);
+// CHECK: @llvm.ppc.altivec.vsubeuqm
+// CHECK-LE: @llvm.ppc.altivec.vsubeuqm
+// CHECK-PPC: error: call to 'vec_sube' is ambiguous
+  
+  res_vulll = vec_sube(vulll, vulll, vulll);
+// CHECK: @llvm.ppc.altivec.vsubeuqm
+// CHECK-LE: @llvm.ppc.altivec.vsubeuqm
+// CHECK-PPC: error: call to 'vec_sube' is ambiguous
+  
+  res_vlll = vec_sube(vlll, vlll, vlll);
+// CHECK: @llvm.ppc.altivec.vsubeuqm
+// CHECK-LE: @llvm.ppc.altivec.vsubeuqm
+// CHECK-PPC: error: call to 'vec_sube' is ambiguous
+  
   res_vulll = vec_vsubeuqm(vulll, vulll, vulll);
 // CHECK: @llvm.ppc.altivec.vsubeuqm
 // CHECK-LE: @llvm.ppc.altivec.vsubeuqm
 // CHECK-PPC: error: assigning to '__vector unsigned __int128' (vector of 1 'unsigned __int128' value) from incompatible type 'int'
-  
+
+  res_vulll = vec_sube(vulll, vulll, vulll);
+// CHECK: @llvm.ppc.altivec.vsubeuqm
+// CHECK-LE: @llvm.ppc.altivec.vsubeuqm
+// CHECK-PPC: error: call to 'vec_sube' is ambiguous
+
   /* vec_subc */
   res_vlll = vec_subc(vlll, vlll);
 // CHECK: @llvm.ppc.altivec.vsubcuq
@@ -150,11 +171,21 @@
   res_vlll = vec_vsubecuq(vlll, vlll, vlll);
 // CHECK: @llvm.ppc.altivec.vsubecuq
 // CHECK-LE: @llvm.ppc.altivec.vsubecuq
-// CHECK-PPC: error: assigning to '__vector __int128' (vector of 1 '__int128' value) from incompatible type 'int'  
+// CHECK-PPC: error: assigning to '__vector __int128' (vector of 1 '__int128' value) from incompatible type 'int'
 
   res_vulll = vec_vsubecuq(vulll, vulll, vulll);
 // CHECK: @llvm.ppc.altivec.vsubecuq
 // CHECK-LE: @llvm.ppc.altivec.vsubecuq
+// CHECK-PPC: error: assigning to '__vector unsigned __int128' (vector of 1 'unsigned __int128' value) from incompatible type 'int'
+
+  res_vlll = vec_subec(vlll, vlll, vlll);
+// CHECK: @llvm.ppc.altivec.vsubecuq
+// CHECK-LE: @llvm.ppc.altivec.vsubecuq
+// CHECK-PPC: error: assigning to '__vector __int128' (vector of 1 '__int128' value) from incompatible type 'int'  
+
+  res_vulll = vec_subec(vulll, vulll, vulll);
+// CHECK: @llvm.ppc.altivec.vsubecuq
+// CHECK-LE: @llvm.ppc.altivec.vsubecuq
 // CHECK-PPC: error: assigning to '__vector unsigned __int128' (vector of 1 'unsigned __int128' value) from incompatible type 'int'  
 
 }
Index: test/CodeGen/builtins-ppc-p8vector.c
===
--- test/CodeGen/builtins-ppc-p8vector.c
+++ test/CodeGen/builtins-ppc-p8vector.c
@@ -73,13 +73,6 @@
 // CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %{{[0-9]*}}, <2 x i64>
 // CHECK-PPC: error: call to 'vec_abs' is ambiguous
 
-  res_vd = vec_abs(vda);
-// CHECK: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{.*}})
-// CHECK: store <2 x double> %{{.*}}, <2 x double>* @res_vd
-// CHECK-LE: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{.*}})
-// CHECK-LE: store <2 x double> %{{.*}}, <2 x double>* @res_vd
-// CHECK-PPC: error: call to 'vec_abs' is ambiguous
-
   /* vec_add */
   res_vsll = vec_add(vsll, vsll);
 // CHECK: add <2 x i64>
@@ -1

[PATCH] D26564: Use PIC relocation mode by default for PowerPC64 ELF

2016-11-17 Thread Ehsan Amiri via cfe-commits 
amehsan added inline comments.



Comment at: lib/Driver/ToolChains.cpp:2799-2807
+  switch (getArch()) {
+  case llvm::Triple::x86_64:
+return getTriple().isOSWindows();
+  case llvm::Triple::ppc64:
+  case llvm::Triple::ppc64le:
+return !getTriple().isOSBinFormatMachO() && !getTriple().isMacOSX();
+  default:

This is a minor nit. Almost any switch statement that I have come across in 
LLVM code, has default in the very beginning instead of the end. At least for 
the sake of consistency this is better to change here. (The reason that I have 
heard for it, is readability for large switch statements. But in the codebase, 
even stmts of this size, have default first).


https://reviews.llvm.org/D26564



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r287772 - [PPC] support for arithmetic builtins in the FE

2016-11-23 Thread Ehsan Amiri via cfe-commits 
Author: amehsan
Date: Wed Nov 23 10:32:05 2016
New Revision: 287772

URL: http://llvm.org/viewvc/llvm-project?rev=287772&view=rev
Log:
[PPC] support for arithmetic builtins in the FE

This adds various overloads of the following builtins to altivec.h:

vec_neg
vec_nabs
vec_adde
vec_addec
vec_sube
vec_subec
vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).

Modified:
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c
cfe/trunk/test/CodeGen/builtins-ppc-quadword.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=287772&r1=287771&r2=287772&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Wed Nov 23 10:32:05 2016
@@ -157,7 +157,7 @@ static __inline__ vector float __ATTRS_o
 #endif
 }
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __VSX__
 static __inline__ vector double __ATTRS_o_ai vec_abs(vector double __a) {
   return __builtin_vsx_xvabsdp(__a);
 }
@@ -348,6 +348,22 @@ vec_adde(vector unsigned __int128 __a, v
 }
 #endif
 
+static __inline__ vector signed int __ATTRS_o_ai
+vec_adde(vector signed int __a, vector signed int __b,
+ vector signed int __c) {
+  vector signed int __mask = {1, 1, 1, 1};
+  vector signed int __carry = __c & __mask;
+  return vec_add(vec_add(__a, __b), __carry);
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_adde(vector unsigned int __a, vector unsigned int __b,
+ vector unsigned int __c) {
+  vector unsigned int __mask = {1, 1, 1, 1};
+  vector unsigned int __carry = __c & __mask;
+  return vec_add(vec_add(__a, __b), __carry);
+}
+
 /* vec_addec */
 
 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
@@ -362,6 +378,50 @@ vec_addec(vector unsigned __int128 __a,
   vector unsigned __int128 __c) {
   return __builtin_altivec_vaddecuq(__a, __b, __c);
 }
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_addec(vector signed int __a, vector signed int __b,
+  vector signed int __c) {
+
+  signed int __result[4];
+  for (int i = 0; i < 4; i++) {
+unsigned int __tempa = (unsigned int) __a[i];
+unsigned int __tempb = (unsigned int) __b[i];
+unsigned int __tempc = (unsigned int) __c[i];
+__tempc = __tempc & 0x0001;
+unsigned long long __longa = (unsigned long long) __tempa;
+unsigned long long __longb = (unsigned long long) __tempb;
+unsigned long long __longc = (unsigned long long) __tempc;
+unsigned long long __sum = __longa + __longb + __longc;
+unsigned long long __res = (__sum >> 32) & 0x01;
+unsigned long long __tempres = (unsigned int) __res;
+__result[i] = (signed int) __tempres;
+  }
+
+  vector signed int ret = { __result[0], __result[1], __result[2], __result[3] 
};
+  return ret;
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_addec(vector unsigned int __a, vector unsigned int __b,
+  vector unsigned int __c) {
+
+  unsigned int __result[4];
+  for (int i = 0; i < 4; i++) {
+unsigned int __tempc = __c[i] & 1;
+unsigned long long __longa = (unsigned long long) __a[i];
+unsigned long long __longb = (unsigned long long) __b[i];
+unsigned long long __longc = (unsigned long long) __tempc;
+unsigned long long __sum = __longa + __longb + __longc;
+unsigned long long __res = (__sum >> 32) & 0x01;
+unsigned long long __tempres = (unsigned int) __res;
+__result[i] = (signed int) __tempres;
+  }
+
+  vector unsigned int ret = { __result[0], __result[1], __result[2], 
__result[3] };
+  return ret;
+}
+
 #endif
 
 /* vec_vaddubm */
@@ -11089,6 +11149,11 @@ vec_vsubfp(vector float __a, vector floa
 
 /* vec_subc */
 
+static __inline__ vector signed int __ATTRS_o_ai
+vec_subc(vector signed int __a, vector signed int __b) {
+  return __builtin_altivec_vsubcuw(__a, __b);
+}
+
 static __inline__ vector unsigned int __ATTRS_o_ai
 vec_subc(vector unsigned int __a, vector unsigned int __b) {
   return __builtin_altivec_vsubcuw(__a, __b);
@@ -11322,6 +11387,7 @@ vec_vsubuqm(vector unsigned __int128 __a
 
 /* vec_vsubeuqm */
 
+
 static __inline__ vector signed __int128 __ATTRS_o_ai
 vec_vsubeuqm(vector signed __int128 __a, vector signed __int128 __b,
  vector signed __int128 __c) {
@@ -11334,6 +11400,18 @@ vec_vsubeuqm(vector unsigned __int128 __
   return __builtin_altivec_vsubeuqm(__a, __b, __c);
 }
 
+static __inline__ vector signed __int128 __ATTRS_o_ai
+vec_sube(vector signed __int128 __a, vector signed __int128 __b,
+

r287775 - [PPC] Reverting r287772

2016-11-23 Thread Ehsan Amiri via cfe-commits 
Author: amehsan
Date: Wed Nov 23 10:56:03 2016
New Revision: 287775

URL: http://llvm.org/viewvc/llvm-project?rev=287775&view=rev
Log:
[PPC] Reverting r287772

Due to buildbot failure, I revert. Will recommit after investigation.

Modified:
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c
cfe/trunk/test/CodeGen/builtins-ppc-quadword.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=287775&r1=287774&r2=287775&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Wed Nov 23 10:56:03 2016
@@ -157,7 +157,7 @@ static __inline__ vector float __ATTRS_o
 #endif
 }
 
-#ifdef __VSX__
+#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
 static __inline__ vector double __ATTRS_o_ai vec_abs(vector double __a) {
   return __builtin_vsx_xvabsdp(__a);
 }
@@ -348,22 +348,6 @@ vec_adde(vector unsigned __int128 __a, v
 }
 #endif
 
-static __inline__ vector signed int __ATTRS_o_ai
-vec_adde(vector signed int __a, vector signed int __b,
- vector signed int __c) {
-  vector signed int __mask = {1, 1, 1, 1};
-  vector signed int __carry = __c & __mask;
-  return vec_add(vec_add(__a, __b), __carry);
-}
-
-static __inline__ vector unsigned int __ATTRS_o_ai
-vec_adde(vector unsigned int __a, vector unsigned int __b,
- vector unsigned int __c) {
-  vector unsigned int __mask = {1, 1, 1, 1};
-  vector unsigned int __carry = __c & __mask;
-  return vec_add(vec_add(__a, __b), __carry);
-}
-
 /* vec_addec */
 
 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
@@ -378,50 +362,6 @@ vec_addec(vector unsigned __int128 __a,
   vector unsigned __int128 __c) {
   return __builtin_altivec_vaddecuq(__a, __b, __c);
 }
-
-static __inline__ vector signed int __ATTRS_o_ai
-vec_addec(vector signed int __a, vector signed int __b,
-  vector signed int __c) {
-
-  signed int __result[4];
-  for (int i = 0; i < 4; i++) {
-unsigned int __tempa = (unsigned int) __a[i];
-unsigned int __tempb = (unsigned int) __b[i];
-unsigned int __tempc = (unsigned int) __c[i];
-__tempc = __tempc & 0x0001;
-unsigned long long __longa = (unsigned long long) __tempa;
-unsigned long long __longb = (unsigned long long) __tempb;
-unsigned long long __longc = (unsigned long long) __tempc;
-unsigned long long __sum = __longa + __longb + __longc;
-unsigned long long __res = (__sum >> 32) & 0x01;
-unsigned long long __tempres = (unsigned int) __res;
-__result[i] = (signed int) __tempres;
-  }
-
-  vector signed int ret = { __result[0], __result[1], __result[2], __result[3] 
};
-  return ret;
-}
-
-static __inline__ vector unsigned int __ATTRS_o_ai
-vec_addec(vector unsigned int __a, vector unsigned int __b,
-  vector unsigned int __c) {
-
-  unsigned int __result[4];
-  for (int i = 0; i < 4; i++) {
-unsigned int __tempc = __c[i] & 1;
-unsigned long long __longa = (unsigned long long) __a[i];
-unsigned long long __longb = (unsigned long long) __b[i];
-unsigned long long __longc = (unsigned long long) __tempc;
-unsigned long long __sum = __longa + __longb + __longc;
-unsigned long long __res = (__sum >> 32) & 0x01;
-unsigned long long __tempres = (unsigned int) __res;
-__result[i] = (signed int) __tempres;
-  }
-
-  vector unsigned int ret = { __result[0], __result[1], __result[2], 
__result[3] };
-  return ret;
-}
-
 #endif
 
 /* vec_vaddubm */
@@ -11149,11 +11089,6 @@ vec_vsubfp(vector float __a, vector floa
 
 /* vec_subc */
 
-static __inline__ vector signed int __ATTRS_o_ai
-vec_subc(vector signed int __a, vector signed int __b) {
-  return __builtin_altivec_vsubcuw(__a, __b);
-}
-
 static __inline__ vector unsigned int __ATTRS_o_ai
 vec_subc(vector unsigned int __a, vector unsigned int __b) {
   return __builtin_altivec_vsubcuw(__a, __b);
@@ -11387,7 +11322,6 @@ vec_vsubuqm(vector unsigned __int128 __a
 
 /* vec_vsubeuqm */
 
-
 static __inline__ vector signed __int128 __ATTRS_o_ai
 vec_vsubeuqm(vector signed __int128 __a, vector signed __int128 __b,
  vector signed __int128 __c) {
@@ -11400,18 +11334,6 @@ vec_vsubeuqm(vector unsigned __int128 __
   return __builtin_altivec_vsubeuqm(__a, __b, __c);
 }
 
-static __inline__ vector signed __int128 __ATTRS_o_ai
-vec_sube(vector signed __int128 __a, vector signed __int128 __b,
- vector signed __int128 __c) {
-  return __builtin_altivec_vsubeuqm(__a, __b, __c);
-}
-
-static __inline__ vector unsigned __int128 __ATTRS_o_ai
-vec_sube(vector unsigned __int128 __a, vector unsigned __int128 __b,
- vector unsigned __int128 __c) {
-  return __builtin_altivec_vsubeuqm(__a, __b, __c);
-}
-
 /* vec_vsubcuq */
 
 static __inline__ vector signed __int128

r287795 - [PPC] support for arithmetic builtins in the FE

2016-11-23 Thread Ehsan Amiri via cfe-commits 
Author: amehsan
Date: Wed Nov 23 12:36:29 2016
New Revision: 287795

URL: http://llvm.org/viewvc/llvm-project?rev=287795&view=rev
Log:
[PPC] support for arithmetic builtins in the FE

(commit again after fixing the buildbot failures)
This adds various overloads of the following builtins to altivec.h:

vec_neg
vec_nabs
vec_adde
vec_addec
vec_sube
vec_subec
vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).

Modified:
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c
cfe/trunk/test/CodeGen/builtins-ppc-quadword.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=287795&r1=287794&r2=287795&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Wed Nov 23 12:36:29 2016
@@ -157,7 +157,7 @@ static __inline__ vector float __ATTRS_o
 #endif
 }
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __VSX__
 static __inline__ vector double __ATTRS_o_ai vec_abs(vector double __a) {
   return __builtin_vsx_xvabsdp(__a);
 }
@@ -348,6 +348,22 @@ vec_adde(vector unsigned __int128 __a, v
 }
 #endif
 
+static __inline__ vector signed int __ATTRS_o_ai
+vec_adde(vector signed int __a, vector signed int __b,
+ vector signed int __c) {
+  vector signed int __mask = {1, 1, 1, 1};
+  vector signed int __carry = __c & __mask;
+  return vec_add(vec_add(__a, __b), __carry);
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_adde(vector unsigned int __a, vector unsigned int __b,
+ vector unsigned int __c) {
+  vector unsigned int __mask = {1, 1, 1, 1};
+  vector unsigned int __carry = __c & __mask;
+  return vec_add(vec_add(__a, __b), __carry);
+}
+
 /* vec_addec */
 
 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
@@ -362,6 +378,50 @@ vec_addec(vector unsigned __int128 __a,
   vector unsigned __int128 __c) {
   return __builtin_altivec_vaddecuq(__a, __b, __c);
 }
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_addec(vector signed int __a, vector signed int __b,
+  vector signed int __c) {
+
+  signed int __result[4];
+  for (int i = 0; i < 4; i++) {
+unsigned int __tempa = (unsigned int) __a[i];
+unsigned int __tempb = (unsigned int) __b[i];
+unsigned int __tempc = (unsigned int) __c[i];
+__tempc = __tempc & 0x0001;
+unsigned long long __longa = (unsigned long long) __tempa;
+unsigned long long __longb = (unsigned long long) __tempb;
+unsigned long long __longc = (unsigned long long) __tempc;
+unsigned long long __sum = __longa + __longb + __longc;
+unsigned long long __res = (__sum >> 32) & 0x01;
+unsigned long long __tempres = (unsigned int) __res;
+__result[i] = (signed int) __tempres;
+  }
+
+  vector signed int ret = { __result[0], __result[1], __result[2], __result[3] 
};
+  return ret;
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_addec(vector unsigned int __a, vector unsigned int __b,
+  vector unsigned int __c) {
+
+  unsigned int __result[4];
+  for (int i = 0; i < 4; i++) {
+unsigned int __tempc = __c[i] & 1;
+unsigned long long __longa = (unsigned long long) __a[i];
+unsigned long long __longb = (unsigned long long) __b[i];
+unsigned long long __longc = (unsigned long long) __tempc;
+unsigned long long __sum = __longa + __longb + __longc;
+unsigned long long __res = (__sum >> 32) & 0x01;
+unsigned long long __tempres = (unsigned int) __res;
+__result[i] = (signed int) __tempres;
+  }
+
+  vector unsigned int ret = { __result[0], __result[1], __result[2], 
__result[3] };
+  return ret;
+}
+
 #endif
 
 /* vec_vaddubm */
@@ -11089,6 +11149,12 @@ vec_vsubfp(vector float __a, vector floa
 
 /* vec_subc */
 
+static __inline__ vector signed int __ATTRS_o_ai
+vec_subc(vector signed int __a, vector signed int __b) {
+  return (vector signed int)__builtin_altivec_vsubcuw((vector unsigned int)__a,
+  (vector unsigned int) 
__b);
+}
+
 static __inline__ vector unsigned int __ATTRS_o_ai
 vec_subc(vector unsigned int __a, vector unsigned int __b) {
   return __builtin_altivec_vsubcuw(__a, __b);
@@ -11322,6 +11388,7 @@ vec_vsubuqm(vector unsigned __int128 __a
 
 /* vec_vsubeuqm */
 
+
 static __inline__ vector signed __int128 __ATTRS_o_ai
 vec_vsubeuqm(vector signed __int128 __a, vector signed __int128 __b,
  vector signed __int128 __c) {
@@ -11334,6 +11401,18 @@ vec_vsubeuqm(vector unsigned __int128 __
   return __b

r287796 - [PPC] revert r287795

2016-11-23 Thread Ehsan Amiri via cfe-commits 
Author: amehsan
Date: Wed Nov 23 12:55:17 2016
New Revision: 287796

URL: http://llvm.org/viewvc/llvm-project?rev=287796&view=rev
Log:
[PPC] revert r287795

A test that passed locally is failing on one of the build bots.

Modified:
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c
cfe/trunk/test/CodeGen/builtins-ppc-quadword.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=287796&r1=287795&r2=287796&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Wed Nov 23 12:55:17 2016
@@ -157,7 +157,7 @@ static __inline__ vector float __ATTRS_o
 #endif
 }
 
-#ifdef __VSX__
+#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
 static __inline__ vector double __ATTRS_o_ai vec_abs(vector double __a) {
   return __builtin_vsx_xvabsdp(__a);
 }
@@ -348,22 +348,6 @@ vec_adde(vector unsigned __int128 __a, v
 }
 #endif
 
-static __inline__ vector signed int __ATTRS_o_ai
-vec_adde(vector signed int __a, vector signed int __b,
- vector signed int __c) {
-  vector signed int __mask = {1, 1, 1, 1};
-  vector signed int __carry = __c & __mask;
-  return vec_add(vec_add(__a, __b), __carry);
-}
-
-static __inline__ vector unsigned int __ATTRS_o_ai
-vec_adde(vector unsigned int __a, vector unsigned int __b,
- vector unsigned int __c) {
-  vector unsigned int __mask = {1, 1, 1, 1};
-  vector unsigned int __carry = __c & __mask;
-  return vec_add(vec_add(__a, __b), __carry);
-}
-
 /* vec_addec */
 
 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
@@ -378,50 +362,6 @@ vec_addec(vector unsigned __int128 __a,
   vector unsigned __int128 __c) {
   return __builtin_altivec_vaddecuq(__a, __b, __c);
 }
-
-static __inline__ vector signed int __ATTRS_o_ai
-vec_addec(vector signed int __a, vector signed int __b,
-  vector signed int __c) {
-
-  signed int __result[4];
-  for (int i = 0; i < 4; i++) {
-unsigned int __tempa = (unsigned int) __a[i];
-unsigned int __tempb = (unsigned int) __b[i];
-unsigned int __tempc = (unsigned int) __c[i];
-__tempc = __tempc & 0x0001;
-unsigned long long __longa = (unsigned long long) __tempa;
-unsigned long long __longb = (unsigned long long) __tempb;
-unsigned long long __longc = (unsigned long long) __tempc;
-unsigned long long __sum = __longa + __longb + __longc;
-unsigned long long __res = (__sum >> 32) & 0x01;
-unsigned long long __tempres = (unsigned int) __res;
-__result[i] = (signed int) __tempres;
-  }
-
-  vector signed int ret = { __result[0], __result[1], __result[2], __result[3] 
};
-  return ret;
-}
-
-static __inline__ vector unsigned int __ATTRS_o_ai
-vec_addec(vector unsigned int __a, vector unsigned int __b,
-  vector unsigned int __c) {
-
-  unsigned int __result[4];
-  for (int i = 0; i < 4; i++) {
-unsigned int __tempc = __c[i] & 1;
-unsigned long long __longa = (unsigned long long) __a[i];
-unsigned long long __longb = (unsigned long long) __b[i];
-unsigned long long __longc = (unsigned long long) __tempc;
-unsigned long long __sum = __longa + __longb + __longc;
-unsigned long long __res = (__sum >> 32) & 0x01;
-unsigned long long __tempres = (unsigned int) __res;
-__result[i] = (signed int) __tempres;
-  }
-
-  vector unsigned int ret = { __result[0], __result[1], __result[2], 
__result[3] };
-  return ret;
-}
-
 #endif
 
 /* vec_vaddubm */
@@ -11149,12 +11089,6 @@ vec_vsubfp(vector float __a, vector floa
 
 /* vec_subc */
 
-static __inline__ vector signed int __ATTRS_o_ai
-vec_subc(vector signed int __a, vector signed int __b) {
-  return (vector signed int)__builtin_altivec_vsubcuw((vector unsigned int)__a,
-  (vector unsigned int) 
__b);
-}
-
 static __inline__ vector unsigned int __ATTRS_o_ai
 vec_subc(vector unsigned int __a, vector unsigned int __b) {
   return __builtin_altivec_vsubcuw(__a, __b);
@@ -11388,7 +11322,6 @@ vec_vsubuqm(vector unsigned __int128 __a
 
 /* vec_vsubeuqm */
 
-
 static __inline__ vector signed __int128 __ATTRS_o_ai
 vec_vsubeuqm(vector signed __int128 __a, vector signed __int128 __b,
  vector signed __int128 __c) {
@@ -11401,18 +11334,6 @@ vec_vsubeuqm(vector unsigned __int128 __
   return __builtin_altivec_vsubeuqm(__a, __b, __c);
 }
 
-static __inline__ vector signed __int128 __ATTRS_o_ai
-vec_sube(vector signed __int128 __a, vector signed __int128 __b,
- vector signed __int128 __c) {
-  return __builtin_altivec_vsubeuqm(__a, __b, __c);
-}
-
-static __inline__ vector unsigned __int128 __ATTRS_o_ai
-vec_sube(vector unsigned __int128 __a, vector unsigned __int128 __b,
- vector unsigned __int128 __c) {
-  return __

r287872 - [PPC] support for arithmetic builtins in the FE

2016-11-24 Thread Ehsan Amiri via cfe-commits 
Author: amehsan
Date: Thu Nov 24 06:40:04 2016
New Revision: 287872

URL: http://llvm.org/viewvc/llvm-project?rev=287872&view=rev
Log:
[PPC] support for arithmetic builtins in the FE

(commit again after fixing the buildbot failures)
This adds various overloads of the following builtins to altivec.h:

vec_neg
vec_nabs
vec_adde
vec_addec
vec_sube
vec_subec
vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).


Modified:
cfe/trunk/lib/Headers/altivec.h
cfe/trunk/test/CodeGen/builtins-ppc-altivec.c
cfe/trunk/test/CodeGen/builtins-ppc-p8vector.c
cfe/trunk/test/CodeGen/builtins-ppc-quadword.c
cfe/trunk/test/CodeGen/builtins-ppc-vsx.c

Modified: cfe/trunk/lib/Headers/altivec.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/altivec.h?rev=287872&r1=287871&r2=287872&view=diff
==
--- cfe/trunk/lib/Headers/altivec.h (original)
+++ cfe/trunk/lib/Headers/altivec.h Thu Nov 24 06:40:04 2016
@@ -157,7 +157,7 @@ static __inline__ vector float __ATTRS_o
 #endif
 }
 
-#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
+#ifdef __VSX__
 static __inline__ vector double __ATTRS_o_ai vec_abs(vector double __a) {
   return __builtin_vsx_xvabsdp(__a);
 }
@@ -348,6 +348,22 @@ vec_adde(vector unsigned __int128 __a, v
 }
 #endif
 
+static __inline__ vector signed int __ATTRS_o_ai
+vec_adde(vector signed int __a, vector signed int __b,
+ vector signed int __c) {
+  vector signed int __mask = {1, 1, 1, 1};
+  vector signed int __carry = __c & __mask;
+  return vec_add(vec_add(__a, __b), __carry);
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_adde(vector unsigned int __a, vector unsigned int __b,
+ vector unsigned int __c) {
+  vector unsigned int __mask = {1, 1, 1, 1};
+  vector unsigned int __carry = __c & __mask;
+  return vec_add(vec_add(__a, __b), __carry);
+}
+
 /* vec_addec */
 
 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
@@ -362,6 +378,50 @@ vec_addec(vector unsigned __int128 __a,
   vector unsigned __int128 __c) {
   return __builtin_altivec_vaddecuq(__a, __b, __c);
 }
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_addec(vector signed int __a, vector signed int __b,
+  vector signed int __c) {
+
+  signed int __result[4];
+  for (int i = 0; i < 4; i++) {
+unsigned int __tempa = (unsigned int) __a[i];
+unsigned int __tempb = (unsigned int) __b[i];
+unsigned int __tempc = (unsigned int) __c[i];
+__tempc = __tempc & 0x0001;
+unsigned long long __longa = (unsigned long long) __tempa;
+unsigned long long __longb = (unsigned long long) __tempb;
+unsigned long long __longc = (unsigned long long) __tempc;
+unsigned long long __sum = __longa + __longb + __longc;
+unsigned long long __res = (__sum >> 32) & 0x01;
+unsigned long long __tempres = (unsigned int) __res;
+__result[i] = (signed int) __tempres;
+  }
+
+  vector signed int ret = { __result[0], __result[1], __result[2], __result[3] 
};
+  return ret;
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_addec(vector unsigned int __a, vector unsigned int __b,
+  vector unsigned int __c) {
+
+  unsigned int __result[4];
+  for (int i = 0; i < 4; i++) {
+unsigned int __tempc = __c[i] & 1;
+unsigned long long __longa = (unsigned long long) __a[i];
+unsigned long long __longb = (unsigned long long) __b[i];
+unsigned long long __longc = (unsigned long long) __tempc;
+unsigned long long __sum = __longa + __longb + __longc;
+unsigned long long __res = (__sum >> 32) & 0x01;
+unsigned long long __tempres = (unsigned int) __res;
+__result[i] = (signed int) __tempres;
+  }
+
+  vector unsigned int ret = { __result[0], __result[1], __result[2], 
__result[3] };
+  return ret;
+}
+
 #endif
 
 /* vec_vaddubm */
@@ -11089,6 +11149,12 @@ vec_vsubfp(vector float __a, vector floa
 
 /* vec_subc */
 
+static __inline__ vector signed int __ATTRS_o_ai
+vec_subc(vector signed int __a, vector signed int __b) {
+  return (vector signed int)__builtin_altivec_vsubcuw((vector unsigned int)__a,
+  (vector unsigned int) 
__b);
+}
+
 static __inline__ vector unsigned int __ATTRS_o_ai
 vec_subc(vector unsigned int __a, vector unsigned int __b) {
   return __builtin_altivec_vsubcuw(__a, __b);
@@ -11322,6 +11388,7 @@ vec_vsubuqm(vector unsigned __int128 __a
 
 /* vec_vsubeuqm */
 
+
 static __inline__ vector signed __int128 __ATTRS_o_ai
 vec_vsubeuqm(vector signed __int128 __a, vector signed __int128 __b,
  vector signed __int128 __c) {
@@ -11334,6 +11401,18 @@ vec_vsubeuqm(vector unsigned __int128 __
   return __

[PATCH] D26479: [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

2016-11-10 Thread Ehsan Amiri via cfe-commits 
amehsan added a comment.

I actually wanted to check some surrounding guards.


Repository:
  rL LLVM

https://reviews.llvm.org/D26479



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[PATCH] D26479: [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion

2016-11-10 Thread Ehsan Amiri via cfe-commits 
amehsan added a comment.

more context?


Repository:
  rL LLVM

https://reviews.llvm.org/D26479



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[PATCH] D26544: [PPC] support for arithmetic builtins in the FE

2016-11-11 Thread Ehsan Amiri via cfe-commits 
amehsan created this revision.
amehsan added reviewers: kbarton, nemanjai, sfertile, jtony, hfinkel, syzaara, 
lei.
amehsan added subscribers: cfe-commits, echristo.

This includes various overloads of the following builtins:

- vec_neg
- vec_nabs
- vec_adde
- vec_addec
- vec_sube
- vec_subec
- vec_subc

There is a small backend patch as well that I will post separately, but this is 
independent.


https://reviews.llvm.org/D26544

Files:
  lib/Headers/altivec.h
  test/CodeGen/builtins-ppc-altivec.c
  test/CodeGen/builtins-ppc-p8vector.c
  test/CodeGen/builtins-ppc-quadword.c
  test/CodeGen/builtins-ppc-vsx.c

Index: test/CodeGen/builtins-ppc-vsx.c
===
--- test/CodeGen/builtins-ppc-vsx.c
+++ test/CodeGen/builtins-ppc-vsx.c
@@ -69,6 +69,18 @@
 // CHECK: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
 // CHECK-LE: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
 
+  res_vd = vec_abs(vd);
+// CHECK: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}})
+// CHECK-LE: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}})
+
+  res_vf = vec_nabs(vf);
+// CHECK: [[VEC:%[0-9]+]] = call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
+// CHECK-NEXT: fsub <4 x float> , [[VEC]]
+
+  res_vd = vec_nabs(vd);
+// CHECK: [[VECD:%[0-9]+]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{[0-9]*}})
+// CHECK: fsub <2 x double> , [[VECD]]
+
   dummy();
 // CHECK: call void @dummy()
 // CHECK-LE: call void @dummy()
@@ -1080,4 +1092,12 @@
 // CHECK: fmul <2 x double>
 // CHECK-LE: uitofp <2 x i64> %{{.*}} to <2 x double>
 // CHECK-LE: fmul <2 x double>
+
+  res_vf = vec_neg(vf);
+// CHECK: fsub <4 x float> , {{%[0-9]+}}
+// CHECK-LE: fsub <4 x float> , {{%[0-9]+}}
+
+  res_vd = vec_neg(vd);
+// CHECK: fsub <2 x double> , {{%[0-9]+}}
+// CHECK-LE: fsub <2 x double> , {{%[0-9]+}}
 }
Index: test/CodeGen/builtins-ppc-quadword.c
===
--- test/CodeGen/builtins-ppc-quadword.c
+++ test/CodeGen/builtins-ppc-quadword.c
@@ -119,11 +119,32 @@
 // CHECK-LE: @llvm.ppc.altivec.vsubeuqm
 // CHECK-PPC: error: assigning to '__vector __int128' (vector of 1 '__int128' value) from incompatible type 'int'
   
-  res_vulll = vec_vsubeuqm(vulll, vulll, vulll);
+  /* vec_sube */
+  res_vlll = vec_sube(vlll, vlll, vlll);
+// CHECK: @llvm.ppc.altivec.vsubeuqm
+// CHECK-LE: @llvm.ppc.altivec.vsubeuqm
+// CHECK-PPC: error: assigning to '__vector __int128' (vector of 1 '__int128' value) from incompatible type 'int'
+  
+  res_vulll = vec_sube(vulll, vulll, vulll);
 // CHECK: @llvm.ppc.altivec.vsubeuqm
 // CHECK-LE: @llvm.ppc.altivec.vsubeuqm
 // CHECK-PPC: error: assigning to '__vector unsigned __int128' (vector of 1 'unsigned __int128' value) from incompatible type 'int'
   
+  res_vlll = vec_sube(vlll, vlll, vlll);
+// CHECK: @llvm.ppc.altivec.vsubeuqm
+// CHECK-LE: @llvm.ppc.altivec.vsubeuqm
+// CHECK-PPC: error: assigning to '__vector __int128' (vector of 1 '__int128' value) from incompatible type 'int'
+  
+  res_vulll = vec_vsubeuqm(vulll, vulll, vulll);
+// CHECK: @llvm.ppc.altivec.vsubeuqm
+// CHECK-LE: @llvm.ppc.altivec.vsubeuqm
+// CHECK-PPC: error: assigning to '__vector unsigned __int128' (vector of 1 'unsigned __int128' value) from incompatible type 'int'
+
+  res_vulll = vec_sube(vulll, vulll, vulll);
+// CHECK: @llvm.ppc.altivec.vsubeuqm
+// CHECK-LE: @llvm.ppc.altivec.vsubeuqm
+// CHECK-PPC: error: assigning to '__vector unsigned __int128' (vector of 1 'unsigned __int128' value) from incompatible type 'int'
+
   /* vec_subc */
   res_vlll = vec_subc(vlll, vlll);
 // CHECK: @llvm.ppc.altivec.vsubcuq
@@ -157,4 +178,14 @@
 // CHECK-LE: @llvm.ppc.altivec.vsubecuq
 // CHECK-PPC: error: assigning to '__vector unsigned __int128' (vector of 1 'unsigned __int128' value) from incompatible type 'int'  
 
+  res_vlll = vec_subec(vlll, vlll, vlll);
+// CHECK: @llvm.ppc.altivec.vsubecuq
+// CHECK-LE: @llvm.ppc.altivec.vsubecuq
+// CHECK-PPC: error: assigning to '__vector __int128' (vector of 1 '__int128' value) from incompatible type 'int'  
+
+  res_vulll = vec_subec(vulll, vulll, vulll);
+// CHECK: @llvm.ppc.altivec.vsubecuq
+// CHECK-LE: @llvm.ppc.altivec.vsubecuq
+// CHECK-PPC: error: assigning to '__vector unsigned __int128' (vector of 1 'unsigned __int128' value) from incompatible type 'int'  
+
 }
Index: test/CodeGen/builtins-ppc-p8vector.c
===
--- test/CodeGen/builtins-ppc-p8vector.c
+++ test/CodeGen/builtins-ppc-p8vector.c
@@ -73,13 +73,6 @@
 // CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %{{[0-9]*}}, <2 x i64>
 // CHECK-PPC: error: call to 'vec_abs' is ambiguous
 
-  res_vd = vec_abs(vda);
-// CHECK: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{.*}})
-// CHECK: store <2 x double> %{{.*}}, <2 x double>* @res_vd
-// CHECK-LE: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{.*}})
-// CHECK-LE