[clang] 7a4968b - [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output

2023-07-25 Thread Corbin Robeck via cfe-commits 

Author: Corbin Robeck
Date: 2023-07-25T12:20:13-07:00
New Revision: 7a4968b5a378d1f06e638c99d0e983c35045fb34

URL: 
https://github.com/llvm/llvm-project/commit/7a4968b5a378d1f06e638c99d0e983c35045fb34
DIFF: 
https://github.com/llvm/llvm-project/commit/7a4968b5a378d1f06e638c99d0e983c35045fb34.diff

LOG: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output

In code object 5 
(https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata) the AMDGPU 
backend added the .uses_dynamic_stack bit to the kernel meta data to identity 
kernels which have compile time indeterminable stack usage (indirect function 
calls and recursion mainly). This patch adds this information to the output of 
the kernel-resource-usage remarks.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D156040

Author:Corbin Robeck 

Added: 


Modified: 
clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll

Removed: 




diff  --git a/clang/test/Frontend/amdgcn-machine-analysis-remarks.cl 
b/clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
index 9403d12afa05a7..a05e21b37b9127 100644
--- a/clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
+++ b/clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
@@ -1,11 +1,12 @@
 // REQUIRES: amdgpu-registered-target
 // RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx908 
-Rpass-analysis=kernel-resource-usage -S -O0 -verify %s -o /dev/null
 
-// expected-remark@+9 {{Function Name: foo}}
-// expected-remark@+8 {{SGPRs: 13}}
-// expected-remark@+7 {{VGPRs: 10}}
-// expected-remark@+6 {{AGPRs: 12}}
-// expected-remark@+5 {{ScratchSize [bytes/lane]: 0}}
+// expected-remark@+10 {{Function Name: foo}}
+// expected-remark@+9 {{SGPRs: 13}}
+// expected-remark@+8 {{VGPRs: 10}}
+// expected-remark@+7 {{AGPRs: 12}}
+// expected-remark@+6 {{ScratchSize [bytes/lane]: 0}}
+// expected-remark@+5 {{Dynamic Stack: False}}
 // expected-remark@+4 {{Occupancy [waves/SIMD]: 10}}
 // expected-remark@+3 {{SGPRs Spill: 0}}
 // expected-remark@+2 {{VGPRs Spill: 0}}

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 7cd8e53e65215f..4b9c699879e349 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -1293,6 +1293,9 @@ void AMDGPUAsmPrinter::emitResourceUsageRemarks(
 EmitResourceUsageRemark("NumAGPR", "AGPRs", CurrentProgramInfo.NumAccVGPR);
   EmitResourceUsageRemark("ScratchSize", "ScratchSize [bytes/lane]",
   CurrentProgramInfo.ScratchSize);
+  StringRef DynamicStackStr =
+  CurrentProgramInfo.DynamicCallStack ? "True" : "False";
+  EmitResourceUsageRemark("DynamicStack", "Dynamic Stack", DynamicStackStr);
   EmitResourceUsageRemark("Occupancy", "Occupancy [waves/SIMD]",
   CurrentProgramInfo.Occupancy);
   EmitResourceUsageRemark("SGPRSpill", "SGPRs Spill",

diff  --git a/llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll 
b/llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
index 2616b043324191..7252aa6120cab4 100644
--- a/llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
+++ b/llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -pass-remarks-output=%t 
-pass-remarks-analysis=kernel-resource-usage -filetype=obj -o /dev/null %s 2>&1 
| FileCheck -check-prefix=STDERR %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -pass-remarks-output=%t 
-pass-remarks-analysis=kernel-resource-usage -filetype=null %s 2>&1 | FileCheck 
-check-prefix=STDERR %s
 ; RUN: FileCheck -check-prefix=REMARK %s < %t
 
 ; STDERR: remark: foo.cl:27:0: Function Name: test_kernel
@@ -6,6 +6,7 @@
 ; STDERR-NEXT: remark: foo.cl:27:0: VGPRs: 9
 ; STDERR-NEXT: remark: foo.cl:27:0: AGPRs: 43
 ; STDERR-NEXT: remark: foo.cl:27:0: ScratchSize [bytes/lane]: 0
+; STDERR-NEXT: remark: foo.cl:27:0: Dynamic Stack: False
 ; STDERR-NEXT: remark: foo.cl:27:0: Occupancy [waves/SIMD]: 5
 ; STDERR-NEXT: remark: foo.cl:27:0: SGPRs Spill: 0
 ; STDERR-NEXT: remark: foo.cl:27:0: VGPRs Spill: 0
@@ -55,7 +56,16 @@
 ; REMARK-NEXT: Args:
 ; REMARK-NEXT:   - String:  'ScratchSize [bytes/lane]: '
 ; REMARK-NEXT:   - ScratchSize: '0'
-; REMARK-NEXT: ...
+; REMARK-NEXT: ..
+; REMARK-NEXT: --- !Analysis
+; REMARK-NEXT: Pass:kernel-resource-usage
+; REMARK-NEXT: Name:DynamicStack
+; REMARK-NEXT: DebugLoc:{ File: foo.cl, Line: 27, Column: 0 }
+; REMARK-NEXT: Function:test_kernel
+; REMARK-NEXT: Args:
+; REMARK-NEXT:   - String: ' Dynamic Stack: 
+; REMARK-NEXT:   - DynamicStack: 'False' 
+; REMARK-NEXT: ..
 ; REMARK-NEXT: --- !A

[clang] [llvm] [AMDGPU] Add cCang builtins for amdgcn s_ttrace intrinsics (PR #88076)

2024-04-08 Thread Corbin Robeck via cfe-commits 

https://github.com/CRobeck created 
https://github.com/llvm/llvm-project/pull/88076

None

>From 1e2cab61cbf46e5cc73d7ee6523dcce1a75c7549 Mon Sep 17 00:00:00 2001
From: Corbin Robeck 
Date: Mon, 8 Apr 2024 19:58:57 -0500
Subject: [PATCH] add clang builtins for amdgcn s_ttrace intrinsics

---
 clang/include/clang/Basic/BuiltinsAMDGPU.def | 2 ++
 llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsAMDGPU.def 
b/clang/include/clang/Basic/BuiltinsAMDGPU.def
index c660582cc98e66..d2912d271d4005 100644
--- a/clang/include/clang/Basic/BuiltinsAMDGPU.def
+++ b/clang/include/clang/Basic/BuiltinsAMDGPU.def
@@ -61,6 +61,8 @@ BUILTIN(__builtin_amdgcn_s_waitcnt, "vIi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsg, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsghalt, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_barrier, "v", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata, "v", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata_imm, "v", "n")
 BUILTIN(__builtin_amdgcn_wave_barrier, "v", "n")
 BUILTIN(__builtin_amdgcn_sched_barrier, "vIi", "n")
 BUILTIN(__builtin_amdgcn_sched_group_barrier, "vIiIiIi", "n")
diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td 
b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
index 6bbc13f1de86e2..ee9a5d7a343980 100644
--- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
@@ -1887,9 +1887,12 @@ def int_amdgcn_s_setprio :
 IntrHasSideEffects]>;
 
 def int_amdgcn_s_ttracedata :
+  ClangBuiltin<"__builtin_amdgcn_s_ttracedata">,
   DefaultAttrsIntrinsic<[], [llvm_i32_ty],
 [IntrNoMem, IntrHasSideEffects]>;
+
 def int_amdgcn_s_ttracedata_imm :
+  ClangBuiltin<"__builtin_amdgcn_s_ttracedata_imm">,
   DefaultAttrsIntrinsic<[], [llvm_i16_ty],
 [IntrNoMem, IntrHasSideEffects, ImmArg>]>;
 

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[clang] [llvm] [AMDGPU] Add Clang builtins for amdgcn s_ttrace intrinsics (PR #88076)

2024-04-08 Thread Corbin Robeck via cfe-commits 

https://github.com/CRobeck edited 
https://github.com/llvm/llvm-project/pull/88076
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[clang] [llvm] [AMDGPU] Add Clang builtins for amdgcn s_ttrace intrinsics (PR #88076)

2024-04-08 Thread Corbin Robeck via cfe-commits 

CRobeck wrote:

Probably want to add a test in: 
clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
as well.

https://github.com/llvm/llvm-project/pull/88076
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[clang] [llvm] [AMDGPU] Add Clang builtins for amdgcn s_ttrace intrinsics (PR #88076)

2024-04-08 Thread Corbin Robeck via cfe-commits 

https://github.com/CRobeck updated 
https://github.com/llvm/llvm-project/pull/88076

>From 1e2cab61cbf46e5cc73d7ee6523dcce1a75c7549 Mon Sep 17 00:00:00 2001
From: Corbin Robeck 
Date: Mon, 8 Apr 2024 19:58:57 -0500
Subject: [PATCH 1/3] add clang builtins for amdgcn s_ttrace intrinsics

---
 clang/include/clang/Basic/BuiltinsAMDGPU.def | 2 ++
 llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsAMDGPU.def 
b/clang/include/clang/Basic/BuiltinsAMDGPU.def
index c660582cc98e66..d2912d271d4005 100644
--- a/clang/include/clang/Basic/BuiltinsAMDGPU.def
+++ b/clang/include/clang/Basic/BuiltinsAMDGPU.def
@@ -61,6 +61,8 @@ BUILTIN(__builtin_amdgcn_s_waitcnt, "vIi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsg, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsghalt, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_barrier, "v", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata, "v", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata_imm, "v", "n")
 BUILTIN(__builtin_amdgcn_wave_barrier, "v", "n")
 BUILTIN(__builtin_amdgcn_sched_barrier, "vIi", "n")
 BUILTIN(__builtin_amdgcn_sched_group_barrier, "vIiIiIi", "n")
diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td 
b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
index 6bbc13f1de86e2..ee9a5d7a343980 100644
--- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
@@ -1887,9 +1887,12 @@ def int_amdgcn_s_setprio :
 IntrHasSideEffects]>;
 
 def int_amdgcn_s_ttracedata :
+  ClangBuiltin<"__builtin_amdgcn_s_ttracedata">,
   DefaultAttrsIntrinsic<[], [llvm_i32_ty],
 [IntrNoMem, IntrHasSideEffects]>;
+
 def int_amdgcn_s_ttracedata_imm :
+  ClangBuiltin<"__builtin_amdgcn_s_ttracedata_imm">,
   DefaultAttrsIntrinsic<[], [llvm_i16_ty],
 [IntrNoMem, IntrHasSideEffects, ImmArg>]>;
 

>From 8ad802d418ee9f2aea4a1ce56e3b67f750f59a4d Mon Sep 17 00:00:00 2001
From: Corbin Robeck 
Date: Mon, 8 Apr 2024 21:42:23 -0500
Subject: [PATCH 2/3] fix type issue

---
 clang/include/clang/Basic/BuiltinsAMDGPU.def  |  4 ++--
 .../CodeGenOpenCL/builtins-amdgcn-gfx12.cl| 21 +++
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsAMDGPU.def 
b/clang/include/clang/Basic/BuiltinsAMDGPU.def
index d2912d271d4005..302888adb47a17 100644
--- a/clang/include/clang/Basic/BuiltinsAMDGPU.def
+++ b/clang/include/clang/Basic/BuiltinsAMDGPU.def
@@ -61,8 +61,8 @@ BUILTIN(__builtin_amdgcn_s_waitcnt, "vIi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsg, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsghalt, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_barrier, "v", "n")
-BUILTIN(__builtin_amdgcn_s_ttracedata, "v", "n")
-BUILTIN(__builtin_amdgcn_s_ttracedata_imm, "v", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata, "vi", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata_imm, "vIs", "n")
 BUILTIN(__builtin_amdgcn_wave_barrier, "v", "n")
 BUILTIN(__builtin_amdgcn_sched_barrier, "vIi", "n")
 BUILTIN(__builtin_amdgcn_sched_group_barrier, "vIiIiIi", "n")
diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl 
b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
index ebd367bba0cdc1..61fdd9ae135033 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
@@ -235,3 +235,24 @@ unsigned test_s_get_barrier_state(int a)
   unsigned State = __builtin_amdgcn_s_get_barrier_state(a);
   return State;
 }
+
+// CHECK-LABEL: @test_s_ttracedata(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:call void @llvm.amdgcn.s.ttracedata()
+// CHECK-NEXT:ret void
+//
+void test_s_ttracedata()
+{
+  __builtin_amdgcn_s_ttracedata();
+}
+
+
+// CHECK-LABEL: @test_s_ttracedata_imm(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:call void @llvm.amdgcn.s.ttracedata_imm()
+// CHECK-NEXT:ret void
+//
+void test_s_ttracedata_imm()
+{
+  __builtin_amdgcn_s_ttracedata_imm();
+}

>From af4f8e63bc58e1e4ae1d532d55909659ed080aa1 Mon Sep 17 00:00:00 2001
From: Corbin Robeck 
Date: Mon, 8 Apr 2024 21:43:06 -0500
Subject: [PATCH 3/3] add ttrace builtin test

---
 clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl 
b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
index 61fdd9ae135033..26c0ee48306237 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
@@ -238,21 +238,22 @@ unsigned test_s_get_barrier_state(int a)
 
 // CHECK-LABEL: @test_s_ttracedata(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:call void @llvm.amdgcn.s.ttracedata()
+// CHECK-NEXT:call void @llvm.amdgcn.s.ttracedata(i32 1)
 // CHECK-NEXT:ret void
 //
 void test_s_ttracedata()
 {
-  __builtin_amdgcn_s_ttracedata();
+  __builtin_amdgcn_s_ttracedata(1);
 }
 
-
 // CHECK-LABEL: @test_s_ttracedata_imm(
 // CHECK-NEXT:  ent

[clang] [llvm] [AMDGPU] Add Clang builtins for amdgcn s_ttrace intrinsics (PR #88076)

2024-04-11 Thread Corbin Robeck via cfe-commits 

https://github.com/CRobeck updated 
https://github.com/llvm/llvm-project/pull/88076

>From 1e2cab61cbf46e5cc73d7ee6523dcce1a75c7549 Mon Sep 17 00:00:00 2001
From: Corbin Robeck 
Date: Mon, 8 Apr 2024 19:58:57 -0500
Subject: [PATCH 1/4] add clang builtins for amdgcn s_ttrace intrinsics

---
 clang/include/clang/Basic/BuiltinsAMDGPU.def | 2 ++
 llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/clang/include/clang/Basic/BuiltinsAMDGPU.def 
b/clang/include/clang/Basic/BuiltinsAMDGPU.def
index c660582cc98e66..d2912d271d4005 100644
--- a/clang/include/clang/Basic/BuiltinsAMDGPU.def
+++ b/clang/include/clang/Basic/BuiltinsAMDGPU.def
@@ -61,6 +61,8 @@ BUILTIN(__builtin_amdgcn_s_waitcnt, "vIi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsg, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsghalt, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_barrier, "v", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata, "v", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata_imm, "v", "n")
 BUILTIN(__builtin_amdgcn_wave_barrier, "v", "n")
 BUILTIN(__builtin_amdgcn_sched_barrier, "vIi", "n")
 BUILTIN(__builtin_amdgcn_sched_group_barrier, "vIiIiIi", "n")
diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td 
b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
index 6bbc13f1de86e2..ee9a5d7a343980 100644
--- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
@@ -1887,9 +1887,12 @@ def int_amdgcn_s_setprio :
 IntrHasSideEffects]>;
 
 def int_amdgcn_s_ttracedata :
+  ClangBuiltin<"__builtin_amdgcn_s_ttracedata">,
   DefaultAttrsIntrinsic<[], [llvm_i32_ty],
 [IntrNoMem, IntrHasSideEffects]>;
+
 def int_amdgcn_s_ttracedata_imm :
+  ClangBuiltin<"__builtin_amdgcn_s_ttracedata_imm">,
   DefaultAttrsIntrinsic<[], [llvm_i16_ty],
 [IntrNoMem, IntrHasSideEffects, ImmArg>]>;
 

>From 8ad802d418ee9f2aea4a1ce56e3b67f750f59a4d Mon Sep 17 00:00:00 2001
From: Corbin Robeck 
Date: Mon, 8 Apr 2024 21:42:23 -0500
Subject: [PATCH 2/4] fix type issue

---
 clang/include/clang/Basic/BuiltinsAMDGPU.def  |  4 ++--
 .../CodeGenOpenCL/builtins-amdgcn-gfx12.cl| 21 +++
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsAMDGPU.def 
b/clang/include/clang/Basic/BuiltinsAMDGPU.def
index d2912d271d4005..302888adb47a17 100644
--- a/clang/include/clang/Basic/BuiltinsAMDGPU.def
+++ b/clang/include/clang/Basic/BuiltinsAMDGPU.def
@@ -61,8 +61,8 @@ BUILTIN(__builtin_amdgcn_s_waitcnt, "vIi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsg, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_sendmsghalt, "vIiUi", "n")
 BUILTIN(__builtin_amdgcn_s_barrier, "v", "n")
-BUILTIN(__builtin_amdgcn_s_ttracedata, "v", "n")
-BUILTIN(__builtin_amdgcn_s_ttracedata_imm, "v", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata, "vi", "n")
+BUILTIN(__builtin_amdgcn_s_ttracedata_imm, "vIs", "n")
 BUILTIN(__builtin_amdgcn_wave_barrier, "v", "n")
 BUILTIN(__builtin_amdgcn_sched_barrier, "vIi", "n")
 BUILTIN(__builtin_amdgcn_sched_group_barrier, "vIiIiIi", "n")
diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl 
b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
index ebd367bba0cdc1..61fdd9ae135033 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
@@ -235,3 +235,24 @@ unsigned test_s_get_barrier_state(int a)
   unsigned State = __builtin_amdgcn_s_get_barrier_state(a);
   return State;
 }
+
+// CHECK-LABEL: @test_s_ttracedata(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:call void @llvm.amdgcn.s.ttracedata()
+// CHECK-NEXT:ret void
+//
+void test_s_ttracedata()
+{
+  __builtin_amdgcn_s_ttracedata();
+}
+
+
+// CHECK-LABEL: @test_s_ttracedata_imm(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:call void @llvm.amdgcn.s.ttracedata_imm()
+// CHECK-NEXT:ret void
+//
+void test_s_ttracedata_imm()
+{
+  __builtin_amdgcn_s_ttracedata_imm();
+}

>From af4f8e63bc58e1e4ae1d532d55909659ed080aa1 Mon Sep 17 00:00:00 2001
From: Corbin Robeck 
Date: Mon, 8 Apr 2024 21:43:06 -0500
Subject: [PATCH 3/4] add ttrace builtin test

---
 clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl 
b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
index 61fdd9ae135033..26c0ee48306237 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
@@ -238,21 +238,22 @@ unsigned test_s_get_barrier_state(int a)
 
 // CHECK-LABEL: @test_s_ttracedata(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:call void @llvm.amdgcn.s.ttracedata()
+// CHECK-NEXT:call void @llvm.amdgcn.s.ttracedata(i32 1)
 // CHECK-NEXT:ret void
 //
 void test_s_ttracedata()
 {
-  __builtin_amdgcn_s_ttracedata();
+  __builtin_amdgcn_s_ttracedata(1);
 }
 
-
 // CHECK-LABEL: @test_s_ttracedata_imm(
 // CHECK-NEXT:  ent

[clang] [llvm] [AMDGPU] Add Clang builtins for amdgcn s_ttrace intrinsics (PR #88076)

2024-04-11 Thread Corbin Robeck via cfe-commits 

https://github.com/CRobeck closed 
https://github.com/llvm/llvm-project/pull/88076
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