[clang] 512e256 - [PowerPC] Add clang options to control MMA support

2020-08-24 Thread Baptiste Saleil via cfe-commits 

Author: Baptiste Saleil
Date: 2020-08-24T09:35:55-05:00
New Revision: 512e256c0d8c0fed5b4603ed5ed74b6ad503f368

URL: 
https://github.com/llvm/llvm-project/commit/512e256c0d8c0fed5b4603ed5ed74b6ad503f368
DIFF: 
https://github.com/llvm/llvm-project/commit/512e256c0d8c0fed5b4603ed5ed74b6ad503f368.diff

LOG: [PowerPC] Add clang options to control MMA support

This patch adds frontend and backend options to enable and disable
the PowerPC MMA operations added in ISA 3.1. Instructions using these
options will be added in subsequent patches.

Differential Revision: https://reviews.llvm.org/D81442

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Basic/Targets/PPC.cpp
clang/lib/Basic/Targets/PPC.h
clang/test/Driver/ppc-dependent-options.cpp
clang/test/Preprocessor/init-ppc64.c
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
llvm/lib/Target/PowerPC/PPCScheduleP9.td
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
llvm/test/CodeGen/PowerPC/future-check-features.ll

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 111eec4b4a00..05aa79d06464 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -2506,6 +2506,8 @@ def mlongcall: Flag<["-"], "mlongcall">,
 Group;
 def mno_longcall : Flag<["-"], "mno-longcall">,
 Group;
+def mmma: Flag<["-"], "mmma">, Group;
+def mno_mma: Flag<["-"], "mno-mma">, Group;
 def maix_struct_return : Flag<["-"], "maix-struct-return">,
   Group, Flags<[CC1Option]>,
   HelpText<"Return all structs in memory (PPC32 only)">;

diff  --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index c5ad4a5a2d27..13db564d360d 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -64,6 +64,8 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
   FloatABI = SoftFloat;
 } else if (Feature == "+paired-vector-memops") {
   PairedVectorMemops = true;
+} else if (Feature == "+mma") {
+  HasMMA = true;
 }
 // TODO: Finish this list and add an assert that we've handled them
 // all.
@@ -184,6 +186,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions 
&Opts,
 Builder.defineMacro("__FLOAT128__");
   if (HasP9Vector)
 Builder.defineMacro("__POWER9_VECTOR__");
+  if (HasMMA)
+Builder.defineMacro("__MMA__");
   if (HasP10Vector)
 Builder.defineMacro("__POWER10_VECTOR__");
 
@@ -221,6 +225,7 @@ void PPCTargetInfo::getTargetDefines(const LangOptions 
&Opts,
 // - float128
 // - power9-vector
 // - paired-vector-memops
+// - mma
 // - power10-vector
 // then go ahead and error since the customer has expressed an incompatible
 // set of options.
@@ -244,6 +249,7 @@ static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
   Found |= FindVSXSubfeature("+float128", "-mfloat128");
   Found |= FindVSXSubfeature("+power9-vector", "-mpower9-vector");
   Found |= FindVSXSubfeature("+paired-vector-memops", 
"-mpaired-vector-memops");
+  Found |= FindVSXSubfeature("+mma", "-mmma");
   Found |= FindVSXSubfeature("+power10-vector", "-mpower10-vector");
 
   // Return false if any vsx subfeatures was found.
@@ -345,6 +351,7 @@ void PPCTargetInfo::addP10SpecificFeatures(
 llvm::StringMap &Features) const {
   Features["htm"] = false; // HTM was removed for P10.
   Features["paired-vector-memops"] = true;
+  Features["mma"] = true;
   Features["power10-vector"] = true;
   Features["pcrelative-memops"] = true;
   return;
@@ -373,6 +380,7 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
   .Case("power10-vector", HasP10Vector)
   .Case("pcrelative-memops", HasPCRelativeMemops)
   .Case("spe", HasSPE)
+  .Case("mma", HasMMA)
   .Default(false);
 }
 
@@ -389,6 +397,7 @@ void PPCTargetInfo::setFeatureEnabled(llvm::StringMap 
&Features,
  .Case("paired-vector-memops", true)
  .Case("power10-vector", true)
  .Case("float128", true)
+ .Case("mma", true)
  .Default(false);
 if (FeatureHasVSX)
   Features["vsx"] = Features["altivec"] = true;
@@ -406,13 +415,14 @@ void 
PPCTargetInfo::setFeatureEnabled(llvm::StringMap &Features,
 if ((Name == "altivec") || (Name == "vsx"))
   Features["vsx"] = Features["direct-move"] = Features["power8-vector"] =
   Features["float128"] = Features["power9-vector"] =
-  Features["paired-vector-memops"] = Features["power10-vector"] =
-  false;
+  Features["paired-vector-memops"] = Features["mma"] =
+  Features["power10-vector"] = false;
 if (Name == "power8-vector")
   Features["power9-vector"] = Features["paired-vect

[clang] 57d83c3 - [PowerPC] Enable paired vector type and intrinsics when MMA is disabled

2020-12-15 Thread Baptiste Saleil via cfe-commits 

Author: Baptiste Saleil
Date: 2020-12-15T15:14:11-06:00
New Revision: 57d83c3a90c427ad0975803feb5b348d1ad34e29

URL: 
https://github.com/llvm/llvm-project/commit/57d83c3a90c427ad0975803feb5b348d1ad34e29
DIFF: 
https://github.com/llvm/llvm-project/commit/57d83c3a90c427ad0975803feb5b348d1ad34e29.diff

LOG: [PowerPC] Enable paired vector type and intrinsics when MMA is disabled

This patch enables the Clang type __vector_pair and its associated LLVM
intrinsics even when MMA is disabled. With this patch, the type is now 
controlled
by the PPC paired-vector-memops option. The builtins and intrinsics will be
renamed to drop the mma prefix in another patch.

Differential Revision: https://reviews.llvm.org/D91819

Added: 
clang/test/AST/ast-dump-ppc-types.c
llvm/test/CodeGen/PowerPC/paired-vector-intrinsics-without-mma.ll

Modified: 
clang/include/clang/AST/ASTContext.h
clang/include/clang/AST/Type.h
clang/include/clang/AST/TypeProperties.td
clang/include/clang/Basic/PPCTypes.def
clang/include/clang/Serialization/ASTBitCodes.h
clang/lib/AST/ASTContext.cpp
clang/lib/AST/ASTImporter.cpp
clang/lib/AST/ExprConstant.cpp
clang/lib/AST/ItaniumMangle.cpp
clang/lib/AST/MicrosoftMangle.cpp
clang/lib/AST/NSAPI.cpp
clang/lib/AST/PrintfFormatString.cpp
clang/lib/AST/Type.cpp
clang/lib/AST/TypeLoc.cpp
clang/lib/CodeGen/CGDebugInfo.cpp
clang/lib/CodeGen/CodeGenTypes.cpp
clang/lib/CodeGen/ItaniumCXXABI.cpp
clang/lib/Index/USRGeneration.cpp
clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaChecking.cpp
clang/lib/Sema/SemaExpr.cpp
clang/lib/Serialization/ASTCommon.cpp
clang/lib/Serialization/ASTReader.cpp
clang/tools/libclang/CIndex.cpp
llvm/lib/Target/PowerPC/PPCInstrPrefix.td

Removed: 
clang/test/AST/ast-dump-ppc-mma-types.c



diff  --git a/clang/include/clang/AST/ASTContext.h 
b/clang/include/clang/AST/ASTContext.h
index 71f824b69bc8..ff84eb52e96e 100644
--- a/clang/include/clang/AST/ASTContext.h
+++ b/clang/include/clang/AST/ASTContext.h
@@ -1007,7 +1007,7 @@ class ASTContext : public RefCountedBase {
 #define SVE_TYPE(Name, Id, SingletonId) \
   CanQualType SingletonId;
 #include "clang/Basic/AArch64SVEACLETypes.def"
-#define PPC_MMA_VECTOR_TYPE(Name, Id, Size) \
+#define PPC_VECTOR_TYPE(Name, Id, Size) \
   CanQualType Id##Ty;
 #include "clang/Basic/PPCTypes.def"
 

diff  --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 99cfa3ae76f5..945ea7a600c0 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -2489,7 +2489,7 @@ class BuiltinType : public Type {
 #define SVE_TYPE(Name, Id, SingletonId) Id,
 #include "clang/Basic/AArch64SVEACLETypes.def"
 // PPC MMA Types
-#define PPC_MMA_VECTOR_TYPE(Name, Id, Size) Id,
+#define PPC_VECTOR_TYPE(Name, Id, Size) Id,
 #include "clang/Basic/PPCTypes.def"
 // All other builtin types
 #define BUILTIN_TYPE(Id, SingletonId) Id,

diff  --git a/clang/include/clang/AST/TypeProperties.td 
b/clang/include/clang/AST/TypeProperties.td
index b582395c44a6..ffcc8290938f 100644
--- a/clang/include/clang/AST/TypeProperties.td
+++ b/clang/include/clang/AST/TypeProperties.td
@@ -765,7 +765,7 @@ let Class = BuiltinType in {
   case BuiltinType::ID: return ctx.SINGLETON_ID;
 #include "clang/Basic/AArch64SVEACLETypes.def"
 
-#define PPC_MMA_VECTOR_TYPE(NAME, ID, SIZE) \
+#define PPC_VECTOR_TYPE(NAME, ID, SIZE) \
   case BuiltinType::ID: return ctx.ID##Ty;
 #include "clang/Basic/PPCTypes.def"
 

diff  --git a/clang/include/clang/Basic/PPCTypes.def 
b/clang/include/clang/Basic/PPCTypes.def
index 86656f3568f8..9e2cb2aedc9f 100644
--- a/clang/include/clang/Basic/PPCTypes.def
+++ b/clang/include/clang/Basic/PPCTypes.def
@@ -7,14 +7,32 @@
 
//===--===//
 //
 //  This file defines PPC types.
-//  Custom code should define this macro:
+//  Custom code should define one of these macros:
 //
-//PPC_MMA_VECTOR_TYPE(Name, Id, Size) - A MMA vector type of a given size
+//PPC_VECTOR_TYPE(Name, Id, Size) - A PPC vector type of a given size
 //(in bits).
 //
+//PPC_VECTOR_MMA_TYPE(Name, Id, Size) - A PPC MMA vector type of a given
+//size (in bits).
+//
+//PPC_VECTOR_VSX_TYPE(Name, Id, Size) - A PPC VSX vector type of a given
+//size (in bits).
+//
 
//===--===//
 
-PPC_MMA_VECTOR_TYPE(__vector_quad, VectorQuad, 512)
-PPC_MMA_VECTOR_TYPE(__vector_pair, VectorPair, 256)
+#if defined(PPC_VECTOR_TYPE)
+  #define PPC_VECTOR_MMA_TYPE(Name, Id, Size) PPC_VECTOR_TYPE(Name, Id, Size)
+  #define PPC_VECTOR_VSX_TYPE(Name, Id, Size) PPC_VECTOR_TYPE(Name, Id, Size)
+#elif defined(PPC_VECTOR_MMA_TYPE)
+  #define PPC_VECTOR_VSX_TYPE(Name, Id, Size)
+#elif defined(PPC_VECTOR_VSX_TYPE)
+  #define PPC_VECTOR_MMA_TYPE(Name, Id, Size)

[clang] daa127d - [PowerPC] Add MMA builtin decoding and definitions

2020-11-03 Thread Baptiste Saleil via cfe-commits 

Author: Baptiste Saleil
Date: 2020-11-03T15:08:46-06:00
New Revision: daa127d77eab2547b1b7754939aa3f91fa8b1801

URL: 
https://github.com/llvm/llvm-project/commit/daa127d77eab2547b1b7754939aa3f91fa8b1801
DIFF: 
https://github.com/llvm/llvm-project/commit/daa127d77eab2547b1b7754939aa3f91fa8b1801.diff

LOG: [PowerPC] Add MMA builtin decoding and definitions

Add MMA builtin decoding. These builtins use the new PowerPC-specific types 
__vector_pair and __vector_quad.
So to avoid pervasive changes, we use custom type descriptors and custom 
decoding for these builtins.
We also use custom code generation to expand builtin calls with pointers to 
simpler intrinsic calls with non-pointer types.

Differential Revision: https://reviews.llvm.org/D81748

Added: 
clang/test/CodeGen/builtins-ppc-mma.c

Modified: 
clang/include/clang/AST/ASTContext.h
clang/include/clang/Basic/BuiltinsPPC.def
clang/include/clang/Sema/Sema.h
clang/lib/AST/ASTContext.cpp
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Sema/SemaChecking.cpp

Removed: 




diff  --git a/clang/include/clang/AST/ASTContext.h 
b/clang/include/clang/AST/ASTContext.h
index 59135b6a4d35..5c92dfa39f69 100644
--- a/clang/include/clang/AST/ASTContext.h
+++ b/clang/include/clang/AST/ASTContext.h
@@ -2047,6 +2047,10 @@ class ASTContext : public RefCountedBase {
 GE_Missing_ucontext
   };
 
+  QualType DecodeTypeStr(const char *&Str, const ASTContext &Context,
+ ASTContext::GetBuiltinTypeError &Error,
+ bool &RequireICE, bool AllowTypeModifiers) const;
+
   /// Return the type for the specified builtin.
   ///
   /// If \p IntegerConstantArgs is non-null, it is filled in with a bitmask of

diff  --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index fe20c9418e8d..f35a49b681cc 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -7,14 +7,22 @@
 
//===--===//
 //
 // This file defines the PowerPC-specific builtin function database.  Users of
-// this file must define the BUILTIN macro to make use of this information.
+// this file must define the BUILTIN macro or the MMA_BUILTIN macro to make use
+// of this information.
 //
 
//===--===//
 
 // FIXME: this needs to be the full list supported by GCC.  Right now, I'm just
 // adding stuff on demand.
 
-// The format of this database matches clang/Basic/Builtins.def.
+// The format of this database matches clang/Basic/Builtins.def except for the
+// MMA builtins that are using their own format documented below.
+
+#if defined(BUILTIN) && !defined(MMA_BUILTIN)
+#   define MMA_BUILTIN(ID, TYPES, ACCUMULATE) BUILTIN(__builtin_mma_##ID, 
"i.", "t")
+#elif defined(MMA_BUILTIN) && !defined(BUILTIN)
+#   define BUILTIN(ID, TYPES, ATTRS)
+#endif
 
 BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n")
 
@@ -646,6 +654,92 @@ BUILTIN(__builtin_setflm, "dd", "")
 // Cache built-ins
 BUILTIN(__builtin_dcbf, "vvC*", "")
 
+// MMA built-ins
+// All MMA built-ins are declared here using the MMA_BUILTIN macro. Because
+// these built-ins rely on target-dependent types and to avoid pervasive 
change,
+// they are type checked manually in Sema using custom type descriptors.
+// The first argument of the MMA_BUILTIN macro is the name of the built-in, the
+// second argument specifies the type of the function (result value, then each
+// argument) as follows:
+//  i -> Unsigned integer followed by the greatest possible value for that
+//   argument or 0 if no constraint on the value.
+//   (e.g. i15 for a 4-bits value)
+//  v -> void
+//  V -> Vector type used with MMA builtins (vector unsigned char)
+//  W -> MMA vector type followed by the size of the vector type.
+//   (e.g. W512 for __vector_quad)
+// The 'C' suffix can be used as a suffix to specify the const type.
+// The '*' suffix can be used as a suffix to specify a pointer to a type.
+// The third argument is set to true if the builtin accumulates its result into
+// its given accumulator.
+
+MMA_BUILTIN(assemble_acc, "vW512*", false)
+MMA_BUILTIN(disassemble_acc, "vv*W512*", false)
+MMA_BUILTIN(assemble_pair, "vW256*VV", false)
+MMA_BUILTIN(disassemble_pair, "vv*W256*", false)
+MMA_BUILTIN(xxmtacc, "vW512*", true)
+MMA_BUILTIN(xxmfacc, "vW512*", true)
+MMA_BUILTIN(xxsetaccz, "vW512*", false)
+MMA_BUILTIN(xvi4ger8, "vW512*VV", false)
+MMA_BUILTIN(xvi8ger4, "vW512*VV", false)
+MMA_BUILTIN(xvi16ger2, "vW512*VV", false)
+MMA_BUILTIN(xvi16ger2s, "vW512*VV", false)
+MMA_BUILTIN(xvf16ger2, "vW512*VV", false)
+MMA_BUILTIN(xvf32ger, "vW512*VV", false)
+MMA_BUILTIN(xvf64ger, "vW512*W256V", false)
+MMA_BUILTIN(pmxvi4ger8, "vW512*VVi15i15i255", false)
+MMA_BUILTIN(pmxvi8ger4, "vW512*VVi15i15i15", f

[clang] f976ba6 - [PowerPC] Add Sema checks for MMA types

2020-11-04 Thread Baptiste Saleil via cfe-commits 

Author: Baptiste Saleil
Date: 2020-11-04T17:01:47-06:00
New Revision: f976ba61395811732b4605b6fb9b6ba5cd489372

URL: 
https://github.com/llvm/llvm-project/commit/f976ba61395811732b4605b6fb9b6ba5cd489372
DIFF: 
https://github.com/llvm/llvm-project/commit/f976ba61395811732b4605b6fb9b6ba5cd489372.diff

LOG: [PowerPC] Add Sema checks for MMA types

The use of the new types introduced for PowerPC MMA instructions needs to be 
restricted.
We add a PowerPC function checking that the given type is valid in a context in 
which we don't allow MMA types.
This function is called from various places in Sema where we want to prevent 
the use of these types.

Differential Revision: https://reviews.llvm.org/D82035

Added: 
clang/test/Sema/ppc-mma-types.c
clang/test/SemaCXX/ppc-mma-types.cpp

Modified: 
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/include/clang/Sema/Sema.h
clang/lib/Sema/SemaChecking.cpp
clang/lib/Sema/SemaDecl.cpp
clang/lib/Sema/SemaExprCXX.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 83d968d3ae95..b9b76e8a9fb3 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -9503,6 +9503,8 @@ def err_mips_builtin_requires_msa : Error<
   "this builtin requires 'msa' ASE, please use -mmsa">;
 def err_ppc_builtin_only_on_pwr7 : Error<
   "this builtin is only valid on POWER7 or later CPUs">;
+def err_ppc_invalid_use_mma_type : Error<
+  "invalid use of PPC MMA type">;
 def err_x86_builtin_invalid_rounding : Error<
   "invalid rounding argument">;
 def err_x86_builtin_invalid_scale : Error<

diff  --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h
index c42bc740ffa9..83d2a3122110 100644
--- a/clang/include/clang/Sema/Sema.h
+++ b/clang/include/clang/Sema/Sema.h
@@ -12350,6 +12350,8 @@ class Sema final {
   bool SemaBuiltinARMMemoryTaggingCall(unsigned BuiltinID, CallExpr *TheCall);
   bool SemaBuiltinPPCMMACall(CallExpr *TheCall, const char *TypeDesc);
 
+  bool CheckPPCMMAType(QualType Type, SourceLocation TypeLoc);
+
   // Matrix builtin handling.
   ExprResult SemaBuiltinMatrixTranspose(CallExpr *TheCall,
 ExprResult CallResult);

diff  --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 004028810d6e..eacf00c93015 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -3307,6 +3307,23 @@ bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo 
&TI, unsigned BuiltinID,
   return SemaBuiltinConstantArgRange(TheCall, i, l, u);
 }
 
+// Check if the given type is a non-pointer PPC MMA type. This function is used
+// in Sema to prevent invalid uses of restricted PPC MMA types.
+bool Sema::CheckPPCMMAType(QualType Type, SourceLocation TypeLoc) {
+  if (Type->isPointerType() || Type->isArrayType())
+return false;
+
+  QualType CoreType = Type.getCanonicalType().getUnqualifiedType();
+#define PPC_MMA_VECTOR_TYPE(Name, Id, Size) || CoreType == Context.Id##Ty
+  if (false
+#include "clang/Basic/PPCTypes.def"
+ ) {
+Diag(TypeLoc, diag::err_ppc_invalid_use_mma_type);
+return true;
+  }
+  return false;
+}
+
 bool Sema::CheckAMDGCNBuiltinFunctionCall(unsigned BuiltinID,
   CallExpr *TheCall) {
   // position of memory order and scope arguments in the builtin
@@ -10315,6 +10332,11 @@ Sema::CheckReturnValExpr(Expr *RetValExp, QualType 
lhsType,
   << FD << getLangOpts().CPlusPlus11;
 }
   }
+
+  // PPC MMA non-pointer types are not allowed as return type. Checking the 
type
+  // here prevent the user from using a PPC MMA type as trailing return type.
+  if (Context.getTargetInfo().getTriple().isPPC64())
+CheckPPCMMAType(RetValExp->getType(), ReturnLoc);
 }
 
 //===--- CHECK: Floating-Point comparisons (-Wfloat-equal) ---===//

diff  --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp
index 6af2c188ba50..1afb4dcc7ff7 100644
--- a/clang/lib/Sema/SemaDecl.cpp
+++ b/clang/lib/Sema/SemaDecl.cpp
@@ -8037,6 +8037,14 @@ void Sema::CheckVariableDeclarationType(VarDecl *NewVD) {
 NewVD->setInvalidDecl();
 return;
   }
+
+  // PPC MMA non-pointer types are not allowed as non-local variable types.
+  if (Context.getTargetInfo().getTriple().isPPC64() &&
+  !NewVD->isLocalVarDecl() &&
+  CheckPPCMMAType(T, NewVD->getLocation())) {
+NewVD->setInvalidDecl();
+return;
+  }
 }
 
 /// Perform semantic checking on a newly-created variable
@@ -10681,6 +10689,12 @@ bool Sema::CheckFunctionDeclaration(Scope *S, 
FunctionDecl *NewFD,
 MergeTypeWithPrevious, Previous))
 return Redeclaration;
 
+  // PPC MMA non-pointer types are not allowed as function return types.
+  if (Context.getTargetInfo().get

[clang] 170e45a - [PowerPC] Prevent the use of MMA with P9 and earlier

2020-11-12 Thread Baptiste Saleil via cfe-commits 

Author: Baptiste Saleil
Date: 2020-11-12T10:36:50-06:00
New Revision: 170e45ae186b3eed16898db933c94a85ac623933

URL: 
https://github.com/llvm/llvm-project/commit/170e45ae186b3eed16898db933c94a85ac623933
DIFF: 
https://github.com/llvm/llvm-project/commit/170e45ae186b3eed16898db933c94a85ac623933.diff

LOG: [PowerPC] Prevent the use of MMA with P9 and earlier

We want to allow using MMA on P10 CPU only. This patch prevents the use of MMA
with the -mmma option on P9 CPUs and earlier.

Differential Revision: https://reviews.llvm.org/D91200

Added: 
clang/test/Driver/ppc-mma-support-check.c

Modified: 
clang/lib/Basic/Targets/PPC.cpp
clang/test/Preprocessor/init-ppc64.c

Removed: 




diff  --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index bafaed7c4caf..7f6f3d7e0c9f 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -347,6 +347,13 @@ bool PPCTargetInfo::initFeatureMap(
 return false;
   }
 
+  if (!(ArchDefs & ArchDefinePwr10) &&
+  llvm::find(FeaturesVec, "+mma") != FeaturesVec.end()) {
+// We have MMA on PPC but not power 10 and above.
+Diags.Report(diag::err_opt_not_valid_with_opt) << "-mmma" << CPU;
+return false;
+  }
+
   return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
 }
 

diff  --git a/clang/test/Driver/ppc-mma-support-check.c 
b/clang/test/Driver/ppc-mma-support-check.c
new file mode 100644
index ..cd701619bbe4
--- /dev/null
+++ b/clang/test/Driver/ppc-mma-support-check.c
@@ -0,0 +1,22 @@
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mcpu=pwr10 -mmma %s 2>&1 | FileCheck %s --check-prefix=HASMMA
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mcpu=power10 -mmma %s 2>&1 | FileCheck %s --check-prefix=HASMMA
+
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mcpu=pwr9 -mmma %s 2>&1 | FileCheck %s --check-prefix=NOMMA
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mcpu=pwr8 -mmma %s 2>&1 | FileCheck %s --check-prefix=NOMMA
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mcpu=pwr7 -mmma %s 2>&1 | FileCheck %s --check-prefix=NOMMA
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mmma %s 2>&1 | FileCheck %s --check-prefix=NOMMA
+
+#ifdef __MMA__
+static_assert(false, "MMA enabled");
+#endif
+
+// HASMMA: MMA enabled
+// HASMMA-NOT: option '-mmma' cannot be specified with
+// NOMMA: option '-mmma' cannot be specified with
+

diff  --git a/clang/test/Preprocessor/init-ppc64.c 
b/clang/test/Preprocessor/init-ppc64.c
index dd965b86b879..120f1b3dba6a 100644
--- a/clang/test/Preprocessor/init-ppc64.c
+++ b/clang/test/Preprocessor/init-ppc64.c
@@ -648,7 +648,7 @@
 // PPCFUTURE:#define _ARCH_PWR_FUTURE 1
 // PPCFUTURE:#define __MMA__ 1
 //
-// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none 
-target-feature +mma -target-cpu power9 -fno-signed-char < /dev/null | 
FileCheck -check-prefix PPC-MMA %s
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none 
-target-feature +mma -target-cpu power10 -fno-signed-char < /dev/null | 
FileCheck -check-prefix PPC-MMA %s
 // PPC-MMA:#define __MMA__ 1
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none 
-target-feature +float128 -target-cpu power9 -fno-signed-char < /dev/null | 
FileCheck -check-prefix PPC-FLOAT128 %s



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[clang] 3f78605 - [PowerPC] Add paired vector load and store builtins and intrinsics

2020-11-13 Thread Baptiste Saleil via cfe-commits 

Author: Baptiste Saleil
Date: 2020-11-13T12:35:10-06:00
New Revision: 3f78605a8cb121d005c0ad11cce83cf58be983f2

URL: 
https://github.com/llvm/llvm-project/commit/3f78605a8cb121d005c0ad11cce83cf58be983f2
DIFF: 
https://github.com/llvm/llvm-project/commit/3f78605a8cb121d005c0ad11cce83cf58be983f2.diff

LOG: [PowerPC] Add paired vector load and store builtins and intrinsics

This patch adds the Clang builtins and LLVM intrinsics to load and store vector 
pairs.

Differential Revision: https://reviews.llvm.org/D90799

Added: 
llvm/test/CodeGen/PowerPC/dform-pair-load-store.ll
llvm/test/CodeGen/PowerPC/loop-p10-pair-prepare.ll

Modified: 
clang/include/clang/Basic/BuiltinsPPC.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-ppc-mma.c
clang/test/Sema/ppc-mma-types.c
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
llvm/test/CodeGen/PowerPC/mma-intrinsics.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsPPC.def 
b/clang/include/clang/Basic/BuiltinsPPC.def
index f35a49b681cc..78ce77043b6f 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -738,6 +738,8 @@ MMA_BUILTIN(pmxvbf16ger2pp, "vW512*VVi15i15i3", true)
 MMA_BUILTIN(pmxvbf16ger2pn, "vW512*VVi15i15i3", true)
 MMA_BUILTIN(pmxvbf16ger2np, "vW512*VVi15i15i3", true)
 MMA_BUILTIN(pmxvbf16ger2nn, "vW512*VVi15i15i3", true)
+MMA_BUILTIN(lxvp, "W256SLLiW256C*", false)
+MMA_BUILTIN(stxvp, "vW256SLLiW256C*", false)
 
 // FIXME: Obviously incomplete.
 

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 0b8259221d8f..0ea149e0cbde 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -14776,6 +14776,19 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned 
BuiltinID,
   break;
   #include "clang/Basic/BuiltinsPPC.def"
 }
+if (BuiltinID == PPC::BI__builtin_mma_lxvp ||
+BuiltinID == PPC::BI__builtin_mma_stxvp) {
+  if (BuiltinID == PPC::BI__builtin_mma_lxvp) {
+Ops[1] = Builder.CreateBitCast(Ops[1], Int8PtrTy);
+Ops[0] = Builder.CreateGEP(Ops[1], Ops[0]);
+  } else {
+Ops[2] = Builder.CreateBitCast(Ops[2], Int8PtrTy);
+Ops[1] = Builder.CreateGEP(Ops[2], Ops[1]);
+  }
+  Ops.pop_back();
+  llvm::Function *F = CGM.getIntrinsic(ID);
+  return Builder.CreateCall(F, Ops, "");
+}
 SmallVector CallOps;
 if (Accumulate) {
   Address Addr = EmitPointerWithAlignment(E->getArg(0));

diff  --git a/clang/test/CodeGen/builtins-ppc-mma.c 
b/clang/test/CodeGen/builtins-ppc-mma.c
index 820f72653876..88ca36aa6714 100644
--- a/clang/test/CodeGen/builtins-ppc-mma.c
+++ b/clang/test/CodeGen/builtins-ppc-mma.c
@@ -1036,3 +1036,162 @@ void test65(unsigned char *vqp, unsigned char *vpp, 
vector unsigned char vc, uns
   __builtin_mma_pmxvbf16ger2nn(&vq, vc, vc, 0, 0, 0);
   *((__vector_quad *)resp) = vq;
 }
+
+// CHECK-LABEL: @test66(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = bitcast <256 x i1>* [[VPP:%.*]] to i8*
+// CHECK-NEXT:[[TMP1:%.*]] = tail call <256 x i1> @llvm.ppc.mma.lxvp(i8* 
[[TMP0]])
+// CHECK-NEXT:[[TMP2:%.*]] = bitcast <256 x i1>* [[VP2:%.*]] to i8*
+// CHECK-NEXT:tail call void @llvm.ppc.mma.stxvp(<256 x i1> [[TMP1]], i8* 
[[TMP2]])
+// CHECK-NEXT:ret void
+//
+void test66(const __vector_pair *vpp, const __vector_pair *vp2) {
+  __vector_pair vp = __builtin_mma_lxvp(0LL, vpp);
+  __builtin_mma_stxvp(vp, 0LL, vp2);
+}
+
+// CHECK-LABEL: @test67(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = bitcast <256 x i1>* [[VPP:%.*]] to i8*
+// CHECK-NEXT:[[TMP1:%.*]] = getelementptr i8, i8* [[TMP0]], i64 
[[OFFSET:%.*]]
+// CHECK-NEXT:[[TMP2:%.*]] = tail call <256 x i1> @llvm.ppc.mma.lxvp(i8* 
[[TMP1]])
+// CHECK-NEXT:[[TMP3:%.*]] = bitcast <256 x i1>* [[VP2:%.*]] to i8*
+// CHECK-NEXT:[[TMP4:%.*]] = getelementptr i8, i8* [[TMP3]], i64 [[OFFSET]]
+// CHECK-NEXT:tail call void @llvm.ppc.mma.stxvp(<256 x i1> [[TMP2]], i8* 
[[TMP4]])
+// CHECK-NEXT:ret void
+//
+void test67(const __vector_pair *vpp, signed long long offset, const 
__vector_pair *vp2) {
+  __vector_pair vp = __builtin_mma_lxvp(offset, vpp);
+  __builtin_mma_stxvp(vp, offset, vp2);
+}
+
+// CHECK-LABEL: @test68(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = bitcast <256 x i1>* [[VPP:%.*]] to i8*
+// CHECK-NEXT:[[TMP1:%.*]] = getelementptr i8, i8* [[TMP0]], i64 18
+// CHECK-NEXT:[[TMP2:%.*]] = tail call <256 x i1> @llvm.ppc.mma.lxvp(i8* 
[[TMP1]])
+// CHECK-NEXT:

[clang] 0156914 - [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

2020-09-28 Thread Baptiste Saleil via cfe-commits 

Author: Baptiste Saleil
Date: 2020-09-28T14:39:37-05:00
New Revision: 0156914275be5b07155ecefe4dc2d58588265abc

URL: 
https://github.com/llvm/llvm-project/commit/0156914275be5b07155ecefe4dc2d58588265abc
DIFF: 
https://github.com/llvm/llvm-project/commit/0156914275be5b07155ecefe4dc2d58588265abc.diff

LOG: [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these 
types

This patch legalizes the v256i1 and v512i1 types that will be used for MMA.

It implements loads and stores of these types.
v256i1 is a pair of VSX registers, so for this type, we load/store the two
underlying registers. v512i1 is used for MMA accumulators. So in addition to
loading and storing the 4 associated VSX registers, we generate instructions to
prime (copy the VSX registers to the accumulator) after loading and unprime
(copy the accumulator back to the VSX registers) before storing.

This patch also adds the UACC register class that is necessary to implement the
loads and stores. This class represents accumulator in their unprimed form and
allow the distinction between primed and unprimed accumulators to avoid invalid
copies of the VSX registers associated with primed accumulators.

Differential Revision: https://reviews.llvm.org/D84968

Added: 
llvm/test/CodeGen/PowerPC/mma-acc-memops.ll

Modified: 
clang/lib/Basic/Targets/PPC.h
clang/test/CodeGen/target-data.c
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
llvm/lib/Target/PowerPC/PPCRegisterInfo.td
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

Removed: 




diff  --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index ec067d8811fc..597508207ffb 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -404,19 +404,20 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public 
PPCTargetInfo {
 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
 IntMaxType = SignedLong;
 Int64Type = SignedLong;
+std::string DataLayout = "";
 
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
-  resetDataLayout("E-m:a-i64:64-n32:64");
+  DataLayout = "E-m:a-i64:64-n32:64";
   SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = &llvm::APFloat::IEEEdouble();
 } else if ((Triple.getArch() == llvm::Triple::ppc64le)) {
-  resetDataLayout("e-m:e-i64:64-n32:64");
+  DataLayout = "e-m:e-i64:64-n32:64";
   ABI = "elfv2";
 } else {
-  resetDataLayout("E-m:e-i64:64-n32:64");
+  DataLayout = "E-m:e-i64:64-n32:64";
   ABI = "elfv1";
 }
 
@@ -425,6 +426,10 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public 
PPCTargetInfo {
   LongDoubleFormat = &llvm::APFloat::IEEEdouble();
 }
 
+if (Triple.isOSAIX() || Triple.isOSLinux())
+  DataLayout += "-v256:256:256-v512:512:512";
+resetDataLayout(DataLayout);
+
 // PPC64 supports atomics up to 8 bytes.
 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
   }

diff  --git a/clang/test/CodeGen/target-data.c 
b/clang/test/CodeGen/target-data.c
index 0ba20d568a08..a8e995d2963a 100644
--- a/clang/test/CodeGen/target-data.c
+++ b/clang/test/CodeGen/target-data.c
@@ -136,11 +136,27 @@
 
 // RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC64-LINUX
-// PPC64-LINUX: target datalayout = "E-m:e-i64:64-n32:64"
+// PPC64-LINUX: target datalayout = 
"E-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
+
+// RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm -target-cpu future 
%s | \
+// RUN: FileCheck %s -check-prefix=PPC64-FUTURE
+// PPC64-FUTURE: target datalayout = 
"E-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
+
+// RUN: %clang_cc1 -triple powerpc64-linux -o - -emit-llvm -target-cpu pwr10 
%s | \
+// RUN: FileCheck %s -check-prefix=PPC64-P10
+// PPC64-P10: target datalayout = 
"E-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
 
 // RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=PPC64LE-LINUX
-// PPC64LE-LINUX: target datalayout = "e-m:e-i64:64-n32:64"
+// PPC64LE-LINUX: target datalayout = 
"e-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
+
+// RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm -target-cpu 
future %s | \
+// RUN: FileCheck %s -check-prefix=PPC64LE-FUTURE
+// PPC64LE-FUTURE: target datalayout = 
"e-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
+
+// RUN: %clang_cc1 -triple powerpc64le-linux -o - -emit-llvm -target-cpu pwr10 
%s | \
+// RUN: FileCheck %s -check-prefix=PPC64LE-P10
+// PPC64LE-P10: target datalayout = 
"e-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
 
 // RUN: %clang_cc1 -triple nvptx-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-pr

[clang] 40dd4d5 - [Clang][PowerPC] Add __vector_pair and __vector_quad types

2020-10-28 Thread Baptiste Saleil via cfe-commits 

Author: Baptiste Saleil
Date: 2020-10-28T13:19:20-05:00
New Revision: 40dd4d5233d9f81705a24d91b48d2620e487b89d

URL: 
https://github.com/llvm/llvm-project/commit/40dd4d5233d9f81705a24d91b48d2620e487b89d
DIFF: 
https://github.com/llvm/llvm-project/commit/40dd4d5233d9f81705a24d91b48d2620e487b89d.diff

LOG: [Clang][PowerPC] Add __vector_pair and __vector_quad types

Define the __vector_pair and __vector_quad types that are used to manipulate
the new accumulator registers introduced by MMA on PowerPC. Because these two
types are specific to PowerPC, they are defined in a separate new file so it
will be easier to add other PowerPC specific types if we need to in the future.

Differential Revision: https://reviews.llvm.org/D81508

Added: 
clang/include/clang/Basic/PPCTypes.def
clang/test/AST/ast-dump-ppc-mma-types.c
clang/test/CodeGen/ppc-mma-types.c
clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp

Modified: 
clang/include/clang/AST/ASTContext.h
clang/include/clang/AST/Type.h
clang/include/clang/AST/TypeProperties.td
clang/include/clang/Serialization/ASTBitCodes.h
clang/lib/AST/ASTContext.cpp
clang/lib/AST/ASTImporter.cpp
clang/lib/AST/ExprConstant.cpp
clang/lib/AST/ItaniumMangle.cpp
clang/lib/AST/MicrosoftMangle.cpp
clang/lib/AST/NSAPI.cpp
clang/lib/AST/PrintfFormatString.cpp
clang/lib/AST/Type.cpp
clang/lib/AST/TypeLoc.cpp
clang/lib/CodeGen/CGDebugInfo.cpp
clang/lib/CodeGen/CodeGenTypes.cpp
clang/lib/CodeGen/ItaniumCXXABI.cpp
clang/lib/Index/USRGeneration.cpp
clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaExpr.cpp
clang/lib/Serialization/ASTCommon.cpp
clang/lib/Serialization/ASTReader.cpp
clang/tools/libclang/CIndex.cpp

Removed: 




diff  --git a/clang/include/clang/AST/ASTContext.h 
b/clang/include/clang/AST/ASTContext.h
index 30d910c93022..59135b6a4d35 100644
--- a/clang/include/clang/AST/ASTContext.h
+++ b/clang/include/clang/AST/ASTContext.h
@@ -1007,6 +1007,9 @@ class ASTContext : public RefCountedBase {
 #define SVE_TYPE(Name, Id, SingletonId) \
   CanQualType SingletonId;
 #include "clang/Basic/AArch64SVEACLETypes.def"
+#define PPC_MMA_VECTOR_TYPE(Name, Id, Size) \
+  CanQualType Id##Ty;
+#include "clang/Basic/PPCTypes.def"
 
   // Types for deductions in C++0x [stmt.ranged]'s desugaring. Built on demand.
   mutable QualType AutoDeductTy; // Deduction against 'auto'.

diff  --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 5ccd07504e1c..1442bc740620 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -2487,6 +2487,9 @@ class BuiltinType : public Type {
 // SVE Types
 #define SVE_TYPE(Name, Id, SingletonId) Id,
 #include "clang/Basic/AArch64SVEACLETypes.def"
+// PPC MMA Types
+#define PPC_MMA_VECTOR_TYPE(Name, Id, Size) Id,
+#include "clang/Basic/PPCTypes.def"
 // All other builtin types
 #define BUILTIN_TYPE(Id, SingletonId) Id,
 #define LAST_BUILTIN_TYPE(Id) LastKind = Id

diff  --git a/clang/include/clang/AST/TypeProperties.td 
b/clang/include/clang/AST/TypeProperties.td
index ed91670829b8..a183ac0479c6 100644
--- a/clang/include/clang/AST/TypeProperties.td
+++ b/clang/include/clang/AST/TypeProperties.td
@@ -761,6 +761,10 @@ let Class = BuiltinType in {
   case BuiltinType::ID: return ctx.SINGLETON_ID;
 #include "clang/Basic/AArch64SVEACLETypes.def"
 
+#define PPC_MMA_VECTOR_TYPE(NAME, ID, SIZE) \
+  case BuiltinType::ID: return ctx.ID##Ty;
+#include "clang/Basic/PPCTypes.def"
+
 #define BUILTIN_TYPE(ID, SINGLETON_ID) \
   case BuiltinType::ID: return ctx.SINGLETON_ID;
 #include "clang/AST/BuiltinTypes.def"

diff  --git a/clang/include/clang/Basic/PPCTypes.def 
b/clang/include/clang/Basic/PPCTypes.def
new file mode 100644
index ..86656f3568f8
--- /dev/null
+++ b/clang/include/clang/Basic/PPCTypes.def
@@ -0,0 +1,20 @@
+//===-- PPCTypes.def - Metadata about PPC types -*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+//  This file defines PPC types.
+//  Custom code should define this macro:
+//
+//PPC_MMA_VECTOR_TYPE(Name, Id, Size) - A MMA vector type of a given size
+//(in bits).
+//
+//===--===//
+
+PPC_MMA_VECTOR_TYPE(__vector_quad, VectorQuad, 512)
+PPC_MMA_VECTOR_TYPE(__vector_pair, VectorPair, 256)
+
+#undef PPC_MMA_VECTOR_TYPE

diff  --git a/clang/include/clang/Serialization/ASTBitCodes.h 
b/clang/include/clang/Serialization/ASTBitCodes.h
index a2ae032ed5b8..4e14d6f5e3b6 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/AST