[clang] [llvm] [RISCV] Always emit relocations for resolved symbols and relax (PR #73793)
https://github.com/andcarminati updated
https://github.com/llvm/llvm-project/pull/73793
>From a7ba3e4e7a84c49e80fe3e05c1a8ca83e7fd8c6e Mon Sep 17 00:00:00 2001
From: Andreu Carminati
Date: Tue, 28 Nov 2023 15:26:49 +0100
Subject: [PATCH 1/2] [RISCV][MC] Always emit relocations for resolved symbols
and relax
If relaxation is not itended, it can be disabled in the linker. Also,
we cannot trust Subtarget features here, because it may be empty in case
of LTO codegen, preventing relaxations.
Also forward --no-relax option to linker.
---
clang/lib/Driver/ToolChains/BareMetal.cpp | 3 ++
.../lib/Driver/ToolChains/RISCVToolchain.cpp | 3 ++
clang/test/Driver/baremetal.cpp | 10 ++
.../RISCV/MCTargetDesc/RISCVAsmBackend.cpp| 12 +++
llvm/test/CodeGen/RISCV/compress.ll | 31 +--
5 files changed, 41 insertions(+), 18 deletions(-)
diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp
b/clang/lib/Driver/ToolChains/BareMetal.cpp
index 42c8336e626c7..fc955d79780e5 100644
--- a/clang/lib/Driver/ToolChains/BareMetal.cpp
+++ b/clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,6 +443,9 @@ void baremetal::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back("-Bstatic");
+ if (Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
if (Triple.isARM() || Triple.isThumb()) {
bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
if (IsBigEndian)
diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
index 7e6abd1444287..0be7d1a889949 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -156,6 +156,9 @@ void RISCV::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (!D.SysRoot.empty())
CmdArgs.push_back(Args.MakeArgString("--sysroot=" + D.SysRoot));
+ if (Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
bool IsRV64 = ToolChain.getArch() == llvm::Triple::riscv64;
CmdArgs.push_back("-m");
if (IsRV64) {
diff --git a/clang/test/Driver/baremetal.cpp b/clang/test/Driver/baremetal.cpp
index c04f4506a0994..134bf427e3dc1 100644
--- a/clang/test/Driver/baremetal.cpp
+++ b/clang/test/Driver/baremetal.cpp
@@ -460,3 +460,13 @@
// RUN: | FileCheck --check-prefix=CHECK-CLANGRT-ARCH %s
// CHECK-CLANGRT-ARCH: "-lclang_rt.builtins-armv6m"
// CHECK-CLANGRT-ARCH-NOT: "-lclang_rt.builtins"
+
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc -mno-relax \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-NORELAX %s
+// CHECK-RV64-NORELAX: "--no-relax"
+
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-RELAX %s
+// CHECK-RV64-RELAX-NOT: "--no-relax"
\ No newline at end of file
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index dfc3c9e9908d8..d4efaaf2666e4 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -103,9 +103,9 @@ RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
return Infos[Kind - FirstTargetFixupKind];
}
-// If linker relaxation is enabled, or the relax option had previously been
-// enabled, always emit relocations even if the fixup can be resolved. This is
-// necessary for correctness as offsets may change during relaxation.
+// Always emit relocations for relative addresses, even if the fixup can be
+// resolved. This is necessary for correctness as offsets may change during
+// relaxation.
bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
const MCValue &Target) {
@@ -122,13 +122,9 @@ bool RISCVAsmBackend::shouldForceRelocation(const
MCAssembler &Asm,
if (Target.isAbsolute())
return false;
break;
- case RISCV::fixup_riscv_got_hi20:
- case RISCV::fixup_riscv_tls_got_hi20:
- case RISCV::fixup_riscv_tls_gd_hi20:
-return true;
}
- return STI.hasFeature(RISCV::FeatureRelax) || ForceRelocs;
+ return true;
}
bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,
diff --git a/llvm/test/CodeGen/RISCV/compress.ll
b/llvm/test/CodeGen/RISCV/compress.ll
index 479b7e524cd34..fd7c4e9cc9934 100644
--- a/llvm/test/CodeGen/RISCV/compress.ll
+++ b/llvm/test/CodeGen/RISCV/compress.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 3
; This test is designed to run twice, once with function attributes and once
; with target attributes added on the command line.
;
@@ -50,35 +51,45 @@ define i3
[clang] [llvm] [RISCV] Always emit relocations for resolved symbols and relax (PR #73793)
andcarminati wrote: > For the driver BareMetal.cpp change, claiming `-mno-relax` should not be done > for non-RISCV targets (e.g. AArch32). Thank you for the update. I updated the PR reverting the backend part and addressing this issue just for RISC-V. https://github.com/llvm/llvm-project/pull/73793 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV][MC] Always emit relocations for resolved symbols and relax (PR #73793)
https://github.com/andcarminati created
https://github.com/llvm/llvm-project/pull/73793
If relaxation is not itended, it can be disabled in the linker. Also, we cannot
trust Subtarget features here, because it may be empty in case of LTO codegen,
preventing relaxations.
Also forward --no-relax option to linker.
>From a7ba3e4e7a84c49e80fe3e05c1a8ca83e7fd8c6e Mon Sep 17 00:00:00 2001
From: Andreu Carminati
Date: Tue, 28 Nov 2023 15:26:49 +0100
Subject: [PATCH] [RISCV][MC] Always emit relocations for resolved symbols and
relax
If relaxation is not itended, it can be disabled in the linker. Also,
we cannot trust Subtarget features here, because it may be empty in case
of LTO codegen, preventing relaxations.
Also forward --no-relax option to linker.
---
clang/lib/Driver/ToolChains/BareMetal.cpp | 3 ++
.../lib/Driver/ToolChains/RISCVToolchain.cpp | 3 ++
clang/test/Driver/baremetal.cpp | 10 ++
.../RISCV/MCTargetDesc/RISCVAsmBackend.cpp| 12 +++
llvm/test/CodeGen/RISCV/compress.ll | 31 +--
5 files changed, 41 insertions(+), 18 deletions(-)
diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp
b/clang/lib/Driver/ToolChains/BareMetal.cpp
index 42c8336e626c7b5..fc955d79780e5a0 100644
--- a/clang/lib/Driver/ToolChains/BareMetal.cpp
+++ b/clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,6 +443,9 @@ void baremetal::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back("-Bstatic");
+ if (Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
if (Triple.isARM() || Triple.isThumb()) {
bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
if (IsBigEndian)
diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
index 7e6abd144428783..0be7d1a88994957 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -156,6 +156,9 @@ void RISCV::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (!D.SysRoot.empty())
CmdArgs.push_back(Args.MakeArgString("--sysroot=" + D.SysRoot));
+ if (Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
bool IsRV64 = ToolChain.getArch() == llvm::Triple::riscv64;
CmdArgs.push_back("-m");
if (IsRV64) {
diff --git a/clang/test/Driver/baremetal.cpp b/clang/test/Driver/baremetal.cpp
index c04f4506a0994db..134bf427e3dc160 100644
--- a/clang/test/Driver/baremetal.cpp
+++ b/clang/test/Driver/baremetal.cpp
@@ -460,3 +460,13 @@
// RUN: | FileCheck --check-prefix=CHECK-CLANGRT-ARCH %s
// CHECK-CLANGRT-ARCH: "-lclang_rt.builtins-armv6m"
// CHECK-CLANGRT-ARCH-NOT: "-lclang_rt.builtins"
+
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc -mno-relax \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-NORELAX %s
+// CHECK-RV64-NORELAX: "--no-relax"
+
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-RELAX %s
+// CHECK-RV64-RELAX-NOT: "--no-relax"
\ No newline at end of file
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index dfc3c9e9908d888..d4efaaf2666e426 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -103,9 +103,9 @@ RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
return Infos[Kind - FirstTargetFixupKind];
}
-// If linker relaxation is enabled, or the relax option had previously been
-// enabled, always emit relocations even if the fixup can be resolved. This is
-// necessary for correctness as offsets may change during relaxation.
+// Always emit relocations for relative addresses, even if the fixup can be
+// resolved. This is necessary for correctness as offsets may change during
+// relaxation.
bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
const MCValue &Target) {
@@ -122,13 +122,9 @@ bool RISCVAsmBackend::shouldForceRelocation(const
MCAssembler &Asm,
if (Target.isAbsolute())
return false;
break;
- case RISCV::fixup_riscv_got_hi20:
- case RISCV::fixup_riscv_tls_got_hi20:
- case RISCV::fixup_riscv_tls_gd_hi20:
-return true;
}
- return STI.hasFeature(RISCV::FeatureRelax) || ForceRelocs;
+ return true;
}
bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,
diff --git a/llvm/test/CodeGen/RISCV/compress.ll
b/llvm/test/CodeGen/RISCV/compress.ll
index 479b7e524cd347c..fd7c4e9cc9934e9 100644
--- a/llvm/test/CodeGen/RISCV/compress.ll
+++ b/llvm/test/CodeGen/RISCV/compress.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions
[llvm] [clang] [RISCV][MC] Always emit relocations for resolved symbols and relax (PR #73793)
andcarminati wrote: Hi @topperc , just another idea to solve the problem, mostly to discuss! Regards. https://github.com/llvm/llvm-project/pull/73793 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [RISCV] Always emit relocations for resolved symbols and relax (PR #73793)
https://github.com/andcarminati edited https://github.com/llvm/llvm-project/pull/73793 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV] Always emit relocations for resolved symbols and relax (PR #73793)
andcarminati wrote: > As far as I can tell this is pointless. If you want relaxation you need > R_RISCV_RELAX and R_RISC_ALIGN relocations to be emitted. If you don't want > relaxation you don't need these. Therefore it seems like all this does is > emit a whole bunch of useless relocations for the case when you're not > enabling relaxation at compile time and thus cannot possibly enable it at > link time? Hi @jrtc27, thank you for your comment, understood your point. For relaxation, I think we need also the branch relocation/anything relative, as we are removing some lui instructions. My original idea was based on the case that relaxation is a default ON feature for RISCV, but I honestly don't know the use cases to disable it. Just to follow the discussion, I can consider the following use case: clang [...] -c -o myobject.o (just compile) clang [...] my0bject.o -o myobject.elf -mno-relax (linking) In this case, myobject.elf will be relaxed, the -mno-relax will be silently ignored. Maybe we have two different things to handle. Regards. https://github.com/llvm/llvm-project/pull/73793 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][RISCV] Forward --no-relax option to linker for RISC-V (PR #76432)
https://github.com/andcarminati created
https://github.com/llvm/llvm-project/pull/76432
In the case of -mno-relax option. Otherwise, we cannot prevent relaxation if we
split compilation and linking using Clang driver.
One can consider the following use case:
clang [...] -c -o myobject.o (just compile)
clang [...] myobject.o -o myobject.elf -mno-relax (linking)
In this case, myobject.elf will be relaxed, the -mno-relax will be silently
ignored.
>From 13648eaf3becc5650924c3399fb1dc1ecb9fa7c7 Mon Sep 17 00:00:00 2001
From: Andreu Carminati
Date: Wed, 27 Dec 2023 09:47:54 +0100
Subject: [PATCH] [Clang][RISCV] Forward --no-relax option to linker for RISC-V
In the case of -mno-relax option. Otherwise, we cannot prevent relaxation
if we split compilation and linking using Clang driver.
One can consider the following use case:
clang [...] -c -o myobject.o (just compile)
clang [...] myobject.o -o myobject.elf -mno-relax (linking)
In this case, myobject.elf will be relaxed, the -mno-relax will be silently
ignored.
---
clang/lib/Driver/ToolChains/BareMetal.cpp | 3 +++
clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 3 +++
clang/test/Driver/baremetal.cpp| 12
clang/test/Driver/riscv32-toolchain.c | 16
clang/test/Driver/riscv64-toolchain.c | 16
5 files changed, 50 insertions(+)
diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp
b/clang/lib/Driver/ToolChains/BareMetal.cpp
index 42c8336e626c7b..007a24f2b81ae7 100644
--- a/clang/lib/Driver/ToolChains/BareMetal.cpp
+++ b/clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,6 +443,9 @@ void baremetal::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back("-Bstatic");
+ if (TC.getTriple().isRISCV() && Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
if (Triple.isARM() || Triple.isThumb()) {
bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
if (IsBigEndian)
diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
index 7e6abd14442878..0be7d1a8899495 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -156,6 +156,9 @@ void RISCV::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (!D.SysRoot.empty())
CmdArgs.push_back(Args.MakeArgString("--sysroot=" + D.SysRoot));
+ if (Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
bool IsRV64 = ToolChain.getArch() == llvm::Triple::riscv64;
CmdArgs.push_back("-m");
if (IsRV64) {
diff --git a/clang/test/Driver/baremetal.cpp b/clang/test/Driver/baremetal.cpp
index c04f4506a0994d..7511d7d1adb4dd 100644
--- a/clang/test/Driver/baremetal.cpp
+++ b/clang/test/Driver/baremetal.cpp
@@ -460,3 +460,15 @@
// RUN: | FileCheck --check-prefix=CHECK-CLANGRT-ARCH %s
// CHECK-CLANGRT-ARCH: "-lclang_rt.builtins-armv6m"
// CHECK-CLANGRT-ARCH-NOT: "-lclang_rt.builtins"
+
+// Check that "--no-relax" is forwarded to the linker for RISC-V.
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc -mno-relax \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-NORELAX %s
+// CHECK-RV64-NORELAX: "--no-relax"
+
+// Check that "--no-relax" is not forwarded to the linker for RISC-V.
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-RELAX %s
+// CHECK-RV64-RELAX-NOT: "--no-relax"
\ No newline at end of file
diff --git a/clang/test/Driver/riscv32-toolchain.c
b/clang/test/Driver/riscv32-toolchain.c
index 63690c946ca0bc..701da05da9189d 100644
--- a/clang/test/Driver/riscv32-toolchain.c
+++ b/clang/test/Driver/riscv32-toolchain.c
@@ -215,6 +215,22 @@
// RUN: %clang --target=riscv32 %s -emit-llvm -S -o - | FileCheck %s
+// Check that "--no-relax" is forwarded to the linker for RISC-V
(RISCVToolchain.cpp).
+// RUN: env "PATH=" %clang %s -### 2>&1 -mno-relax \
+// RUN: --target=riscv32-unknown-elf --rtlib=platform --unwindlib=platform
--sysroot= \
+// RUN: -march=rv32imac -mabi=lp32\
+// RUN: --gcc-toolchain=%S/Inputs/multilib_riscv_elf_sdk 2>&1 \
+// RUN: | FileCheck --check-prefix=CHECK-RV32-NORELAX %s
+// CHECK-RV32-NORELAX: "--no-relax"
+
+// Check that "--no-relax" is not forwarded to the linker for RISC-V
(RISCVToolchain.cpp).
+// RUN:env "PATH=" %clang %s -### 2>&1 \
+// RUN: --target=riscv32-unknown-elf --rtlib=platform --unwindlib=platform
--sysroot= \
+// RUN: -march=rv32imac -mabi=lp32\
+// RUN: --gcc-toolchain=%S/Inputs/multilib_riscv_elf_sdk 2>&1 \
+// RUN: | FileCheck --check-prefix=CHECK-RV32-RELAX %s
+// CHECK-RV32-RELAX-NOT: "--no-relax"
+
typedef __builtin_va_list va_list;
typedef __SIZE_TYPE__ size_t;
typedef __PTRDIFF_TYPE__ ptrdiff_t;
diff --git
[llvm] [clang] [RISCV] Always emit relocations for resolved symbols and relax (PR #73793)
https://github.com/andcarminati closed https://github.com/llvm/llvm-project/pull/73793 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [RISCV] Always emit relocations for resolved symbols and relax (PR #73793)
andcarminati wrote:
> The current patch doesn't do what the title implies ("Always emit relocations
> for resolved ").
Sure, I will close this PR because I created another one targeting just this
case: https://github.com/llvm/llvm-project/pull/76432
Regards.
https://github.com/llvm/llvm-project/pull/73793
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
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[clang] [Clang][RISCV] Forward --no-relax option to linker for RISC-V (PR #76432)
https://github.com/andcarminati updated
https://github.com/llvm/llvm-project/pull/76432
>From 13648eaf3becc5650924c3399fb1dc1ecb9fa7c7 Mon Sep 17 00:00:00 2001
From: Andreu Carminati
Date: Wed, 27 Dec 2023 09:47:54 +0100
Subject: [PATCH 1/2] [Clang][RISCV] Forward --no-relax option to linker for
RISC-V
In the case of -mno-relax option. Otherwise, we cannot prevent relaxation
if we split compilation and linking using Clang driver.
One can consider the following use case:
clang [...] -c -o myobject.o (just compile)
clang [...] myobject.o -o myobject.elf -mno-relax (linking)
In this case, myobject.elf will be relaxed, the -mno-relax will be silently
ignored.
---
clang/lib/Driver/ToolChains/BareMetal.cpp | 3 +++
clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 3 +++
clang/test/Driver/baremetal.cpp| 12
clang/test/Driver/riscv32-toolchain.c | 16
clang/test/Driver/riscv64-toolchain.c | 16
5 files changed, 50 insertions(+)
diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp
b/clang/lib/Driver/ToolChains/BareMetal.cpp
index 42c8336e626c7b..007a24f2b81ae7 100644
--- a/clang/lib/Driver/ToolChains/BareMetal.cpp
+++ b/clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,6 +443,9 @@ void baremetal::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back("-Bstatic");
+ if (TC.getTriple().isRISCV() && Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
if (Triple.isARM() || Triple.isThumb()) {
bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
if (IsBigEndian)
diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
index 7e6abd14442878..0be7d1a8899495 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -156,6 +156,9 @@ void RISCV::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (!D.SysRoot.empty())
CmdArgs.push_back(Args.MakeArgString("--sysroot=" + D.SysRoot));
+ if (Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
bool IsRV64 = ToolChain.getArch() == llvm::Triple::riscv64;
CmdArgs.push_back("-m");
if (IsRV64) {
diff --git a/clang/test/Driver/baremetal.cpp b/clang/test/Driver/baremetal.cpp
index c04f4506a0994d..7511d7d1adb4dd 100644
--- a/clang/test/Driver/baremetal.cpp
+++ b/clang/test/Driver/baremetal.cpp
@@ -460,3 +460,15 @@
// RUN: | FileCheck --check-prefix=CHECK-CLANGRT-ARCH %s
// CHECK-CLANGRT-ARCH: "-lclang_rt.builtins-armv6m"
// CHECK-CLANGRT-ARCH-NOT: "-lclang_rt.builtins"
+
+// Check that "--no-relax" is forwarded to the linker for RISC-V.
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc -mno-relax \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-NORELAX %s
+// CHECK-RV64-NORELAX: "--no-relax"
+
+// Check that "--no-relax" is not forwarded to the linker for RISC-V.
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-RELAX %s
+// CHECK-RV64-RELAX-NOT: "--no-relax"
\ No newline at end of file
diff --git a/clang/test/Driver/riscv32-toolchain.c
b/clang/test/Driver/riscv32-toolchain.c
index 63690c946ca0bc..701da05da9189d 100644
--- a/clang/test/Driver/riscv32-toolchain.c
+++ b/clang/test/Driver/riscv32-toolchain.c
@@ -215,6 +215,22 @@
// RUN: %clang --target=riscv32 %s -emit-llvm -S -o - | FileCheck %s
+// Check that "--no-relax" is forwarded to the linker for RISC-V
(RISCVToolchain.cpp).
+// RUN: env "PATH=" %clang %s -### 2>&1 -mno-relax \
+// RUN: --target=riscv32-unknown-elf --rtlib=platform --unwindlib=platform
--sysroot= \
+// RUN: -march=rv32imac -mabi=lp32\
+// RUN: --gcc-toolchain=%S/Inputs/multilib_riscv_elf_sdk 2>&1 \
+// RUN: | FileCheck --check-prefix=CHECK-RV32-NORELAX %s
+// CHECK-RV32-NORELAX: "--no-relax"
+
+// Check that "--no-relax" is not forwarded to the linker for RISC-V
(RISCVToolchain.cpp).
+// RUN:env "PATH=" %clang %s -### 2>&1 \
+// RUN: --target=riscv32-unknown-elf --rtlib=platform --unwindlib=platform
--sysroot= \
+// RUN: -march=rv32imac -mabi=lp32\
+// RUN: --gcc-toolchain=%S/Inputs/multilib_riscv_elf_sdk 2>&1 \
+// RUN: | FileCheck --check-prefix=CHECK-RV32-RELAX %s
+// CHECK-RV32-RELAX-NOT: "--no-relax"
+
typedef __builtin_va_list va_list;
typedef __SIZE_TYPE__ size_t;
typedef __PTRDIFF_TYPE__ ptrdiff_t;
diff --git a/clang/test/Driver/riscv64-toolchain.c
b/clang/test/Driver/riscv64-toolchain.c
index f177bff33dd4d7..da07c57d8e1fc4 100644
--- a/clang/test/Driver/riscv64-toolchain.c
+++ b/clang/test/Driver/riscv64-toolchain.c
@@ -171,6 +171,22 @@
// RUN: %clang --target=riscv64 %s -emit-llvm -S -o - | FileCheck %s
+// Check that "--no-relax" is forwarded to the link
[clang] [Clang][RISCV] Forward --no-relax option to linker for RISC-V (PR #76432)
andcarminati wrote: > Should this also be done in `tools::gnutools::Linker::ConstructJob`? Addressed with a new commit. https://github.com/llvm/llvm-project/pull/76432 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][RISCV] Forward --no-relax option to linker for RISC-V (PR #76432)
andcarminati wrote: > Do you need someone to commit this? Hi @topperc, if you can commit for me I would appreciate it. https://github.com/llvm/llvm-project/pull/76432 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][RISCV] Forward --no-relax option to linker for RISC-V (PR #76432)
https://github.com/andcarminati updated
https://github.com/llvm/llvm-project/pull/76432
>From f697a90f8375a66fb23bbaaefc2e1297e79e063a Mon Sep 17 00:00:00 2001
From: Andreu Carminati
Date: Mon, 15 Jan 2024 15:18:02 +0100
Subject: [PATCH] [Clang][RISCV] Forward --no-relax option to linker for RISC-V
In the case of -mno-relax option. Otherwise, we cannot prevent relaxation
if we split compilation and linking using Clang driver.
One can consider the following use case:
clang [...] -c -o myobject.o (just compile)
clang [...] myobject.o -o myobject.elf -mno-relax (linking)
In this case, myobject.elf will be relaxed, the -mno-relax will be silently
ignored.
---
clang/lib/Driver/ToolChains/BareMetal.cpp | 3 ++
clang/lib/Driver/ToolChains/Gnu.cpp | 6 +++-
.../lib/Driver/ToolChains/RISCVToolchain.cpp | 3 ++
clang/test/Driver/baremetal.cpp | 12 +++
clang/test/Driver/riscv32-toolchain.c | 32 +++
clang/test/Driver/riscv64-toolchain.c | 32 +++
6 files changed, 87 insertions(+), 1 deletion(-)
diff --git a/clang/lib/Driver/ToolChains/BareMetal.cpp
b/clang/lib/Driver/ToolChains/BareMetal.cpp
index 42c8336e626c7b..007a24f2b81ae7 100644
--- a/clang/lib/Driver/ToolChains/BareMetal.cpp
+++ b/clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,6 +443,9 @@ void baremetal::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back("-Bstatic");
+ if (TC.getTriple().isRISCV() && Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
if (Triple.isARM() || Triple.isThumb()) {
bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
if (IsBigEndian)
diff --git a/clang/lib/Driver/ToolChains/Gnu.cpp
b/clang/lib/Driver/ToolChains/Gnu.cpp
index 38361d6889a1c8..ad56c5a4e4473c 100644
--- a/clang/lib/Driver/ToolChains/Gnu.cpp
+++ b/clang/lib/Driver/ToolChains/Gnu.cpp
@@ -423,8 +423,12 @@ void tools::gnutools::Linker::ConstructJob(Compilation &C,
const JobAction &JA,
D.Diag(diag::err_target_unknown_triple) << Triple.str();
return;
}
- if (Triple.isRISCV())
+
+ if (Triple.isRISCV()) {
CmdArgs.push_back("-X");
+if (Args.hasArg(options::OPT_mno_relax))
+ CmdArgs.push_back("--no-relax");
+ }
const bool IsShared = Args.hasArg(options::OPT_shared);
if (IsShared)
diff --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
index 7e6abd14442878..0be7d1a8899495 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -156,6 +156,9 @@ void RISCV::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (!D.SysRoot.empty())
CmdArgs.push_back(Args.MakeArgString("--sysroot=" + D.SysRoot));
+ if (Args.hasArg(options::OPT_mno_relax))
+CmdArgs.push_back("--no-relax");
+
bool IsRV64 = ToolChain.getArch() == llvm::Triple::riscv64;
CmdArgs.push_back("-m");
if (IsRV64) {
diff --git a/clang/test/Driver/baremetal.cpp b/clang/test/Driver/baremetal.cpp
index c04f4506a0994d..7511d7d1adb4dd 100644
--- a/clang/test/Driver/baremetal.cpp
+++ b/clang/test/Driver/baremetal.cpp
@@ -460,3 +460,15 @@
// RUN: | FileCheck --check-prefix=CHECK-CLANGRT-ARCH %s
// CHECK-CLANGRT-ARCH: "-lclang_rt.builtins-armv6m"
// CHECK-CLANGRT-ARCH-NOT: "-lclang_rt.builtins"
+
+// Check that "--no-relax" is forwarded to the linker for RISC-V.
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc -mno-relax \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-NORELAX %s
+// CHECK-RV64-NORELAX: "--no-relax"
+
+// Check that "--no-relax" is not forwarded to the linker for RISC-V.
+// RUN: %clang %s -### 2>&1 --target=riscv64-unknown-elf -nostdinc \
+// RUN: --sysroot=%S/Inputs/basic_riscv64_tree/riscv64-unknown-elf \
+// RUN: | FileCheck --check-prefix=CHECK-RV64-RELAX %s
+// CHECK-RV64-RELAX-NOT: "--no-relax"
\ No newline at end of file
diff --git a/clang/test/Driver/riscv32-toolchain.c
b/clang/test/Driver/riscv32-toolchain.c
index 63690c946ca0bc..bb2533cdf1bce2 100644
--- a/clang/test/Driver/riscv32-toolchain.c
+++ b/clang/test/Driver/riscv32-toolchain.c
@@ -215,6 +215,38 @@
// RUN: %clang --target=riscv32 %s -emit-llvm -S -o - | FileCheck %s
+// Check that "--no-relax" is forwarded to the linker for RISC-V
(RISCVToolchain.cpp).
+// RUN: env "PATH=" %clang %s -### 2>&1 -mno-relax \
+// RUN: --target=riscv32-unknown-elf --rtlib=platform --unwindlib=platform
--sysroot= \
+// RUN: -march=rv32imac -mabi=lp32\
+// RUN: --gcc-toolchain=%S/Inputs/multilib_riscv_elf_sdk 2>&1 \
+// RUN: | FileCheck --check-prefix=CHECK-RV32-NORELAX %s
+// CHECK-RV32-NORELAX: "--no-relax"
+
+// Check that "--no-relax" is not forwarded to the linker for RISC-V
(RISCVToolchain.cpp).
+// RUN:env "PATH=" %clang %s -### 2>&1 \
+// RUN: --target=riscv32-unknown-elf --rtlib=platform --u
[clang] [Clang][RISCV] Forward --no-relax option to linker for RISC-V (PR #76432)
andcarminati wrote: After approval, commits are now squashed to merge. https://github.com/llvm/llvm-project/pull/76432 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
