[compiler-rt] [llvm] [clang] [flang] [clang-tools-extra] [mlir] [clang][CodeGen] Handle template parameter objects with explicit address spaces (PR #69266)

2023-11-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/69266

>From ded7435220d2c3527c4798d1b328a5f2940e279a Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 16 Oct 2023 22:43:55 +0100
Subject: [PATCH] Handle trying to bind a generic reference to a template
 parameter object value that is in an explicit address space.

---
 clang/lib/CodeGen/CGExpr.cpp  | 18 +--
 .../template-param-objects-address-space.cpp  | 32 +++
 2 files changed, 47 insertions(+), 3 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/template-param-objects-address-space.cpp

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 54a1d300a9ac738..784d3f7b03909e3 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -2992,9 +2992,21 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 return MakeAddrLValue(CGM.GetAddrOfMSGuidDecl(GD), T,
   AlignmentSource::Decl);
 
-  if (const auto *TPO = dyn_cast(ND))
-return MakeAddrLValue(CGM.GetAddrOfTemplateParamObject(TPO), T,
-  AlignmentSource::Decl);
+  if (const auto *TPO = dyn_cast(ND)) {
+auto ATPO = CGM.GetAddrOfTemplateParamObject(TPO);
+auto AS = getLangASFromTargetAS(ATPO.getAddressSpace());
+
+if (AS != T.getAddressSpace()) {
+  auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
+  auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
+  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
+   AS, T.getAddressSpace(),
+   PtrTy);
+  ATPO = ConstantAddress(ASC, ATPO.getElementType(), ATPO.getAlignment());
+}
+
+return MakeAddrLValue(ATPO, T, AlignmentSource::Decl);
+  }
 
   llvm_unreachable("Unhandled DeclRefExpr");
 }
diff --git a/clang/test/CodeGenCXX/template-param-objects-address-space.cpp 
b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
new file mode 100644
index 000..b54dcfe77934ee2
--- /dev/null
+++ b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -std=c++20 %s -emit-llvm -o - | 
FileCheck %s
+
+struct S { char buf[32]; };
+template constexpr const char *begin() { return s.buf; }
+template constexpr const char *end() { return s.buf + 
__builtin_strlen(s.buf); }
+template constexpr const void *retval() { return &s; }
+extern const void *callee(const S*);
+template constexpr const void* observable_addr() { return callee(&s); }
+
+// CHECK: 
[[HELLO:@_ZTAXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100]]
+// CHECK-SAME: = linkonce_odr addrspace(1) constant { <{ [11 x i8], [21 x i8] 
}> } { <{ [11 x i8], [21 x i8] }> <{ [11 x i8] c"hello world", [21 x i8] 
zeroinitializer }> }, comdat
+
+// CHECK: @p
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
[[HELLO]] to ptr)
+const char *p = begin();
+
+// CHECK: @q
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
getelementptr (i8, ptr addrspace(1) [[HELLO]], i64 11) to ptr)
+const char *q = end();
+
+const void *(*r)() = &retval;
+
+// CHECK: @s
+// CHECK-SAME: addrspace(1) global ptr null
+const void *s = observable_addr();
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z6retvalIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: ret ptr addrspacecast (ptr addrspace(1) [[HELLO]] to ptr)
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z15observable_addrIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: %call = call noundef ptr @_Z6calleePK1S(ptr noundef addrspacecast 
(ptr addrspace(1) [[HELLO]] to ptr))
+// CHECK: declare noundef ptr @_Z6calleePK1S(ptr noundef)

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[compiler-rt] [llvm] [clang] [flang] [clang-tools-extra] [mlir] [clang][CodeGen] Handle template parameter objects with explicit address spaces (PR #69266)

2023-11-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/69266

>From ded7435220d2c3527c4798d1b328a5f2940e279a Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 16 Oct 2023 22:43:55 +0100
Subject: [PATCH 1/2] Handle trying to bind a generic reference to a template
 parameter object value that is in an explicit address space.

---
 clang/lib/CodeGen/CGExpr.cpp  | 18 +--
 .../template-param-objects-address-space.cpp  | 32 +++
 2 files changed, 47 insertions(+), 3 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/template-param-objects-address-space.cpp

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 54a1d300a9ac738..784d3f7b03909e3 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -2992,9 +2992,21 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 return MakeAddrLValue(CGM.GetAddrOfMSGuidDecl(GD), T,
   AlignmentSource::Decl);
 
-  if (const auto *TPO = dyn_cast(ND))
-return MakeAddrLValue(CGM.GetAddrOfTemplateParamObject(TPO), T,
-  AlignmentSource::Decl);
+  if (const auto *TPO = dyn_cast(ND)) {
+auto ATPO = CGM.GetAddrOfTemplateParamObject(TPO);
+auto AS = getLangASFromTargetAS(ATPO.getAddressSpace());
+
+if (AS != T.getAddressSpace()) {
+  auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
+  auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
+  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
+   AS, T.getAddressSpace(),
+   PtrTy);
+  ATPO = ConstantAddress(ASC, ATPO.getElementType(), ATPO.getAlignment());
+}
+
+return MakeAddrLValue(ATPO, T, AlignmentSource::Decl);
+  }
 
   llvm_unreachable("Unhandled DeclRefExpr");
 }
diff --git a/clang/test/CodeGenCXX/template-param-objects-address-space.cpp 
b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
new file mode 100644
index 000..b54dcfe77934ee2
--- /dev/null
+++ b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -std=c++20 %s -emit-llvm -o - | 
FileCheck %s
+
+struct S { char buf[32]; };
+template constexpr const char *begin() { return s.buf; }
+template constexpr const char *end() { return s.buf + 
__builtin_strlen(s.buf); }
+template constexpr const void *retval() { return &s; }
+extern const void *callee(const S*);
+template constexpr const void* observable_addr() { return callee(&s); }
+
+// CHECK: 
[[HELLO:@_ZTAXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100]]
+// CHECK-SAME: = linkonce_odr addrspace(1) constant { <{ [11 x i8], [21 x i8] 
}> } { <{ [11 x i8], [21 x i8] }> <{ [11 x i8] c"hello world", [21 x i8] 
zeroinitializer }> }, comdat
+
+// CHECK: @p
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
[[HELLO]] to ptr)
+const char *p = begin();
+
+// CHECK: @q
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
getelementptr (i8, ptr addrspace(1) [[HELLO]], i64 11) to ptr)
+const char *q = end();
+
+const void *(*r)() = &retval;
+
+// CHECK: @s
+// CHECK-SAME: addrspace(1) global ptr null
+const void *s = observable_addr();
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z6retvalIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: ret ptr addrspacecast (ptr addrspace(1) [[HELLO]] to ptr)
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z15observable_addrIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: %call = call noundef ptr @_Z6calleePK1S(ptr noundef addrspacecast 
(ptr addrspace(1) [[HELLO]] to ptr))
+// CHECK: declare noundef ptr @_Z6calleePK1S(ptr noundef)

>From 4afd54856ca8248fab731e17cd644d18ed60acbc Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Thu, 9 Nov 2023 14:51:39 -1000
Subject: [PATCH 2/2] Fix formatting error.

---
 clang/lib/CodeGen/CGExpr.cpp | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 652d9c32a8c47b4..8abb1d8a1be4e97 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -3045,9 +3045,8 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 if (AS != T.getAddressSpace()) {
   auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
   auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
-  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
-   AS, T.getAddressSpace(),
-   PtrTy);
+  auto ASC = getTargetHooks().performAddrSpaceCast(
+CGM, ATPO.getPo

[mlir] [clang] [flang] [clang-tools-extra] [llvm] [compiler-rt] [clang][CodeGen] Handle template parameter objects with explicit address spaces (PR #69266)

2023-11-09 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

Gentle ping.

https://github.com/llvm/llvm-project/pull/69266
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[llvm] [clang-tools-extra] [mlir] [flang] [clang] [compiler-rt] [clang][CodeGen] Handle template parameter objects with explicit address spaces (PR #69266)

2023-11-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/69266

>From ded7435220d2c3527c4798d1b328a5f2940e279a Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 16 Oct 2023 22:43:55 +0100
Subject: [PATCH 1/3] Handle trying to bind a generic reference to a template
 parameter object value that is in an explicit address space.

---
 clang/lib/CodeGen/CGExpr.cpp  | 18 +--
 .../template-param-objects-address-space.cpp  | 32 +++
 2 files changed, 47 insertions(+), 3 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/template-param-objects-address-space.cpp

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 54a1d300a9ac738..784d3f7b03909e3 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -2992,9 +2992,21 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 return MakeAddrLValue(CGM.GetAddrOfMSGuidDecl(GD), T,
   AlignmentSource::Decl);
 
-  if (const auto *TPO = dyn_cast(ND))
-return MakeAddrLValue(CGM.GetAddrOfTemplateParamObject(TPO), T,
-  AlignmentSource::Decl);
+  if (const auto *TPO = dyn_cast(ND)) {
+auto ATPO = CGM.GetAddrOfTemplateParamObject(TPO);
+auto AS = getLangASFromTargetAS(ATPO.getAddressSpace());
+
+if (AS != T.getAddressSpace()) {
+  auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
+  auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
+  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
+   AS, T.getAddressSpace(),
+   PtrTy);
+  ATPO = ConstantAddress(ASC, ATPO.getElementType(), ATPO.getAlignment());
+}
+
+return MakeAddrLValue(ATPO, T, AlignmentSource::Decl);
+  }
 
   llvm_unreachable("Unhandled DeclRefExpr");
 }
diff --git a/clang/test/CodeGenCXX/template-param-objects-address-space.cpp 
b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
new file mode 100644
index 000..b54dcfe77934ee2
--- /dev/null
+++ b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -std=c++20 %s -emit-llvm -o - | 
FileCheck %s
+
+struct S { char buf[32]; };
+template constexpr const char *begin() { return s.buf; }
+template constexpr const char *end() { return s.buf + 
__builtin_strlen(s.buf); }
+template constexpr const void *retval() { return &s; }
+extern const void *callee(const S*);
+template constexpr const void* observable_addr() { return callee(&s); }
+
+// CHECK: 
[[HELLO:@_ZTAXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100]]
+// CHECK-SAME: = linkonce_odr addrspace(1) constant { <{ [11 x i8], [21 x i8] 
}> } { <{ [11 x i8], [21 x i8] }> <{ [11 x i8] c"hello world", [21 x i8] 
zeroinitializer }> }, comdat
+
+// CHECK: @p
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
[[HELLO]] to ptr)
+const char *p = begin();
+
+// CHECK: @q
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
getelementptr (i8, ptr addrspace(1) [[HELLO]], i64 11) to ptr)
+const char *q = end();
+
+const void *(*r)() = &retval;
+
+// CHECK: @s
+// CHECK-SAME: addrspace(1) global ptr null
+const void *s = observable_addr();
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z6retvalIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: ret ptr addrspacecast (ptr addrspace(1) [[HELLO]] to ptr)
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z15observable_addrIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: %call = call noundef ptr @_Z6calleePK1S(ptr noundef addrspacecast 
(ptr addrspace(1) [[HELLO]] to ptr))
+// CHECK: declare noundef ptr @_Z6calleePK1S(ptr noundef)

>From 4afd54856ca8248fab731e17cd644d18ed60acbc Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Thu, 9 Nov 2023 14:51:39 -1000
Subject: [PATCH 2/3] Fix formatting error.

---
 clang/lib/CodeGen/CGExpr.cpp | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 652d9c32a8c47b4..8abb1d8a1be4e97 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -3045,9 +3045,8 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 if (AS != T.getAddressSpace()) {
   auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
   auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
-  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
-   AS, T.getAddressSpace(),
-   PtrTy);
+  auto ASC = getTargetHooks().performAddrSpaceCast(
+CGM, ATPO.getPo

[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)

2023-12-13 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

> > > Is generic the best name here? I feel like that's going to be heavily 
> > > overloaded. I'd much prefer a new architecture that just treats "SPIR-V" 
> > > as a single architecture. E.g. `--offload-arch=spirv` or something.
> 
> For HIPAMD toolchain, `--offload-arch=generic` and `--offload-arch=spirv` 
> does not make much difference. However, I understand for OpenMP toolchain 
> `--offload-arch=generic` is probably too ambiguous and `--offload-arch=spirv` 
> is better. I can change it to `spirv`.

Perhaps we should consider prefixing it in some way (e.g. `hip-spirv` or 
`amd-spirv`) that leaves the door open for some special handling (enable a 
particular set of extensions only for amdgpu targeting SPIRV, try to deal with 
missing builtins etc.) / flexibility?

https://github.com/llvm/llvm-project/pull/75357
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[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)

2023-12-13 Thread Alex Voicu via cfe-commits


@@ -209,6 +210,13 @@ void AMDGCN::Linker::ConstructJob(Compilation &C, const 
JobAction &JA,
   if (JA.getType() == types::TY_LLVM_BC)
 return constructLlvmLinkCommand(C, JA, Inputs, Output, Args);
 
+  if (Args.getLastArgValue(options::OPT_mcpu_EQ) == "generic") {
+llvm::opt::ArgStringList TrArgs{"--spirv-max-version=1.1",

AlexVlx wrote:

I'm not sure we want to stick with 1.1 here, the Translator goes up to 1.4 at 
the moment - should we consider going to that instead?

https://github.com/llvm/llvm-project/pull/75357
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[llvm] [compiler-rt] [flang] [clang-tools-extra] [clang] [mlir] [clang][CodeGen] Handle template parameter objects with explicit address spaces (PR #69266)

2023-11-28 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/69266

>From ded7435220d2c3527c4798d1b328a5f2940e279a Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 16 Oct 2023 22:43:55 +0100
Subject: [PATCH 1/3] Handle trying to bind a generic reference to a template
 parameter object value that is in an explicit address space.

---
 clang/lib/CodeGen/CGExpr.cpp  | 18 +--
 .../template-param-objects-address-space.cpp  | 32 +++
 2 files changed, 47 insertions(+), 3 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/template-param-objects-address-space.cpp

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 54a1d300a9ac738..784d3f7b03909e3 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -2992,9 +2992,21 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 return MakeAddrLValue(CGM.GetAddrOfMSGuidDecl(GD), T,
   AlignmentSource::Decl);
 
-  if (const auto *TPO = dyn_cast(ND))
-return MakeAddrLValue(CGM.GetAddrOfTemplateParamObject(TPO), T,
-  AlignmentSource::Decl);
+  if (const auto *TPO = dyn_cast(ND)) {
+auto ATPO = CGM.GetAddrOfTemplateParamObject(TPO);
+auto AS = getLangASFromTargetAS(ATPO.getAddressSpace());
+
+if (AS != T.getAddressSpace()) {
+  auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
+  auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
+  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
+   AS, T.getAddressSpace(),
+   PtrTy);
+  ATPO = ConstantAddress(ASC, ATPO.getElementType(), ATPO.getAlignment());
+}
+
+return MakeAddrLValue(ATPO, T, AlignmentSource::Decl);
+  }
 
   llvm_unreachable("Unhandled DeclRefExpr");
 }
diff --git a/clang/test/CodeGenCXX/template-param-objects-address-space.cpp 
b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
new file mode 100644
index 000..b54dcfe77934ee2
--- /dev/null
+++ b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -std=c++20 %s -emit-llvm -o - | 
FileCheck %s
+
+struct S { char buf[32]; };
+template constexpr const char *begin() { return s.buf; }
+template constexpr const char *end() { return s.buf + 
__builtin_strlen(s.buf); }
+template constexpr const void *retval() { return &s; }
+extern const void *callee(const S*);
+template constexpr const void* observable_addr() { return callee(&s); }
+
+// CHECK: 
[[HELLO:@_ZTAXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100]]
+// CHECK-SAME: = linkonce_odr addrspace(1) constant { <{ [11 x i8], [21 x i8] 
}> } { <{ [11 x i8], [21 x i8] }> <{ [11 x i8] c"hello world", [21 x i8] 
zeroinitializer }> }, comdat
+
+// CHECK: @p
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
[[HELLO]] to ptr)
+const char *p = begin();
+
+// CHECK: @q
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
getelementptr (i8, ptr addrspace(1) [[HELLO]], i64 11) to ptr)
+const char *q = end();
+
+const void *(*r)() = &retval;
+
+// CHECK: @s
+// CHECK-SAME: addrspace(1) global ptr null
+const void *s = observable_addr();
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z6retvalIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: ret ptr addrspacecast (ptr addrspace(1) [[HELLO]] to ptr)
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z15observable_addrIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: %call = call noundef ptr @_Z6calleePK1S(ptr noundef addrspacecast 
(ptr addrspace(1) [[HELLO]] to ptr))
+// CHECK: declare noundef ptr @_Z6calleePK1S(ptr noundef)

>From 4afd54856ca8248fab731e17cd644d18ed60acbc Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Thu, 9 Nov 2023 14:51:39 -1000
Subject: [PATCH 2/3] Fix formatting error.

---
 clang/lib/CodeGen/CGExpr.cpp | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 652d9c32a8c47b4..8abb1d8a1be4e97 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -3045,9 +3045,8 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 if (AS != T.getAddressSpace()) {
   auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
   auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
-  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
-   AS, T.getAddressSpace(),
-   PtrTy);
+  auto ASC = getTargetHooks().performAddrSpaceCast(
+CGM, ATPO.getPo

[clang] [compiler-rt] [mlir] [llvm] [flang] [clang-tools-extra] [clang][CodeGen] Handle template parameter objects with explicit address spaces (PR #69266)

2023-11-28 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx closed 
https://github.com/llvm/llvm-project/pull/69266
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[clang] [llvm] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-19 Thread Alex Voicu via cfe-commits


@@ -0,0 +1,22 @@
+// REQUIRES: spirv-registered-target
+// RUN: %clang_cc1 -triple spirv64-unknown-unknown -fcuda-is-device -emit-llvm 
-o - %s | FileCheck %s
+struct x {

AlexVlx wrote:

Done.

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-19 Thread Alex Voicu via cfe-commits


@@ -0,0 +1,22 @@
+// REQUIRES: spirv-registered-target
+// RUN: %clang_cc1 -triple spirv64-unknown-unknown -fcuda-is-device -emit-llvm 
-o - %s | FileCheck %s
+struct x {
+  double b;
+  long a;
+};
+
+void testva(int n, ...) {
+  __builtin_va_list ap;
+  __builtin_va_start(ap, n);
+  struct x t = __builtin_va_arg(ap, struct x);
+  __builtin_va_list ap2;
+  __builtin_va_copy(ap2, ap);
+  int v = __builtin_va_arg(ap2, int);
+  __builtin_va_end(ap2);
+  __builtin_va_end(ap);
+}
+
+// CHECK:  call void @llvm.va_start.p4(ptr addrspace(4) %ap{{.*}})

AlexVlx wrote:

Done.

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-19 Thread Alex Voicu via cfe-commits


@@ -0,0 +1,22 @@
+// REQUIRES: spirv-registered-target

AlexVlx wrote:

I was not certain and erred on the side of caution. You are correct (as far as 
I can tell), and have removed the requirement. Thank you for pointing it out!

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-19 Thread Alex Voicu via cfe-commits


@@ -1713,7 +1716,7 @@ def int_coro_subfn_addr : DefaultAttrsIntrinsic<
 
 ///===-- Other Intrinsics 
--===//
 //
-// TODO: We should introduce a new memory kind fo traps (and other side 
effects 
+// TODO: We should introduce a new memory kind fo traps (and other side effects

AlexVlx wrote:

Done.

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-20 Thread Alex Voicu via cfe-commits


@@ -700,10 +700,13 @@ class MSBuiltin {
 //===--- Variable Argument Handling Intrinsics 
===//
 //
 
-def int_vastart : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], 
"llvm.va_start">;
-def int_vacopy  : DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_ptr_ty], [],
-"llvm.va_copy">;
-def int_vaend   : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], "llvm.va_end">;
+def int_vastart : DefaultAttrsIntrinsic<[],
+[llvm_anyptr_ty], [], "llvm.va_start">;
+def int_vacopy  : DefaultAttrsIntrinsic<[],
+[llvm_anyptr_ty, llvm_anyptr_ty], [],
+"llvm.va_copy">;

AlexVlx wrote:

Hmm, I did struggle a bit with this and admit that I'm not (yet) entirely 
convinced a valid (albeit hypothetical and admittedly odd) case couldn't be 
constructed. Consider e.g. having a `__builtin_va_list` declared at namespace / 
global scope. If a target uses an explicit, non-generic, AS, for globals, then 
the copy would be to/from a pointer to generic (or pointer to private) from/to 
a pointer to global. I _believe_ this should work, and making `va_copy` 
mono-parameter would break it, would it not?

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-21 Thread Alex Voicu via cfe-commits


@@ -700,10 +700,13 @@ class MSBuiltin {
 //===--- Variable Argument Handling Intrinsics 
===//
 //
 
-def int_vastart : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], 
"llvm.va_start">;
-def int_vacopy  : DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_ptr_ty], [],
-"llvm.va_copy">;
-def int_vaend   : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], "llvm.va_end">;
+def int_vastart : DefaultAttrsIntrinsic<[],
+[llvm_anyptr_ty], [], "llvm.va_start">;
+def int_vacopy  : DefaultAttrsIntrinsic<[],
+[llvm_anyptr_ty, llvm_anyptr_ty], [],
+"llvm.va_copy">;

AlexVlx wrote:

It does for our target, but I believe each target has freedom when it comes to 
implementing the actual `va_list` underlying type (the standard regards it as 
opaque), so it is probably legal to do things that do not match that. So I'd 
rather follow up with some AMDGPU specific work, but leave this as general / 
generic as possible.

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-21 Thread Alex Voicu via cfe-commits


@@ -700,10 +700,13 @@ class MSBuiltin {
 //===--- Variable Argument Handling Intrinsics 
===//
 //
 
-def int_vastart : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], 
"llvm.va_start">;
-def int_vacopy  : DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_ptr_ty], [],
-"llvm.va_copy">;
-def int_vaend   : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], "llvm.va_end">;
+def int_vastart : DefaultAttrsIntrinsic<[],
+[llvm_anyptr_ty], [], "llvm.va_start">;
+def int_vacopy  : DefaultAttrsIntrinsic<[],
+[llvm_anyptr_ty, llvm_anyptr_ty], [],
+"llvm.va_copy">;

AlexVlx wrote:

Ok, I think you and @arsenm have the right of it, I've taken Matt's suggestion.

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-22 Thread Alex Voicu via cfe-commits


@@ -1318,16 +1318,16 @@ define void @instructions.va_arg(i8* %v, ...) {
   %ap2 = bitcast i8** %ap to i8*
 
   call void @llvm.va_start(i8* %ap2)
-  ; CHECK: call void @llvm.va_start(ptr %ap2)
+  ; CHECK: call void @llvm.va_start.p0(ptr %ap2)
 
   va_arg i8* %ap2, i32
   ; CHECK: va_arg ptr %ap2, i32
-
+s

AlexVlx wrote:

Done.

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [mlir] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-24 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

> CI looks unhappy, mlir also seems to need updates:
> 
> MLIR :: Target/LLVMIR/llvmir.mlir MLIR :: mlir-cpu-runner/x86-varargs.mlir

Done.

https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [mlir] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-27 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx closed 
https://github.com/llvm/llvm-project/pull/85460
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[clang] [llvm] [mlir] [CodeGen][LLVM] Make the `va_list` related intrinsics generic. (PR #85460)

2024-03-27 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

Thank you everyone for the reviews.

https://github.com/llvm/llvm-project/pull/85460
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[lld] [clang] [flang] [llvm] [AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (PR #76955)

2024-01-24 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx edited 
https://github.com/llvm/llvm-project/pull/76955
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[flang] [llvm] [lld] [clang] [AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (PR #76955)

2024-01-24 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx approved this pull request.

LGTM in general, versioning seems fine; I had a pair of very minor 
nits/questions, but they're not blocking concerns. Thanks!

https://github.com/llvm/llvm-project/pull/76955
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[flang] [llvm] [lld] [clang] [AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (PR #76955)

2024-01-24 Thread Alex Voicu via cfe-commits


@@ -49,6 +49,11 @@ constexpr uint32_t VersionMajorV5 = 1;
 /// HSA metadata minor version for code object V5.
 constexpr uint32_t VersionMinorV5 = 2;
 
+/// HSA metadata major version for code object V6.
+constexpr uint32_t VersionMajorV6 = 1;
+/// HSA metadata minor version for code object V6.
+constexpr uint32_t VersionMinorV6 = 3;

AlexVlx wrote:

Minor nit: there's formally no HSA 1.3, as far as I recall (things stopped at 
1.2). Someone looking at this might erroneously infer it exists as a foundation 
mandated standard (and go look up the documentation), or assume it's coming 
soonTM. It might be beneficial to call that out here, since it would be 
difficult to break the current progression / use of "HSA" metadata.

https://github.com/llvm/llvm-project/pull/76955
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[clang] [lld] [llvm] [flang] [AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (PR #76955)

2024-01-24 Thread Alex Voicu via cfe-commits


@@ -139,10 +139,10 @@ bool 
AMDGPURemoveIncompatibleFunctions::checkFunction(Function &F) {
   const GCNSubtarget *ST =
   static_cast(TM->getSubtargetImpl(F));
 
-  // Check the GPU isn't generic. Generic is used for testing only
-  // and we don't want this pass to interfere with it.
+  // Check the GPU isn't generic or generic-hsa. Generic is used for testing
+  // only and we don't want this pass to interfere with it.
   StringRef GPUName = ST->getCPU();
-  if (GPUName.empty() || GPUName.contains("generic"))
+  if (GPUName.empty() || GPUName.starts_with("generic"))

AlexVlx wrote:

Are we sure this is correct? The existing issue (as far as I can tell) is that 
we never really implemented `generic`, so it'd just end up as some specific. 
However, with generic targets, it appears that the pass would actually make 
sense / apply / have some use?

https://github.com/llvm/llvm-project/pull/76955
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[clang] [HIP][Driver] Automatically include `hipstdpar` forwarding header (PR #78915)

2024-01-21 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx created 
https://github.com/llvm/llvm-project/pull/78915

The forwarding header used by `hipstdpar` on AMDGPU targets is now pacakged 
with `rocThrust`. This change augments the ROCm Driver component so that it can 
automatically pick up the packaged header iff the user hasn't overridden it via 
the dedicated flag.

>From 37453ff13fd7a61f2072069cf94615497c748089 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 21 Jan 2024 21:52:52 +
Subject: [PATCH] Add automated inclusion for the forwarding header packaged
 with `rocThrust`.

---
 clang/lib/Driver/ToolChains/AMDGPU.cpp | 25 +
 clang/test/Driver/hipstdpar.c  |  3 ++-
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/clang/lib/Driver/ToolChains/AMDGPU.cpp 
b/clang/lib/Driver/ToolChains/AMDGPU.cpp
index 56f06fc5fccb7e..8a88dba562c8c0 100644
--- a/clang/lib/Driver/ToolChains/AMDGPU.cpp
+++ b/clang/lib/Driver/ToolChains/AMDGPU.cpp
@@ -545,26 +545,35 @@ void RocmInstallationDetector::AddHIPIncludeArgs(const 
ArgList &DriverArgs,
   }
 
   const auto HandleHipStdPar = [=, &DriverArgs, &CC1Args]() {
-if (!hasHIPStdParLibrary()) {
+StringRef Inc = getIncludePath();
+auto &FS = D.getVFS();
+
+if (!hasHIPStdParLibrary())
+  if (!HIPStdParPathArg.empty() ||
+  !FS.exists(Inc + "/thrust/system/hip/hipstdpar/hipstdpar_lib.hpp")) {
   D.Diag(diag::err_drv_no_hipstdpar_lib);
   return;
 }
-if (!HasRocThrustLibrary &&
-!D.getVFS().exists(getIncludePath() + "/thrust")) {
+if (!HasRocThrustLibrary && !FS.exists(Inc + "/thrust")) {
   D.Diag(diag::err_drv_no_hipstdpar_thrust_lib);
   return;
 }
-if (!HasRocPrimLibrary &&
-!D.getVFS().exists(getIncludePath() + "/rocprim")) {
+if (!HasRocPrimLibrary && !FS.exists(Inc + "/rocprim")) {
   D.Diag(diag::err_drv_no_hipstdpar_prim_lib);
   return;
 }
-
 const char *ThrustPath;
 if (HasRocThrustLibrary)
   ThrustPath = DriverArgs.MakeArgString(HIPRocThrustPathArg);
 else
-  ThrustPath = DriverArgs.MakeArgString(getIncludePath() + "/thrust");
+  ThrustPath = DriverArgs.MakeArgString(Inc + "/thrust");
+
+const char *HIPStdParPath;
+if (hasHIPStdParLibrary())
+  HIPStdParPath = DriverArgs.MakeArgString(HIPStdParPathArg);
+else
+  HIPStdParPath = DriverArgs.MakeArgString(StringRef(ThrustPath) +
+   "/system/hip/hipstdpar");
 
 const char *PrimPath;
 if (HasRocPrimLibrary)
@@ -573,7 +582,7 @@ void RocmInstallationDetector::AddHIPIncludeArgs(const 
ArgList &DriverArgs,
   PrimPath = DriverArgs.MakeArgString(getIncludePath() + "/rocprim");
 
 CC1Args.append({"-idirafter", ThrustPath, "-idirafter", PrimPath,
-"-idirafter", DriverArgs.MakeArgString(HIPStdParPathArg),
+"-idirafter", HIPStdParPath,
 "-include", "hipstdpar_lib.hpp"});
   };
 
diff --git a/clang/test/Driver/hipstdpar.c b/clang/test/Driver/hipstdpar.c
index 69c5b177d170cd..2f48bf6b5cf1eb 100644
--- a/clang/test/Driver/hipstdpar.c
+++ b/clang/test/Driver/hipstdpar.c
@@ -5,7 +5,8 @@
 // XFAIL: target={{.*}}-scei{{.*}}
 // XFAIL: target={{.*}}-sie{{.*}}
 
-// RUN: not %clang -### --hipstdpar -nogpulib -nogpuinc --compile %s 2>&1 | \
+// RUN: not %clang -### --hipstdpar --hipstdpar-path=/does/not/exist -nogpulib 
\
+// RUN:   -nogpuinc --compile %s 2>&1 | \
 // RUN:   FileCheck --check-prefix=HIPSTDPAR-MISSING-LIB %s
 // RUN: %clang -### --hipstdpar --hipstdpar-path=%S/Inputs/hipstdpar \
 // RUN:   --hipstdpar-thrust-path=%S/Inputs/hipstdpar/thrust \

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[clang] [HIP][Driver] Automatically include `hipstdpar` forwarding header (PR #78915)

2024-01-21 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/78915

>From 37453ff13fd7a61f2072069cf94615497c748089 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 21 Jan 2024 21:52:52 +
Subject: [PATCH 1/2] Add automated inclusion for the forwarding header
 packaged with `rocThrust`.

---
 clang/lib/Driver/ToolChains/AMDGPU.cpp | 25 +
 clang/test/Driver/hipstdpar.c  |  3 ++-
 2 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/clang/lib/Driver/ToolChains/AMDGPU.cpp 
b/clang/lib/Driver/ToolChains/AMDGPU.cpp
index 56f06fc5fccb7eb..8a88dba562c8c02 100644
--- a/clang/lib/Driver/ToolChains/AMDGPU.cpp
+++ b/clang/lib/Driver/ToolChains/AMDGPU.cpp
@@ -545,26 +545,35 @@ void RocmInstallationDetector::AddHIPIncludeArgs(const 
ArgList &DriverArgs,
   }
 
   const auto HandleHipStdPar = [=, &DriverArgs, &CC1Args]() {
-if (!hasHIPStdParLibrary()) {
+StringRef Inc = getIncludePath();
+auto &FS = D.getVFS();
+
+if (!hasHIPStdParLibrary())
+  if (!HIPStdParPathArg.empty() ||
+  !FS.exists(Inc + "/thrust/system/hip/hipstdpar/hipstdpar_lib.hpp")) {
   D.Diag(diag::err_drv_no_hipstdpar_lib);
   return;
 }
-if (!HasRocThrustLibrary &&
-!D.getVFS().exists(getIncludePath() + "/thrust")) {
+if (!HasRocThrustLibrary && !FS.exists(Inc + "/thrust")) {
   D.Diag(diag::err_drv_no_hipstdpar_thrust_lib);
   return;
 }
-if (!HasRocPrimLibrary &&
-!D.getVFS().exists(getIncludePath() + "/rocprim")) {
+if (!HasRocPrimLibrary && !FS.exists(Inc + "/rocprim")) {
   D.Diag(diag::err_drv_no_hipstdpar_prim_lib);
   return;
 }
-
 const char *ThrustPath;
 if (HasRocThrustLibrary)
   ThrustPath = DriverArgs.MakeArgString(HIPRocThrustPathArg);
 else
-  ThrustPath = DriverArgs.MakeArgString(getIncludePath() + "/thrust");
+  ThrustPath = DriverArgs.MakeArgString(Inc + "/thrust");
+
+const char *HIPStdParPath;
+if (hasHIPStdParLibrary())
+  HIPStdParPath = DriverArgs.MakeArgString(HIPStdParPathArg);
+else
+  HIPStdParPath = DriverArgs.MakeArgString(StringRef(ThrustPath) +
+   "/system/hip/hipstdpar");
 
 const char *PrimPath;
 if (HasRocPrimLibrary)
@@ -573,7 +582,7 @@ void RocmInstallationDetector::AddHIPIncludeArgs(const 
ArgList &DriverArgs,
   PrimPath = DriverArgs.MakeArgString(getIncludePath() + "/rocprim");
 
 CC1Args.append({"-idirafter", ThrustPath, "-idirafter", PrimPath,
-"-idirafter", DriverArgs.MakeArgString(HIPStdParPathArg),
+"-idirafter", HIPStdParPath,
 "-include", "hipstdpar_lib.hpp"});
   };
 
diff --git a/clang/test/Driver/hipstdpar.c b/clang/test/Driver/hipstdpar.c
index 69c5b177d170cd8..2f48bf6b5cf1ebd 100644
--- a/clang/test/Driver/hipstdpar.c
+++ b/clang/test/Driver/hipstdpar.c
@@ -5,7 +5,8 @@
 // XFAIL: target={{.*}}-scei{{.*}}
 // XFAIL: target={{.*}}-sie{{.*}}
 
-// RUN: not %clang -### --hipstdpar -nogpulib -nogpuinc --compile %s 2>&1 | \
+// RUN: not %clang -### --hipstdpar --hipstdpar-path=/does/not/exist -nogpulib 
\
+// RUN:   -nogpuinc --compile %s 2>&1 | \
 // RUN:   FileCheck --check-prefix=HIPSTDPAR-MISSING-LIB %s
 // RUN: %clang -### --hipstdpar --hipstdpar-path=%S/Inputs/hipstdpar \
 // RUN:   --hipstdpar-thrust-path=%S/Inputs/hipstdpar/thrust \

>From b4ad26f6213aec78adcac302ee915420eebc4c16 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 21 Jan 2024 22:04:12 +
Subject: [PATCH 2/2] Fix formatting.

---
 clang/lib/Driver/ToolChains/AMDGPU.cpp | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/clang/lib/Driver/ToolChains/AMDGPU.cpp 
b/clang/lib/Driver/ToolChains/AMDGPU.cpp
index 8a88dba562c8c02..b3c9d5908654f6a 100644
--- a/clang/lib/Driver/ToolChains/AMDGPU.cpp
+++ b/clang/lib/Driver/ToolChains/AMDGPU.cpp
@@ -551,9 +551,9 @@ void RocmInstallationDetector::AddHIPIncludeArgs(const 
ArgList &DriverArgs,
 if (!hasHIPStdParLibrary())
   if (!HIPStdParPathArg.empty() ||
   !FS.exists(Inc + "/thrust/system/hip/hipstdpar/hipstdpar_lib.hpp")) {
-  D.Diag(diag::err_drv_no_hipstdpar_lib);
-  return;
-}
+D.Diag(diag::err_drv_no_hipstdpar_lib);
+return;
+  }
 if (!HasRocThrustLibrary && !FS.exists(Inc + "/thrust")) {
   D.Diag(diag::err_drv_no_hipstdpar_thrust_lib);
   return;
@@ -582,8 +582,8 @@ void RocmInstallationDetector::AddHIPIncludeArgs(const 
ArgList &DriverArgs,
   PrimPath = DriverArgs.MakeArgString(getIncludePath() + "/rocprim");
 
 CC1Args.append({"-idirafter", ThrustPath, "-idirafter", PrimPath,
-"-idirafter", HIPStdParPath,
-"-include", "hipstdpar_lib.hpp"});
+"-idirafter", HIPStdParPath, "-include",
+"hipstdpar_lib.hpp"});
   };
 
   if (DriverArgs.hasArg(options::OPT_nogpuinc)) {

__

[clang] [HIP][Driver] Automatically include `hipstdpar` forwarding header (PR #78915)

2024-01-22 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx closed 
https://github.com/llvm/llvm-project/pull/78915
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[clang] [clang][CodeGen] Handle template parameter objects with explicit address spaces (PR #69266)

2023-10-23 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/69266

>From ded7435220d2c3527c4798d1b328a5f2940e279a Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 16 Oct 2023 22:43:55 +0100
Subject: [PATCH] Handle trying to bind a generic reference to a template
 parameter object value that is in an explicit address space.

---
 clang/lib/CodeGen/CGExpr.cpp  | 18 +--
 .../template-param-objects-address-space.cpp  | 32 +++
 2 files changed, 47 insertions(+), 3 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/template-param-objects-address-space.cpp

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 54a1d300a9ac738..784d3f7b03909e3 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -2992,9 +2992,21 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 return MakeAddrLValue(CGM.GetAddrOfMSGuidDecl(GD), T,
   AlignmentSource::Decl);
 
-  if (const auto *TPO = dyn_cast(ND))
-return MakeAddrLValue(CGM.GetAddrOfTemplateParamObject(TPO), T,
-  AlignmentSource::Decl);
+  if (const auto *TPO = dyn_cast(ND)) {
+auto ATPO = CGM.GetAddrOfTemplateParamObject(TPO);
+auto AS = getLangASFromTargetAS(ATPO.getAddressSpace());
+
+if (AS != T.getAddressSpace()) {
+  auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
+  auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
+  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
+   AS, T.getAddressSpace(),
+   PtrTy);
+  ATPO = ConstantAddress(ASC, ATPO.getElementType(), ATPO.getAlignment());
+}
+
+return MakeAddrLValue(ATPO, T, AlignmentSource::Decl);
+  }
 
   llvm_unreachable("Unhandled DeclRefExpr");
 }
diff --git a/clang/test/CodeGenCXX/template-param-objects-address-space.cpp 
b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
new file mode 100644
index 000..b54dcfe77934ee2
--- /dev/null
+++ b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -std=c++20 %s -emit-llvm -o - | 
FileCheck %s
+
+struct S { char buf[32]; };
+template constexpr const char *begin() { return s.buf; }
+template constexpr const char *end() { return s.buf + 
__builtin_strlen(s.buf); }
+template constexpr const void *retval() { return &s; }
+extern const void *callee(const S*);
+template constexpr const void* observable_addr() { return callee(&s); }
+
+// CHECK: 
[[HELLO:@_ZTAXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100]]
+// CHECK-SAME: = linkonce_odr addrspace(1) constant { <{ [11 x i8], [21 x i8] 
}> } { <{ [11 x i8], [21 x i8] }> <{ [11 x i8] c"hello world", [21 x i8] 
zeroinitializer }> }, comdat
+
+// CHECK: @p
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
[[HELLO]] to ptr)
+const char *p = begin();
+
+// CHECK: @q
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
getelementptr (i8, ptr addrspace(1) [[HELLO]], i64 11) to ptr)
+const char *q = end();
+
+const void *(*r)() = &retval;
+
+// CHECK: @s
+// CHECK-SAME: addrspace(1) global ptr null
+const void *s = observable_addr();
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z6retvalIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: ret ptr addrspacecast (ptr addrspace(1) [[HELLO]] to ptr)
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z15observable_addrIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: %call = call noundef ptr @_Z6calleePK1S(ptr noundef addrspacecast 
(ptr addrspace(1) [[HELLO]] to ptr))
+// CHECK: declare noundef ptr @_Z6calleePK1S(ptr noundef)

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[clang-tools-extra] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-20 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/65699

>From f4271e03667b64c8d10d7e4de16e78b37e845229 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 8 Sep 2023 00:21:59 +0100
Subject: [PATCH 1/2] AS_cast the argument to `eh_typeid_for` iff typeinfo is
 not in the default AS.

---
 clang/lib/CodeGen/CGException.cpp |  5 +++-
 .../try-catch-with-address-space.cpp  | 25 +++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CodeGenCXX/try-catch-with-address-space.cpp

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 3996f2948349cb5..49cf4ec4b84307b 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;
diff --git a/clang/test/CodeGenCXX/try-catch-with-address-space.cpp 
b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
new file mode 100644
index 000..279d29f50fd4101
--- /dev/null
+++ b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -emit-llvm -o - 
-fcxx-exceptions -fexceptions | FileCheck %s
+
+struct X { };
+
+const X g();
+
+void f() {
+  try {
+throw g();
+// CHECK: ptr addrspace(1) @_ZTI1X
+  } catch (const X x) {
+// CHECK: catch ptr addrspace(1) @_ZTI1X
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTI1X to ptr))
+  }
+}
+
+void h() {
+  try {
+throw "ABC";
+// CHECK: ptr addrspace(1) @_ZTIPKc
+  } catch (char const(&)[4]) {
+// CHECK: catch ptr addrspace(1) @_ZTIA4_c
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTIA4_c to ptr))
+  }
+}

>From 938c798b39be0fd03f1e6c57ce7dd39c93145acb Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 10 Sep 2023 15:45:10 +0100
Subject: [PATCH 2/2] Switch to using the target hook for the as-cast.

---
 clang/lib/CodeGen/CGException.cpp | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 49cf4ec4b84307b..87594f71b26ec53 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1136,6 +1136,8 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
   // Select the right handler.
   llvm::Function *llvm_eh_typeid_for =
 CGF.CGM.getIntrinsic(llvm::Intrinsic::eh_typeid_for);
+  llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+  LangAS globAS = CGF.CGM.GetGlobalVarAddressSpace(nullptr);
 
   // Load the selector value.
   llvm::Value *selector = CGF.getSelectorFromSlot();
@@ -1149,10 +1151,11 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
 // With opaque ptrs, only the address space can be a mismatch.
 if (typeValue->getType() != argTy)
-  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
+  typeValue =
+CGF.getTargetHooks().performAddrSpaceCast(CGF, typeValue, globAS,
+  LangAS::Default, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;

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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-20 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/65699

>From f4271e03667b64c8d10d7e4de16e78b37e845229 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 8 Sep 2023 00:21:59 +0100
Subject: [PATCH 1/2] AS_cast the argument to `eh_typeid_for` iff typeinfo is
 not in the default AS.

---
 clang/lib/CodeGen/CGException.cpp |  5 +++-
 .../try-catch-with-address-space.cpp  | 25 +++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CodeGenCXX/try-catch-with-address-space.cpp

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 3996f2948349cb5..49cf4ec4b84307b 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;
diff --git a/clang/test/CodeGenCXX/try-catch-with-address-space.cpp 
b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
new file mode 100644
index 000..279d29f50fd4101
--- /dev/null
+++ b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -emit-llvm -o - 
-fcxx-exceptions -fexceptions | FileCheck %s
+
+struct X { };
+
+const X g();
+
+void f() {
+  try {
+throw g();
+// CHECK: ptr addrspace(1) @_ZTI1X
+  } catch (const X x) {
+// CHECK: catch ptr addrspace(1) @_ZTI1X
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTI1X to ptr))
+  }
+}
+
+void h() {
+  try {
+throw "ABC";
+// CHECK: ptr addrspace(1) @_ZTIPKc
+  } catch (char const(&)[4]) {
+// CHECK: catch ptr addrspace(1) @_ZTIA4_c
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTIA4_c to ptr))
+  }
+}

>From 938c798b39be0fd03f1e6c57ce7dd39c93145acb Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 10 Sep 2023 15:45:10 +0100
Subject: [PATCH 2/2] Switch to using the target hook for the as-cast.

---
 clang/lib/CodeGen/CGException.cpp | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 49cf4ec4b84307b..87594f71b26ec53 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1136,6 +1136,8 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
   // Select the right handler.
   llvm::Function *llvm_eh_typeid_for =
 CGF.CGM.getIntrinsic(llvm::Intrinsic::eh_typeid_for);
+  llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+  LangAS globAS = CGF.CGM.GetGlobalVarAddressSpace(nullptr);
 
   // Load the selector value.
   llvm::Value *selector = CGF.getSelectorFromSlot();
@@ -1149,10 +1151,11 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
 // With opaque ptrs, only the address space can be a mismatch.
 if (typeValue->getType() != argTy)
-  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
+  typeValue =
+CGF.getTargetHooks().performAddrSpaceCast(CGF, typeValue, globAS,
+  LangAS::Default, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;

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[clang-tools-extra] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-20 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/65699

>From f4271e03667b64c8d10d7e4de16e78b37e845229 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 8 Sep 2023 00:21:59 +0100
Subject: [PATCH 1/2] AS_cast the argument to `eh_typeid_for` iff typeinfo is
 not in the default AS.

---
 clang/lib/CodeGen/CGException.cpp |  5 +++-
 .../try-catch-with-address-space.cpp  | 25 +++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CodeGenCXX/try-catch-with-address-space.cpp

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 3996f2948349cb5..49cf4ec4b84307b 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;
diff --git a/clang/test/CodeGenCXX/try-catch-with-address-space.cpp 
b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
new file mode 100644
index 000..279d29f50fd4101
--- /dev/null
+++ b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -emit-llvm -o - 
-fcxx-exceptions -fexceptions | FileCheck %s
+
+struct X { };
+
+const X g();
+
+void f() {
+  try {
+throw g();
+// CHECK: ptr addrspace(1) @_ZTI1X
+  } catch (const X x) {
+// CHECK: catch ptr addrspace(1) @_ZTI1X
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTI1X to ptr))
+  }
+}
+
+void h() {
+  try {
+throw "ABC";
+// CHECK: ptr addrspace(1) @_ZTIPKc
+  } catch (char const(&)[4]) {
+// CHECK: catch ptr addrspace(1) @_ZTIA4_c
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTIA4_c to ptr))
+  }
+}

>From 938c798b39be0fd03f1e6c57ce7dd39c93145acb Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 10 Sep 2023 15:45:10 +0100
Subject: [PATCH 2/2] Switch to using the target hook for the as-cast.

---
 clang/lib/CodeGen/CGException.cpp | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 49cf4ec4b84307b..87594f71b26ec53 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1136,6 +1136,8 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
   // Select the right handler.
   llvm::Function *llvm_eh_typeid_for =
 CGF.CGM.getIntrinsic(llvm::Intrinsic::eh_typeid_for);
+  llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+  LangAS globAS = CGF.CGM.GetGlobalVarAddressSpace(nullptr);
 
   // Load the selector value.
   llvm::Value *selector = CGF.getSelectorFromSlot();
@@ -1149,10 +1151,11 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
 // With opaque ptrs, only the address space can be a mismatch.
 if (typeValue->getType() != argTy)
-  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
+  typeValue =
+CGF.getTargetHooks().performAddrSpaceCast(CGF, typeValue, globAS,
+  LangAS::Default, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;

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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-20 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/65699

>From f4271e03667b64c8d10d7e4de16e78b37e845229 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 8 Sep 2023 00:21:59 +0100
Subject: [PATCH 1/2] AS_cast the argument to `eh_typeid_for` iff typeinfo is
 not in the default AS.

---
 clang/lib/CodeGen/CGException.cpp |  5 +++-
 .../try-catch-with-address-space.cpp  | 25 +++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CodeGenCXX/try-catch-with-address-space.cpp

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 3996f2948349cb5..49cf4ec4b84307b 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;
diff --git a/clang/test/CodeGenCXX/try-catch-with-address-space.cpp 
b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
new file mode 100644
index 000..279d29f50fd4101
--- /dev/null
+++ b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -emit-llvm -o - 
-fcxx-exceptions -fexceptions | FileCheck %s
+
+struct X { };
+
+const X g();
+
+void f() {
+  try {
+throw g();
+// CHECK: ptr addrspace(1) @_ZTI1X
+  } catch (const X x) {
+// CHECK: catch ptr addrspace(1) @_ZTI1X
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTI1X to ptr))
+  }
+}
+
+void h() {
+  try {
+throw "ABC";
+// CHECK: ptr addrspace(1) @_ZTIPKc
+  } catch (char const(&)[4]) {
+// CHECK: catch ptr addrspace(1) @_ZTIA4_c
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTIA4_c to ptr))
+  }
+}

>From 938c798b39be0fd03f1e6c57ce7dd39c93145acb Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 10 Sep 2023 15:45:10 +0100
Subject: [PATCH 2/2] Switch to using the target hook for the as-cast.

---
 clang/lib/CodeGen/CGException.cpp | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 49cf4ec4b84307b..87594f71b26ec53 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1136,6 +1136,8 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
   // Select the right handler.
   llvm::Function *llvm_eh_typeid_for =
 CGF.CGM.getIntrinsic(llvm::Intrinsic::eh_typeid_for);
+  llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+  LangAS globAS = CGF.CGM.GetGlobalVarAddressSpace(nullptr);
 
   // Load the selector value.
   llvm::Value *selector = CGF.getSelectorFromSlot();
@@ -1149,10 +1151,11 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
 // With opaque ptrs, only the address space can be a mismatch.
 if (typeValue->getType() != argTy)
-  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
+  typeValue =
+CGF.getTargetHooks().performAddrSpaceCast(CGF, typeValue, globAS,
+  LangAS::Default, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;

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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-20 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx closed 
https://github.com/llvm/llvm-project/pull/65699
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[clang-tools-extra] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-20 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx closed 
https://github.com/llvm/llvm-project/pull/65699
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[clang] 9a40858 - [HIP][Clang][Driver] Add Driver support for `hipstdpar`

2023-10-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-03T13:14:46+01:00
New Revision: 9a408588d1b8b7899eff593c537de539a4a12651

URL: 
https://github.com/llvm/llvm-project/commit/9a408588d1b8b7899eff593c537de539a4a12651
DIFF: 
https://github.com/llvm/llvm-project/commit/9a408588d1b8b7899eff593c537de539a4a12651.diff

LOG: [HIP][Clang][Driver] Add Driver support for `hipstdpar`

This patch adds the Driver changes needed for enabling HIP parallel algorithm 
offload on AMDGPU targets. What this change does can be summed up as follows:

- add two flags, one for enabling `hipstdpar` compilation, the second enabling 
the optional allocation interposition mode;
- the flags correspond to new LangOpt members;
- if we are compiling or linking with --hipstdpar, we enable HIP; in the 
compilation case C and C++ inputs are treated as HIP inputs;
- the ROCm / AMDGPU driver is augmented to look for and include an 
implementation detail forwarding header; we error out if the user requested 
`hipstdpar` but the header or its dependencies cannot be found.

Tests for the behaviour described above are also added.

Reviewed by: MaskRay, yaxunl

Differential Revision: https://reviews.llvm.org/D155775

Added: 
clang/test/Driver/Inputs/hipstdpar/hipstdpar_lib.hpp
clang/test/Driver/Inputs/hipstdpar/rocprim/.keep
clang/test/Driver/Inputs/hipstdpar/thrust/.keep
clang/test/Driver/hipstdpar.c

Modified: 
clang/include/clang/Basic/DiagnosticDriverKinds.td
clang/include/clang/Basic/LangOptions.def
clang/include/clang/Driver/Options.td
clang/lib/Driver/Driver.cpp
clang/lib/Driver/ToolChains/AMDGPU.cpp
clang/lib/Driver/ToolChains/Clang.cpp
clang/lib/Driver/ToolChains/HIPAMD.cpp
clang/lib/Driver/ToolChains/ROCm.h

Removed: 




diff  --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td 
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index 2a48c063e243ee0..91a95def4f80de4 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -70,6 +70,16 @@ def err_drv_no_rocm_device_lib : Error<
 def err_drv_no_hip_runtime : Error<
   "cannot find HIP runtime; provide its path via '--rocm-path', or pass "
   "'-nogpuinc' to build without HIP runtime">;
+def err_drv_no_hipstdpar_lib : Error<
+  "cannot find HIP Standard Parallelism Acceleration library; provide it via "
+  "'--hipstdpar-path'">;
+def err_drv_no_hipstdpar_thrust_lib : Error<
+  "cannot find rocThrust, which is required by the HIP Standard Parallelism "
+  "Acceleration library; provide it via "
+  "'--hipstdpar-thrust-path'">;
+def err_drv_no_hipstdpar_prim_lib : Error<
+  "cannot find rocPrim, which is required by the HIP Standard Parallelism "
+  "Acceleration library; provide it via '--hipstdpar-prim-path'">;
 
 def err_drv_no_hipspv_device_lib : Error<
   "cannot find HIP device library%select{| for %1}0; provide its path via "

diff  --git a/clang/include/clang/Basic/LangOptions.def 
b/clang/include/clang/Basic/LangOptions.def
index 28c9bcec3ee60f1..c0ea4ecb9806a5b 100644
--- a/clang/include/clang/Basic/LangOptions.def
+++ b/clang/include/clang/Basic/LangOptions.def
@@ -280,6 +280,8 @@ ENUM_LANGOPT(SYCLVersion  , SYCLMajorVersion, 2, SYCL_None, 
"Version of the SYCL
 
 LANGOPT(HIPUseNewLaunchAPI, 1, 0, "Use new kernel launching API for HIP")
 LANGOPT(OffloadUniformBlock, 1, 0, "Assume that kernels are launched with 
uniform block sizes (default true for CUDA/HIP and false otherwise)")
+LANGOPT(HIPStdPar, 1, 0, "Enable Standard Parallel Algorithm Acceleration for 
HIP (experimental)")
+LANGOPT(HIPStdParInterposeAlloc, 1, 0, "Replace allocations / deallocations 
with HIP RT calls when Standard Parallel Algorithm Acceleration for HIP is 
enabled (Experimental)")
 
 LANGOPT(SizedDeallocation , 1, 0, "sized deallocation")
 LANGOPT(AlignedAllocation , 1, 0, "aligned allocation")

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index ee4e23f335e7875..ff2130c93f28ea0 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -1258,6 +1258,32 @@ def rocm_path_EQ : Joined<["--"], "rocm-path=">, 
Group,
   HelpText<"ROCm installation path, used for finding and automatically linking 
required bitcode libraries.">;
 def hip_path_EQ : Joined<["--"], "hip-path=">, Group,
   HelpText<"HIP runtime installation path, used for finding HIP version and 
adding HIP include path.">;
+def hipstdpar : Flag<["--"], "hipstdpar">,
+  Visibility<[ClangOption, CC1Option]>,
+  Group,
+  HelpText<"Enable HIP acceleration for standard parallel algorithms">,
+  MarshallingInfoFlag>;
+def hipstdpar_interpose_alloc : Flag<["--"], "hipstdpar-interpose-alloc">,
+  Visibility<[ClangOption, CC1Option]>,
+  Group,
+  HelpText<"Replace all memory allocation / deallocation calls with "
+   "hipManagedMalloc / hipFree equivalents">,
+  MarshallingInfo

[clang] c0f8748 - [HIP][Clang][Preprocessor] Add Preprocessor support for `hipstdpar`

2023-10-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-03T13:18:31+01:00
New Revision: c0f8748d448be69748fee73014a60ada22b41b0d

URL: 
https://github.com/llvm/llvm-project/commit/c0f8748d448be69748fee73014a60ada22b41b0d
DIFF: 
https://github.com/llvm/llvm-project/commit/c0f8748d448be69748fee73014a60ada22b41b0d.diff

LOG: [HIP][Clang][Preprocessor] Add Preprocessor support for `hipstdpar`

This patch adds the Driver changes needed for enabling HIP parallel algorithm 
offload on AMDGPU targets. This change merely adds two macros to inform user 
space if we are compiling in `hipstdpar` mode and, respectively, if the 
optional allocation interposition mode has been requested, as well as 
associated minimal tests. The macros can be used by the runtime implementation 
of offload to drive conditional compilation, and are only defined if the HIP 
language has been enabled.

Reviewed by: yaxunl

Differential Revision: https://reviews.llvm.org/D155826

Added: 


Modified: 
clang/lib/Frontend/InitPreprocessor.cpp
clang/test/Preprocessor/predefined-macros.c

Removed: 




diff  --git a/clang/lib/Frontend/InitPreprocessor.cpp 
b/clang/lib/Frontend/InitPreprocessor.cpp
index 9e4d4d398a21da5..9e1e02e04ca7a00 100644
--- a/clang/lib/Frontend/InitPreprocessor.cpp
+++ b/clang/lib/Frontend/InitPreprocessor.cpp
@@ -585,6 +585,11 @@ static void InitializeStandardPredefinedMacros(const 
TargetInfo &TI,
 Builder.defineMacro("__HIP_MEMORY_SCOPE_WORKGROUP", "3");
 Builder.defineMacro("__HIP_MEMORY_SCOPE_AGENT", "4");
 Builder.defineMacro("__HIP_MEMORY_SCOPE_SYSTEM", "5");
+if (LangOpts.HIPStdPar) {
+  Builder.defineMacro("__HIPSTDPAR__");
+  if (LangOpts.HIPStdParInterposeAlloc)
+Builder.defineMacro("__HIPSTDPAR_INTERPOSE_ALLOC__");
+}
 if (LangOpts.CUDAIsDevice) {
   Builder.defineMacro("__HIP_DEVICE_COMPILE__");
   if (!TI.hasHIPImageSupport()) {

diff  --git a/clang/test/Preprocessor/predefined-macros.c 
b/clang/test/Preprocessor/predefined-macros.c
index d77b699674af4e1..c4a9672f0814aad 100644
--- a/clang/test/Preprocessor/predefined-macros.c
+++ b/clang/test/Preprocessor/predefined-macros.c
@@ -290,3 +290,20 @@
 // RUN:   -fcuda-is-device -fgpu-default-stream=per-thread \
 // RUN:   | FileCheck -match-full-lines %s --check-prefix=CHECK-PTH
 // CHECK-PTH: #define HIP_API_PER_THREAD_DEFAULT_STREAM 1
+
+// RUN: %clang_cc1 %s -E -dM -o - -x hip --hipstdpar -triple 
x86_64-unknown-linux-gnu \
+// RUN:   | FileCheck -match-full-lines %s --check-prefix=CHECK-HIPSTDPAR
+// CHECK-HIPSTDPAR: #define __HIPSTDPAR__ 1
+// CHECK-HIPSTDPAR-NOT: #define __HIPSTDPAR_INTERPOSE_ALLOC__ 1
+
+// RUN: %clang_cc1 %s -E -dM -o - -x hip --hipstdpar 
--hipstdpar-interpose-alloc \
+// RUN:  -triple x86_64-unknown-linux-gnu | FileCheck -match-full-lines %s \
+// RUN:  --check-prefix=CHECK-HIPSTDPAR-INTERPOSE
+// CHECK-HIPSTDPAR-INTERPOSE: #define __HIPSTDPAR_INTERPOSE_ALLOC__ 1
+// CHECK-HIPSTDPAR-INTERPOSE: #define __HIPSTDPAR__ 1
+
+// RUN: %clang_cc1 %s -E -dM -o - -x hip --hipstdpar 
--hipstdpar-interpose-alloc \
+// RUN:  -triple amdgcn-amd-amdhsa -fcuda-is-device | FileCheck 
-match-full-lines \
+// RUN:  %s --check-prefix=CHECK-HIPSTDPAR-INTERPOSE-DEV-NEG
+// CHECK-HIPSTDPAR-INTERPOSE-DEV-NEG: #define __HIPSTDPAR__ 1
+// CHECK-HIPSTDPAR-INTERPOSE-DEV-NEG-NOT: #define 
__HIPSTDPAR_INTERPOSE_ALLOC__ 1
\ No newline at end of file



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[clang] 4d680f5 - [HIP][Clang][Sema] Add Sema support for `hipstdpar`

2023-10-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-03T13:29:12+01:00
New Revision: 4d680f56475ce17d8fb793655eb3d77ac8aee1b9

URL: 
https://github.com/llvm/llvm-project/commit/4d680f56475ce17d8fb793655eb3d77ac8aee1b9
DIFF: 
https://github.com/llvm/llvm-project/commit/4d680f56475ce17d8fb793655eb3d77ac8aee1b9.diff

LOG: [HIP][Clang][Sema] Add Sema support for `hipstdpar`

This patch adds the Sema changes needed for enabling HIP parallel algorithm 
offload on AMDGPU targets. This change impacts the CUDA / HIP language specific 
checks, and only manifests if compiling in `hipstdpar` mode. In this case, we 
essentially do three things:

1. Allow device side callers to call host side callees - since the user visible 
HLL would be standard C++, with no annotations / restriction mechanisms, we 
cannot unambiguously establish that such a call is an error, so we 
conservatively allow all such calls, deferring actual cleanup to a subsequent 
pass over IR;
2. Allow host formed lambdas to capture by reference;
3. Allow device functions to use host global variables.

Reviewed by: yaxunl

Differential Revision: https://reviews.llvm.org/D155833

Added: 
clang/test/SemaHipStdPar/device-can-call-host.cpp

Modified: 
clang/lib/Sema/SemaCUDA.cpp
clang/lib/Sema/SemaExpr.cpp
clang/lib/Sema/SemaStmtAsm.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaCUDA.cpp b/clang/lib/Sema/SemaCUDA.cpp
index 88f5484575db17a..3336dbf474df019 100644
--- a/clang/lib/Sema/SemaCUDA.cpp
+++ b/clang/lib/Sema/SemaCUDA.cpp
@@ -249,6 +249,15 @@ Sema::IdentifyCUDAPreference(const FunctionDecl *Caller,
   (CallerTarget == CFT_Global && CalleeTarget == CFT_Device))
 return CFP_Native;
 
+  // HipStdPar mode is special, in that assessing whether a device side call to
+  // a host target is deferred to a subsequent pass, and cannot unambiguously 
be
+  // adjudicated in the AST, hence we optimistically allow them to pass here.
+  if (getLangOpts().HIPStdPar &&
+  (CallerTarget == CFT_Global || CallerTarget == CFT_Device ||
+   CallerTarget == CFT_HostDevice) &&
+  CalleeTarget == CFT_Host)
+return CFP_HostDevice;
+
   // (d) HostDevice behavior depends on compilation mode.
   if (CallerTarget == CFT_HostDevice) {
 // It's OK to call a compilation-mode matching function from an HD one.
@@ -895,7 +904,7 @@ void Sema::CUDACheckLambdaCapture(CXXMethodDecl *Callee,
   if (!ShouldCheck || !Capture.isReferenceCapture())
 return;
   auto DiagKind = SemaDiagnosticBuilder::K_Deferred;
-  if (Capture.isVariableCapture()) {
+  if (Capture.isVariableCapture() && !getLangOpts().HIPStdPar) {
 SemaDiagnosticBuilder(DiagKind, Capture.getLocation(),
   diag::err_capture_bad_target, Callee, *this)
 << Capture.getVariable();

diff  --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 2ed31a90c5dc1da..797b71bffbb451e 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -19157,7 +19157,7 @@ MarkVarDeclODRUsed(ValueDecl *V, SourceLocation Loc, 
Sema &SemaRef,
   // Diagnose ODR-use of host global variables in device functions.
   // Reference of device global variables in host functions is allowed
   // through shadow variables therefore it is not diagnosed.
-  if (SemaRef.LangOpts.CUDAIsDevice) {
+  if (SemaRef.LangOpts.CUDAIsDevice && !SemaRef.LangOpts.HIPStdPar) {
 SemaRef.targetDiag(Loc, diag::err_ref_bad_target)
 << /*host*/ 2 << /*variable*/ 1 << Var << UserTarget;
 SemaRef.targetDiag(Var->getLocation(),

diff  --git a/clang/lib/Sema/SemaStmtAsm.cpp b/clang/lib/Sema/SemaStmtAsm.cpp
index 2acb269f042399b..83351b703c1536c 100644
--- a/clang/lib/Sema/SemaStmtAsm.cpp
+++ b/clang/lib/Sema/SemaStmtAsm.cpp
@@ -271,7 +271,8 @@ StmtResult Sema::ActOnGCCAsmStmt(SourceLocation AsmLoc, 
bool IsSimple,
   OutputName = Names[i]->getName();
 
 TargetInfo::ConstraintInfo Info(Literal->getString(), OutputName);
-if (!Context.getTargetInfo().validateOutputConstraint(Info)) {
+if (!Context.getTargetInfo().validateOutputConstraint(Info) &&
+!(LangOpts.HIPStdPar && LangOpts.CUDAIsDevice)) {
   targetDiag(Literal->getBeginLoc(),
  diag::err_asm_invalid_output_constraint)
   << Info.getConstraintStr();

diff  --git a/clang/test/SemaHipStdPar/device-can-call-host.cpp 
b/clang/test/SemaHipStdPar/device-can-call-host.cpp
new file mode 100644
index 000..3fedc179251d281
--- /dev/null
+++ b/clang/test/SemaHipStdPar/device-can-call-host.cpp
@@ -0,0 +1,93 @@
+// RUN: %clang_cc1 -x hip %s --hipstdpar -triple amdgcn-amd-amdhsa --std=c++17 
\
+// RUN:   -fcuda-is-device -emit-llvm -o /dev/null -verify
+
+// Note: These would happen implicitly, within the implementation of the
+//   accelerator specific algorithm library, and not from user code.
+
+// Calls from the accelerator side to implicitly host

[clang] 3e3cf77 - [HIP][Clang][Driver] Fix build failure introduced by https://reviews.llvm.org/rG9a408588d1b8b7899eff593c537de539a4a12651

2023-10-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-03T13:45:32+01:00
New Revision: 3e3cf77cbebab237b3f9379fc07d4b1af391f874

URL: 
https://github.com/llvm/llvm-project/commit/3e3cf77cbebab237b3f9379fc07d4b1af391f874
DIFF: 
https://github.com/llvm/llvm-project/commit/3e3cf77cbebab237b3f9379fc07d4b1af391f874.diff

LOG: [HIP][Clang][Driver] Fix build failure introduced by 
https://reviews.llvm.org/rG9a408588d1b8b7899eff593c537de539a4a12651

Added: 
clang/test/Driver/Inputs/hipstdpar/rocprim/rocprim/.keep
clang/test/Driver/Inputs/hipstdpar/thrust/thrust/.keep

Modified: 


Removed: 




diff  --git a/clang/test/Driver/Inputs/hipstdpar/rocprim/rocprim/.keep 
b/clang/test/Driver/Inputs/hipstdpar/rocprim/rocprim/.keep
new file mode 100644
index 000..e69de29bb2d1d64

diff  --git a/clang/test/Driver/Inputs/hipstdpar/thrust/thrust/.keep 
b/clang/test/Driver/Inputs/hipstdpar/thrust/thrust/.keep
new file mode 100644
index 000..e69de29bb2d1d64



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[clang] 0701ee6 - [HIP][Clang][Driver] Disable `hipstdpar` driver test on Mac & Windows, since `hipstdpar` is Linux only at the moment.

2023-10-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-03T17:26:15+01:00
New Revision: 0701ee69f7ac82b49a9709e610227ebf387f1d30

URL: 
https://github.com/llvm/llvm-project/commit/0701ee69f7ac82b49a9709e610227ebf387f1d30
DIFF: 
https://github.com/llvm/llvm-project/commit/0701ee69f7ac82b49a9709e610227ebf387f1d30.diff

LOG: [HIP][Clang][Driver] Disable `hipstdpar` driver test on Mac & Windows, 
since `hipstdpar` is Linux only at the moment.

Added: 


Modified: 
clang/test/Driver/hipstdpar.c

Removed: 




diff  --git a/clang/test/Driver/hipstdpar.c b/clang/test/Driver/hipstdpar.c
index b4fd815d9a76482..aa94a7db8ff1af9 100644
--- a/clang/test/Driver/hipstdpar.c
+++ b/clang/test/Driver/hipstdpar.c
@@ -1,3 +1,6 @@
+// XFAIL: target={{.*}}-apple{{.*}}
+// XFAIL: target={{.*}}-windows{{.*}}
+
 // RUN: not %clang -### --hipstdpar -nogpulib -nogpuinc --compile %s 2>&1 | \
 // RUN:   FileCheck --check-prefix=HIPSTDPAR-MISSING-LIB %s
 // RUN: %clang -### --hipstdpar --hipstdpar-path=%S/Inputs/hipstdpar \



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[clang] 3cbdd9f - [HIP][Clang][Driver] Disable `hipstdpar` driver test on Hexagon & PS5, since `hipstdpar` is not going to be available on either of them.

2023-10-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-03T19:06:56+01:00
New Revision: 3cbdd9f1e3b40761e5d5db428d66e71591444f18

URL: 
https://github.com/llvm/llvm-project/commit/3cbdd9f1e3b40761e5d5db428d66e71591444f18
DIFF: 
https://github.com/llvm/llvm-project/commit/3cbdd9f1e3b40761e5d5db428d66e71591444f18.diff

LOG: [HIP][Clang][Driver] Disable `hipstdpar` driver test on Hexagon & PS5, 
since `hipstdpar` is not going to be available on either of them.

Differential Revision: https://reviews.llvm.org/D155775

Added: 


Modified: 
clang/test/Driver/hipstdpar.c

Removed: 




diff  --git a/clang/test/Driver/hipstdpar.c b/clang/test/Driver/hipstdpar.c
index aa94a7db8ff1af9..04579c43e0cbc6a 100644
--- a/clang/test/Driver/hipstdpar.c
+++ b/clang/test/Driver/hipstdpar.c
@@ -1,5 +1,7 @@
 // XFAIL: target={{.*}}-apple{{.*}}
 // XFAIL: target={{.*}}-windows{{.*}}
+// XFAIL: target={{.*}}hexagon{{.*}}
+// XFAIL: target={{.*}}-ps5{{.*}}
 
 // RUN: not %clang -### --hipstdpar -nogpulib -nogpuinc --compile %s 2>&1 | \
 // RUN:   FileCheck --check-prefix=HIPSTDPAR-MISSING-LIB %s



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[clang] dce54ea - [HIP][Clang][Driver] Disable `hipstdpar` driver test on SCEI to unblock build bot, pending test refactor.

2023-10-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-03T22:17:12+01:00
New Revision: dce54eae46685116ca0fe60f1dcabced2d0d297e

URL: 
https://github.com/llvm/llvm-project/commit/dce54eae46685116ca0fe60f1dcabced2d0d297e
DIFF: 
https://github.com/llvm/llvm-project/commit/dce54eae46685116ca0fe60f1dcabced2d0d297e.diff

LOG: [HIP][Clang][Driver] Disable `hipstdpar` driver test on SCEI to unblock 
build bot, pending test refactor.

Differential Revision: https://reviews.llvm.org/D155775

Added: 


Modified: 
clang/test/Driver/hipstdpar.c

Removed: 




diff  --git a/clang/test/Driver/hipstdpar.c b/clang/test/Driver/hipstdpar.c
index 04579c43e0cbc6a..2b08153760b2f1b 100644
--- a/clang/test/Driver/hipstdpar.c
+++ b/clang/test/Driver/hipstdpar.c
@@ -1,7 +1,7 @@
 // XFAIL: target={{.*}}-apple{{.*}}
-// XFAIL: target={{.*}}-windows{{.*}}
 // XFAIL: target={{.*}}hexagon{{.*}}
-// XFAIL: target={{.*}}-ps5{{.*}}
+// XFAIL: target={{.*}}-scei{{.*}}
+// XFAIL: target={{.*}}-windows{{.*}}
 
 // RUN: not %clang -### --hipstdpar -nogpulib -nogpuinc --compile %s 2>&1 | \
 // RUN:   FileCheck --check-prefix=HIPSTDPAR-MISSING-LIB %s



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[clang] 1cfaa86 - [HIP][Clang][Driver] Disable `hipstdpar` driver test on SIE to unblock build bot, pending test refactor.

2023-10-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-03T23:00:13+01:00
New Revision: 1cfaa863bc36d25625114b432e2ddf35d2302452

URL: 
https://github.com/llvm/llvm-project/commit/1cfaa863bc36d25625114b432e2ddf35d2302452
DIFF: 
https://github.com/llvm/llvm-project/commit/1cfaa863bc36d25625114b432e2ddf35d2302452.diff

LOG: [HIP][Clang][Driver] Disable `hipstdpar` driver test on SIE to unblock 
build bot, pending test refactor.

Differential Revision: https://reviews.llvm.org/D155775

Added: 


Modified: 
clang/test/Driver/hipstdpar.c

Removed: 




diff  --git a/clang/test/Driver/hipstdpar.c b/clang/test/Driver/hipstdpar.c
index 2b08153760b2f1b..f12a6e8d9d25249 100644
--- a/clang/test/Driver/hipstdpar.c
+++ b/clang/test/Driver/hipstdpar.c
@@ -1,6 +1,7 @@
 // XFAIL: target={{.*}}-apple{{.*}}
 // XFAIL: target={{.*}}hexagon{{.*}}
 // XFAIL: target={{.*}}-scei{{.*}}
+// XFAIL: target={{.*}}-sie{{.*}}
 // XFAIL: target={{.*}}-windows{{.*}}
 
 // RUN: not %clang -### --hipstdpar -nogpulib -nogpuinc --compile %s 2>&1 | \



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[clang] 9f406e4 - [HIP][Clang][Driver] Correctly specify test requirements as Linux + x86 + AMDGPU; temporarily retain targeted XFAILs for Hexagon & PS.

2023-10-04 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-04T12:04:13+01:00
New Revision: 9f406e450b6dfebe41be54cc7a7a6861b8eaf618

URL: 
https://github.com/llvm/llvm-project/commit/9f406e450b6dfebe41be54cc7a7a6861b8eaf618
DIFF: 
https://github.com/llvm/llvm-project/commit/9f406e450b6dfebe41be54cc7a7a6861b8eaf618.diff

LOG: [HIP][Clang][Driver] Correctly specify test requirements as Linux + x86 + 
AMDGPU; temporarily retain targeted XFAILs for Hexagon & PS.

Differential Revision: https://reviews.llvm.org/D155775

Added: 


Modified: 
clang/test/Driver/hipstdpar.c

Removed: 




diff  --git a/clang/test/Driver/hipstdpar.c b/clang/test/Driver/hipstdpar.c
index f12a6e8d9d25249..69c5b177d170cd8 100644
--- a/clang/test/Driver/hipstdpar.c
+++ b/clang/test/Driver/hipstdpar.c
@@ -1,8 +1,9 @@
-// XFAIL: target={{.*}}-apple{{.*}}
+// REQUIRES: x86-registered-target
+// REQUIRES: amdgpu-registered-target
+// REQUIRES: system-linux
 // XFAIL: target={{.*}}hexagon{{.*}}
 // XFAIL: target={{.*}}-scei{{.*}}
 // XFAIL: target={{.*}}-sie{{.*}}
-// XFAIL: target={{.*}}-windows{{.*}}
 
 // RUN: not %clang -### --hipstdpar -nogpulib -nogpuinc --compile %s 2>&1 | \
 // RUN:   FileCheck --check-prefix=HIPSTDPAR-MISSING-LIB %s



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[clang] 8acdcf4 - [Clang][CodeGen]`vtable`, `typeinfo` et al. are globals

2023-07-19 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-07-19T18:04:31+01:00
New Revision: 8acdcf4016876d122733991561be706b64026e73

URL: 
https://github.com/llvm/llvm-project/commit/8acdcf4016876d122733991561be706b64026e73
DIFF: 
https://github.com/llvm/llvm-project/commit/8acdcf4016876d122733991561be706b64026e73.diff

LOG: [Clang][CodeGen]`vtable`, `typeinfo` et al. are globals

All data structures and values associated with handling virtual functions / 
inheritance, as well as RTTI, are globals and thus can only reside in the 
global address space. This was not taken fully taken into account because for 
most targets, global & generic appear to coincide. However, on targets where 
global & generic ASes differ (e.g. AMDGPU), this was problematic, since it led 
to the generation of invalid bitcasts (which would trigger asserts in Debug) 
and less than optimal code. This patch does two things:

ensures that vtables, vptrs, vtts, typeinfo are generated in the right AS, and 
populated accordingly;
removes a bunch of bitcasts which look like left-overs from the typed ptr era.

Reviewed By: yxsamliu

Differential Revision: https://reviews.llvm.org/D153092

Added: 
clang/test/CodeGenCXX/vtable-align-address-space.cpp
clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
clang/test/CodeGenCXX/vtable-consteval-address-space.cpp
clang/test/CodeGenCXX/vtable-constexpr-address-space.cpp
clang/test/CodeGenCXX/vtable-key-function-address-space.cpp
clang/test/CodeGenCXX/vtable-layout-extreme-address-space.cpp
clang/test/CodeGenCXX/vtable-linkage-address-space.cpp
clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
clang/test/CodeGenCXX/vtt-layout-address-space.cpp

Modified: 
clang/lib/CodeGen/CGVTT.cpp
clang/lib/CodeGen/CGVTables.cpp
clang/lib/CodeGen/CodeGenModule.cpp
clang/lib/CodeGen/ItaniumCXXABI.cpp
clang/test/CodeGenCXX/vtt-address-space.cpp
clang/test/Headers/hip-header.hip

Removed: 




diff  --git a/clang/lib/CodeGen/CGVTT.cpp b/clang/lib/CodeGen/CGVTT.cpp
index d0c8e351626b2d..22790147c6f5a9 100644
--- a/clang/lib/CodeGen/CGVTT.cpp
+++ b/clang/lib/CodeGen/CGVTT.cpp
@@ -42,8 +42,8 @@ CodeGenVTables::EmitVTTDefinition(llvm::GlobalVariable *VTT,
   llvm::GlobalVariable::LinkageTypes Linkage,
   const CXXRecordDecl *RD) {
   VTTBuilder Builder(CGM.getContext(), RD, /*GenerateDefinition=*/true);
-  llvm::ArrayType *ArrayType =
-  llvm::ArrayType::get(CGM.Int8PtrTy, Builder.getVTTComponents().size());
+  llvm::ArrayType *ArrayType = llvm::ArrayType::get(
+  CGM.GlobalsInt8PtrTy, Builder.getVTTComponents().size());
 
   SmallVector VTables;
   SmallVector VTableAddressPoints;
@@ -81,9 +81,6 @@ CodeGenVTables::EmitVTTDefinition(llvm::GlobalVariable *VTT,
  VTable->getValueType(), VTable, Idxs, /*InBounds=*/true,
  /*InRangeIndex=*/1);
 
- Init = llvm::ConstantExpr::getPointerBitCastOrAddrSpaceCast(Init,
- 
CGM.Int8PtrTy);
-
  VTTComponents.push_back(Init);
   }
 
@@ -112,9 +109,9 @@ llvm::GlobalVariable *CodeGenVTables::GetAddrOfVTT(const 
CXXRecordDecl *RD) {
 
   VTTBuilder Builder(CGM.getContext(), RD, /*GenerateDefinition=*/false);
 
-  llvm::ArrayType *ArrayType =
-llvm::ArrayType::get(CGM.Int8PtrTy, Builder.getVTTComponents().size());
-  llvm::Align Align = CGM.getDataLayout().getABITypeAlign(CGM.Int8PtrTy);
+  llvm::ArrayType *ArrayType = llvm::ArrayType::get(
+  CGM.GlobalsInt8PtrTy, Builder.getVTTComponents().size());
+  llvm::Align Align = 
CGM.getDataLayout().getABITypeAlign(CGM.GlobalsInt8PtrTy);
 
   llvm::GlobalVariable *GV = CGM.CreateOrReplaceCXXRuntimeVariable(
   Name, ArrayType, llvm::GlobalValue::ExternalLinkage, Align);

diff  --git a/clang/lib/CodeGen/CGVTables.cpp b/clang/lib/CodeGen/CGVTables.cpp
index 409e29426bca7c..91dd7a8e046b18 100644
--- a/clang/lib/CodeGen/CGVTables.cpp
+++ b/clang/lib/CodeGen/CGVTables.cpp
@@ -690,7 +690,7 @@ bool CodeGenVTables::useRelativeLayout() const {
 llvm::Type *CodeGenModule::getVTableComponentType() const {
   if (UseRelativeLayout(*this))
 return Int32Ty;
-  return Int8PtrTy;
+  return GlobalsInt8PtrTy;
 }
 
 llvm::Type *CodeGenVTables::getVTableComponentType() const {
@@ -702,7 +702,7 @@ static void AddPointerLayoutOffset(const CodeGenModule &CGM,
CharUnits offset) {
   builder.add(llvm::ConstantExpr::getIntToPtr(
   llvm::ConstantInt::get(CGM.PtrDiffTy, offset.getQuantity()),
-  CGM.Int8PtrTy));
+  CGM.GlobalsInt8PtrTy));
 }
 
 static void AddRelativeLayoutOffset(const CodeGenModule &CGM,
@@ -739,7 +739,7 @@ void 
CodeGenVTables::addVTableComponent(ConstantArrayBuilder &builder,
   vtableHasLocalLinkage,
   /*isCompleteDtor=*/false)

[clang] f385abf - [Clang][CodeGen] Follow-up for `vtable`, `typeinfo` et al. are globals

2023-07-19 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-07-19T23:57:12+01:00
New Revision: f385abf131e01b12b14ac3bc7214eb119b40523e

URL: 
https://github.com/llvm/llvm-project/commit/f385abf131e01b12b14ac3bc7214eb119b40523e
DIFF: 
https://github.com/llvm/llvm-project/commit/f385abf131e01b12b14ac3bc7214eb119b40523e.diff

LOG: [Clang][CodeGen] Follow-up for `vtable`, `typeinfo` et al. are globals

https://reviews.llvm.org/rG8acdcf4016876d122733991561be706b64026e73 didn't 
include handling for the fact that `throw`'s implementation takes a pointer to 
a type's `typeinfo` struct, which implies that its signature needs to change as 
well. This corrects that and adds a test.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D155759

Added: 
clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp

Modified: 
clang/lib/CodeGen/ItaniumCXXABI.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/ItaniumCXXABI.cpp 
b/clang/lib/CodeGen/ItaniumCXXABI.cpp
index 16e53c466424ab..8870383f8d663c 100644
--- a/clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ b/clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -1252,7 +1252,7 @@ static llvm::FunctionCallee getThrowFn(CodeGenModule 
&CGM) {
   // void __cxa_throw(void *thrown_exception, std::type_info *tinfo,
   //  void (*dest) (void *));
 
-  llvm::Type *Args[3] = { CGM.Int8PtrTy, CGM.Int8PtrTy, CGM.Int8PtrTy };
+  llvm::Type *Args[3] = { CGM.Int8PtrTy, CGM.GlobalsInt8PtrTy, CGM.Int8PtrTy };
   llvm::FunctionType *FTy =
 llvm::FunctionType::get(CGM.VoidTy, Args, /*isVarArg=*/false);
 

diff  --git 
a/clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp 
b/clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp
new file mode 100644
index 00..d8c23d427e67a3
--- /dev/null
+++ b/clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp
@@ -0,0 +1,17 @@
+// RUN: %clang_cc1 %s -triple amdgcn-amd-amdhsa -emit-llvm -fcxx-exceptions 
-fexceptions -std=c++11 -o - | FileCheck %s
+
+struct X {
+  ~X();
+};
+
+struct Error {
+  Error(const X&) noexcept;
+};
+
+void f() {
+  try {
+throw Error(X());
+  } catch (...) { }
+}
+
+// CHECK: declare void @__cxa_throw(ptr, ptr addrspace(1), ptr)



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[clang] Handle template parameter objects with explicit address spaces (PR #69266)

2023-10-16 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx created 
https://github.com/llvm/llvm-project/pull/69266

For certain cases (e.g. when their address is observable at run time) it is 
necessary to provide physical backing for non-type template parameter objects. 
Said backing comes in the form of a global variable. For certain targets (e.g. 
AMDGPU), which use a non-default address space for globals, this can lead to an 
issue when referencing said global in address space agnostic languages (such as 
HIP), for example when passing them to a function. 

This patch addresses this issue by inserting an address space cast iff there is 
an address space mismatch between the type of a reference expression and the 
address space of the backing global. A test is also added.

>From ded7435220d2c3527c4798d1b328a5f2940e279a Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 16 Oct 2023 22:43:55 +0100
Subject: [PATCH] Handle trying to bind a generic reference to a template
 parameter object value that is in an explicit address space.

---
 clang/lib/CodeGen/CGExpr.cpp  | 18 +--
 .../template-param-objects-address-space.cpp  | 32 +++
 2 files changed, 47 insertions(+), 3 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/template-param-objects-address-space.cpp

diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 54a1d300a9ac738..784d3f7b03909e3 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -2992,9 +2992,21 @@ LValue CodeGenFunction::EmitDeclRefLValue(const 
DeclRefExpr *E) {
 return MakeAddrLValue(CGM.GetAddrOfMSGuidDecl(GD), T,
   AlignmentSource::Decl);
 
-  if (const auto *TPO = dyn_cast(ND))
-return MakeAddrLValue(CGM.GetAddrOfTemplateParamObject(TPO), T,
-  AlignmentSource::Decl);
+  if (const auto *TPO = dyn_cast(ND)) {
+auto ATPO = CGM.GetAddrOfTemplateParamObject(TPO);
+auto AS = getLangASFromTargetAS(ATPO.getAddressSpace());
+
+if (AS != T.getAddressSpace()) {
+  auto TargetAS = getContext().getTargetAddressSpace(T.getAddressSpace());
+  auto PtrTy = ATPO.getElementType()->getPointerTo(TargetAS);
+  auto ASC = getTargetHooks().performAddrSpaceCast(CGM, ATPO.getPointer(),
+   AS, T.getAddressSpace(),
+   PtrTy);
+  ATPO = ConstantAddress(ASC, ATPO.getElementType(), ATPO.getAlignment());
+}
+
+return MakeAddrLValue(ATPO, T, AlignmentSource::Decl);
+  }
 
   llvm_unreachable("Unhandled DeclRefExpr");
 }
diff --git a/clang/test/CodeGenCXX/template-param-objects-address-space.cpp 
b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
new file mode 100644
index 000..b54dcfe77934ee2
--- /dev/null
+++ b/clang/test/CodeGenCXX/template-param-objects-address-space.cpp
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -std=c++20 %s -emit-llvm -o - | 
FileCheck %s
+
+struct S { char buf[32]; };
+template constexpr const char *begin() { return s.buf; }
+template constexpr const char *end() { return s.buf + 
__builtin_strlen(s.buf); }
+template constexpr const void *retval() { return &s; }
+extern const void *callee(const S*);
+template constexpr const void* observable_addr() { return callee(&s); }
+
+// CHECK: 
[[HELLO:@_ZTAXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100]]
+// CHECK-SAME: = linkonce_odr addrspace(1) constant { <{ [11 x i8], [21 x i8] 
}> } { <{ [11 x i8], [21 x i8] }> <{ [11 x i8] c"hello world", [21 x i8] 
zeroinitializer }> }, comdat
+
+// CHECK: @p
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
[[HELLO]] to ptr)
+const char *p = begin();
+
+// CHECK: @q
+// CHECK-SAME: addrspace(1) global ptr addrspacecast (ptr addrspace(1) 
getelementptr (i8, ptr addrspace(1) [[HELLO]], i64 11) to ptr)
+const char *q = end();
+
+const void *(*r)() = &retval;
+
+// CHECK: @s
+// CHECK-SAME: addrspace(1) global ptr null
+const void *s = observable_addr();
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z6retvalIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: ret ptr addrspacecast (ptr addrspace(1) [[HELLO]] to ptr)
+
+// CHECK: define linkonce_odr noundef ptr 
@_Z15observable_addrIXtl1StlA32_cLc104ELc101ELc108ELc108ELc111ELc32ELc119ELc111ELc114ELc108ELc100EPKvv()
+// CHECK: %call = call noundef ptr @_Z6calleePK1S(ptr noundef addrspacecast 
(ptr addrspace(1) [[HELLO]] to ptr))
+// CHECK: declare noundef ptr @_Z6calleePK1S(ptr noundef)

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[clang] [clang][CodeGen] Handle template parameter objects with explicit address spaces (PR #69266)

2023-10-16 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx edited 
https://github.com/llvm/llvm-project/pull/69266
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[clang] dd5d65a - [HIP][Clang][CodeGen] Add CodeGen support for `hipstdpar`

2023-10-17 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-17T11:41:36+01:00
New Revision: dd5d65adb6413122a5ba1ed04c5c2c0b4951b76c

URL: 
https://github.com/llvm/llvm-project/commit/dd5d65adb6413122a5ba1ed04c5c2c0b4951b76c
DIFF: 
https://github.com/llvm/llvm-project/commit/dd5d65adb6413122a5ba1ed04c5c2c0b4951b76c.diff

LOG: [HIP][Clang][CodeGen] Add CodeGen support for `hipstdpar`

This patch adds the CodeGen changes needed for enabling HIP parallel algorithm 
offload on AMDGPU targets. This change relaxes restrictions on what gets 
emitted on the device path, when compiling in `hipstdpar` mode:

1. Unless a function is explicitly marked `__host__`, it will get emitted, 
whereas before only `__device__` and `__global__` functions would be emitted;
2. Unsupported builtins are ignored as opposed to being marked as an error, as 
the decision on their validity is deferred to the `hipstdpar` specific code 
selection pass;
3. We add a `hipstdpar` specific pass to the opt pipeline, independent of 
optimisation level:
- When compiling for the host, iff the user requested it via the 
`--hipstdpar-interpose-alloc` flag, we add a pass which replaces canonical 
allocation / deallocation functions with accelerator aware equivalents.

A test to validate that unannotated functions get correctly emitted is added as 
well.

Reviewed by: yaxunl, efriedma

Differential Revision: https://reviews.llvm.org/D155850

Added: 
clang/test/CodeGenHipStdPar/unannotated-functions-get-emitted.cpp
clang/test/CodeGenHipStdPar/unsupported-ASM.cpp
clang/test/CodeGenHipStdPar/unsupported-builtins.cpp

Modified: 
clang/lib/CodeGen/BackendUtil.cpp
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/CodeGen/CGStmt.cpp
clang/lib/CodeGen/CMakeLists.txt
clang/lib/CodeGen/CodeGenFunction.cpp
clang/lib/CodeGen/CodeGenModule.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/BackendUtil.cpp 
b/clang/lib/CodeGen/BackendUtil.cpp
index d066819871dfde3..70accce456d3c07 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -78,6 +78,7 @@
 #include "llvm/Transforms/Scalar/EarlyCSE.h"
 #include "llvm/Transforms/Scalar/GVN.h"
 #include "llvm/Transforms/Scalar/JumpThreading.h"
+#include "llvm/Transforms/HipStdPar/HipStdPar.h"
 #include "llvm/Transforms/Utils/Debugify.h"
 #include "llvm/Transforms/Utils/EntryExitInstrumenter.h"
 #include "llvm/Transforms/Utils/ModuleUtils.h"
@@ -1108,6 +1109,10 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
 return;
   }
 
+  if (LangOpts.HIPStdPar && !LangOpts.CUDAIsDevice &&
+  LangOpts.HIPStdParInterposeAlloc)
+MPM.addPass(HipStdParAllocationInterpositionPass());
+
   // Now that we have all of the passes ready, run them.
   {
 PrettyStackTraceString CrashInfo("Optimizer");

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 4d86e8a769846c4..43ace3e11e6109f 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -2327,6 +2327,19 @@ static Value *tryUseTestFPKind(CodeGenFunction &CGF, 
unsigned BuiltinID,
   return nullptr;
 }
 
+static RValue EmitHipStdParUnsupportedBuiltin(CodeGenFunction *CGF,
+  const FunctionDecl *FD) {
+  auto Name = FD->getNameAsString() + "__hipstdpar_unsupported";
+  auto FnTy = CGF->CGM.getTypes().GetFunctionType(FD);
+  auto UBF = CGF->CGM.getModule().getOrInsertFunction(Name, FnTy);
+
+  SmallVector Args;
+  for (auto &&FormalTy : FnTy->params())
+Args.push_back(llvm::PoisonValue::get(FormalTy));
+
+  return RValue::get(CGF->Builder.CreateCall(UBF, Args));
+}
+
 RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned 
BuiltinID,
 const CallExpr *E,
 ReturnValueSlot ReturnValue) {
@@ -5765,6 +5778,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
 llvm_unreachable("Bad evaluation kind in EmitBuiltinExpr");
   }
 
+  if (getLangOpts().HIPStdPar && getLangOpts().CUDAIsDevice)
+return EmitHipStdParUnsupportedBuiltin(this, FD);
+
   ErrorUnsupported(E, "builtin function");
 
   // Unknown builtin, for now just dump it out and return undef.
@@ -5775,6 +5791,16 @@ static Value *EmitTargetArchBuiltinExpr(CodeGenFunction 
*CGF,
 unsigned BuiltinID, const CallExpr *E,
 ReturnValueSlot ReturnValue,
 llvm::Triple::ArchType Arch) {
+  // When compiling in HipStdPar mode we have to be conservative in rejecting
+  // target specific features in the FE, and defer the possible error to the
+  // AcceleratorCodeSelection pass, wherein iff an unsupported target builtin 
is
+  // referenced by an accelerator executable function, we emit an error.
+  // Returning nullptr here leads to the builtin being hand

[clang] 791b890 - [HIP][Clang][CodeGen] Simplify test for `hipstdpar`

2023-10-17 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-10-17T15:42:28+01:00
New Revision: 791b890c468e5784113507f1f2fe7fed694c3962

URL: 
https://github.com/llvm/llvm-project/commit/791b890c468e5784113507f1f2fe7fed694c3962
DIFF: 
https://github.com/llvm/llvm-project/commit/791b890c468e5784113507f1f2fe7fed694c3962.diff

LOG: [HIP][Clang][CodeGen] Simplify test for `hipstdpar`

Fixes build failures for cases where there's no additional visibility / linkage 
spec.

Differential Revision: https://reviews.llvm.org/D155850

Added: 


Modified: 
clang/test/CodeGenHipStdPar/unannotated-functions-get-emitted.cpp

Removed: 




diff  --git a/clang/test/CodeGenHipStdPar/unannotated-functions-get-emitted.cpp 
b/clang/test/CodeGenHipStdPar/unannotated-functions-get-emitted.cpp
index 1fa37ea6c342ff7..dfd6b3da0a291b1 100644
--- a/clang/test/CodeGenHipStdPar/unannotated-functions-get-emitted.cpp
+++ b/clang/test/CodeGenHipStdPar/unannotated-functions-get-emitted.cpp
@@ -6,14 +6,14 @@
 
 #define __device__ __attribute__((device))
 
-// NO-HIPSTDPAR-DEV-NOT: define {{.*}} void @foo({{.*}})
-// HIPSTDPAR-DEV: define {{.*}} void @foo({{.*}})
+// NO-HIPSTDPAR-DEV-NOT: {{.*}}void @foo({{.*}})
+// HIPSTDPAR-DEV: {{.*}}void @foo({{.*}})
 extern "C" void foo(float *a, float b) {
   *a = b;
 }
 
-// NO-HIPSTDPAR-DEV: define {{.*}} void @bar({{.*}})
-// HIPSTDPAR-DEV: define {{.*}} void @bar({{.*}})
+// NO-HIPSTDPAR-DEV: {{.*}}void @bar({{.*}})
+// HIPSTDPAR-DEV: {{.*}}void @bar({{.*}})
 extern "C" __device__ void bar(float *a, float b) {
   *a = b;
 }



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[clang] 51a014c - [Clang][CodeGen] `__builtin_alloca`s should care about address spaces

2023-08-01 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-08-01T21:55:36+01:00
New Revision: 51a014cb2d9c6f8303f9b11ffc035d69cbeb9e21

URL: 
https://github.com/llvm/llvm-project/commit/51a014cb2d9c6f8303f9b11ffc035d69cbeb9e21
DIFF: 
https://github.com/llvm/llvm-project/commit/51a014cb2d9c6f8303f9b11ffc035d69cbeb9e21.diff

LOG: [Clang][CodeGen] `__builtin_alloca`s should care about address spaces

`alloca` instructions always return pointers to the `alloca` address space. 
This composes poorly with most HLLs which are address space agnostic and thus 
have all pointers point to generic/default. Static `alloca`s were already 
handled on the AST level, however dynamic `alloca`s were not, which would lead 
to subtly incorrect IR. This patch addresses that by inserting an address space 
cast iff the `alloca` address space is different from the default / expected.

Reviewed By: rjmccall, arsenm

Differential Revision: https://reviews.llvm.org/D156539

Added: 
clang/test/CodeGen/dynamic-alloca-with-address-space.c

Modified: 
clang/lib/CodeGen/CGBuiltin.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 1f1323e2f92045..803895f64214d9 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -3517,6 +3517,12 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
 return RValue::get(Result);
   }
 
+  // An alloca will always return a pointer to the alloca (stack) address
+  // space. This address space need not be the same as the AST / Language
+  // default (e.g. in C / C++ auto vars are in the generic address space). At
+  // the AST level this is handled within CreateTempAlloca et al., but for the
+  // builtin / dynamic alloca we have to handle it here. We use an explicit 
cast
+  // instead of passing an AS to CreateAlloca so as to not inhibit 
optimisation.
   case Builtin::BIalloca:
   case Builtin::BI_alloca:
   case Builtin::BI__builtin_alloca_uninitialized:
@@ -3532,6 +3538,13 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
 AI->setAlignment(SuitableAlignmentInBytes);
 if (BuiltinID != Builtin::BI__builtin_alloca_uninitialized)
   initializeAlloca(*this, AI, Size, SuitableAlignmentInBytes);
+LangAS AAS = getASTAllocaAddressSpace();
+LangAS EAS = E->getType()->getPointeeType().getAddressSpace();
+if (AAS != EAS) {
+  llvm::Type *Ty = CGM.getTypes().ConvertType(E->getType());
+  return RValue::get(getTargetHooks().performAddrSpaceCast(*this, AI, AAS,
+   EAS, Ty));
+}
 return RValue::get(AI);
   }
 
@@ -3547,6 +3560,13 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
 AI->setAlignment(AlignmentInBytes);
 if (BuiltinID != Builtin::BI__builtin_alloca_with_align_uninitialized)
   initializeAlloca(*this, AI, Size, AlignmentInBytes);
+LangAS AAS = getASTAllocaAddressSpace();
+LangAS EAS = E->getType()->getPointeeType().getAddressSpace();
+if (AAS != EAS) {
+  llvm::Type *Ty = CGM.getTypes().ConvertType(E->getType());
+  return RValue::get(getTargetHooks().performAddrSpaceCast(*this, AI, AAS,
+   EAS, Ty));
+}
 return RValue::get(AI);
   }
 

diff  --git a/clang/test/CodeGen/dynamic-alloca-with-address-space.c 
b/clang/test/CodeGen/dynamic-alloca-with-address-space.c
new file mode 100644
index 00..0ef9039e68968e
--- /dev/null
+++ b/clang/test/CodeGen/dynamic-alloca-with-address-space.c
@@ -0,0 +1,41 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -emit-llvm %s -o - \
+// RUN:   | FileCheck %s --check-prefix=CHECK
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -DOCL12 -x cl -std=cl1.2 \
+// RUN:   -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK-CL12
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -x cl -std=cl2.0 \
+// RUN:   -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK-CL20
+
+#if defined(OCL12)
+#define CAST (char *)(unsigned long)
+#else
+#define CAST (char *)
+#endif
+
+void allocas(unsigned long n) {
+char *a = CAST __builtin_alloca(n);
+char *uninitialized_a = CAST __builtin_alloca_uninitialized(n);
+char *aligned_a = CAST __builtin_alloca_with_align(n, 8);
+char *aligned_uninitialized_a = CAST 
__builtin_alloca_with_align_uninitialized(n, 8);
+}
+
+// CHECK: @allocas(
+// CHECK: store i64 %n, ptr %n.addr.ascast, align 8
+// CHECK: %0 = load i64, ptr %n.addr.ascast, align 8
+// CHECK: %1 = alloca i8, i64 %0, align 8, addrspace(5)
+// CHECK: %2 = addrspacecast ptr addrspace(5) %1 to ptr
+// CHECK: store ptr %2, ptr %a.ascast, align 8
+// CHECK: %3 = load i64, ptr %n.addr.ascast, align 8
+// CHECK: %4 = alloca i8, i64 %3, align 8, addrspace(5)
+// CHECK: %5 = addrspacecast ptr addrspace(5) %4 to ptr
+// CHECK: stor

[clang] 7240008 - [Clang][CodeGen] `__dynamic_cast` should care about `type_info`'s address space

2023-08-03 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-08-03T23:25:06+01:00
New Revision: 7240008c0afa3e2d12f3f51cfe0235668feb6ef3

URL: 
https://github.com/llvm/llvm-project/commit/7240008c0afa3e2d12f3f51cfe0235668feb6ef3
DIFF: 
https://github.com/llvm/llvm-project/commit/7240008c0afa3e2d12f3f51cfe0235668feb6ef3.diff

LOG: [Clang][CodeGen] `__dynamic_cast` should care about `type_info`'s address 
space

`__dynamic_cast` relies on `type_info`, which its signature assumed to be in 
the generic / default address space. This patch corrects the oversight (we know 
that `type_info` resides in the GlobalVar address space)  and adds an 
associated test.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D155870

Added: 
clang/test/CodeGenCXX/dynamic-cast-address-space.cpp

Modified: 
clang/lib/CodeGen/ItaniumCXXABI.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/ItaniumCXXABI.cpp 
b/clang/lib/CodeGen/ItaniumCXXABI.cpp
index c8073e248f5c1f..36730875ef0aa4 100644
--- a/clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ b/clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -1338,15 +1338,16 @@ void ItaniumCXXABI::emitThrow(CodeGenFunction &CGF, 
const CXXThrowExpr *E) {
 
 static llvm::FunctionCallee getItaniumDynamicCastFn(CodeGenFunction &CGF) {
   // void *__dynamic_cast(const void *sub,
-  //  const abi::__class_type_info *src,
-  //  const abi::__class_type_info *dst,
+  //  global_as const abi::__class_type_info *src,
+  //  global_as const abi::__class_type_info *dst,
   //  std::ptr
diff _t src2dst_offset);
 
   llvm::Type *Int8PtrTy = CGF.Int8PtrTy;
+  llvm::Type *GlobInt8PtrTy = CGF.GlobalsInt8PtrTy;
   llvm::Type *PtrDiffTy =
 CGF.ConvertType(CGF.getContext().getPointerDiffType());
 
-  llvm::Type *Args[4] = { Int8PtrTy, Int8PtrTy, Int8PtrTy, PtrDiffTy };
+  llvm::Type *Args[4] = { Int8PtrTy, GlobInt8PtrTy, GlobInt8PtrTy, PtrDiffTy };
 
   llvm::FunctionType *FTy = llvm::FunctionType::get(Int8PtrTy, Args, false);
 

diff  --git a/clang/test/CodeGenCXX/dynamic-cast-address-space.cpp 
b/clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
new file mode 100644
index 00..c278988c9647ba
--- /dev/null
+++ b/clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
@@ -0,0 +1,24 @@
+// RUN: %clang_cc1 -I%S %s -triple amdgcn-amd-amdhsa -emit-llvm 
-fcxx-exceptions -fexceptions -o - | FileCheck %s
+struct A { virtual void f(); };
+struct B : A { };
+
+// CHECK: {{define.*@_Z1fP1A}}
+// CHECK-SAME:  personality ptr @__gxx_personality_v0
+B fail;
+const B& f(A *a) {
+  try {
+// CHECK: call ptr @__dynamic_cast
+// CHECK: br i1
+// CHECK: invoke void @__cxa_bad_cast() [[NR:#[0-9]+]]
+dynamic_cast(*a);
+  } catch (...) {
+// CHECK:  landingpad { ptr, i32 }
+// CHECK-NEXT:   catch ptr null
+  }
+  return fail;
+}
+
+// CHECK: declare ptr @__dynamic_cast(ptr, ptr addrspace(1), ptr addrspace(1), 
i64) [[NUW_RO:#[0-9]+]]
+
+// CHECK: attributes [[NUW_RO]] = { nounwind memory(read) }
+// CHECK: attributes [[NR]] = { noreturn }



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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-07 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx created 
https://github.com/llvm/llvm-project/pull/65699:

This change is symmetric with the one reviewed in 
 and handles the exception handling specific 
intrinsic, which slipped through the cracks, in the same way, by inserting an 
address-space cast iff RTTI is in a non-default AS.

>From f4271e03667b64c8d10d7e4de16e78b37e845229 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 8 Sep 2023 00:21:59 +0100
Subject: [PATCH] AS_cast the argument to `eh_typeid_for` iff typeinfo is not
 in the default AS.

---
 clang/lib/CodeGen/CGException.cpp |  5 +++-
 .../try-catch-with-address-space.cpp  | 25 +++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CodeGenCXX/try-catch-with-address-space.cpp

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 3996f2948349cb5..49cf4ec4b84307b 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;
diff --git a/clang/test/CodeGenCXX/try-catch-with-address-space.cpp 
b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
new file mode 100644
index 000..279d29f50fd4101
--- /dev/null
+++ b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -emit-llvm -o - 
-fcxx-exceptions -fexceptions | FileCheck %s
+
+struct X { };
+
+const X g();
+
+void f() {
+  try {
+throw g();
+// CHECK: ptr addrspace(1) @_ZTI1X
+  } catch (const X x) {
+// CHECK: catch ptr addrspace(1) @_ZTI1X
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTI1X to ptr))
+  }
+}
+
+void h() {
+  try {
+throw "ABC";
+// CHECK: ptr addrspace(1) @_ZTIPKc
+  } catch (char const(&)[4]) {
+// CHECK: catch ptr addrspace(1) @_ZTIA4_c
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTIA4_c to ptr))
+  }
+}

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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-07 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx review_requested 
https://github.com/llvm/llvm-project/pull/65699
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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-07 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx labeled 
https://github.com/llvm/llvm-project/pull/65699
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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-07 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx review_requested 
https://github.com/llvm/llvm-project/pull/65699
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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-07 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx review_requested 
https://github.com/llvm/llvm-project/pull/65699
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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-07 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx review_requested 
https://github.com/llvm/llvm-project/pull/65699
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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/65699:

>From f4271e03667b64c8d10d7e4de16e78b37e845229 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 8 Sep 2023 00:21:59 +0100
Subject: [PATCH] AS_cast the argument to `eh_typeid_for` iff typeinfo is not
 in the default AS.

---
 clang/lib/CodeGen/CGException.cpp |  5 +++-
 .../try-catch-with-address-space.cpp  | 25 +++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CodeGenCXX/try-catch-with-address-space.cpp

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 3996f2948349cb5..49cf4ec4b84307b 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;
diff --git a/clang/test/CodeGenCXX/try-catch-with-address-space.cpp 
b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
new file mode 100644
index 000..279d29f50fd4101
--- /dev/null
+++ b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -emit-llvm -o - 
-fcxx-exceptions -fexceptions | FileCheck %s
+
+struct X { };
+
+const X g();
+
+void f() {
+  try {
+throw g();
+// CHECK: ptr addrspace(1) @_ZTI1X
+  } catch (const X x) {
+// CHECK: catch ptr addrspace(1) @_ZTI1X
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTI1X to ptr))
+  }
+}
+
+void h() {
+  try {
+throw "ABC";
+// CHECK: ptr addrspace(1) @_ZTIPKc
+  } catch (char const(&)[4]) {
+// CHECK: catch ptr addrspace(1) @_ZTIA4_c
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTIA4_c to ptr))
+  }
+}

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[clang-tools-extra] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-10 Thread Alex Voicu via cfe-commits


@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);

AlexVlx wrote:

We can, I've only used the builder for symmetry (everything else uses direct 
emission) and convenience (we already have the LLVM types handy). I'll switch 
it over to the hook, and hoist the intrinsic arg type retrieval since it 
doesn't need to be in the loop.

https://github.com/llvm/llvm-project/pull/65699
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[clang-tools-extra] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/65699:

>From f4271e03667b64c8d10d7e4de16e78b37e845229 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 8 Sep 2023 00:21:59 +0100
Subject: [PATCH 1/2] AS_cast the argument to `eh_typeid_for` iff typeinfo is
 not in the default AS.

---
 clang/lib/CodeGen/CGException.cpp |  5 +++-
 .../try-catch-with-address-space.cpp  | 25 +++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CodeGenCXX/try-catch-with-address-space.cpp

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 3996f2948349cb5..49cf4ec4b84307b 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;
diff --git a/clang/test/CodeGenCXX/try-catch-with-address-space.cpp 
b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
new file mode 100644
index 000..279d29f50fd4101
--- /dev/null
+++ b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -emit-llvm -o - 
-fcxx-exceptions -fexceptions | FileCheck %s
+
+struct X { };
+
+const X g();
+
+void f() {
+  try {
+throw g();
+// CHECK: ptr addrspace(1) @_ZTI1X
+  } catch (const X x) {
+// CHECK: catch ptr addrspace(1) @_ZTI1X
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTI1X to ptr))
+  }
+}
+
+void h() {
+  try {
+throw "ABC";
+// CHECK: ptr addrspace(1) @_ZTIPKc
+  } catch (char const(&)[4]) {
+// CHECK: catch ptr addrspace(1) @_ZTIA4_c
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTIA4_c to ptr))
+  }
+}

>From 938c798b39be0fd03f1e6c57ce7dd39c93145acb Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 10 Sep 2023 15:45:10 +0100
Subject: [PATCH 2/2] Switch to using the target hook for the as-cast.

---
 clang/lib/CodeGen/CGException.cpp | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 49cf4ec4b84307b..87594f71b26ec53 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1136,6 +1136,8 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
   // Select the right handler.
   llvm::Function *llvm_eh_typeid_for =
 CGF.CGM.getIntrinsic(llvm::Intrinsic::eh_typeid_for);
+  llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+  LangAS globAS = CGF.CGM.GetGlobalVarAddressSpace(nullptr);
 
   // Load the selector value.
   llvm::Value *selector = CGF.getSelectorFromSlot();
@@ -1149,10 +1151,11 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
 // With opaque ptrs, only the address space can be a mismatch.
 if (typeValue->getType() != argTy)
-  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
+  typeValue =
+CGF.getTargetHooks().performAddrSpaceCast(CGF, typeValue, globAS,
+  LangAS::Default, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;

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[clang-tools-extra] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx resolved 
https://github.com/llvm/llvm-project/pull/65699
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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/65699:

>From f4271e03667b64c8d10d7e4de16e78b37e845229 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 8 Sep 2023 00:21:59 +0100
Subject: [PATCH 1/2] AS_cast the argument to `eh_typeid_for` iff typeinfo is
 not in the default AS.

---
 clang/lib/CodeGen/CGException.cpp |  5 +++-
 .../try-catch-with-address-space.cpp  | 25 +++
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 clang/test/CodeGenCXX/try-catch-with-address-space.cpp

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 3996f2948349cb5..49cf4ec4b84307b 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1149,7 +1149,10 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-typeValue = CGF.Builder.CreateBitCast(typeValue, CGF.Int8PtrTy);
+llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+// With opaque ptrs, only the address space can be a mismatch.
+if (typeValue->getType() != argTy)
+  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;
diff --git a/clang/test/CodeGenCXX/try-catch-with-address-space.cpp 
b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
new file mode 100644
index 000..279d29f50fd4101
--- /dev/null
+++ b/clang/test/CodeGenCXX/try-catch-with-address-space.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -emit-llvm -o - 
-fcxx-exceptions -fexceptions | FileCheck %s
+
+struct X { };
+
+const X g();
+
+void f() {
+  try {
+throw g();
+// CHECK: ptr addrspace(1) @_ZTI1X
+  } catch (const X x) {
+// CHECK: catch ptr addrspace(1) @_ZTI1X
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTI1X to ptr))
+  }
+}
+
+void h() {
+  try {
+throw "ABC";
+// CHECK: ptr addrspace(1) @_ZTIPKc
+  } catch (char const(&)[4]) {
+// CHECK: catch ptr addrspace(1) @_ZTIA4_c
+// CHECK: call i32 @llvm.eh.typeid.for(ptr addrspacecast (ptr addrspace(1) 
@_ZTIA4_c to ptr))
+  }
+}

>From 938c798b39be0fd03f1e6c57ce7dd39c93145acb Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 10 Sep 2023 15:45:10 +0100
Subject: [PATCH 2/2] Switch to using the target hook for the as-cast.

---
 clang/lib/CodeGen/CGException.cpp | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/clang/lib/CodeGen/CGException.cpp 
b/clang/lib/CodeGen/CGException.cpp
index 49cf4ec4b84307b..87594f71b26ec53 100644
--- a/clang/lib/CodeGen/CGException.cpp
+++ b/clang/lib/CodeGen/CGException.cpp
@@ -1136,6 +1136,8 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
   // Select the right handler.
   llvm::Function *llvm_eh_typeid_for =
 CGF.CGM.getIntrinsic(llvm::Intrinsic::eh_typeid_for);
+  llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
+  LangAS globAS = CGF.CGM.GetGlobalVarAddressSpace(nullptr);
 
   // Load the selector value.
   llvm::Value *selector = CGF.getSelectorFromSlot();
@@ -1149,10 +1151,11 @@ static void emitCatchDispatchBlock(CodeGenFunction &CGF,
 assert(handler.Type.Flags == 0 &&
"landingpads do not support catch handler flags");
 assert(typeValue && "fell into catch-all case!");
-llvm::Type *argTy = llvm_eh_typeid_for->getArg(0)->getType();
 // With opaque ptrs, only the address space can be a mismatch.
 if (typeValue->getType() != argTy)
-  typeValue = CGF.Builder.CreateAddrSpaceCast(typeValue, argTy);
+  typeValue =
+CGF.getTargetHooks().performAddrSpaceCast(CGF, typeValue, globAS,
+  LangAS::Default, argTy);
 
 // Figure out the next block.
 bool nextIsEnd;

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[clang-tools-extra] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx resolved 
https://github.com/llvm/llvm-project/pull/65699
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[clang] [clang][CodeGen] The `eh_typeid_for` intrinsic needs special care too (PR #65699)

2023-09-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx resolved 
https://github.com/llvm/llvm-project/pull/65699
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[clang] 9c760ca - [Clang][CodeGen] `typeid` needs special care when `type_info` is not in the default AS

2023-08-28 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-08-28T20:44:06+01:00
New Revision: 9c760ca8ecfd570212b47a5e980d38575b879029

URL: 
https://github.com/llvm/llvm-project/commit/9c760ca8ecfd570212b47a5e980d38575b879029
DIFF: 
https://github.com/llvm/llvm-project/commit/9c760ca8ecfd570212b47a5e980d38575b879029.diff

LOG: [Clang][CodeGen] `typeid` needs special care when `type_info` is not in 
the default AS

After https://reviews.llvm.org/D153092, for targets that use a non-default AS 
for globals, an "interesting" situation arises around typeid and its paired 
type, type_info:

- on the AST level, the type_info interface is defined with default / generic 
addresses, be it for function arguments, or for this;
- in IR, type_info values are globals, and thus pointers to type_info values 
are pointers to global

This leads to a mismatch between the function signature / formal type of the 
argument, and its actual type. Currently we try to handle such mismatches via 
`bitcast`, but that is wrong in this case, since an `ascast` is required. This 
patch ensures that iff the pointer to `type_info` points to a non-default AS, 
an ascast is inserted so as to match the `typeid` interface / return value type.

Reviewed by: yaxunl

Differential Revision: https://reviews.llvm.org/D157452

Added: 
clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
clang/test/CodeGenCXX/typeid-with-address-space.cpp
clang/test/CodeGenCXX/typeinfo-with-address-space.cpp

Modified: 
clang/lib/CodeGen/CGExprCXX.cpp
clang/lib/CodeGen/ItaniumCXXABI.cpp
clang/test/CodeGenCXX/typeinfo

Removed: 




diff  --git a/clang/lib/CodeGen/CGExprCXX.cpp b/clang/lib/CodeGen/CGExprCXX.cpp
index 4d3f3e9603d942..34d4f37a5d295f 100644
--- a/clang/lib/CodeGen/CGExprCXX.cpp
+++ b/clang/lib/CodeGen/CGExprCXX.cpp
@@ -2195,11 +2195,19 @@ static llvm::Value 
*EmitTypeidFromVTable(CodeGenFunction &CGF, const Expr *E,
 
 llvm::Value *CodeGenFunction::EmitCXXTypeidExpr(const CXXTypeidExpr *E) {
   llvm::Type *PtrTy = llvm::PointerType::getUnqual(getLLVMContext());
+  LangAS GlobAS = CGM.GetGlobalVarAddressSpace(nullptr);
+
+  auto MaybeASCast = [=](auto &&TypeInfo) {
+if (GlobAS == LangAS::Default)
+  return TypeInfo;
+return getTargetHooks().performAddrSpaceCast(CGM,TypeInfo, GlobAS,
+ LangAS::Default, PtrTy);
+  };
 
   if (E->isTypeOperand()) {
 llvm::Constant *TypeInfo =
 CGM.GetAddrOfRTTIDescriptor(E->getTypeOperand(getContext()));
-return TypeInfo;
+return MaybeASCast(TypeInfo);
   }
 
   // C++ [expr.typeid]p2:
@@ -2212,7 +2220,7 @@ llvm::Value *CodeGenFunction::EmitCXXTypeidExpr(const 
CXXTypeidExpr *E) {
 return EmitTypeidFromVTable(*this, E->getExprOperand(), PtrTy);
 
   QualType OperandTy = E->getExprOperand()->getType();
-  return CGM.GetAddrOfRTTIDescriptor(OperandTy);
+  return MaybeASCast(CGM.GetAddrOfRTTIDescriptor(OperandTy));
 }
 
 static llvm::Value *EmitDynamicCastToNull(CodeGenFunction &CGF,

diff  --git a/clang/lib/CodeGen/ItaniumCXXABI.cpp 
b/clang/lib/CodeGen/ItaniumCXXABI.cpp
index 65347f076f9c8b..d64287ddf1217c 100644
--- a/clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ b/clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -1444,8 +1444,8 @@ llvm::Value *ItaniumCXXABI::EmitTypeid(CodeGenFunction 
&CGF,
llvm::Type *StdTypeInfoPtrTy) {
   auto *ClassDecl =
   cast(SrcRecordTy->castAs()->getDecl());
-  llvm::Value *Value = CGF.GetVTablePtr(
-  ThisPtr, llvm::PointerType::getUnqual(CGF.getLLVMContext()), ClassDecl);
+  llvm::Value *Value = CGF.GetVTablePtr(ThisPtr, CGM.GlobalsInt8PtrTy,
+ClassDecl);
 
   if (CGM.getItaniumVTableContext().isRelativeLayout()) {
 // Load the type info.

diff  --git a/clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp 
b/clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
new file mode 100644
index 00..c4e7d36acff130
--- /dev/null
+++ b/clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -I%S %s -triple amdgcn-amd-amdhsa -emit-llvm -std=c++11 -o 
- | FileCheck %s
+#include 
+
+namespace Test1 {
+
+struct Item {
+  const std::type_info &ti;
+  const char *name;
+  void *(*make)();
+};
+
+template void *make_impl() { return new T; }
+template constexpr Item item(const char *name) {
+  return { typeid(T), name, make_impl };
+}
+
+struct A { virtual ~A(); };
+struct B : virtual A {};
+struct C { int n; };
+
+// CHECK: @_ZN5Test15itemsE ={{.*}} constant [4 x {{.*}}] [{{.*}} ptr 
addrspacecast (ptr addrspace(1) @_ZTIN5Test11AE to ptr), {{.*}} 
@_ZN5Test19make_implINS_1AEEEPvv {{.*}} ptr addrspacecast (ptr addrspace(1) 
@_ZTIN5Test11BE to ptr), {{.*}} @_ZN5Test19make_implINS_1BEEEPvv {{.*}} ptr 
addrspacecast (ptr addrspace(1) @_ZTIN5Test11CE to ptr), {{.*}} 
@_ZN5Test19make_implINS_1CEEEPvv {{.*}} ptr addrspa

[clang] 29663e2 - [clang][CodeGen] Account for VTT address space

2023-06-04 Thread Alex Voicu via cfe-commits

Author: Alex Voicu
Date: 2023-06-05T03:06:25+01:00
New Revision: 29663e2b8c4edcd850a4245b1f9509f974220906

URL: 
https://github.com/llvm/llvm-project/commit/29663e2b8c4edcd850a4245b1f9509f974220906
DIFF: 
https://github.com/llvm/llvm-project/commit/29663e2b8c4edcd850a4245b1f9509f974220906.diff

LOG: [clang][CodeGen] Account for VTT address space

Correctly account for the fact that certain targets do not use the generic 
address space for the implicit VTT argument. This entails adjusting 
`ItaniumCXXABI::buildStructorSignature`, 
`ItaniumCXXABI::addImplicitStructorParams` and 
`ItaniumCXXABI::getImplicitConstructorArgs` to use the target's global variable 
address space. The associated test is temporarily marked `XFAIL` as additional 
fixes are needed.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D150746

Added: 
clang/test/CodeGenCXX/vtt-address-space.cpp

Modified: 
clang/lib/CodeGen/ItaniumCXXABI.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/ItaniumCXXABI.cpp 
b/clang/lib/CodeGen/ItaniumCXXABI.cpp
index 5dc21dd31e0ae..73137ea27222f 100644
--- a/clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ b/clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -1587,12 +1587,14 @@ ItaniumCXXABI::buildStructorSignature(GlobalDecl GD,
   // All parameters are already in place except VTT, which goes after 'this'.
   // These are Clang types, so we don't need to worry about sret yet.
 
-  // Check if we need to add a VTT parameter (which has type void **).
+  // Check if we need to add a VTT parameter (which has type global void **).
   if ((isa(GD.getDecl()) ? GD.getCtorType() == Ctor_Base
  : GD.getDtorType() == Dtor_Base) 
&&
   cast(GD.getDecl())->getParent()->getNumVBases() != 0) {
+LangAS AS = CGM.GetGlobalVarAddressSpace(nullptr);
+QualType Q = Context.getAddrSpaceQualType(Context.VoidPtrTy, AS);
 ArgTys.insert(ArgTys.begin() + 1,
-  Context.getPointerType(Context.VoidPtrTy));
+  Context.getPointerType(CanQualType::CreateUnsafe(Q)));
 return AddedStructorArgCounts::prefix(1);
   }
   return AddedStructorArgCounts{};
@@ -1625,7 +1627,9 @@ void 
ItaniumCXXABI::addImplicitStructorParams(CodeGenFunction &CGF,
 ASTContext &Context = getContext();
 
 // FIXME: avoid the fake decl
-QualType T = Context.getPointerType(Context.VoidPtrTy);
+LangAS AS = CGM.GetGlobalVarAddressSpace(nullptr);
+QualType Q = Context.getAddrSpaceQualType(Context.VoidPtrTy, AS);
+QualType T = Context.getPointerType(Q);
 auto *VTTDecl = ImplicitParamDecl::Create(
 Context, /*DC=*/nullptr, MD->getLocation(), &Context.Idents.get("vtt"),
 T, ImplicitParamDecl::CXXVTT);
@@ -1667,10 +1671,14 @@ CGCXXABI::AddedStructorArgs 
ItaniumCXXABI::getImplicitConstructorArgs(
   if (!NeedsVTTParameter(GlobalDecl(D, Type)))
 return AddedStructorArgs{};
 
-  // Insert the implicit 'vtt' argument as the second argument.
+  // Insert the implicit 'vtt' argument as the second argument. Make sure to
+  // correctly reflect its address space, which can 
diff er from generic on
+  // some targets.
   llvm::Value *VTT =
   CGF.GetVTTParameter(GlobalDecl(D, Type), ForVirtualBase, Delegating);
-  QualType VTTTy = getContext().getPointerType(getContext().VoidPtrTy);
+  LangAS AS = CGM.GetGlobalVarAddressSpace(nullptr);
+  QualType Q = getContext().getAddrSpaceQualType(getContext().VoidPtrTy, AS);
+  QualType VTTTy = getContext().getPointerType(Q);
   return AddedStructorArgs::prefix({{VTT, VTTTy}});
 }
 

diff  --git a/clang/test/CodeGenCXX/vtt-address-space.cpp 
b/clang/test/CodeGenCXX/vtt-address-space.cpp
new file mode 100644
index 0..595587923d5f6
--- /dev/null
+++ b/clang/test/CodeGenCXX/vtt-address-space.cpp
@@ -0,0 +1,30 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -std=c++11 -emit-llvm -o - | 
FileCheck %s
+// This is temporarily disabled as it requires fixing typeinfo & vptr handling
+// as well; it will be enabled once those fixes are in.
+// XFAIL: *
+
+// This is the sample from the C++ Itanium ABI, p2.6.2.
+namespace Test {
+  class A1 { int i; };
+  class A2 { int i; virtual void f(); };
+  class V1 : public A1, public A2 { int i; };
+  class B1 { int i; };
+  class B2 { int i; };
+  class V2 : public B1, public B2, public virtual V1 { int i; };
+  class V3 { virtual void g(); };
+  class C1 : public virtual V1 { int i; };
+  class C2 : public virtual V3, virtual V2 { int i; };
+  class X1 { int i; };
+  class C3 : public X1 { int i; };
+  class D : public C1, public C2, public C3 { int i;  };
+
+  D d;
+}
+
+// CHECK: @_ZTTN4Test1DE = linkonce_odr unnamed_addr addrspace(1) constant [13 
x ptr] [ptr addrspacecast (ptr addrspace(1) getelementptr inbounds ({ [5 x 
ptr], [7 x ptr], [4 x ptr], [3 x ptr] }, ptr addrspace(1) @_ZTVN4Test1DE, i32 
0, inrange i32 0, i32 5) to ptr), ptr addrspacecast (ptr a

[clang] [llvm] [clang][CodeGen][AMDGPU] Enable AMDGPU `printf` for `spirv64-amd-amdhsa` (PR #97132)

2024-07-01 Thread Alex Voicu via cfe-commits


@@ -5888,12 +5888,16 @@ RValue CodeGenFunction::EmitBuiltinExpr(const 
GlobalDecl GD, unsigned BuiltinID,
   case Builtin::BI__builtin_printf:
   case Builtin::BIprintf:
 if (getTarget().getTriple().isNVPTX() ||
-getTarget().getTriple().isAMDGCN()) {
+getTarget().getTriple().isAMDGCN() ||
+(getTarget().getTriple().isSPIRV() &&
+ getTarget().getTriple().getVendor() == Triple::VendorType::AMD)) {
   if (getLangOpts().OpenMPIsTargetDevice)
 return EmitOpenMPDevicePrintfCallExpr(E);
   if (getTarget().getTriple().isNVPTX())
 return EmitNVPTXDevicePrintfCallExpr(E);
-  if (getTarget().getTriple().isAMDGCN() && getLangOpts().HIP)
+  if ((getTarget().getTriple().isAMDGCN() ||
+   getTarget().getTriple().isSPIRV()) &&
+  getLangOpts().HIP)

AlexVlx wrote:

OMP seems to have no triple logic, and just unconditionally forwards to their 
`printf` impl if on the device path, so I'm not entirely sure on what the 
question is probing. If you're asking why we're not unconditionally forwarding 
in HIP, if compiling for device, I don't quite know, I'm merely re-using what 
was there. If you're asking why I'm not checking again for the vendor type, and 
merely checking for SPIR-V, it's because it'd be spurious due to the outer 
check. If it's none of those, could you please clarify what you mean?

https://github.com/llvm/llvm-project/pull/97132
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[clang] [llvm] [clang][CodeGen][AMDGPU] Enable AMDGPU `printf` for `spirv64-amd-amdhsa` (PR #97132)

2024-07-05 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx closed 
https://github.com/llvm/llvm-project/pull/97132
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[clang] [llvm] [clang][CodeGen][AMDGPU] Enable AMDGPU `printf` for `spirv64-amd-amdhsa` (PR #97132)

2024-07-05 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

> LLVM Buildbot has detected a new failure on builder `sanitizer-ppc64le-linux` 
> running on `ppc64le-sanitizer` while building `clang,llvm` at step 2 
> "annotate".
> 
> Full details are available at: 
> https://lab.llvm.org/buildbot/#/builders/72/builds/839
> 
> Here is the relevant piece of the build log for the reference:
> 
> ```
> Step 2 (annotate) failure: 'python 
> ../sanitizer_buildbot/sanitizers/zorg/buildbot/builders/sanitizers/buildbot_selector.py'
>  (failure)
> ...
> XFAIL: SanitizerCommon-msan-powerpc64le-Linux :: Posix/dump_registers.cpp 
> (365 of 2450)
> PASS: ThreadSanitizer-powerpc64le :: bench_ten_mutexes.cpp (366 of 2450)
> PASS: SanitizerCommon-tsan-powerpc64le-Linux :: Posix/lstat.cpp (367 of 2450)
> PASS: MemorySanitizer-POWERPC64LE :: Linux/glob_altdirfunc.cpp (368 of 2450)
> PASS: ThreadSanitizer-powerpc64le :: atomic_hle.cpp (369 of 2450)
> PASS: LeakSanitizer-Standalone-powerpc64le :: TestCases/Linux/dso-unknown.cpp 
> (370 of 2450)
> PASS: ThreadSanitizer-powerpc64le :: print_full_thread_history.cpp (371 of 
> 2450)
> PASS: LeakSanitizer-Standalone-powerpc64le :: TestCases/disabler.cpp (372 of 
> 2450)
> PASS: SanitizerCommon-tsan-powerpc64le-Linux :: Linux/ptrace.cpp (373 of 2450)
> PASS: ScudoStandalone-Unit :: ./ScudoCUnitTest-powerpc64le-Test/13/14 (374 of 
> 2450)
> FAIL: ThreadSanitizer-powerpc64le :: signal_block.cpp (375 of 2450)
>  TEST 'ThreadSanitizer-powerpc64le :: signal_block.cpp' 
> FAILED 
> Exit Code: 1
> 
> Command Output (stderr):
> --
> RUN: at line 1: 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/build_debug/./bin/clang
>   -fsanitize=thread -Wall  -m64 -fno-function-sections   -gline-tables-only 
> -I/home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/../
>  -O1 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/signal_block.cpp
>  -o 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/build_debug/runtimes/runtimes-bins/compiler-rt/test/tsan/POWERPC64LEConfig/Output/signal_block.cpp.tmp
>  &&  
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/build_debug/runtimes/runtimes-bins/compiler-rt/test/tsan/POWERPC64LEConfig/Output/signal_block.cpp.tmp
>  2>&1 | FileCheck 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/signal_block.cpp
> + 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/build_debug/./bin/clang
>  -fsanitize=thread -Wall -m64 -fno-function-sections -gline-tables-only 
> -I/home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/../
>  -O1 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/signal_block.cpp
>  -o 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/build_debug/runtimes/runtimes-bins/compiler-rt/test/tsan/POWERPC64LEConfig/Output/signal_block.cpp.tmp
> + 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/build_debug/runtimes/runtimes-bins/compiler-rt/test/tsan/POWERPC64LEConfig/Output/signal_block.cpp.tmp
> + FileCheck 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/signal_block.cpp
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/signal_block.cpp:59:15:
>  error: CHECK-NOT: excluded string found in input
> // CHECK-NOT: WARNING: ThreadSanitizer:
>   ^
> :2:1: note: found here
> WARNING: ThreadSanitizer: signal handler spoils errno (pid=3242989)
> ^
> 
> Input file: 
> Check file: 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/signal_block.cpp
> 
> -dump-input=help explains the following input dump.
> 
> Input was:
> <<
> 1: == 
> 2: WARNING: ThreadSanitizer: signal handler spoils errno 
> (pid=3242989) 
> not:59 !  
>   error: no match expected
> 3:  Signal 10 handler invoked at: 
> 4:  #0 handler(int) 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/compiler-rt/test/tsan/signal_block.cpp:13
>  (signal_block.cpp.tmp+0xfea60) 
> 5:  
> 6: SUMMARY: ThreadSanitizer: signal handler spoils errno 
> /home/buildbots/llvm-external-buildbots/workers/ppc64le-sanitizer/sanitizer-ppc64le/build/llvm-project/c

[clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)

2024-09-04 Thread Alex Voicu via cfe-commits


@@ -335,6 +335,9 @@ class LLVM_LIBRARY_VISIBILITY SPIRV32TargetInfo : public 
BaseSPIRVTargetInfo {
 PointerWidth = PointerAlign = 32;
 SizeType = TargetInfo::UnsignedInt;
 PtrDiffType = IntPtrType = TargetInfo::SignedInt;
+// SPIR-V has core support for atomic ops, and Int32 is always available;
+// we take the maximum because it's possible the Host supports wider types.
+MaxAtomicInlineWidth = std::max(MaxAtomicInlineWidth, 32);

AlexVlx wrote:

I'm assuming that the SPIRV32 target exists for cases where the `Int64` 
capability is never enabled, but it would probably be useful to have that 
assumption checked. For SPIR-V the model for extensions / capabilities in LLVM 
seems to be push i.e. extensions get enabled / checked iff a feature requiring 
the extension / capability is encountered when translating (legacy) / lowering 
(the experimental BE). FWIW, my reading of the SPIR-V spec is that the `Int64` 
capability is core.

https://github.com/llvm/llvm-project/pull/106429
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[clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)

2024-09-04 Thread Alex Voicu via cfe-commits


@@ -766,8 +766,17 @@ static void EmitAtomicOp(CodeGenFunction &CGF, AtomicExpr 
*Expr, Address Dest,
   // LLVM atomic instructions always have synch scope. If clang atomic
   // expression has no scope operand, use default LLVM synch scope.
   if (!ScopeModel) {
+llvm::SyncScope::ID SS = CGF.getLLVMContext().getOrInsertSyncScopeID("");

AlexVlx wrote:

Done.

https://github.com/llvm/llvm-project/pull/106429
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[clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)

2024-09-04 Thread Alex Voicu via cfe-commits


@@ -188,6 +192,41 @@ void 
SPIRVTargetCodeGenInfo::setCUDAKernelCallingConvention(
   }
 }
 
+llvm::SyncScope::ID
+SPIRVTargetCodeGenInfo::getLLVMSyncScopeID(const LangOptions &, SyncScope 
Scope,
+   llvm::AtomicOrdering,
+   llvm::LLVMContext &Ctx) const {
+  std::string Name;

AlexVlx wrote:

Done.

https://github.com/llvm/llvm-project/pull/106429
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[clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)

2024-09-04 Thread Alex Voicu via cfe-commits


@@ -188,6 +192,41 @@ void 
SPIRVTargetCodeGenInfo::setCUDAKernelCallingConvention(
   }
 }
 
+llvm::SyncScope::ID
+SPIRVTargetCodeGenInfo::getLLVMSyncScopeID(const LangOptions &, SyncScope 
Scope,
+   llvm::AtomicOrdering,
+   llvm::LLVMContext &Ctx) const {
+  std::string Name;
+  switch (Scope) {
+  case SyncScope::HIPSingleThread:
+  case SyncScope::SingleScope:
+Name = "singlethread";
+break;

AlexVlx wrote:

Done.

https://github.com/llvm/llvm-project/pull/106429
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[clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)

2024-09-09 Thread Alex Voicu via cfe-commits


@@ -766,8 +766,17 @@ static void EmitAtomicOp(CodeGenFunction &CGF, AtomicExpr 
*Expr, Address Dest,
   // LLVM atomic instructions always have synch scope. If clang atomic
   // expression has no scope operand, use default LLVM synch scope.
   if (!ScopeModel) {
+llvm::SyncScope::ID SS = CGF.getLLVMContext().getOrInsertSyncScopeID("");
+if (CGF.getLangOpts().OpenCL)
+  // OpenCL approach is: "The functions that do not have memory_scope

AlexVlx wrote:

This is the primary entry point for Atomic emission, so things like the Clang 
builtins (which do not carry scopes) would end up here.

https://github.com/llvm/llvm-project/pull/106429
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[clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)

2024-09-09 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

> Thank you for the PR! I'd like to better understand motivation and 
> justification of SPIR-V BE-related changes though. The goal would be to 
> understand whether AllSvmDevices is indeed a better choice (for whom?) than 
> Device as a default mem scope value in SPIR-V BE.
> 
> 1. Questions to the description of the PR.
> 
> > "These were previously unconditionally lowered to Device scope, which is 
> > can be too conservative and possibly incorrect."
> 
> The claim is not justified by any docs/specs. Why Device scope is incorrect 
> as a default? In my opinion, it's AllSvmDevices that looks like a 
> conservative choice that may lead to performance degradation in general case 
> when we change the default without notifying customers. Or, we may say that 
> potential performance changes may depend on a vendor-specific behavior in 
> this case.
> 
> > "Furthermore, the default / implicit scope is changed from Device (an 
> > OpenCL assumption) to AllSvmDevices (aka System), since the SPIR-V BE is 
> > not OpenCL specific / can ingest IR coming from other language front-ends."
> 
> What I know without additional references to other docs/specs is that Device 
> is default by OpenCL spec 
> (https://registry.khronos.org/OpenCL/specs/3.0-unified/html/OpenCL_C.html#atomic-functions).
>  It would help if you can provide references where AllSvmDevices is a 
> preferable choice, so that we are able to compare and figure out the best 
> default for the Computational flavor of SPIR-V. For sure, SPIR-V BE is not 
> OpenCL (=Device) specific, and it's also not specific to any particular 
> vendor or computational framework. I've seen usages of AllSvmDevices as 
> default in the code base (for example, in
> 
> https://github.com/llvm/llvm-project/blob/319e8cd201e6744199da377fba237dd276063e49/clang/lib/CodeGen/Targets/AMDGPU.cpp#L537
> 
> ), but it seems not enough to flip the default over.
> > "OpenCL defaulting to Device scope is now reflected in the front-end 
> > handling of atomic ops, which seems preferable."
> 
> Changes in clang part looks really good to me. However, when we add to it 
> changes in SPIR-V part of the code base, things look less optimistic, because 
> what this PR means by "the front-end handling of atomic ops" is the upstream 
> clang only, whereas actual choices of a front-end are more versatile, and 
> users coming to SPIR-V by other paths would get a sudden change of behavior 
> in the worst case (e.g., MLIR input for the GenAI domain).
> 
> ===
> 
> 2. If it's acceptable to split this PR into two separate PR's (clang and 
> SPIR-V), I'd gladly support changes in clang part, it makes sense for me. At 
> the moment, however, I have objections against SPIR-V Backend changes as they 
> are represented in the PR:
> 
> * This PR looks like a breaking change that would flip over the default value 
> of mem scope for all environments except for OpenCL and may have a 
> potentially negative impact on an unknown number of projects/customers. I'd 
> guess that OpenCL would not notice the difference, because path that goes via 
> upstream clang front-end redefines default mem scope as Device. All other 
> toolchains just get a breaking change in the form of the AllSvmDevices 
> default. clang-related changes do not help to smooth this, because SPIRV BE 
> should remain agnostic towards front-ends, frameworks, etc.
> * A technical comment is that the proposed implementation in SPIR-V part is 
> less efficient that existing. It compares strings rather than integers and 
> fills in scope names on each call to the getMemScope() function, whereas 
> existing implementation does it just once per a machine function.
> * A terminology (the choice of syncscope names) is debatable. The closest 
> thing in specs that I see is 
> https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_scope_id. I 
> don't see any references to "singlethread" in the specs. Name "workitem" 
> (spelling precisely as "work-item") is used at least in the official Khronos 
> documents (see for example 
> https://registry.khronos.org/SPIR-V/specs/1.0/SPIR-V-execution-and-memory-model.pdf).
>  "all_svm_devices" is not mentioned in the specs at all (there is only the 
> "CrossDevice" term).
> 
> ===
> 
> For now, I'd rather see an eventual solution in the form of further 
> classification of the computational flavor of SPIR-V (not just Compute vs. 
> Vulkan but breaking Compute part further where this is required) -- comparing 
> to this sudden change of the default in favor of any incarnation of Compute 
> targets. As the first approach, all SPIR-V-related changes may require just a 
> short snippet of the kind "if TheTriple is XXX-specific then use CrossDevice 
> instead of Device" and minor rename of syncscope names ("subgroup", for 
> example, indeed makes more sense than "sub_group"). This would probably 
> require a description in the SPIRVUsage doc as well to avoid confusion among 
> customers. Anyway, I'd be

[clang] [clang][CodeGen][SPIR-V][AMDGPU] Tweak AMDGCNSPIRV ABI to allow for the correct handling of aggregates passed to kernels / functions. (PR #102776)

2024-08-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx created 
https://github.com/llvm/llvm-project/pull/102776

The AMDGPU kernel ABI is not directly representable in SPIR-V, since it relies 
on passing aggregates `byref`, and SPIR-V only encodes `byval` (which the 
AMDGPU BE disallows for kernel arguments). As a temporary solution to this 
mismatch, we add special handling for AMDGCN flavoured SPIR-V, whereby 
aggregates are passed as direct, both to kernels and to normal functions. This 
is not ideal (there are pathological cases where performance is heavily 
impacted), but empirically robust and guaranteed to work as the AMDGPU BE 
retains handling of `direct` passing for legacy reasons.

We will revisit this in the future, but as it stands it is enough to pass a 
wide array of integration tests and generates correct SPIR-V and correct 
reverse translation into LLVM IR. The amdgpu-kernel-arg-pointer-type test is 
updated via the automated script, and thus becomes quite noisy.

>From d41faf6da8a9eed8c32f6a62fa9ebf38d5824c2c Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 11 Aug 2024 01:39:46 +0300
Subject: [PATCH] Tweak AMDGCNSPIRV ABI to allow for the correct handling of
 aggregates passed to kernels / functions.

---
 clang/lib/CodeGen/Targets/SPIR.cpp|  73 +-
 .../amdgpu-kernel-arg-pointer-type.cu | 723 --
 clang/test/CodeGenCUDA/kernel-args.cu |   6 +
 3 files changed, 731 insertions(+), 71 deletions(-)

diff --git a/clang/lib/CodeGen/Targets/SPIR.cpp 
b/clang/lib/CodeGen/Targets/SPIR.cpp
index cf068cbc4fcd36..1319332635b863 100644
--- a/clang/lib/CodeGen/Targets/SPIR.cpp
+++ b/clang/lib/CodeGen/Targets/SPIR.cpp
@@ -32,7 +32,9 @@ class SPIRVABIInfo : public CommonSPIRABIInfo {
   void computeInfo(CGFunctionInfo &FI) const override;
 
 private:
+  ABIArgInfo classifyReturnType(QualType RetTy) const;
   ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
+  ABIArgInfo classifyArgumentType(QualType Ty) const;
 };
 } // end anonymous namespace
 namespace {
@@ -64,6 +66,27 @@ void CommonSPIRABIInfo::setCCs() {
   RuntimeCC = llvm::CallingConv::SPIR_FUNC;
 }
 
+ABIArgInfo SPIRVABIInfo::classifyReturnType(QualType RetTy) const {
+  if (getTarget().getTriple().getVendor() != llvm::Triple::AMD)
+return DefaultABIInfo::classifyReturnType(RetTy);
+  if (!isAggregateTypeForABI(RetTy) || getRecordArgABI(RetTy, getCXXABI()))
+return DefaultABIInfo::classifyReturnType(RetTy);
+
+  if (const RecordType *RT = RetTy->getAs()) {
+const RecordDecl *RD = RT->getDecl();
+if (RD->hasFlexibleArrayMember())
+  return DefaultABIInfo::classifyReturnType(RetTy);
+  }
+
+  // TODO: The AMDGPU ABI is non-trivial to represent in SPIR-V; in order to
+  // avoid encoding various architecture specific bits here we return 
everything
+  // as direct to retain type info for things like aggregates, for later 
perusal
+  // when translating back to LLVM/lowering in the BE. This is also why we
+  // disable flattening as the outcomes can mismatch between SPIR-V and AMDGPU.
+  // This will be revisited / optimised in the future.
+  return ABIArgInfo::getDirect(CGT.ConvertType(RetTy), 0u, nullptr, false);
+}
+
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
   if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
@@ -78,18 +101,52 @@ ABIArgInfo 
SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
   return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
 }
 
-// Force copying aggregate type in kernel arguments by value when
-// compiling CUDA targeting SPIR-V. This is required for the object
-// copied to be valid on the device.
-// This behavior follows the CUDA spec
-// 
https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#global-function-argument-processing,
-// and matches the NVPTX implementation.
-if (isAggregateTypeForABI(Ty))
-  return getNaturalAlignIndirect(Ty, /* byval */ true);
+   if (isAggregateTypeForABI(Ty)) {
+  if (getTarget().getTriple().getVendor() == llvm::Triple::AMD)
+// TODO: The AMDGPU kernel ABI passes aggregates byref, which is not
+// currently expressible in SPIR-V; SPIR-V passes aggregates byval,
+// which the AMDGPU kernel ABI does not allow. Passing aggregates as
+// direct works around this impedance mismatch, as it retains type info
+// and can be correctly handled, post reverse-translation, by the 
AMDGPU
+// BE, which has to support this CC for legacy OpenCL purposes. It can
+// be brittle and does lead to performance degradation in certain
+// pathological cases. This will be revisited / optimised in the 
future,
+// once a way to deal with the byref/byval impedance mismatch is
+// identified.
+return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
+  else
+// Force copying aggregate type in kernel

[clang] [clang][CodeGen][SPIR-V][AMDGPU] Tweak AMDGCNSPIRV ABI to allow for the correct handling of aggregates passed to kernels / functions. (PR #102776)

2024-08-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx ready_for_review 
https://github.com/llvm/llvm-project/pull/102776
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[clang] [clang][CodeGen][SPIR-V][AMDGPU] Tweak AMDGCNSPIRV ABI to allow for the correct handling of aggregates passed to kernels / functions. (PR #102776)

2024-08-10 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/102776

>From d41faf6da8a9eed8c32f6a62fa9ebf38d5824c2c Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 11 Aug 2024 01:39:46 +0300
Subject: [PATCH 1/2] Tweak AMDGCNSPIRV ABI to allow for the correct handling
 of aggregates passed to kernels / functions.

---
 clang/lib/CodeGen/Targets/SPIR.cpp|  73 +-
 .../amdgpu-kernel-arg-pointer-type.cu | 723 --
 clang/test/CodeGenCUDA/kernel-args.cu |   6 +
 3 files changed, 731 insertions(+), 71 deletions(-)

diff --git a/clang/lib/CodeGen/Targets/SPIR.cpp 
b/clang/lib/CodeGen/Targets/SPIR.cpp
index cf068cbc4fcd36..1319332635b863 100644
--- a/clang/lib/CodeGen/Targets/SPIR.cpp
+++ b/clang/lib/CodeGen/Targets/SPIR.cpp
@@ -32,7 +32,9 @@ class SPIRVABIInfo : public CommonSPIRABIInfo {
   void computeInfo(CGFunctionInfo &FI) const override;
 
 private:
+  ABIArgInfo classifyReturnType(QualType RetTy) const;
   ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
+  ABIArgInfo classifyArgumentType(QualType Ty) const;
 };
 } // end anonymous namespace
 namespace {
@@ -64,6 +66,27 @@ void CommonSPIRABIInfo::setCCs() {
   RuntimeCC = llvm::CallingConv::SPIR_FUNC;
 }
 
+ABIArgInfo SPIRVABIInfo::classifyReturnType(QualType RetTy) const {
+  if (getTarget().getTriple().getVendor() != llvm::Triple::AMD)
+return DefaultABIInfo::classifyReturnType(RetTy);
+  if (!isAggregateTypeForABI(RetTy) || getRecordArgABI(RetTy, getCXXABI()))
+return DefaultABIInfo::classifyReturnType(RetTy);
+
+  if (const RecordType *RT = RetTy->getAs()) {
+const RecordDecl *RD = RT->getDecl();
+if (RD->hasFlexibleArrayMember())
+  return DefaultABIInfo::classifyReturnType(RetTy);
+  }
+
+  // TODO: The AMDGPU ABI is non-trivial to represent in SPIR-V; in order to
+  // avoid encoding various architecture specific bits here we return 
everything
+  // as direct to retain type info for things like aggregates, for later 
perusal
+  // when translating back to LLVM/lowering in the BE. This is also why we
+  // disable flattening as the outcomes can mismatch between SPIR-V and AMDGPU.
+  // This will be revisited / optimised in the future.
+  return ABIArgInfo::getDirect(CGT.ConvertType(RetTy), 0u, nullptr, false);
+}
+
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
   if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
@@ -78,18 +101,52 @@ ABIArgInfo 
SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
   return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
 }
 
-// Force copying aggregate type in kernel arguments by value when
-// compiling CUDA targeting SPIR-V. This is required for the object
-// copied to be valid on the device.
-// This behavior follows the CUDA spec
-// 
https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#global-function-argument-processing,
-// and matches the NVPTX implementation.
-if (isAggregateTypeForABI(Ty))
-  return getNaturalAlignIndirect(Ty, /* byval */ true);
+   if (isAggregateTypeForABI(Ty)) {
+  if (getTarget().getTriple().getVendor() == llvm::Triple::AMD)
+// TODO: The AMDGPU kernel ABI passes aggregates byref, which is not
+// currently expressible in SPIR-V; SPIR-V passes aggregates byval,
+// which the AMDGPU kernel ABI does not allow. Passing aggregates as
+// direct works around this impedance mismatch, as it retains type info
+// and can be correctly handled, post reverse-translation, by the 
AMDGPU
+// BE, which has to support this CC for legacy OpenCL purposes. It can
+// be brittle and does lead to performance degradation in certain
+// pathological cases. This will be revisited / optimised in the 
future,
+// once a way to deal with the byref/byval impedance mismatch is
+// identified.
+return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
+  else
+// Force copying aggregate type in kernel arguments by value when
+// compiling CUDA targeting SPIR-V. This is required for the object
+// copied to be valid on the device.
+// This behavior follows the CUDA spec
+// 
https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#global-function-argument-processing,
+// and matches the NVPTX implementation.
+return getNaturalAlignIndirect(Ty, /* byval */ true);
+}
   }
   return classifyArgumentType(Ty);
 }
 
+ABIArgInfo SPIRVABIInfo::classifyArgumentType(QualType Ty) const {
+  if (getTarget().getTriple().getVendor() != llvm::Triple::AMD)
+return DefaultABIInfo::classifyArgumentType(Ty);
+  if (!isAggregateTypeForABI(Ty))
+return DefaultABIInfo::classifyArgumentType(Ty);
+
+  // Records with non-trivial destructors/copy-constructors should not be
+  // passed by value.
+  if (auto RAA = getRecor

[clang] [Clang] Add `__CLANG_GPU_DISABLE_MATH_WRAPPERS` macro for offloading math (PR #98234)

2024-08-13 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx approved this pull request.


https://github.com/llvm/llvm-project/pull/98234
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[clang] [clang][CodeGen][SPIR-V][AMDGPU] Tweak AMDGCNSPIRV ABI to allow for the correct handling of aggregates passed to kernels / functions. (PR #102776)

2024-08-13 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx commented:

> > but empirically robust and guaranteed to work as the AMDGPU BE retains 
> > handling of direct passing for legacy reasons.

I would like to get rid of that someday... 

I share the sentiment, but as far as I can see this is one of those things that 
has been on the way out someday for years, so it's not going to suddenly 
disappear. At worst, since tests cover it, if the BE goes and disallows direct 
passing to a kernel (for example), tests flare up and we'll have to fix it on 
the AMDGCNSPIRV end.

https://github.com/llvm/llvm-project/pull/102776
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[clang] [clang][CodeGen][SPIR-V][AMDGPU] Tweak AMDGCNSPIRV ABI to allow for the correct handling of aggregates passed to kernels / functions. (PR #102776)

2024-08-13 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx edited 
https://github.com/llvm/llvm-project/pull/102776
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[clang] [clang][CodeGen][SPIR-V][AMDGPU] Tweak AMDGCNSPIRV ABI to allow for the correct handling of aggregates passed to kernels / functions. (PR #102776)

2024-08-13 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/102776

>From d41faf6da8a9eed8c32f6a62fa9ebf38d5824c2c Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Sun, 11 Aug 2024 01:39:46 +0300
Subject: [PATCH 1/2] Tweak AMDGCNSPIRV ABI to allow for the correct handling
 of aggregates passed to kernels / functions.

---
 clang/lib/CodeGen/Targets/SPIR.cpp|  73 +-
 .../amdgpu-kernel-arg-pointer-type.cu | 723 --
 clang/test/CodeGenCUDA/kernel-args.cu |   6 +
 3 files changed, 731 insertions(+), 71 deletions(-)

diff --git a/clang/lib/CodeGen/Targets/SPIR.cpp 
b/clang/lib/CodeGen/Targets/SPIR.cpp
index cf068cbc4fcd36..1319332635b863 100644
--- a/clang/lib/CodeGen/Targets/SPIR.cpp
+++ b/clang/lib/CodeGen/Targets/SPIR.cpp
@@ -32,7 +32,9 @@ class SPIRVABIInfo : public CommonSPIRABIInfo {
   void computeInfo(CGFunctionInfo &FI) const override;
 
 private:
+  ABIArgInfo classifyReturnType(QualType RetTy) const;
   ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
+  ABIArgInfo classifyArgumentType(QualType Ty) const;
 };
 } // end anonymous namespace
 namespace {
@@ -64,6 +66,27 @@ void CommonSPIRABIInfo::setCCs() {
   RuntimeCC = llvm::CallingConv::SPIR_FUNC;
 }
 
+ABIArgInfo SPIRVABIInfo::classifyReturnType(QualType RetTy) const {
+  if (getTarget().getTriple().getVendor() != llvm::Triple::AMD)
+return DefaultABIInfo::classifyReturnType(RetTy);
+  if (!isAggregateTypeForABI(RetTy) || getRecordArgABI(RetTy, getCXXABI()))
+return DefaultABIInfo::classifyReturnType(RetTy);
+
+  if (const RecordType *RT = RetTy->getAs()) {
+const RecordDecl *RD = RT->getDecl();
+if (RD->hasFlexibleArrayMember())
+  return DefaultABIInfo::classifyReturnType(RetTy);
+  }
+
+  // TODO: The AMDGPU ABI is non-trivial to represent in SPIR-V; in order to
+  // avoid encoding various architecture specific bits here we return 
everything
+  // as direct to retain type info for things like aggregates, for later 
perusal
+  // when translating back to LLVM/lowering in the BE. This is also why we
+  // disable flattening as the outcomes can mismatch between SPIR-V and AMDGPU.
+  // This will be revisited / optimised in the future.
+  return ABIArgInfo::getDirect(CGT.ConvertType(RetTy), 0u, nullptr, false);
+}
+
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
   if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
@@ -78,18 +101,52 @@ ABIArgInfo 
SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
   return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
 }
 
-// Force copying aggregate type in kernel arguments by value when
-// compiling CUDA targeting SPIR-V. This is required for the object
-// copied to be valid on the device.
-// This behavior follows the CUDA spec
-// 
https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#global-function-argument-processing,
-// and matches the NVPTX implementation.
-if (isAggregateTypeForABI(Ty))
-  return getNaturalAlignIndirect(Ty, /* byval */ true);
+   if (isAggregateTypeForABI(Ty)) {
+  if (getTarget().getTriple().getVendor() == llvm::Triple::AMD)
+// TODO: The AMDGPU kernel ABI passes aggregates byref, which is not
+// currently expressible in SPIR-V; SPIR-V passes aggregates byval,
+// which the AMDGPU kernel ABI does not allow. Passing aggregates as
+// direct works around this impedance mismatch, as it retains type info
+// and can be correctly handled, post reverse-translation, by the 
AMDGPU
+// BE, which has to support this CC for legacy OpenCL purposes. It can
+// be brittle and does lead to performance degradation in certain
+// pathological cases. This will be revisited / optimised in the 
future,
+// once a way to deal with the byref/byval impedance mismatch is
+// identified.
+return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
+  else
+// Force copying aggregate type in kernel arguments by value when
+// compiling CUDA targeting SPIR-V. This is required for the object
+// copied to be valid on the device.
+// This behavior follows the CUDA spec
+// 
https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#global-function-argument-processing,
+// and matches the NVPTX implementation.
+return getNaturalAlignIndirect(Ty, /* byval */ true);
+}
   }
   return classifyArgumentType(Ty);
 }
 
+ABIArgInfo SPIRVABIInfo::classifyArgumentType(QualType Ty) const {
+  if (getTarget().getTriple().getVendor() != llvm::Triple::AMD)
+return DefaultABIInfo::classifyArgumentType(Ty);
+  if (!isAggregateTypeForABI(Ty))
+return DefaultABIInfo::classifyArgumentType(Ty);
+
+  // Records with non-trivial destructors/copy-constructors should not be
+  // passed by value.
+  if (auto RAA = getRecor

[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx created 
https://github.com/llvm/llvm-project/pull/88182

At the moment, Clang is rather liberal in assuming that 0 (and by extension 
unqualified) is always  a safe default. This does not work for targets that 
actually use a different value for the default / generic AS (for example, the 
SPIRV that obtains from HIPSPV or SYCL). This patch is a first step, fairly 
safe step towards trying to clear things up by:

- querying a modules default AS from the target, rather than assuming it's 0
- querying a modules global AS from the target, rather than from the data 
layout (some DL's are incomplete, e.g. SPIRV's)
- using the overloaded ctors for `GlobalVariable`s / `Function`s that take an 
address space argument, as opposed to the defaults that assume 0.

A bunch of tests (adapted from existing ones) are added. I've opted against 
adding new cases within to the existing ones sinc e some are fairly verbose 
already. 

>From 426e74cabb003eb5dc83adf347a5800d49bc87b7 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 18 Mar 2024 11:49:12 +
Subject: [PATCH 1/4] Start migrating away from the embedded assumption that
 the default AS **must** be 0.

---
 clang/lib/CodeGen/CGExprCXX.cpp  |  2 +-
 clang/lib/CodeGen/CodeGenModule.cpp  | 10 ++
 clang/lib/CodeGen/CodeGenTypeCache.h |  2 +-
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/clang/lib/CodeGen/CGExprCXX.cpp b/clang/lib/CodeGen/CGExprCXX.cpp
index 2adbef6d55122c..b9c920a81d79c9 100644
--- a/clang/lib/CodeGen/CGExprCXX.cpp
+++ b/clang/lib/CodeGen/CGExprCXX.cpp
@@ -,7 +,7 @@ static llvm::Value *EmitTypeidFromVTable(CodeGenFunction 
&CGF, const Expr *E,
 }
 
 llvm::Value *CodeGenFunction::EmitCXXTypeidExpr(const CXXTypeidExpr *E) {
-  llvm::Type *PtrTy = llvm::PointerType::getUnqual(getLLVMContext());
+  llvm::Type *PtrTy = Int8PtrTy;
   LangAS GlobAS = CGM.GetGlobalVarAddressSpace(nullptr);
 
   auto MaybeASCast = [=](auto &&TypeInfo) {
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 8ceecff28cbc63..7dd14d32aa2d03 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -364,7 +364,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   IntTy = llvm::IntegerType::get(LLVMContext, C.getTargetInfo().getIntWidth());
   IntPtrTy = llvm::IntegerType::get(LLVMContext,
 C.getTargetInfo().getMaxPointerWidth());
-  Int8PtrTy = llvm::PointerType::get(LLVMContext, 0);
+  Int8PtrTy = llvm::PointerType::get(
+  LLVMContext, C.getTargetInfo().getTargetAddressSpace(LangAS::Default));
   const llvm::DataLayout &DL = M.getDataLayout();
   AllocaInt8PtrTy =
   llvm::PointerType::get(LLVMContext, DL.getAllocaAddrSpace());
@@ -4512,9 +4513,10 @@ llvm::Constant *CodeGenModule::GetOrCreateLLVMFunction(
 IsIncompleteFunction = true;
   }
 
-  llvm::Function *F =
-  llvm::Function::Create(FTy, llvm::Function::ExternalLinkage,
- Entry ? StringRef() : MangledName, &getModule());
+  llvm::Function *F = llvm::Function::Create(
+  FTy, llvm::Function::ExternalLinkage,
+  getDataLayout().getProgramAddressSpace(),
+  Entry ? StringRef() : MangledName, &getModule());
 
   // Store the declaration associated with this function so it is potentially
   // updated by further declarations or definitions and emitted at the end.
diff --git a/clang/lib/CodeGen/CodeGenTypeCache.h 
b/clang/lib/CodeGen/CodeGenTypeCache.h
index 083d69214fb3c2..e273ebe3b060f2 100644
--- a/clang/lib/CodeGen/CodeGenTypeCache.h
+++ b/clang/lib/CodeGen/CodeGenTypeCache.h
@@ -51,7 +51,7 @@ struct CodeGenTypeCache {
 llvm::IntegerType *PtrDiffTy;
   };
 
-  /// void*, void** in address space 0
+  /// void*, void** in the target's default address space (often 0)
   union {
 llvm::PointerType *UnqualPtrTy;
 llvm::PointerType *VoidPtrTy;

>From 74ae6f52a5f84f8fc92135df3ff93a4a89b914ed Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 25 Mar 2024 10:55:22 +0200
Subject: [PATCH 2/4] Make querying the Global AS more robust, add 1 new test
 (WiP).

---
 clang/lib/CodeGen/CodeGenModule.cpp   | 10 ---
 clang/lib/CodeGen/ItaniumCXXABI.cpp   |  4 ++-
 ...x11-with-nonzero-default-address-space.cpp | 29 +++
 3 files changed, 38 insertions(+), 5 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/typeid-cxx11-with-nonzero-default-address-space.cpp

diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 63d54f9b1c0b60..39ccd40bf1adbb 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -371,8 +371,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   const llvm::DataLayout &DL = M.getDataLayout();
   AllocaInt8PtrTy =
   llvm::PointerType::get(LLVMContext, DL.getAllocaAddrSpace());
-  GlobalsInt8PtrTy =
-  llvm::PointerType::get(LLVMContext, DL.getDefaultGlobalsAddressSpace());
+  GlobalsInt8PtrTy = 

[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/88182

>From 426e74cabb003eb5dc83adf347a5800d49bc87b7 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 18 Mar 2024 11:49:12 +
Subject: [PATCH 1/5] Start migrating away from the embedded assumption that
 the default AS **must** be 0.

---
 clang/lib/CodeGen/CGExprCXX.cpp  |  2 +-
 clang/lib/CodeGen/CodeGenModule.cpp  | 10 ++
 clang/lib/CodeGen/CodeGenTypeCache.h |  2 +-
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/clang/lib/CodeGen/CGExprCXX.cpp b/clang/lib/CodeGen/CGExprCXX.cpp
index 2adbef6d55122c..b9c920a81d79c9 100644
--- a/clang/lib/CodeGen/CGExprCXX.cpp
+++ b/clang/lib/CodeGen/CGExprCXX.cpp
@@ -,7 +,7 @@ static llvm::Value *EmitTypeidFromVTable(CodeGenFunction 
&CGF, const Expr *E,
 }
 
 llvm::Value *CodeGenFunction::EmitCXXTypeidExpr(const CXXTypeidExpr *E) {
-  llvm::Type *PtrTy = llvm::PointerType::getUnqual(getLLVMContext());
+  llvm::Type *PtrTy = Int8PtrTy;
   LangAS GlobAS = CGM.GetGlobalVarAddressSpace(nullptr);
 
   auto MaybeASCast = [=](auto &&TypeInfo) {
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 8ceecff28cbc63..7dd14d32aa2d03 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -364,7 +364,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   IntTy = llvm::IntegerType::get(LLVMContext, C.getTargetInfo().getIntWidth());
   IntPtrTy = llvm::IntegerType::get(LLVMContext,
 C.getTargetInfo().getMaxPointerWidth());
-  Int8PtrTy = llvm::PointerType::get(LLVMContext, 0);
+  Int8PtrTy = llvm::PointerType::get(
+  LLVMContext, C.getTargetInfo().getTargetAddressSpace(LangAS::Default));
   const llvm::DataLayout &DL = M.getDataLayout();
   AllocaInt8PtrTy =
   llvm::PointerType::get(LLVMContext, DL.getAllocaAddrSpace());
@@ -4512,9 +4513,10 @@ llvm::Constant *CodeGenModule::GetOrCreateLLVMFunction(
 IsIncompleteFunction = true;
   }
 
-  llvm::Function *F =
-  llvm::Function::Create(FTy, llvm::Function::ExternalLinkage,
- Entry ? StringRef() : MangledName, &getModule());
+  llvm::Function *F = llvm::Function::Create(
+  FTy, llvm::Function::ExternalLinkage,
+  getDataLayout().getProgramAddressSpace(),
+  Entry ? StringRef() : MangledName, &getModule());
 
   // Store the declaration associated with this function so it is potentially
   // updated by further declarations or definitions and emitted at the end.
diff --git a/clang/lib/CodeGen/CodeGenTypeCache.h 
b/clang/lib/CodeGen/CodeGenTypeCache.h
index 083d69214fb3c2..e273ebe3b060f2 100644
--- a/clang/lib/CodeGen/CodeGenTypeCache.h
+++ b/clang/lib/CodeGen/CodeGenTypeCache.h
@@ -51,7 +51,7 @@ struct CodeGenTypeCache {
 llvm::IntegerType *PtrDiffTy;
   };
 
-  /// void*, void** in address space 0
+  /// void*, void** in the target's default address space (often 0)
   union {
 llvm::PointerType *UnqualPtrTy;
 llvm::PointerType *VoidPtrTy;

>From 74ae6f52a5f84f8fc92135df3ff93a4a89b914ed Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 25 Mar 2024 10:55:22 +0200
Subject: [PATCH 2/5] Make querying the Global AS more robust, add 1 new test
 (WiP).

---
 clang/lib/CodeGen/CodeGenModule.cpp   | 10 ---
 clang/lib/CodeGen/ItaniumCXXABI.cpp   |  4 ++-
 ...x11-with-nonzero-default-address-space.cpp | 29 +++
 3 files changed, 38 insertions(+), 5 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/typeid-cxx11-with-nonzero-default-address-space.cpp

diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 63d54f9b1c0b60..39ccd40bf1adbb 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -371,8 +371,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   const llvm::DataLayout &DL = M.getDataLayout();
   AllocaInt8PtrTy =
   llvm::PointerType::get(LLVMContext, DL.getAllocaAddrSpace());
-  GlobalsInt8PtrTy =
-  llvm::PointerType::get(LLVMContext, DL.getDefaultGlobalsAddressSpace());
+  GlobalsInt8PtrTy = llvm::PointerType::get(
+  LLVMContext, C.getTargetAddressSpace(GetGlobalVarAddressSpace(nullptr)));
   ConstGlobalsPtrTy = llvm::PointerType::get(
   LLVMContext, C.getTargetAddressSpace(GetGlobalConstantAddressSpace()));
   ASTAllocaAddressSpace = getTargetCodeGenInfo().getASTAllocaAddressSpace();
@@ -5018,7 +5018,9 @@ llvm::GlobalVariable 
*CodeGenModule::CreateOrReplaceCXXRuntimeVariable(
 
   // Create a new variable.
   GV = new llvm::GlobalVariable(getModule(), Ty, /*isConstant=*/true,
-Linkage, nullptr, Name);
+Linkage, nullptr, Name, nullptr,
+llvm::GlobalValue::NotThreadLocal,
+GlobalsInt8PtrTy->getAddressSpace());
 
   if (OldGV) {
 // Replace occurrences of the old variable if needed.
@@ -5133,7 +5135,7 @@ La

[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/88182

>From 426e74cabb003eb5dc83adf347a5800d49bc87b7 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 18 Mar 2024 11:49:12 +
Subject: [PATCH 1/6] Start migrating away from the embedded assumption that
 the default AS **must** be 0.

---
 clang/lib/CodeGen/CGExprCXX.cpp  |  2 +-
 clang/lib/CodeGen/CodeGenModule.cpp  | 10 ++
 clang/lib/CodeGen/CodeGenTypeCache.h |  2 +-
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/clang/lib/CodeGen/CGExprCXX.cpp b/clang/lib/CodeGen/CGExprCXX.cpp
index 2adbef6d55122c..b9c920a81d79c9 100644
--- a/clang/lib/CodeGen/CGExprCXX.cpp
+++ b/clang/lib/CodeGen/CGExprCXX.cpp
@@ -,7 +,7 @@ static llvm::Value *EmitTypeidFromVTable(CodeGenFunction 
&CGF, const Expr *E,
 }
 
 llvm::Value *CodeGenFunction::EmitCXXTypeidExpr(const CXXTypeidExpr *E) {
-  llvm::Type *PtrTy = llvm::PointerType::getUnqual(getLLVMContext());
+  llvm::Type *PtrTy = Int8PtrTy;
   LangAS GlobAS = CGM.GetGlobalVarAddressSpace(nullptr);
 
   auto MaybeASCast = [=](auto &&TypeInfo) {
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 8ceecff28cbc63..7dd14d32aa2d03 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -364,7 +364,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   IntTy = llvm::IntegerType::get(LLVMContext, C.getTargetInfo().getIntWidth());
   IntPtrTy = llvm::IntegerType::get(LLVMContext,
 C.getTargetInfo().getMaxPointerWidth());
-  Int8PtrTy = llvm::PointerType::get(LLVMContext, 0);
+  Int8PtrTy = llvm::PointerType::get(
+  LLVMContext, C.getTargetInfo().getTargetAddressSpace(LangAS::Default));
   const llvm::DataLayout &DL = M.getDataLayout();
   AllocaInt8PtrTy =
   llvm::PointerType::get(LLVMContext, DL.getAllocaAddrSpace());
@@ -4512,9 +4513,10 @@ llvm::Constant *CodeGenModule::GetOrCreateLLVMFunction(
 IsIncompleteFunction = true;
   }
 
-  llvm::Function *F =
-  llvm::Function::Create(FTy, llvm::Function::ExternalLinkage,
- Entry ? StringRef() : MangledName, &getModule());
+  llvm::Function *F = llvm::Function::Create(
+  FTy, llvm::Function::ExternalLinkage,
+  getDataLayout().getProgramAddressSpace(),
+  Entry ? StringRef() : MangledName, &getModule());
 
   // Store the declaration associated with this function so it is potentially
   // updated by further declarations or definitions and emitted at the end.
diff --git a/clang/lib/CodeGen/CodeGenTypeCache.h 
b/clang/lib/CodeGen/CodeGenTypeCache.h
index 083d69214fb3c2..e273ebe3b060f2 100644
--- a/clang/lib/CodeGen/CodeGenTypeCache.h
+++ b/clang/lib/CodeGen/CodeGenTypeCache.h
@@ -51,7 +51,7 @@ struct CodeGenTypeCache {
 llvm::IntegerType *PtrDiffTy;
   };
 
-  /// void*, void** in address space 0
+  /// void*, void** in the target's default address space (often 0)
   union {
 llvm::PointerType *UnqualPtrTy;
 llvm::PointerType *VoidPtrTy;

>From 74ae6f52a5f84f8fc92135df3ff93a4a89b914ed Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 25 Mar 2024 10:55:22 +0200
Subject: [PATCH 2/6] Make querying the Global AS more robust, add 1 new test
 (WiP).

---
 clang/lib/CodeGen/CodeGenModule.cpp   | 10 ---
 clang/lib/CodeGen/ItaniumCXXABI.cpp   |  4 ++-
 ...x11-with-nonzero-default-address-space.cpp | 29 +++
 3 files changed, 38 insertions(+), 5 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/typeid-cxx11-with-nonzero-default-address-space.cpp

diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 63d54f9b1c0b60..39ccd40bf1adbb 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -371,8 +371,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   const llvm::DataLayout &DL = M.getDataLayout();
   AllocaInt8PtrTy =
   llvm::PointerType::get(LLVMContext, DL.getAllocaAddrSpace());
-  GlobalsInt8PtrTy =
-  llvm::PointerType::get(LLVMContext, DL.getDefaultGlobalsAddressSpace());
+  GlobalsInt8PtrTy = llvm::PointerType::get(
+  LLVMContext, C.getTargetAddressSpace(GetGlobalVarAddressSpace(nullptr)));
   ConstGlobalsPtrTy = llvm::PointerType::get(
   LLVMContext, C.getTargetAddressSpace(GetGlobalConstantAddressSpace()));
   ASTAllocaAddressSpace = getTargetCodeGenInfo().getASTAllocaAddressSpace();
@@ -5018,7 +5018,9 @@ llvm::GlobalVariable 
*CodeGenModule::CreateOrReplaceCXXRuntimeVariable(
 
   // Create a new variable.
   GV = new llvm::GlobalVariable(getModule(), Ty, /*isConstant=*/true,
-Linkage, nullptr, Name);
+Linkage, nullptr, Name, nullptr,
+llvm::GlobalValue::NotThreadLocal,
+GlobalsInt8PtrTy->getAddressSpace());
 
   if (OldGV) {
 // Replace occurrences of the old variable if needed.
@@ -5133,7 +5135,7 @@ La

[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx commented:

> Why can't we just declare that the "generic" address-space must always be 0?  
> The specific numbers we use for address-spaces are completely arbitrary 
> anyway. 

If we were to do this, some targets would need to change to accomodate it; it 
would also probably break folks that are making naughty assumptions about the 
numbers actually meaning special things on this or that target - we can 
reasonably argue that's not quite kosher, but it'd cause some friction, I 
suspect. Personally I'd prefer that / think it'd have been really nice to 
legislate it as such back in the dawn of time. I will note that even if we do 
that we'll probably needs some bits from this patch (e.g. using the explicit 
`GlobalVariable` ctor or, alternatively, changing the default value for the AS 
used there).

https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx edited 
https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx commented:

> It's very uncommon for LLVM to need to come up with an address space on its 
> own, as opposed to just propagating the original address space of some memory 
> / operation as chosen by the frontend.  LLVM occasionally creates new storage 
> allocations, but usually they're (non-escaping) `alloca`s and therefore have 
> to be in the `alloca` AS.  The only situation I can think of where LLVM might 
> legitimately have to come with an address space is when LLVM decides to 
> introduce new global constants.  (I can't think of any transformation that 
> would introduce a *non-constant* global.)  So if you add a default AS to 
> `DataLayout`, please focus on that specifically and call it something like a 
> "preferred constant address space" rather than some sort of default AS.  The 
> default AS for pointer types and so on is really a frontend issue that's none 
> of LLVM's business to know about. 

I'm not quite sure how to parse this comment, could you explain what you have 
in mind here? The problem is precisely that the FE assumes 0 is fine / picks it 
by default, which ends up into dangerzones when e.g. a target happened to use 0 
to point to private (stack). I feel as if I'm missing the core of your comment 
though, so apologies in advance.

https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx edited 
https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx edited 
https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx commented:

> > querying a modules global AS from the target, rather than from the data 
> > layout (some DL's are incomplete, e.g. SPIRV's)

That is a bug in those DataLayouts 

Do we spell out the requirement somewhere? I am only asking because, for 
example, [neither SPIR nor SPIRV have a complete DL 
string](https://github.com/llvm/llvm-project/blob/main/clang/lib/Basic/Targets/SPIR.h).

https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

> > I'm not quite sure how to parse this comment, could you explain what you 
> > have in mind here? The problem is precisely that the FE assumes 0 is fine / 
> > picks it by default, which ends up into dangerzones when e.g. a target 
> > happened to use 0 to point to private (stack). I feel as if I'm missing the 
> > core of your comment though, so apologies in advance.
> 
> I'm just saying that I don't think it makes any sense to add a concept of a 
> default AS to LLVM. The "default" AS is a frontend concept, not a middle-end 
> / back-end concept. LLVM would only need a default AS if it were inventing a 
> memory allocation/operation from whole cloth, which is generally not 
> something LLVM should be doing except in local memory; the only legitimate 
> counter-example I can think of would be something like materializing a 
> constant into constant global memory, in which case LLVM needs to assign the 
> new constant an AS.

Ah, ok, I was misreading what you said. I agree; however, I believe that it 
might make sense to enforce / enshrine that `0` has to be generic i.e. targets 
shouldn't use `0` creatively, precisely so as to make it a safe default for 
FEs. Otherwise, if a target uses `0` to refer to a peculiar memory space (say, 
addresses are of a different size, there are some very odd allocation 
constraints etc.), the sort of issues that motivated this patch, emerge. I 
don't know how feasible this is / how much retroactive churn it'd cause.

https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

> > I'm not quite sure how to parse this comment, could you explain what you 
> > have in mind here? The problem is precisely that the FE assumes 0 is fine / 
> > picks it by default, which ends up into dangerzones when e.g. a target 
> > happened to use 0 to point to private (stack). I feel as if I'm missing the 
> > core of your comment though, so apologies in advance.
> 
> I'm just saying that I don't think it makes any sense to add a concept of a 
> default AS to LLVM. The "default" AS is a frontend-level concept about how to 
> interpret source-level types , not an LLVM-level concept. LLVM would only 
> need a default AS if it were inventing a memory allocation/operation from 
> whole cloth, which is generally not something LLVM should be doing except in 
> local memory; the only legitimate counter-example I can think of would be 
> something like materializing a constant into constant global memory, in which 
> case LLVM needs to assign the new constant an AS.

Thinking about this a bit more, is it not the case that today, we do have a _de 
facto_ default AS in LLVM, if only by virtue of the fact that an unqualified 
ptr ends up as a ptr to AS 0; unqualified ptrs are used all over the place / 
the FE is pretty liberal in their employ? So, it's possible that a large part 
of this pain is that we say stuff like the below:
```cpp
/// void*, void** in address space 0
 union {
llvm::PointerType *UnqualPtrTy;
```

https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx updated 
https://github.com/llvm/llvm-project/pull/88182

>From 426e74cabb003eb5dc83adf347a5800d49bc87b7 Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 18 Mar 2024 11:49:12 +
Subject: [PATCH 1/7] Start migrating away from the embedded assumption that
 the default AS **must** be 0.

---
 clang/lib/CodeGen/CGExprCXX.cpp  |  2 +-
 clang/lib/CodeGen/CodeGenModule.cpp  | 10 ++
 clang/lib/CodeGen/CodeGenTypeCache.h |  2 +-
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/clang/lib/CodeGen/CGExprCXX.cpp b/clang/lib/CodeGen/CGExprCXX.cpp
index 2adbef6d55122c..b9c920a81d79c9 100644
--- a/clang/lib/CodeGen/CGExprCXX.cpp
+++ b/clang/lib/CodeGen/CGExprCXX.cpp
@@ -,7 +,7 @@ static llvm::Value *EmitTypeidFromVTable(CodeGenFunction 
&CGF, const Expr *E,
 }
 
 llvm::Value *CodeGenFunction::EmitCXXTypeidExpr(const CXXTypeidExpr *E) {
-  llvm::Type *PtrTy = llvm::PointerType::getUnqual(getLLVMContext());
+  llvm::Type *PtrTy = Int8PtrTy;
   LangAS GlobAS = CGM.GetGlobalVarAddressSpace(nullptr);
 
   auto MaybeASCast = [=](auto &&TypeInfo) {
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 8ceecff28cbc63..7dd14d32aa2d03 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -364,7 +364,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   IntTy = llvm::IntegerType::get(LLVMContext, C.getTargetInfo().getIntWidth());
   IntPtrTy = llvm::IntegerType::get(LLVMContext,
 C.getTargetInfo().getMaxPointerWidth());
-  Int8PtrTy = llvm::PointerType::get(LLVMContext, 0);
+  Int8PtrTy = llvm::PointerType::get(
+  LLVMContext, C.getTargetInfo().getTargetAddressSpace(LangAS::Default));
   const llvm::DataLayout &DL = M.getDataLayout();
   AllocaInt8PtrTy =
   llvm::PointerType::get(LLVMContext, DL.getAllocaAddrSpace());
@@ -4512,9 +4513,10 @@ llvm::Constant *CodeGenModule::GetOrCreateLLVMFunction(
 IsIncompleteFunction = true;
   }
 
-  llvm::Function *F =
-  llvm::Function::Create(FTy, llvm::Function::ExternalLinkage,
- Entry ? StringRef() : MangledName, &getModule());
+  llvm::Function *F = llvm::Function::Create(
+  FTy, llvm::Function::ExternalLinkage,
+  getDataLayout().getProgramAddressSpace(),
+  Entry ? StringRef() : MangledName, &getModule());
 
   // Store the declaration associated with this function so it is potentially
   // updated by further declarations or definitions and emitted at the end.
diff --git a/clang/lib/CodeGen/CodeGenTypeCache.h 
b/clang/lib/CodeGen/CodeGenTypeCache.h
index 083d69214fb3c2..e273ebe3b060f2 100644
--- a/clang/lib/CodeGen/CodeGenTypeCache.h
+++ b/clang/lib/CodeGen/CodeGenTypeCache.h
@@ -51,7 +51,7 @@ struct CodeGenTypeCache {
 llvm::IntegerType *PtrDiffTy;
   };
 
-  /// void*, void** in address space 0
+  /// void*, void** in the target's default address space (often 0)
   union {
 llvm::PointerType *UnqualPtrTy;
 llvm::PointerType *VoidPtrTy;

>From 74ae6f52a5f84f8fc92135df3ff93a4a89b914ed Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Mon, 25 Mar 2024 10:55:22 +0200
Subject: [PATCH 2/7] Make querying the Global AS more robust, add 1 new test
 (WiP).

---
 clang/lib/CodeGen/CodeGenModule.cpp   | 10 ---
 clang/lib/CodeGen/ItaniumCXXABI.cpp   |  4 ++-
 ...x11-with-nonzero-default-address-space.cpp | 29 +++
 3 files changed, 38 insertions(+), 5 deletions(-)
 create mode 100644 
clang/test/CodeGenCXX/typeid-cxx11-with-nonzero-default-address-space.cpp

diff --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 63d54f9b1c0b60..39ccd40bf1adbb 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -371,8 +371,8 @@ CodeGenModule::CodeGenModule(ASTContext &C,
   const llvm::DataLayout &DL = M.getDataLayout();
   AllocaInt8PtrTy =
   llvm::PointerType::get(LLVMContext, DL.getAllocaAddrSpace());
-  GlobalsInt8PtrTy =
-  llvm::PointerType::get(LLVMContext, DL.getDefaultGlobalsAddressSpace());
+  GlobalsInt8PtrTy = llvm::PointerType::get(
+  LLVMContext, C.getTargetAddressSpace(GetGlobalVarAddressSpace(nullptr)));
   ConstGlobalsPtrTy = llvm::PointerType::get(
   LLVMContext, C.getTargetAddressSpace(GetGlobalConstantAddressSpace()));
   ASTAllocaAddressSpace = getTargetCodeGenInfo().getASTAllocaAddressSpace();
@@ -5018,7 +5018,9 @@ llvm::GlobalVariable 
*CodeGenModule::CreateOrReplaceCXXRuntimeVariable(
 
   // Create a new variable.
   GV = new llvm::GlobalVariable(getModule(), Ty, /*isConstant=*/true,
-Linkage, nullptr, Name);
+Linkage, nullptr, Name, nullptr,
+llvm::GlobalValue::NotThreadLocal,
+GlobalsInt8PtrTy->getAddressSpace());
 
   if (OldGV) {
 // Replace occurrences of the old variable if needed.
@@ -5133,7 +5135,7 @@ La

[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-09 Thread Alex Voicu via cfe-commits


@@ -4551,6 +4554,7 @@ llvm::Constant *CodeGenModule::GetOrCreateLLVMFunction(
 
   llvm::Function *F =
   llvm::Function::Create(FTy, llvm::Function::ExternalLinkage,
+ getDataLayout().getProgramAddressSpace(),

AlexVlx wrote:

Whoops, that's a mistake, apologies. Fixed.

https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-10 Thread Alex Voicu via cfe-commits


@@ -2216,7 +2216,7 @@ static llvm::Value *EmitTypeidFromVTable(CodeGenFunction 
&CGF, const Expr *E,
 }
 
 llvm::Value *CodeGenFunction::EmitCXXTypeidExpr(const CXXTypeidExpr *E) {
-  llvm::Type *PtrTy = llvm::PointerType::getUnqual(getLLVMContext());
+  llvm::Type *PtrTy = Int8PtrTy;

AlexVlx wrote:

It should but sadly it cannot, see our historical conversation here: 
. I've not got around to working on your 
suggestion there about supporting declaring a default AS for a class, so we 
have to keep things like so for now.

https://github.com/llvm/llvm-project/pull/88182
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-11 Thread Alex Voicu via cfe-commits


@@ -3581,8 +3582,10 @@ ConstantAddress 
CodeGenModule::GetAddrOfTemplateParamObject(
   isExternallyVisible(TPO->getLinkageAndVisibility().getLinkage())
   ? llvm::GlobalValue::LinkOnceODRLinkage
   : llvm::GlobalValue::InternalLinkage;
-  auto *GV = new llvm::GlobalVariable(getModule(), Init->getType(),
-  /*isConstant=*/true, Linkage, Init, 
Name);
+  auto *GV = new llvm::GlobalVariable(
+  getModule(), Init->getType(),
+  /*isConstant=*/true, Linkage, Init, Name, nullptr,
+  llvm::GlobalValue::NotThreadLocal, GlobalsInt8PtrTy->getAddressSpace());

AlexVlx wrote:

At the same time, it's not terribly costly (except for lines of code), and, 
unfortunately, there might be quite a few "broken" datalayouts (NVPTX is in the 
same boat, as is DirectX). I'm not entirely convinced the breakage is not an 
intentional design choice for pseudo/meta/abstract targets (abusing 
nomenclature, apologies). I'd submit that this (the changes/CodeGen) is still 
in Clang, which would still fall under the "the FE/language has to deal with 
ASes having special properties, LLVM shouldn't care", and it is an artifact of 
composing AS aware languages (OCL/CUDA/HIP etc.) with said abstract targets.

https://github.com/llvm/llvm-project/pull/88182
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[clang] [clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (PR #88455)

2024-04-11 Thread Alex Voicu via cfe-commits

https://github.com/AlexVlx created 
https://github.com/llvm/llvm-project/pull/88455

Currently neither the SPIR nor the SPIRV targets specify the AS for globals in 
their datalayout strings. This is problematic because CodeGen/LLVM will default 
to AS0 in this case, which produces Globals that end up in the private address 
space for e.g. OCL, HIPSPV or SYCL. This patch addresses it by completing the 
datalayout string.

>From 6d9e979f09802b94310017901b5b6b58bfa05c1c Mon Sep 17 00:00:00 2001
From: Alex Voicu 
Date: Fri, 12 Apr 2024 00:21:02 +0100
Subject: [PATCH] Add AS 1 for Globals in the SPIR & SPIRV datalayout strings.

---
 clang/lib/Basic/Targets/SPIR.h   | 8 
 clang/test/CodeGen/target-data.c | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index e25991e3dfe821..9a4a8b501460b6 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -259,7 +259,7 @@ class LLVM_LIBRARY_VISIBILITY SPIR32TargetInfo : public 
SPIRTargetInfo {
 SizeType = TargetInfo::UnsignedInt;
 PtrDiffType = IntPtrType = TargetInfo::SignedInt;
 resetDataLayout("e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-"
-"v96:128-v192:256-v256:256-v512:512-v1024:1024");
+"v96:128-v192:256-v256:256-v512:512-v1024:1024-G1");
   }
 
   void getTargetDefines(const LangOptions &Opts,
@@ -276,7 +276,7 @@ class LLVM_LIBRARY_VISIBILITY SPIR64TargetInfo : public 
SPIRTargetInfo {
 SizeType = TargetInfo::UnsignedLong;
 PtrDiffType = IntPtrType = TargetInfo::SignedLong;
 resetDataLayout("e-i64:64-v16:16-v24:32-v32:32-v48:64-"
-"v96:128-v192:256-v256:256-v512:512-v1024:1024");
+"v96:128-v192:256-v256:256-v512:512-v1024:1024-G1");
   }
 
   void getTargetDefines(const LangOptions &Opts,
@@ -336,7 +336,7 @@ class LLVM_LIBRARY_VISIBILITY SPIRV32TargetInfo : public 
BaseSPIRVTargetInfo {
 SizeType = TargetInfo::UnsignedInt;
 PtrDiffType = IntPtrType = TargetInfo::SignedInt;
 resetDataLayout("e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-"
-"v96:128-v192:256-v256:256-v512:512-v1024:1024");
+"v96:128-v192:256-v256:256-v512:512-v1024:1024-G1");
   }
 
   void getTargetDefines(const LangOptions &Opts,
@@ -357,7 +357,7 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64TargetInfo : public 
BaseSPIRVTargetInfo {
 SizeType = TargetInfo::UnsignedLong;
 PtrDiffType = IntPtrType = TargetInfo::SignedLong;
 resetDataLayout("e-i64:64-v16:16-v24:32-v32:32-v48:64-"
-"v96:128-v192:256-v256:256-v512:512-v1024:1024");
+"v96:128-v192:256-v256:256-v512:512-v1024:1024-G1");
   }
 
   void getTargetDefines(const LangOptions &Opts,
diff --git a/clang/test/CodeGen/target-data.c b/clang/test/CodeGen/target-data.c
index acff367d50eb91..c184f314f68f80 100644
--- a/clang/test/CodeGen/target-data.c
+++ b/clang/test/CodeGen/target-data.c
@@ -251,11 +251,11 @@
 
 // RUN: %clang_cc1 -triple spir-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=SPIR
-// SPIR: target datalayout = 
"e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+// SPIR: target datalayout = 
"e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"
 
 // RUN: %clang_cc1 -triple spir64-unknown -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=SPIR64
-// SPIR64: target datalayout = 
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+// SPIR64: target datalayout = 
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"
 
 // RUN: %clang_cc1 -triple bpfel -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=BPFEL

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[clang] [clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (PR #88455)

2024-04-12 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

> The change seems reasonable.
> 
> > CodeGen/LLVM will default to AS0 in this case, which produces Globals that 
> > end up in the private address space for e.g. OCL, HIPSPV or SYCL.
> 
> Can we add a test checking LLVM address space for globals emitted from 
> OCL/HIPSPV/SYCL, please? It's surprising that we need to modify only a 
> datalayout string check.

I can add another one here, but there's a bunch of them coming in #88182, which 
roundabout motivated this change. I'll emphasise that this is only a problem 
for things such as implicitly generated globals (e.g. VTables or typeinfo for 
classes etc.), so it's just a subset of all globals that are impacted (there 
are already some tests covering direct usage AFAICS).

https://github.com/llvm/llvm-project/pull/88455
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[clang] [Clang][CodeGen] Start migrating away from assuming the Default AS is 0 (PR #88182)

2024-04-14 Thread Alex Voicu via cfe-commits


@@ -3581,8 +3582,10 @@ ConstantAddress 
CodeGenModule::GetAddrOfTemplateParamObject(
   isExternallyVisible(TPO->getLinkageAndVisibility().getLinkage())
   ? llvm::GlobalValue::LinkOnceODRLinkage
   : llvm::GlobalValue::InternalLinkage;
-  auto *GV = new llvm::GlobalVariable(getModule(), Init->getType(),
-  /*isConstant=*/true, Linkage, Init, 
Name);
+  auto *GV = new llvm::GlobalVariable(
+  getModule(), Init->getType(),
+  /*isConstant=*/true, Linkage, Init, Name, nullptr,
+  llvm::GlobalValue::NotThreadLocal, GlobalsInt8PtrTy->getAddressSpace());

AlexVlx wrote:

I've opened #88455 to fix SPIR & SPIRV, which'll allow simplifying this one in 
the direction you have indicated.

https://github.com/llvm/llvm-project/pull/88182
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[clang] [clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (PR #88455)

2024-04-14 Thread Alex Voicu via cfe-commits

AlexVlx wrote:

> Thanks @AlexVlx for this change. This should work fine for 
> SPIRV-LLVM-Translator (and SPIR-V backend). Adding @michalpaszkowski for 
> input from SPIR-V backend side. Recently, this restriction on LLVM IR input 
> to our translator was docuemnted: 
> https://github.com/KhronosGroup/SPIRV-LLVM-Translator/blob/main/docs/SPIRVRepresentationInLLVM.rst#global-variables
>  _"A global variable resides in an address space, and the default address 
> space in LLVM is zero. The SPIR-V storage class represented by the zero LLVM 
> IR address spaces is Function. However, SPIR-V global variable declarations 
> are OpVariable instructions whose Storage Class cannot be Function. This 
> means that global variable declarations must always have an address space 
> specified and that address space cannot be 0."_ So, your change will help to 
> make the LLVM IR more suitable for the translator.
> 
> One quick pointer. I did notice a similar commit for the AMDGPU backend - 
> https://reviews.llvm.org/D84345 Here, there are some updates to the 
> llvm/lib/IR/AutoUpgrade.cpp. Do we need similar changes here?
> 
> Thanks

Thanks for the feedback, and great call on the AutoUpgrade part, I had not 
considered that at all; I believe we can just re-use the AMDGPU approach, and 
just adapt the predicate, but I'll give it a think and then update this PR 
accordingly.

https://github.com/llvm/llvm-project/pull/88455
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