r346124 - [mips][msa] Fix broken test
Author: abeserminji
Date: Mon Nov 5 02:22:51 2018
New Revision: 346124
URL: http://llvm.org/viewvc/llvm-project?rev=346124&view=rev
Log:
[mips][msa] Fix broken test
Test builtins-mips-msa-error.c wasn't reporting errors.
This patch fixes the test, so further test cases can be added.
Differential Revision: https://reviews.llvm.org/D53984
Modified:
cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
Modified: cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-mips-msa-error.c?rev=346124&r1=346123&r2=346124&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-mips-msa-error.c (original)
+++ cfe/trunk/test/CodeGen/builtins-mips-msa-error.c Mon Nov 5 02:22:51 2018
@@ -1,18 +1,22 @@
// REQUIRES: mips-registered-target
-// RUN: not %clang_cc1 -triple mips-unknown-linux-gnu -fsyntax-only %s \
+// RUN: %clang_cc1 -triple mips-unknown-linux-gnu -fsyntax-only %s \
// RUN:-target-feature +msa -target-feature +fp64 \
-// RUN:-mfloat-abi hard -o - 2>&1 | FileCheck %s
+// RUN:-verify -mfloat-abi hard -o - 2>&1
#include
void test(void) {
v16i8 v16i8_a = (v16i8) {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
15};
+ v16i8 v16i8_b = (v16i8) {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
29, 30, 31};
v16i8 v16i8_r;
v8i16 v8i16_a = (v8i16) {0, 1, 2, 3, 4, 5, 6, 7};
+ v8i16 v8i16_b = (v8i16) {8, 9, 10, 11, 12, 13, 14, 15};
v8i16 v8i16_r;
v4i32 v4i32_a = (v4i32) {0, 1, 2, 3};
+ v4i32 v4i32_b = (v4i32) {4, 5, 6, 7};
v4i32 v4i32_r;
v2i64 v2i64_a = (v2i64) {0, 1};
+ v2i64 v2i64_b = (v2i64) {3, 4};
v2i64 v2i64_r;
v16u8 v16u8_a = (v16u8) {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
15};
@@ -24,388 +28,385 @@ void test(void) {
v2u64 v2u64_a = (v2u64) {0, 1};
v2u64 v2u64_r;
-
int int_r;
long long ll_r;
- v16u8_r = __msa_addvi_b(v16u8_a, 32); // expected-error
{{argument should be a value from 0 to 31}}
- v8u16_r = __msa_addvi_h(v8u16_a, 32); // expected-error
{{argument should be a value from 0 to 31}}
- v4u32_r = __msa_addvi_w(v4u32_a, 32); // expected-error
{{argument should be a value from 0 to 31}}
- v2u64_r = __msa_addvi_d(v2u64_a, 32); // expected-error
{{argument should be a value from 0 to 31}}
-
- v16i8_r = __msa_andi_b(v16i8_a, 256); // CHECK: warning:
argument should be a value from 0 to 255}}
- v8i16_r = __msa_andi_b(v8i16_a, 256); // CHECK: warning:
argument should be a value from 0 to 255}}
- v4i32_r = __msa_andi_b(v4i32_a, 256); // CHECK: warning:
argument should be a value from 0 to 255}}
- v2i64_r = __msa_andi_b(v2i64_a, 256); // CHECK: warning:
argument should be a value from 0 to 255}}
-
- v16i8_r = __msa_bclri_b(v16i8_a, 8); // expected-error
{{argument should be a value from 0 to 7}}
- v8i16_r = __msa_bclri_h(v8i16_a, 16); // expected-error
{{argument should be a value from 0 to 15}}
- v4i32_r = __msa_bclri_w(v4i32_a, 33); // expected-error
{{argument should be a value from 0 to 31}}
- v2i64_r = __msa_bclri_d(v2i64_a, 64); // expected-error
{{argument should be a value from 0 to 63}}
-
- v16i8_r = __msa_binsli_b(v16i8_r, v16i8_a, 8); // expected-error
{{argument should be a value from 0 to 7}}
- v8i16_r = __msa_binsli_h(v8i16_r, v8i16_a, 16);// expected-error
{{argument should be a value from 0 to 15}}
- v4i32_r = __msa_binsli_w(v4i32_r, v4i32_a, 32);// expected-error
{{argument should be a value from 0 to 31}}
- v2i64_r = __msa_binsli_d(v2i64_r, v2i64_a, 64);// expected-error
{{argument should be a value from 0 to 63}}
-
- v16i8_r = __msa_binsri_b(v16i8_r, v16i8_a, 8); // expected-error
{{argument should be a value from 0 to 7}}
- v8i16_r = __msa_binsri_h(v8i16_r, v8i16_a, 16);// expected-error
{{argument should be a value from 0 to 15}}
- v4i32_r = __msa_binsri_w(v4i32_r, v4i32_a, 32);// expected-error
{{argument should be a value from 0 to 31}}
- v2i64_r = __msa_binsri_d(v2i64_r, v2i64_a, 64);// expected-error
{{argument should be a value from 0 to 63}}
-
- v16i8_r = __msa_bmnzi_b(v16i8_r, v16i8_a, 256);// expected-error
{{argument should be a value from 0 to 255}}
-
- v16i8_r = __msa_bmzi_b(v16i8_r, v16i8_a, 256); // expected-error
{{argument should be a value from 0 to 255}}
-
- v16i8_r = __msa_bnegi_b(v16i8_a, 8); // expected-error
{{argument should be a value from 0 to 7}}
- v8i16_r = __msa_bnegi_h(v8i16_a, 16); // expected-error
{{argument should be a value from 0 to 15}}
- v4i32_r = __msa_bnegi_w(v4i32_a, 32); // expected-error
{{argument should be a value from 0 to 31}}
- v2i64_r = __msa_bnegi_d(v2i64_a, 64); // expected-error
{{argument should be a
r346302 - [mips][msa] Fix msa_[st/ld] offset check
Author: abeserminji
Date: Wed Nov 7 03:37:05 2018
New Revision: 346302
URL: http://llvm.org/viewvc/llvm-project?rev=346302&view=rev
Log:
[mips][msa] Fix msa_[st/ld] offset check
This patch fixes a minimum divider for offset in intrinsics
msa_[st/ld]_[b/h/w/d], when value is known in compile time.
Differential revision: https://reviews.llvm.org/D54038
Modified:
cfe/trunk/lib/Sema/SemaChecking.cpp
cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
cfe/trunk/test/CodeGen/builtins-mips-msa.c
Modified: cfe/trunk/lib/Sema/SemaChecking.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaChecking.cpp?rev=346302&r1=346301&r2=346302&view=diff
==
--- cfe/trunk/lib/Sema/SemaChecking.cpp (original)
+++ cfe/trunk/lib/Sema/SemaChecking.cpp Wed Nov 7 03:37:05 2018
@@ -2992,14 +2992,14 @@ bool Sema::CheckMipsBuiltinFunctionCall(
case Mips::BI__builtin_msa_ldi_h:
case Mips::BI__builtin_msa_ldi_w:
case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break;
- case Mips::BI__builtin_msa_ld_b: i = 1; l = -512; u = 511; m = 16; break;
- case Mips::BI__builtin_msa_ld_h: i = 1; l = -1024; u = 1022; m = 16; break;
- case Mips::BI__builtin_msa_ld_w: i = 1; l = -2048; u = 2044; m = 16; break;
- case Mips::BI__builtin_msa_ld_d: i = 1; l = -4096; u = 4088; m = 16; break;
- case Mips::BI__builtin_msa_st_b: i = 2; l = -512; u = 511; m = 16; break;
- case Mips::BI__builtin_msa_st_h: i = 2; l = -1024; u = 1022; m = 16; break;
- case Mips::BI__builtin_msa_st_w: i = 2; l = -2048; u = 2044; m = 16; break;
- case Mips::BI__builtin_msa_st_d: i = 2; l = -4096; u = 4088; m = 16; break;
+ case Mips::BI__builtin_msa_ld_b: i = 1; l = -512; u = 511; m = 1; break;
+ case Mips::BI__builtin_msa_ld_h: i = 1; l = -1024; u = 1022; m = 2; break;
+ case Mips::BI__builtin_msa_ld_w: i = 1; l = -2048; u = 2044; m = 4; break;
+ case Mips::BI__builtin_msa_ld_d: i = 1; l = -4096; u = 4088; m = 8; break;
+ case Mips::BI__builtin_msa_st_b: i = 2; l = -512; u = 511; m = 1; break;
+ case Mips::BI__builtin_msa_st_h: i = 2; l = -1024; u = 1022; m = 2; break;
+ case Mips::BI__builtin_msa_st_w: i = 2; l = -2048; u = 2044; m = 4; break;
+ case Mips::BI__builtin_msa_st_d: i = 2; l = -4096; u = 4088; m = 8; break;
}
if (!m)
Modified: cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-mips-msa-error.c?rev=346302&r1=346301&r2=346302&view=diff
==
--- cfe/trunk/test/CodeGen/builtins-mips-msa-error.c (original)
+++ cfe/trunk/test/CodeGen/builtins-mips-msa-error.c Wed Nov 7 03:37:05 2018
@@ -112,9 +112,9 @@ void test(void) {
v4i32_r = __msa_insve_w(v4i32_r, 4, v4i32_a); // expected-error
{{argument value 4 is outside the valid range [0, 3]}}
v2i64_r = __msa_insve_d(v2i64_r, 2, v2i64_a); // expected-error
{{argument value 2 is outside the valid range [0, 1]}}
- v8i16_r = __msa_ld_h(&v8i16_a, 77);// expected-error
{{argument should be a multiple of 16}}
- v4i32_r = __msa_ld_w(&v4i32_a, 14);// expected-error
{{argument should be a multiple of 16}}
- v2i64_r = __msa_ld_d(&v2i64_a, 23);// expected-error
{{argument should be a multiple of 16}}
+ v8i16_r = __msa_ld_h(&v8i16_a, 77);// expected-error
{{argument should be a multiple of 2}}
+ v4i32_r = __msa_ld_w(&v4i32_a, 14);// expected-error
{{argument should be a multiple of 4}}
+ v2i64_r = __msa_ld_d(&v2i64_a, 23);// expected-error
{{argument should be a multiple of 8}}
v16i8_r = __msa_ld_b(&v16i8_a, 512); // expected-error
{{argument value 512 is outside the valid range [-512, 511]}}
v8i16_r = __msa_ld_h(&v8i16_a, 1024); // expected-error
{{argument value 1024 is outside the valid range [-1024, 1022]}}
@@ -199,9 +199,9 @@ void test(void) {
v4i32_r = __msa_srlri_w(v4i32_a, 32); // expected-error
{{argument value 32 is outside the valid range [0, 31]}}
v2i64_r = __msa_srlri_d(v2i64_a, 64); // expected-error
{{argument value 64 is outside the valid range [0, 63]}}
- __msa_st_h(v8i16_b, &v8i16_a, 51);// expected-error
{{argument should be a multiple of 16}}
- __msa_st_w(v4i32_b, &v4i32_a, 51);// expected-error
{{argument should be a multiple of 16}}
- __msa_st_d(v2i64_b, &v2i64_a, 12);// expected-error
{{argument should be a multiple of 16}}
+ __msa_st_h(v8i16_b, &v8i16_a, 51);// expected-error
{{argument should be a multiple of 2}}
+ __msa_st_w(v4i32_b, &v4i32_a, 51);// expected-error
{{argument should be a multiple of 4}}
+ __msa_st_d(v2i64_b, &v2i64_a, 12);// expected-error
{{argument should be a multiple of 8}}
__msa_st_b(v16i8_b, &v
r330118 - [mips] Prevent PIC to be set to level 2
Author: abeserminji
Date: Mon Apr 16 03:21:24 2018
New Revision: 330118
URL: http://llvm.org/viewvc/llvm-project?rev=330118&view=rev
Log:
[mips] Prevent PIC to be set to level 2
MIPS does not use PIC level 2 for historical reasons,
even with -fPIC/-mxgot/multigot options. This patch
prevents PIC to be set to level 2 for MIPS.
Differential Revision: https://reviews.llvm.org/D44381
Modified:
cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
cfe/trunk/test/Driver/pic.c
Modified: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp?rev=330118&r1=330117&r2=330118&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp Mon Apr 16 03:21:24 2018
@@ -1007,12 +1007,17 @@ tools::ParsePICArgs(const ToolChain &Too
if ((ROPI || RWPI) && (PIC || PIE))
ToolChain.getDriver().Diag(diag::err_drv_ropi_rwpi_incompatible_with_pic);
- // When targettng MIPS64 with N64, the default is PIC, unless -mno-abicalls
is
- // used.
- if ((Triple.getArch() == llvm::Triple::mips64 ||
- Triple.getArch() == llvm::Triple::mips64el) &&
- Args.hasArg(options::OPT_mno_abicalls))
-return std::make_tuple(llvm::Reloc::Static, 0U, false);
+ if (Triple.getArch() == llvm::Triple::mips ||
+ Triple.getArch() == llvm::Triple::mipsel ||
+ Triple.getArch() == llvm::Triple::mips64 ||
+ Triple.getArch() == llvm::Triple::mips64el) {
+// When targettng MIPS with -mno-abicalls, it's always static.
+if(Args.hasArg(options::OPT_mno_abicalls))
+ return std::make_tuple(llvm::Reloc::Static, 0U, false);
+// Unlike other architectures, MIPS, even with -fPIC/-mxgot/multigot,
+// does not use PIC level 2 for historical reasons.
+IsPICLevelTwo = false;
+ }
if (PIC)
return std::make_tuple(llvm::Reloc::PIC_, IsPICLevelTwo ? 2U : 1U, PIE);
Modified: cfe/trunk/test/Driver/pic.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/pic.c?rev=330118&r1=330117&r2=330118&view=diff
==
--- cfe/trunk/test/Driver/pic.c (original)
+++ cfe/trunk/test/Driver/pic.c Mon Apr 16 03:21:24 2018
@@ -292,9 +292,9 @@
// RUN: %clang -c %s -target mipsel-linux-android14 -### 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-PIC1
// RUN: %clang -c %s -target mipsel-linux-android16 -### 2>&1 \
-// RUN: | FileCheck %s --check-prefix=CHECK-PIE2
+// RUN: | FileCheck %s --check-prefix=CHECK-PIE1
// RUN: %clang -c %s -target mipsel-linux-android24 -### 2>&1 \
-// RUN: | FileCheck %s --check-prefix=CHECK-PIE2
+// RUN: | FileCheck %s --check-prefix=CHECK-PIE1
//
// 64-bit Android targets are always PIE.
// RUN: %clang -c %s -target aarch64-linux-android -### 2>&1 \
___
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r331636 - [mips] Improve handling of -fno-[pic/PIC] option
Author: abeserminji
Date: Mon May 7 07:19:54 2018
New Revision: 331636
URL: http://llvm.org/viewvc/llvm-project?rev=331636&view=rev
Log:
[mips] Improve handling of -fno-[pic/PIC] option
In order to disable PIC and to match GCC behaviour, -mno-abicalls
option is neccessary. When -fno-[pic/PIC] is used witout -mno-abicalls,
warning is reported. An error is reported when -fno-pic or -fno-PIC is
used in combination with -mabicalls.
Depends on D44381.
Differential Revision: https://reviews.llvm.org/D44684
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
cfe/trunk/test/Driver/mips-abicalls-warning.c
cfe/trunk/test/Driver/mips-as.c
cfe/trunk/test/Driver/mips-features.c
Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=331636&r1=331635&r2=331636&view=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Mon May 7 07:19:54
2018
@@ -339,10 +339,12 @@ def warn_drv_unsupported_longcalls : War
"ignoring '-mlong-calls' option as it is not currently supported with "
"%select{|the implicit usage of }0-mabicalls">,
InGroup;
-def warn_drv_unsupported_abicalls : Warning<
- "ignoring '-mabicalls' option as it cannot be used with "
- "non position-independent code and the N64 ABI">,
+def warn_drv_unsupported_pic_with_mabicalls : Warning<
+ "ignoring '%0' option as it cannot be used with "
+ "%select{implicit usage of|}1 -mabicalls and the N64 ABI">,
InGroup;
+def err_drv_unsupported_noabicalls_pic : Error<
+ "position-independent code requires â-mabicallsâ">;
def err_drv_unsupported_indirect_jump_opt : Error<
"'-mindirect-jump=%0' is unsupported with the '%1' architecture">;
def err_drv_unknown_indirect_jump_opt : Error<
Modified: cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp?rev=331636&r1=331635&r2=331636&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp Mon May 7 07:19:54 2018
@@ -214,6 +214,7 @@ void mips::getMIPSTargetFeatures(const D
// For case (a) we need to add +noabicalls for N64.
bool IsN64 = ABIName == "64";
+ bool IsPIC = false;
bool NonPIC = false;
Arg *LastPICArg = Args.getLastArg(options::OPT_fPIC, options::OPT_fno_PIC,
@@ -225,6 +226,9 @@ void mips::getMIPSTargetFeatures(const D
NonPIC =
(O.matches(options::OPT_fno_PIC) || O.matches(options::OPT_fno_pic) ||
O.matches(options::OPT_fno_PIE) || O.matches(options::OPT_fno_pie));
+IsPIC =
+(O.matches(options::OPT_fPIC) || O.matches(options::OPT_fpic) ||
+ O.matches(options::OPT_fPIE) || O.matches(options::OPT_fpie));
}
bool UseAbiCalls = false;
@@ -234,9 +238,14 @@ void mips::getMIPSTargetFeatures(const D
UseAbiCalls =
!ABICallsArg || ABICallsArg->getOption().matches(options::OPT_mabicalls);
- if (UseAbiCalls && IsN64 && NonPIC) {
-D.Diag(diag::warn_drv_unsupported_abicalls);
-UseAbiCalls = false;
+ if (IsN64 && NonPIC && (!ABICallsArg || UseAbiCalls)) {
+D.Diag(diag::warn_drv_unsupported_pic_with_mabicalls)
+<< LastPICArg->getAsString(Args) << (!ABICallsArg ? 0 : 1);
+NonPIC = false;
+ }
+
+ if (ABICallsArg && !UseAbiCalls && IsPIC) {
+D.Diag(diag::err_drv_unsupported_noabicalls_pic);
}
if (!UseAbiCalls)
Modified: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp?rev=331636&r1=331635&r2=331636&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp Mon May 7 07:19:54 2018
@@ -1018,6 +1018,14 @@ tools::ParsePICArgs(const ToolChain &Too
Triple.getArch() == llvm::Triple::mipsel ||
Triple.getArch() == llvm::Triple::mips64 ||
Triple.getArch() == llvm::Triple::mips64el) {
+StringRef CPUName;
+StringRef ABIName;
+mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
+// When targeting the N64 ABI, PIC is the default, except in the case
+// when the -mno-abicalls option is used. In that case we exit
+// at next check regardless of PIC being set below.
+if (ABIName == "n64")
+ PIC = true;
// When targettng MIPS with -mno-abicalls, it's always static.
if(Args.hasArg(options::OPT_mno_abicalls))
return std::make_tuple(llvm::Reloc::Static, 0U, false);
Modified: cfe/trunk/test/Driver/m
r331639 - Revert "[mips] Improve handling of -fno-[pic/PIC] option"
Author: abeserminji
Date: Mon May 7 07:28:42 2018
New Revision: 331639
URL: http://llvm.org/viewvc/llvm-project?rev=331639&view=rev
Log:
Revert "[mips] Improve handling of -fno-[pic/PIC] option"
This reverts commit r331636. Forgot to add the test case.
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
cfe/trunk/test/Driver/mips-abicalls-warning.c
cfe/trunk/test/Driver/mips-as.c
cfe/trunk/test/Driver/mips-features.c
Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=331639&r1=331638&r2=331639&view=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Mon May 7 07:28:42
2018
@@ -339,12 +339,10 @@ def warn_drv_unsupported_longcalls : War
"ignoring '-mlong-calls' option as it is not currently supported with "
"%select{|the implicit usage of }0-mabicalls">,
InGroup;
-def warn_drv_unsupported_pic_with_mabicalls : Warning<
- "ignoring '%0' option as it cannot be used with "
- "%select{implicit usage of|}1 -mabicalls and the N64 ABI">,
+def warn_drv_unsupported_abicalls : Warning<
+ "ignoring '-mabicalls' option as it cannot be used with "
+ "non position-independent code and the N64 ABI">,
InGroup;
-def err_drv_unsupported_noabicalls_pic : Error<
- "position-independent code requires â-mabicallsâ">;
def err_drv_unsupported_indirect_jump_opt : Error<
"'-mindirect-jump=%0' is unsupported with the '%1' architecture">;
def err_drv_unknown_indirect_jump_opt : Error<
Modified: cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp?rev=331639&r1=331638&r2=331639&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp Mon May 7 07:28:42 2018
@@ -214,7 +214,6 @@ void mips::getMIPSTargetFeatures(const D
// For case (a) we need to add +noabicalls for N64.
bool IsN64 = ABIName == "64";
- bool IsPIC = false;
bool NonPIC = false;
Arg *LastPICArg = Args.getLastArg(options::OPT_fPIC, options::OPT_fno_PIC,
@@ -226,9 +225,6 @@ void mips::getMIPSTargetFeatures(const D
NonPIC =
(O.matches(options::OPT_fno_PIC) || O.matches(options::OPT_fno_pic) ||
O.matches(options::OPT_fno_PIE) || O.matches(options::OPT_fno_pie));
-IsPIC =
-(O.matches(options::OPT_fPIC) || O.matches(options::OPT_fpic) ||
- O.matches(options::OPT_fPIE) || O.matches(options::OPT_fpie));
}
bool UseAbiCalls = false;
@@ -238,14 +234,9 @@ void mips::getMIPSTargetFeatures(const D
UseAbiCalls =
!ABICallsArg || ABICallsArg->getOption().matches(options::OPT_mabicalls);
- if (IsN64 && NonPIC && (!ABICallsArg || UseAbiCalls)) {
-D.Diag(diag::warn_drv_unsupported_pic_with_mabicalls)
-<< LastPICArg->getAsString(Args) << (!ABICallsArg ? 0 : 1);
-NonPIC = false;
- }
-
- if (ABICallsArg && !UseAbiCalls && IsPIC) {
-D.Diag(diag::err_drv_unsupported_noabicalls_pic);
+ if (UseAbiCalls && IsN64 && NonPIC) {
+D.Diag(diag::warn_drv_unsupported_abicalls);
+UseAbiCalls = false;
}
if (!UseAbiCalls)
Modified: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp?rev=331639&r1=331638&r2=331639&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp Mon May 7 07:28:42 2018
@@ -1018,14 +1018,6 @@ tools::ParsePICArgs(const ToolChain &Too
Triple.getArch() == llvm::Triple::mipsel ||
Triple.getArch() == llvm::Triple::mips64 ||
Triple.getArch() == llvm::Triple::mips64el) {
-StringRef CPUName;
-StringRef ABIName;
-mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
-// When targeting the N64 ABI, PIC is the default, except in the case
-// when the -mno-abicalls option is used. In that case we exit
-// at next check regardless of PIC being set below.
-if (ABIName == "n64")
- PIC = true;
// When targettng MIPS with -mno-abicalls, it's always static.
if(Args.hasArg(options::OPT_mno_abicalls))
return std::make_tuple(llvm::Reloc::Static, 0U, false);
Modified: cfe/trunk/test/Driver/mips-abicalls-warning.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/mips-abicalls-warning.c?rev=331639&r1=331638&r2=331639&view=diff
==
--- cfe/trunk/test/Driv
r331640 - [mips] Improve handling of -fno-[pic/PIC] option
Author: abeserminji
Date: Mon May 7 07:30:49 2018
New Revision: 331640
URL: http://llvm.org/viewvc/llvm-project?rev=331640&view=rev
Log:
[mips] Improve handling of -fno-[pic/PIC] option
In order to disable PIC and to match GCC behaviour, -mno-abicalls
option is neccessary. When -fno-[pic/PIC] is used witout -mno-abicalls,
warning is reported. An error is reported when -fno-pic or -fno-PIC is
used in combination with -mabicalls.
In this commit, test case is added.
Depends on D44381.
Differential Revision: https://reviews.llvm.org/D44684
Added:
cfe/trunk/test/Driver/mips-abicalls-error.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
cfe/trunk/test/Driver/mips-abicalls-warning.c
cfe/trunk/test/Driver/mips-as.c
cfe/trunk/test/Driver/mips-features.c
Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=331640&r1=331639&r2=331640&view=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Mon May 7 07:30:49
2018
@@ -339,10 +339,12 @@ def warn_drv_unsupported_longcalls : War
"ignoring '-mlong-calls' option as it is not currently supported with "
"%select{|the implicit usage of }0-mabicalls">,
InGroup;
-def warn_drv_unsupported_abicalls : Warning<
- "ignoring '-mabicalls' option as it cannot be used with "
- "non position-independent code and the N64 ABI">,
+def warn_drv_unsupported_pic_with_mabicalls : Warning<
+ "ignoring '%0' option as it cannot be used with "
+ "%select{implicit usage of|}1 -mabicalls and the N64 ABI">,
InGroup;
+def err_drv_unsupported_noabicalls_pic : Error<
+ "position-independent code requires â-mabicallsâ">;
def err_drv_unsupported_indirect_jump_opt : Error<
"'-mindirect-jump=%0' is unsupported with the '%1' architecture">;
def err_drv_unknown_indirect_jump_opt : Error<
Modified: cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp?rev=331640&r1=331639&r2=331640&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/Mips.cpp Mon May 7 07:30:49 2018
@@ -214,6 +214,7 @@ void mips::getMIPSTargetFeatures(const D
// For case (a) we need to add +noabicalls for N64.
bool IsN64 = ABIName == "64";
+ bool IsPIC = false;
bool NonPIC = false;
Arg *LastPICArg = Args.getLastArg(options::OPT_fPIC, options::OPT_fno_PIC,
@@ -225,6 +226,9 @@ void mips::getMIPSTargetFeatures(const D
NonPIC =
(O.matches(options::OPT_fno_PIC) || O.matches(options::OPT_fno_pic) ||
O.matches(options::OPT_fno_PIE) || O.matches(options::OPT_fno_pie));
+IsPIC =
+(O.matches(options::OPT_fPIC) || O.matches(options::OPT_fpic) ||
+ O.matches(options::OPT_fPIE) || O.matches(options::OPT_fpie));
}
bool UseAbiCalls = false;
@@ -234,9 +238,14 @@ void mips::getMIPSTargetFeatures(const D
UseAbiCalls =
!ABICallsArg || ABICallsArg->getOption().matches(options::OPT_mabicalls);
- if (UseAbiCalls && IsN64 && NonPIC) {
-D.Diag(diag::warn_drv_unsupported_abicalls);
-UseAbiCalls = false;
+ if (IsN64 && NonPIC && (!ABICallsArg || UseAbiCalls)) {
+D.Diag(diag::warn_drv_unsupported_pic_with_mabicalls)
+<< LastPICArg->getAsString(Args) << (!ABICallsArg ? 0 : 1);
+NonPIC = false;
+ }
+
+ if (ABICallsArg && !UseAbiCalls && IsPIC) {
+D.Diag(diag::err_drv_unsupported_noabicalls_pic);
}
if (!UseAbiCalls)
Modified: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp?rev=331640&r1=331639&r2=331640&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp Mon May 7 07:30:49 2018
@@ -1018,6 +1018,14 @@ tools::ParsePICArgs(const ToolChain &Too
Triple.getArch() == llvm::Triple::mipsel ||
Triple.getArch() == llvm::Triple::mips64 ||
Triple.getArch() == llvm::Triple::mips64el) {
+StringRef CPUName;
+StringRef ABIName;
+mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
+// When targeting the N64 ABI, PIC is the default, except in the case
+// when the -mno-abicalls option is used. In that case we exit
+// at next check regardless of PIC being set below.
+if (ABIName == "n64")
+ PIC = true;
// When targettng MIPS with -mno-abicalls, it's always static.
if(Args.hasArg(options::OPT_mno_abicalls))
r320354 - [mips] Minor update to the comment (NFC)
Author: abeserminji
Date: Mon Dec 11 04:12:16 2017
New Revision: 320354
URL: http://llvm.org/viewvc/llvm-project?rev=320354&view=rev
Log:
[mips] Minor update to the comment (NFC)
Modified:
cfe/trunk/lib/Basic/Targets/Mips.cpp
Modified: cfe/trunk/lib/Basic/Targets/Mips.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/Mips.cpp?rev=320354&r1=320353&r2=320354&view=diff
==
--- cfe/trunk/lib/Basic/Targets/Mips.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/Mips.cpp Mon Dec 11 04:12:16 2017
@@ -206,7 +206,7 @@ ArrayRef MipsTargetInfo::
}
bool MipsTargetInfo::validateTarget(DiagnosticsEngine &Diags) const {
- // microMIPS64R6 backend is removed
+ // microMIPS64R6 backend was removed.
if ((getTriple().getArch() == llvm::Triple::mips64 ||
getTriple().getArch() == llvm::Triple::mips64el) &&
IsMicromips && (ABI == "n32" || ABI == "n64")) {
___
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r320351 - [mips] Removal of microMIPS64R6
Author: abeserminji
Date: Mon Dec 11 03:29:17 2017
New Revision: 320351
URL: http://llvm.org/viewvc/llvm-project?rev=320351&view=rev
Log:
[mips] Removal of microMIPS64R6
microMIPS64R6 is removed from backend, and therefore frontend
will show an error when target is microMIPS64R6.
This is Clang part of patch.
Differential Revision: https://reviews.llvm.org/D35624
Modified:
cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td
cfe/trunk/lib/Basic/Targets/Mips.cpp
Modified: cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td?rev=320351&r1=320350&r2=320351&view=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td Mon Dec 11 03:29:17
2017
@@ -185,6 +185,8 @@ def note_invalid_subexpr_in_const_expr :
def err_target_unknown_triple : Error<
"unknown target triple '%0', please use -triple or -arch">;
def err_target_unknown_cpu : Error<"unknown target CPU '%0'">;
+def err_target_unsupported_cpu_for_micromips : Error<
+ "micromips is not supported for target CPU '%0'">;
def err_target_unknown_abi : Error<"unknown target ABI '%0'">;
def err_target_unsupported_abi : Error<"ABI '%0' is not supported on CPU
'%1'">;
def err_target_unsupported_abi_for_triple : Error<
Modified: cfe/trunk/lib/Basic/Targets/Mips.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/Mips.cpp?rev=320351&r1=320350&r2=320351&view=diff
==
--- cfe/trunk/lib/Basic/Targets/Mips.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/Mips.cpp Mon Dec 11 03:29:17 2017
@@ -206,6 +206,13 @@ ArrayRef MipsTargetInfo::
}
bool MipsTargetInfo::validateTarget(DiagnosticsEngine &Diags) const {
+ // microMIPS64R6 backend is removed
+ if ((getTriple().getArch() == llvm::Triple::mips64 ||
+ getTriple().getArch() == llvm::Triple::mips64el) &&
+ IsMicromips && (ABI == "n32" || ABI == "n64")) {
+Diags.Report(diag::err_target_unsupported_cpu_for_micromips) << CPU;
+return false;
+ }
// FIXME: It's valid to use O32 on a 64-bit CPU but the backend can't handle
//this yet. It's better to fail here than on the backend assertion.
if (processorSupportsGPR64() && ABI == "o32") {
___
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Re: [PATCH] D14149: __builtin_signbit fix for ppcf128 type
abeserminji updated this revision to Diff 38795.
abeserminji added a comment.
Modified comments as suggested by @rjmccall
Repository:
rL LLVM
http://reviews.llvm.org/D14149
Files:
lib/CodeGen/CGBuiltin.cpp
test/Analysis/builtin_signbit.cpp
Index: test/Analysis/builtin_signbit.cpp
===
--- test/Analysis/builtin_signbit.cpp
+++ test/Analysis/builtin_signbit.cpp
@@ -0,0 +1,43 @@
+// RUN: %clang -target powerpc-linux-gnu -emit-llvm -S -O0 %s -o - |
FileCheck %s --check-prefix=CHECK-BE --check-prefix=CHECK
+// RUN: %clang -target powerpc64-linux-gnu -emit-llvm -S -O0 %s -o - |
FileCheck %s --check-prefix=CHECK-BE --check-prefix=CHECK
+// RUN: %clang -target powerpc64le-linux-gnu -emit-llvm -S -O0 %s -o - |
FileCheck %s --check-prefix=CHECK-LE --check-prefix=CHECK
+
+bool b;
+double d = -1.0;
+long double ld = -1.0L;
+void test_signbit()
+{
+ b = __builtin_signbit(1.0L);
+ // CHECK: i128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+
+ b = __builtin_signbit(ld);
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+
+ b = __builtin_signbitf(1.0);
+ // CHECK: store i8 0
+
+ b = __builtin_signbitf(d);
+ // CHECK: bitcast
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE-NOT: lshr
+
+ b = __builtin_signbitl(1.0L);
+ // CHECK: i128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+
+ b = __builtin_signbitl(ld);
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -238,10 +238,20 @@
llvm::Type *IntTy = llvm::IntegerType::get(C, Width);
V = CGF.Builder.CreateBitCast(V, IntTy);
if (Ty->isPPC_FP128Ty()) {
-// The higher-order double comes first, and so we need to truncate the
-// pair to extract the overall sign. The order of the pair is the same
-// in both little- and big-Endian modes.
+// We want the sign bit of the higher-order double. The bitcast we just
+// did works as if the double-double was stored to memory and then
+// read as an i128. The "store" will put the higher-order double in the
+// lower address in both little- and big-Endian modes, but the "load"
+// will treat those bits as a different part of the i128: the low bits in
+// little-Endian, the high bits in big-Endian. Therefore, on big-Endian
+// we need to shift the high bits down to the low before truncating.
Width >>= 1;
+if (CGF.getTarget().isBigEndian()) {
+ Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width);
+ V = CGF.Builder.CreateLShr(V, ShiftCst);
+}
+// We're truncating value in order to extract the higher-order
+// double, which we'll be using to extract the sign from.
IntTy = llvm::IntegerType::get(C, Width);
V = CGF.Builder.CreateTrunc(V, IntTy);
}
Index: test/Analysis/builtin_signbit.cpp
===
--- test/Analysis/builtin_signbit.cpp
+++ test/Analysis/builtin_signbit.cpp
@@ -0,0 +1,43 @@
+// RUN: %clang -target powerpc-linux-gnu -emit-llvm -S -O0 %s -o - | FileCheck %s --check-prefix=CHECK-BE --check-prefix=CHECK
+// RUN: %clang -target powerpc64-linux-gnu -emit-llvm -S -O0 %s -o - | FileCheck %s --check-prefix=CHECK-BE --check-prefix=CHECK
+// RUN: %clang -target powerpc64le-linux-gnu -emit-llvm -S -O0 %s -o - | FileCheck %s --check-prefix=CHECK-LE --check-prefix=CHECK
+
+bool b;
+double d = -1.0;
+long double ld = -1.0L;
+void test_signbit()
+{
+ b = __builtin_signbit(1.0L);
+ // CHECK: i128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+
+ b = __builtin_signbit(ld);
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+
+ b = __builtin_signbitf(1.0);
+ // CHECK: store i8 0
+
+ b = __builtin_signbitf(d);
+ // CHECK: bitcast
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE-NOT: lshr
+
+ b = __builtin_signbitl(1.0L);
+ // CHECK: i128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+
+ b = __builtin_signbitl(ld);
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -238,10 +238,20 @@
llvm::Type *IntTy = llvm::IntegerType::get(C, Width);
V = CGF.Builder.CreateBitCast(V, IntTy);
if (Ty->isPPC_FP128Ty()) {
-// The higher-order double comes first, and so we need to truncate the
-// pair to extract the overall sign. The order of the pair is the same
-// in both little- and big-Endian modes.
+// We want the sign bit of the higher-or
Re: [PATCH] D14149: __builtin_signbit fix for ppcf128 type
abeserminji updated this revision to Diff 39513.
abeserminji marked 2 inline comments as done.
abeserminji added a comment.
Comment modified
Repository:
rL LLVM
http://reviews.llvm.org/D14149
Files:
lib/CodeGen/CGBuiltin.cpp
test/Analysis/builtin_signbit.cpp
Index: test/Analysis/builtin_signbit.cpp
===
--- test/Analysis/builtin_signbit.cpp
+++ test/Analysis/builtin_signbit.cpp
@@ -0,0 +1,43 @@
+// RUN: %clang -target powerpc-linux-gnu -emit-llvm -S -O0 %s -o - |
FileCheck %s --check-prefix=CHECK-BE --check-prefix=CHECK
+// RUN: %clang -target powerpc64-linux-gnu -emit-llvm -S -O0 %s -o - |
FileCheck %s --check-prefix=CHECK-BE --check-prefix=CHECK
+// RUN: %clang -target powerpc64le-linux-gnu -emit-llvm -S -O0 %s -o - |
FileCheck %s --check-prefix=CHECK-LE --check-prefix=CHECK
+
+bool b;
+double d = -1.0;
+long double ld = -1.0L;
+void test_signbit()
+{
+ b = __builtin_signbit(1.0L);
+ // CHECK: i128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+
+ b = __builtin_signbit(ld);
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+
+ b = __builtin_signbitf(1.0);
+ // CHECK: store i8 0
+
+ b = __builtin_signbitf(d);
+ // CHECK: bitcast
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE-NOT: lshr
+
+ b = __builtin_signbitl(1.0L);
+ // CHECK: i128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+
+ b = __builtin_signbitl(ld);
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -238,10 +238,20 @@
llvm::Type *IntTy = llvm::IntegerType::get(C, Width);
V = CGF.Builder.CreateBitCast(V, IntTy);
if (Ty->isPPC_FP128Ty()) {
-// The higher-order double comes first, and so we need to truncate the
-// pair to extract the overall sign. The order of the pair is the same
-// in both little- and big-Endian modes.
+// We want the sign bit of the higher-order double. The bitcast we just
+// did works as if the double-double was stored to memory and then
+// read as an i128. The "store" will put the higher-order double in the
+// lower address in both little- and big-Endian modes, but the "load"
+// will treat those bits as a different part of the i128: the low bits in
+// little-Endian, the high bits in big-Endian. Therefore, on big-Endian
+// we need to shift the high bits down to the low before truncating.
Width >>= 1;
+if (CGF.getTarget().isBigEndian()) {
+ Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width);
+ V = CGF.Builder.CreateLShr(V, ShiftCst);
+}
+// We are truncating value in order to extract the higher-order
+// double, which we will be using to extract the sign from.
IntTy = llvm::IntegerType::get(C, Width);
V = CGF.Builder.CreateTrunc(V, IntTy);
}
Index: test/Analysis/builtin_signbit.cpp
===
--- test/Analysis/builtin_signbit.cpp
+++ test/Analysis/builtin_signbit.cpp
@@ -0,0 +1,43 @@
+// RUN: %clang -target powerpc-linux-gnu -emit-llvm -S -O0 %s -o - | FileCheck %s --check-prefix=CHECK-BE --check-prefix=CHECK
+// RUN: %clang -target powerpc64-linux-gnu -emit-llvm -S -O0 %s -o - | FileCheck %s --check-prefix=CHECK-BE --check-prefix=CHECK
+// RUN: %clang -target powerpc64le-linux-gnu -emit-llvm -S -O0 %s -o - | FileCheck %s --check-prefix=CHECK-LE --check-prefix=CHECK
+
+bool b;
+double d = -1.0;
+long double ld = -1.0L;
+void test_signbit()
+{
+ b = __builtin_signbit(1.0L);
+ // CHECK: i128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+
+ b = __builtin_signbit(ld);
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+
+ b = __builtin_signbitf(1.0);
+ // CHECK: store i8 0
+
+ b = __builtin_signbitf(d);
+ // CHECK: bitcast
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE-NOT: lshr
+
+ b = __builtin_signbitl(1.0L);
+ // CHECK: i128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+
+ b = __builtin_signbitl(ld);
+ // CHECK: bitcast
+ // CHECK: ppc_fp128
+ // CHECK-LE-NOT: lshr
+ // CHECK-BE: lshr
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -238,10 +238,20 @@
llvm::Type *IntTy = llvm::IntegerType::get(C, Width);
V = CGF.Builder.CreateBitCast(V, IntTy);
if (Ty->isPPC_FP128Ty()) {
-// The higher-order double comes first, and so we need to truncate the
-// pair to extract the overall sign. The order of the pair is the same
-// in both little- and big-Endian modes.
+// We want the si
