[clang] [clang-repl] Set up executor implicitly to account for init PTUs (PR #84758)

[Vassil Vassilev via cfe-commits]

Stefan =?utf-8?q?Gränitz?= ,
Stefan =?utf-8?q?Gränitz?= ,
Stefan =?utf-8?q?Gränitz?= 
Message-ID:
In-Reply-To: 


vgvassilev wrote:

Can we create some text fixture that will do that automatically for us and 
reduce this copy-paste?

https://github.com/llvm/llvm-project/pull/84758
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[clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)

[Chen Zheng via cfe-commits]

https://github.com/chenzheng1030 updated 
https://github.com/llvm/llvm-project/pull/93267

>From 17505893b2b48969512e3c2e8433a6446429f65e Mon Sep 17 00:00:00 2001
From: Chen Zheng 
Date: Thu, 23 May 2024 22:59:48 -0400
Subject: [PATCH 1/2] [PowerPC] Diagnose musttail instead of crash inside
 backend

musttail does not often possible to generate on PPC targets as when calling
to a function defined in another model, PPC needs to restore the TOC
pointer. To restore the TOC pointer, compiler needs to emit a nop
after the function call to let linker generate codes to restore
TOC pointer. Tail call does not generate expected call sequence for this
case.

To avoid the crash inside the compiler backend, a diagnosis is added
in the frontend and in the backend, PPC will change the musttail to
tail.

Fixes #63214
---
 .../clang/Basic/DiagnosticSemaKinds.td|  5 +++
 clang/lib/CodeGen/CGCall.cpp  | 10 +-
 clang/test/SemaCXX/attr-musttail-ppc.cpp  | 12 +++
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp   | 15 +++--
 llvm/test/CodeGen/PowerPC/musttail-call.ll| 32 +++
 5 files changed, 70 insertions(+), 4 deletions(-)
 create mode 100644 clang/test/SemaCXX/attr-musttail-ppc.cpp
 create mode 100644 llvm/test/CodeGen/PowerPC/musttail-call.ll

diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index cc402182687f3..97f0cc4d9e004 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -3833,6 +3833,11 @@ def note_cannot_use_trivial_abi_reason : Note<
   "it is polymorphic|"
   "it has a base of a non-trivial class type|it has a virtual base|"
   "it has a __weak field|it has a field of a non-trivial class type}1">;
+def warn_ppc_musttail_maybe_ignored: Warning<
+  "'musttail' attribute may be ignored on ppc targets">,
+  InGroup;
+def err_aix_musttail_unsupported: Error<
+  "'musttail' attribute is not supported on AIX">;
 
 // Availability attribute
 def warn_availability_unknown_platform : Warning<
diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 97449a5e51e73..0b6eda004a590 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -26,6 +26,7 @@
 #include "clang/AST/DeclCXX.h"
 #include "clang/AST/DeclObjC.h"
 #include "clang/Basic/CodeGenOptions.h"
+#include "clang/Basic/DiagnosticSema.h"
 #include "clang/Basic/TargetInfo.h"
 #include "clang/CodeGen/CGFunctionInfo.h"
 #include "clang/CodeGen/SwiftCallingConv.h"
@@ -5747,8 +5748,15 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo 
&CallInfo,
   if (llvm::CallInst *Call = dyn_cast(CI)) {
 if (TargetDecl && TargetDecl->hasAttr())
   Call->setTailCallKind(llvm::CallInst::TCK_NoTail);
-else if (IsMustTail)
+else if (IsMustTail) {
+  if (getTarget().getTriple().isPPC()) {
+if (getTarget().getTriple().isOSAIX())
+  CGM.getDiags().Report(Loc, diag::err_aix_musttail_unsupported);
+else
+  CGM.getDiags().Report(Loc, diag::warn_ppc_musttail_maybe_ignored);
+  }
   Call->setTailCallKind(llvm::CallInst::TCK_MustTail);
+}
   }
 
   // Add metadata for calls to MSAllocator functions
diff --git a/clang/test/SemaCXX/attr-musttail-ppc.cpp 
b/clang/test/SemaCXX/attr-musttail-ppc.cpp
new file mode 100644
index 0..72b61adf7560b
--- /dev/null
+++ b/clang/test/SemaCXX/attr-musttail-ppc.cpp
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 %s -triple powerpc64-ibm-aix-xcoff -o /dev/null -emit-llvm 
-verify=aix
+// RUN: %clang_cc1 %s -triple powerpc-ibm-aix-xcoff -o /dev/null -emit-llvm 
-verify=aix
+// RUN: %clang_cc1 %s -triple powerpc64-unknown-linux-gnu -o /dev/null 
-emit-llvm -verify=linux
+// RUN: %clang_cc1 %s -triple powerpc-unknown-linux-gnu -o /dev/null 
-emit-llvm -verify=linux
+// RUN: %clang_cc1 %s -triple powerpc64le-unknown-linux-gnu -o /dev/null 
-emit-llvm -verify=linux
+
+int Func();
+int Func1() {
+  // linux-warning@+2 {{'musttail' attribute may be ignored on ppc targets}}
+  // aix-error@+1 {{'musttail' attribute is not supported on AIX}}
+  [[clang::musttail]] return Func();
+}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 8450ce9e0e3b3..59e4109e8e075 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -146,6 +146,10 @@ static cl::opt PPCAIXTLSModelOptUseIEForLDLimit(
 cl::desc("Set inclusive limit count of TLS local-dynamic access(es) in a "
  "function to use initial-exec"));
 
+static cl::opt AbortOnImpossibleMusttailCall(
+"ppc-abort-on-impossible-musttailcall", cl::init(false), cl::Hidden,
+cl::desc("Abort if any call marked as musttail is impossible."));
+
 STATISTIC(NumTailCalls, "Number of tail calls");
 STATISTIC(NumSiblingCalls, "Number of sibling calls");
 STATISTIC(ShufflesHandledWithVPERM,
@@ -5945,9 +5949,14 @@ 
PP

[clang] [clang-repl] Extend the C support. (PR #89804)

[Vassil Vassilev via cfe-commits]

vgvassilev wrote:

@mysterymath, @jasonmolenda, ping -- I am still stuck in reproducing this issue.

https://github.com/llvm/llvm-project/pull/89804
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

https://github.com/Discookie updated 
https://github.com/llvm/llvm-project/pull/91951

>From 69cbd3da19eb0f8eb6758782b46daf99b5b79ea4 Mon Sep 17 00:00:00 2001
From: Viktor 
Date: Mon, 6 May 2024 06:11:58 +
Subject: [PATCH 01/11] Add `bugprone-virtual-arithmetic` check

Finds pointer arithmetic on classes that declare a virtual function.
---
 .../bugprone/BugproneTidyModule.cpp   |  3 ++
 .../clang-tidy/bugprone/CMakeLists.txt|  1 +
 .../bugprone/VirtualArithmeticCheck.cpp   | 46 +
 .../bugprone/VirtualArithmeticCheck.h | 30 +++
 .../checks/bugprone/virtual-arithmetic.rst| 50 +++
 .../docs/clang-tidy/checks/list.rst   |  1 +
 .../checkers/bugprone/virtual-arithmetic.cpp  | 45 +
 7 files changed, 176 insertions(+)
 create mode 100644 
clang-tools-extra/clang-tidy/bugprone/VirtualArithmeticCheck.cpp
 create mode 100644 
clang-tools-extra/clang-tidy/bugprone/VirtualArithmeticCheck.h
 create mode 100644 
clang-tools-extra/docs/clang-tidy/checks/bugprone/virtual-arithmetic.rst
 create mode 100644 
clang-tools-extra/test/clang-tidy/checkers/bugprone/virtual-arithmetic.cpp

diff --git a/clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp 
b/clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
index 1b92d2e60cc17..813f6720074ae 100644
--- a/clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
+++ b/clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
@@ -91,6 +91,7 @@
 #include "UnusedRaiiCheck.h"
 #include "UnusedReturnValueCheck.h"
 #include "UseAfterMoveCheck.h"
+#include "VirtualArithmeticCheck.h"
 #include "VirtualNearMissCheck.h"
 
 namespace clang::tidy {
@@ -254,6 +255,8 @@ class BugproneModule : public ClangTidyModule {
 CheckFactories.registerCheck(
 "bugprone-unused-return-value");
 CheckFactories.registerCheck("bugprone-use-after-move");
+CheckFactories.registerCheck(
+"bugprone-virtual-arithmetic");
 CheckFactories.registerCheck(
 "bugprone-virtual-near-miss");
   }
diff --git a/clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt 
b/clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
index 2d303191f8865..ec1f3231e7990 100644
--- a/clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
+++ b/clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
@@ -87,6 +87,7 @@ add_clang_library(clangTidyBugproneModule
   UnusedRaiiCheck.cpp
   UnusedReturnValueCheck.cpp
   UseAfterMoveCheck.cpp
+  VirtualArithmeticCheck.cpp
   VirtualNearMissCheck.cpp
 
   LINK_LIBS
diff --git a/clang-tools-extra/clang-tidy/bugprone/VirtualArithmeticCheck.cpp 
b/clang-tools-extra/clang-tidy/bugprone/VirtualArithmeticCheck.cpp
new file mode 100644
index 0..57347af2b5881
--- /dev/null
+++ b/clang-tools-extra/clang-tidy/bugprone/VirtualArithmeticCheck.cpp
@@ -0,0 +1,46 @@
+//===--- VirtualArithmeticCheck.cpp - 
clang-tidy---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "VirtualArithmeticCheck.h"
+#include "clang/AST/ASTContext.h"
+#include "clang/ASTMatchers/ASTMatchFinder.h"
+
+using namespace clang::ast_matchers;
+
+namespace clang::tidy::bugprone {
+
+void VirtualArithmeticCheck::registerMatchers(MatchFinder *Finder) {
+  const auto PointerExprWithVirtualMethod =
+  expr(hasType(pointerType(pointee(hasDeclaration(
+   cxxRecordDecl(hasMethod(isVirtualAsWritten(
+  .bind("pointer");
+
+  const auto ArraySubscript =
+  arraySubscriptExpr(hasBase(PointerExprWithVirtualMethod));
+
+  const auto BinaryOperators =
+  binaryOperator(hasAnyOperatorName("+", "-", "+=", "-="),
+ hasEitherOperand(PointerExprWithVirtualMethod));
+
+  const auto UnaryOperators =
+  unaryOperator(hasAnyOperatorName("++", "--"),
+hasUnaryOperand(PointerExprWithVirtualMethod));
+
+  Finder->addMatcher(
+  expr(anyOf(ArraySubscript, BinaryOperators, UnaryOperators)), this);
+}
+
+void VirtualArithmeticCheck::check(const MatchFinder::MatchResult &Result) {
+  const auto *PointerExpr = Result.Nodes.getNodeAs("pointer");
+
+  diag(PointerExpr->getBeginLoc(),
+   "pointer arithmetic on class that declares a virtual function, "
+   "undefined behavior if the pointee is a different class");
+}
+
+} // namespace clang::tidy::bugprone
diff --git a/clang-tools-extra/clang-tidy/bugprone/VirtualArithmeticCheck.h 
b/clang-tools-extra/clang-tidy/bugprone/VirtualArithmeticCheck.h
new file mode 100644
index 0..6a5f86a391747
--- /dev/null
+++ b/clang-tools-extra/clang-tidy/bugprone/VirtualArithmeticCheck.h
@@ -0,0 +1,30 @@
+//===--- VirtualArithmeticCheck.h - clang-tidy---*- C++ 
-*-===//
+//
+/

[clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)

[Chen Zheng via cfe-commits]

https://github.com/chenzheng1030 updated 
https://github.com/llvm/llvm-project/pull/93267

>From 17505893b2b48969512e3c2e8433a6446429f65e Mon Sep 17 00:00:00 2001
From: Chen Zheng 
Date: Thu, 23 May 2024 22:59:48 -0400
Subject: [PATCH 1/2] [PowerPC] Diagnose musttail instead of crash inside
 backend

musttail does not often possible to generate on PPC targets as when calling
to a function defined in another model, PPC needs to restore the TOC
pointer. To restore the TOC pointer, compiler needs to emit a nop
after the function call to let linker generate codes to restore
TOC pointer. Tail call does not generate expected call sequence for this
case.

To avoid the crash inside the compiler backend, a diagnosis is added
in the frontend and in the backend, PPC will change the musttail to
tail.

Fixes #63214
---
 .../clang/Basic/DiagnosticSemaKinds.td|  5 +++
 clang/lib/CodeGen/CGCall.cpp  | 10 +-
 clang/test/SemaCXX/attr-musttail-ppc.cpp  | 12 +++
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp   | 15 +++--
 llvm/test/CodeGen/PowerPC/musttail-call.ll| 32 +++
 5 files changed, 70 insertions(+), 4 deletions(-)
 create mode 100644 clang/test/SemaCXX/attr-musttail-ppc.cpp
 create mode 100644 llvm/test/CodeGen/PowerPC/musttail-call.ll

diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index cc402182687f3..97f0cc4d9e004 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -3833,6 +3833,11 @@ def note_cannot_use_trivial_abi_reason : Note<
   "it is polymorphic|"
   "it has a base of a non-trivial class type|it has a virtual base|"
   "it has a __weak field|it has a field of a non-trivial class type}1">;
+def warn_ppc_musttail_maybe_ignored: Warning<
+  "'musttail' attribute may be ignored on ppc targets">,
+  InGroup;
+def err_aix_musttail_unsupported: Error<
+  "'musttail' attribute is not supported on AIX">;
 
 // Availability attribute
 def warn_availability_unknown_platform : Warning<
diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 97449a5e51e73..0b6eda004a590 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -26,6 +26,7 @@
 #include "clang/AST/DeclCXX.h"
 #include "clang/AST/DeclObjC.h"
 #include "clang/Basic/CodeGenOptions.h"
+#include "clang/Basic/DiagnosticSema.h"
 #include "clang/Basic/TargetInfo.h"
 #include "clang/CodeGen/CGFunctionInfo.h"
 #include "clang/CodeGen/SwiftCallingConv.h"
@@ -5747,8 +5748,15 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo 
&CallInfo,
   if (llvm::CallInst *Call = dyn_cast(CI)) {
 if (TargetDecl && TargetDecl->hasAttr())
   Call->setTailCallKind(llvm::CallInst::TCK_NoTail);
-else if (IsMustTail)
+else if (IsMustTail) {
+  if (getTarget().getTriple().isPPC()) {
+if (getTarget().getTriple().isOSAIX())
+  CGM.getDiags().Report(Loc, diag::err_aix_musttail_unsupported);
+else
+  CGM.getDiags().Report(Loc, diag::warn_ppc_musttail_maybe_ignored);
+  }
   Call->setTailCallKind(llvm::CallInst::TCK_MustTail);
+}
   }
 
   // Add metadata for calls to MSAllocator functions
diff --git a/clang/test/SemaCXX/attr-musttail-ppc.cpp 
b/clang/test/SemaCXX/attr-musttail-ppc.cpp
new file mode 100644
index 0..72b61adf7560b
--- /dev/null
+++ b/clang/test/SemaCXX/attr-musttail-ppc.cpp
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 %s -triple powerpc64-ibm-aix-xcoff -o /dev/null -emit-llvm 
-verify=aix
+// RUN: %clang_cc1 %s -triple powerpc-ibm-aix-xcoff -o /dev/null -emit-llvm 
-verify=aix
+// RUN: %clang_cc1 %s -triple powerpc64-unknown-linux-gnu -o /dev/null 
-emit-llvm -verify=linux
+// RUN: %clang_cc1 %s -triple powerpc-unknown-linux-gnu -o /dev/null 
-emit-llvm -verify=linux
+// RUN: %clang_cc1 %s -triple powerpc64le-unknown-linux-gnu -o /dev/null 
-emit-llvm -verify=linux
+
+int Func();
+int Func1() {
+  // linux-warning@+2 {{'musttail' attribute may be ignored on ppc targets}}
+  // aix-error@+1 {{'musttail' attribute is not supported on AIX}}
+  [[clang::musttail]] return Func();
+}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 8450ce9e0e3b3..59e4109e8e075 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -146,6 +146,10 @@ static cl::opt PPCAIXTLSModelOptUseIEForLDLimit(
 cl::desc("Set inclusive limit count of TLS local-dynamic access(es) in a "
  "function to use initial-exec"));
 
+static cl::opt AbortOnImpossibleMusttailCall(
+"ppc-abort-on-impossible-musttailcall", cl::init(false), cl::Hidden,
+cl::desc("Abort if any call marked as musttail is impossible."));
+
 STATISTIC(NumTailCalls, "Number of tail calls");
 STATISTIC(NumSiblingCalls, "Number of sibling calls");
 STATISTIC(ShufflesHandledWithVPERM,
@@ -5945,9 +5949,14 @@ 
PP

[clang] [llvm] [PowerPC] Diagnose musttail instead of crash inside backend (PR #93267)

[Chen Zheng via cfe-commits]

chenzheng1030 wrote:

Patch updated...

https://github.com/llvm/llvm-project/pull/93267
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

https://github.com/Discookie edited 
https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,30 @@
+//===--- VirtualArithmeticCheck.h - clang-tidy---*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_VIRTUAL_ARITHMETIC_H
+#define LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_VIRTUAL_ARITHMETIC_H
+
+#include "../ClangTidyCheck.h"
+
+namespace clang::tidy::bugprone {
+
+/// Finds pointer arithmetic on classes that declare a virtual function.

Discookie wrote:

Fixed.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,49 @@
+//===--- VirtualArithmeticCheck.cpp - 
clang-tidy---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "VirtualArithmeticCheck.h"
+#include "clang/AST/ASTContext.h"
+#include "clang/ASTMatchers/ASTMatchFinder.h"
+
+using namespace clang::ast_matchers;
+
+namespace clang::tidy::bugprone {
+
+void VirtualArithmeticCheck::registerMatchers(MatchFinder *Finder) {
+  const auto PointerExprWithVirtualMethod =
+  expr(hasType(pointerType(pointee(hasDeclaration(
+   cxxRecordDecl(hasMethod(isVirtualAsWritten(
+  .bind("pointer");
+
+  const auto ArraySubscript =
+  arraySubscriptExpr(hasBase(PointerExprWithVirtualMethod));
+
+  const auto BinaryOperators =
+  binaryOperator(hasAnyOperatorName("+", "-", "+=", "-="),
+ hasEitherOperand(PointerExprWithVirtualMethod));
+
+  const auto UnaryOperators =
+  unaryOperator(hasAnyOperatorName("++", "--"),
+hasUnaryOperand(PointerExprWithVirtualMethod));
+
+  Finder->addMatcher(
+  expr(anyOf(ArraySubscript, BinaryOperators, UnaryOperators)), this);
+}
+
+void VirtualArithmeticCheck::check(const MatchFinder::MatchResult &Result) {
+  const auto *PointerExpr = Result.Nodes.getNodeAs("pointer");
+  const CXXRecordDecl *PointeeType =
+  PointerExpr->getType()->getPointeeType()->getAsCXXRecordDecl();
+
+  diag(PointerExpr->getBeginLoc(),
+   "pointer arithmetic on class '%0' that declares a virtual function, "

Discookie wrote:

The issue may happen, but the check is only finding polymorphic objects, so no 
point in being more generic.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

https://github.com/Discookie commented:

Renamed the check as requested, and fixed what I reasonably could regarding the 
rest.

Added the check option `MatchInheritedVirtualFunctions` to differentiate 
between inherited and newly-declared virtual functions. Inherited has many more 
false positives on the projects I tested.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,59 @@
+// RUN: %check_clang_tidy %s bugprone-virtual-arithmetic %t
+
+class Base {
+public:  
+  virtual ~Base() {}
+};
+
+class Derived : public Base {};
+
+void operators() {
+  Base *b = new Derived[10];
+
+  b += 1;
+  // CHECK-MESSAGES: :[[@LINE-1]]:3: warning: pointer arithmetic on class 
'Base' that declares a virtual function, undefined behavior if the pointee is a 
different class [bugprone-virtual-arithmetic]
+
+  b = b + 1;
+  // CHECK-MESSAGES: :[[@LINE-1]]:7: warning: pointer arithmetic on class 
'Base' that declares a virtual function, undefined behavior if the pointee is a 
different class [bugprone-virtual-arithmetic]
+
+  b++;
+  // CHECK-MESSAGES: :[[@LINE-1]]:3: warning: pointer arithmetic on class 
'Base' that declares a virtual function, undefined behavior if the pointee is a 
different class [bugprone-virtual-arithmetic]

Discookie wrote:

Added, nice catch!

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,49 @@
+//===--- VirtualArithmeticCheck.cpp - 
clang-tidy---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "VirtualArithmeticCheck.h"
+#include "clang/AST/ASTContext.h"
+#include "clang/ASTMatchers/ASTMatchFinder.h"
+
+using namespace clang::ast_matchers;
+
+namespace clang::tidy::bugprone {
+
+void VirtualArithmeticCheck::registerMatchers(MatchFinder *Finder) {
+  const auto PointerExprWithVirtualMethod =
+  expr(hasType(pointerType(pointee(hasDeclaration(
+   cxxRecordDecl(hasMethod(isVirtualAsWritten(
+  .bind("pointer");

Discookie wrote:

I added a config option for matching inherited virtual functions.
It is quite noisy on the projects I ran it on, so I don't want to have it as 
default behavior.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,59 @@
+// RUN: %check_clang_tidy %s bugprone-virtual-arithmetic %t
+
+class Base {
+public:  
+  virtual ~Base() {}
+};
+
+class Derived : public Base {};
+
+void operators() {
+  Base *b = new Derived[10];
+
+  b += 1;
+  // CHECK-MESSAGES: :[[@LINE-1]]:3: warning: pointer arithmetic on class 
'Base' that declares a virtual function, undefined behavior if the pointee is a 
different class [bugprone-virtual-arithmetic]
+
+  b = b + 1;
+  // CHECK-MESSAGES: :[[@LINE-1]]:7: warning: pointer arithmetic on class 
'Base' that declares a virtual function, undefined behavior if the pointee is a 
different class [bugprone-virtual-arithmetic]
+
+  b++;
+  // CHECK-MESSAGES: :[[@LINE-1]]:3: warning: pointer arithmetic on class 
'Base' that declares a virtual function, undefined behavior if the pointee is a 
different class [bugprone-virtual-arithmetic]
+
+  b[1];
+  // CHECK-MESSAGES: :[[@LINE-1]]:3: warning: pointer arithmetic on class 
'Base' that declares a virtual function, undefined behavior if the pointee is a 
different class [bugprone-virtual-arithmetic]
+
+  delete[] static_cast(b);
+}
+
+void subclassWarnings() {
+  Base *b = new Base[10];
+
+  // False positive that's impossible to distinguish without
+  // path-sensitive analysis, but the code is bug-prone regardless.
+  b += 1;
+  // CHECK-MESSAGES: :[[@LINE-1]]:3: warning: pointer arithmetic on class 
'Base' that declares a virtual function
+
+  delete[] b;
+
+  // Common false positive is a class that overrides all parent functions.
+  Derived *d = new Derived[10];
+
+  d += 1;
+  // no-warning
+
+  delete[] d;
+}
+
+template 
+void templateWarning(T *t) {
+  // FIXME: Show the location of the template instantiation in diagnostic.
+  t += 1;
+  // CHECK-MESSAGES: :[[@LINE-1]]:3: warning: pointer arithmetic on class 
'Base' that declares a virtual function
+}
+
+void functionArgument(Base *b) {
+  b += 1;
+  // CHECK-MESSAGES: :[[@LINE-1]]:3: warning: pointer arithmetic on class 
'Base' that declares a virtual function
+
+  templateWarning(b);
+}

Discookie wrote:

Is this snippet meant to be `Object &ref`? Array subscript can't return a 
pointer AFAIK.
Other than that the case is not too distinct from `Derived d[10]; d += 1;` for 
which I have a test.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,49 @@
+//===--- VirtualArithmeticCheck.cpp - 
clang-tidy---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "VirtualArithmeticCheck.h"
+#include "clang/AST/ASTContext.h"
+#include "clang/ASTMatchers/ASTMatchFinder.h"
+
+using namespace clang::ast_matchers;
+
+namespace clang::tidy::bugprone {
+
+void VirtualArithmeticCheck::registerMatchers(MatchFinder *Finder) {
+  const auto PointerExprWithVirtualMethod =
+  expr(hasType(pointerType(pointee(hasDeclaration(
+   cxxRecordDecl(hasMethod(isVirtualAsWritten(
+  .bind("pointer");
+
+  const auto ArraySubscript =
+  arraySubscriptExpr(hasBase(PointerExprWithVirtualMethod));
+
+  const auto BinaryOperators =
+  binaryOperator(hasAnyOperatorName("+", "-", "+=", "-="),
+ hasEitherOperand(PointerExprWithVirtualMethod));
+
+  const auto UnaryOperators =
+  unaryOperator(hasAnyOperatorName("++", "--"),
+hasUnaryOperand(PointerExprWithVirtualMethod));
+
+  Finder->addMatcher(
+  expr(anyOf(ArraySubscript, BinaryOperators, UnaryOperators)), this);

Discookie wrote:

I added the type alias matches as requested, but the pure virtual functions 
matcher has the same limitation as the regular virtual functions matcher - it 
cannot transitively decide if a function is pure or not, so it's quite limited 
as well. Added tests and a FIXME for it.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,31 @@
+//===--- PointerArithmeticOnPolymorphicObjectCheck.h *- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef 
LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_POINTERARITHMETICONPOLYMORPHICOBJECTCHECK_H
+#define 
LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_POINTERARITHMETICONPOLYMORPHICOBJECTCHECK_H
+
+#include "../ClangTidyCheck.h"
+
+namespace clang::tidy::bugprone {
+
+/// Finds pointer arithmetic on classes that declare a virtual function.
+///
+/// For the user-facing documentation see:
+/// 
http://clang.llvm.org/extra/clang-tidy/checks/bugprone/pointer-arithmetic-on-polymorphic-object.html
+class PointerArithmeticOnPolymorphicObjectCheck : public ClangTidyCheck {
+public:
+  PointerArithmeticOnPolymorphicObjectCheck(StringRef Name,
+ClangTidyContext *Context)
+  : ClangTidyCheck(Name, Context) {}
+  void registerMatchers(ast_matchers::MatchFinder *Finder) override;
+  void check(const ast_matchers::MatchFinder::MatchResult &Result) override;
+};

Discookie wrote:

Added.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,30 @@
+//===--- VirtualArithmeticCheck.h - clang-tidy---*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_VIRTUAL_ARITHMETIC_H
+#define LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_VIRTUAL_ARITHMETIC_H
+
+#include "../ClangTidyCheck.h"
+
+namespace clang::tidy::bugprone {
+
+/// Finds pointer arithmetic on classes that declare a virtual function.
+///
+/// For the user-facing documentation see:
+/// 
http://clang.llvm.org/extra/clang-tidy/checks/bugprone/virtual-arithmetic.html
+class VirtualArithmeticCheck : public ClangTidyCheck {
+public:
+  VirtualArithmeticCheck(StringRef Name, ClangTidyContext *Context)
+  : ClangTidyCheck(Name, Context) {}
+  void registerMatchers(ast_matchers::MatchFinder *Finder) override;
+  void check(const ast_matchers::MatchFinder::MatchResult &Result) override;

Discookie wrote:

Added.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,50 @@
+.. title:: clang-tidy - bugprone-virtual-arithmetic
+
+bugprone-virtual-arithmetic
+===
+
+Warn if pointer arithmetic is performed on a class that declares a
+virtual function.
+
+Pointer arithmetic on polymorphic objects where the pointer's static type is 
+different from its dynamic type is undefined behavior.

Discookie wrote:

indeed it could happen to any different static and dynamic types, but here it's 
better to be more specific for clarity, I think. The check only aims to find 
bugprone polymorphic objects anyways.
(`expr.add` in the standard specifically highlights polymorphic objects as 
well.)

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-virtual-arithmetic` check (PR #91951)

[via cfe-commits]

@@ -0,0 +1,49 @@
+//===--- VirtualArithmeticCheck.cpp - 
clang-tidy---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "VirtualArithmeticCheck.h"
+#include "clang/AST/ASTContext.h"
+#include "clang/ASTMatchers/ASTMatchFinder.h"
+
+using namespace clang::ast_matchers;
+
+namespace clang::tidy::bugprone {
+
+void VirtualArithmeticCheck::registerMatchers(MatchFinder *Finder) {
+  const auto PointerExprWithVirtualMethod =
+  expr(hasType(pointerType(pointee(hasDeclaration(
+   cxxRecordDecl(hasMethod(isVirtualAsWritten(
+  .bind("pointer");
+
+  const auto ArraySubscript =
+  arraySubscriptExpr(hasBase(PointerExprWithVirtualMethod));
+
+  const auto BinaryOperators =
+  binaryOperator(hasAnyOperatorName("+", "-", "+=", "-="),
+ hasEitherOperand(PointerExprWithVirtualMethod));
+
+  const auto UnaryOperators =
+  unaryOperator(hasAnyOperatorName("++", "--"),
+hasUnaryOperand(PointerExprWithVirtualMethod));
+
+  Finder->addMatcher(
+  expr(anyOf(ArraySubscript, BinaryOperators, UnaryOperators)), this);
+}
+
+void VirtualArithmeticCheck::check(const MatchFinder::MatchResult &Result) {
+  const auto *PointerExpr = Result.Nodes.getNodeAs("pointer");
+  const CXXRecordDecl *PointeeType =
+  PointerExpr->getType()->getPointeeType()->getAsCXXRecordDecl();
+
+  diag(PointerExpr->getBeginLoc(),
+   "pointer arithmetic on class '%0' that declares a virtual function, "
+   "undefined behavior if the pointee is a different class")
+  << PointeeType->getName();

Discookie wrote:

In Tidy we can only use a single SourceLocation and not a range, right? I don't 
know of a way to feed ranges into it.

https://github.com/llvm/llvm-project/pull/91951
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[clang-tools-extra] [clang-tidy] Add `bugprone-pointer-arithmetic-on-polymorphic-object` check (PR #91951)

[via cfe-commits]

https://github.com/Discookie edited 
https://github.com/llvm/llvm-project/pull/91951
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[clang] [clang-format] Fix a regression in annotating class decl braces (PR #93657)

[Owen Pan via cfe-commits]

https://github.com/owenca created 
https://github.com/llvm/llvm-project/pull/93657

Fixes #93604.

>From e853b7d6f13c152bfe57cec28a75507422f52edb Mon Sep 17 00:00:00 2001
From: Owen Pan 
Date: Wed, 29 May 2024 00:49:10 -0700
Subject: [PATCH] [clang-format] Fix a regression in annotating class decl
 braces

Fixes #93604.
---
 clang/lib/Format/UnwrappedLineParser.cpp  | 3 +++
 clang/unittests/Format/TokenAnnotatorTest.cpp | 5 +
 2 files changed, 8 insertions(+)

diff --git a/clang/lib/Format/UnwrappedLineParser.cpp 
b/clang/lib/Format/UnwrappedLineParser.cpp
index b6f7567adc140..bf89def05bb2d 100644
--- a/clang/lib/Format/UnwrappedLineParser.cpp
+++ b/clang/lib/Format/UnwrappedLineParser.cpp
@@ -4026,6 +4026,9 @@ void UnwrappedLineParser::parseRecord(bool ParseAsExpr) {
   if (AngleNestingLevel == 0) {
 if (FormatTok->is(tok::colon)) {
   IsDerived = true;
+} else if (FormatTok->is(tok::identifier) &&
+   FormatTok->Previous->is(tok::coloncolon)) {
+  ClassName = FormatTok;
 } else if (FormatTok->is(tok::l_paren) &&
IsNonMacroIdentifier(FormatTok->Previous)) {
   break;
diff --git a/clang/unittests/Format/TokenAnnotatorTest.cpp 
b/clang/unittests/Format/TokenAnnotatorTest.cpp
index 6ea9c4a241dc5..3339a749df3a5 100644
--- a/clang/unittests/Format/TokenAnnotatorTest.cpp
+++ b/clang/unittests/Format/TokenAnnotatorTest.cpp
@@ -2914,6 +2914,11 @@ TEST_F(TokenAnnotatorTest, BraceKind) {
   EXPECT_BRACE_KIND(Tokens[5], BK_Block);
   EXPECT_BRACE_KIND(Tokens[6], BK_Block);
 
+  Tokens = annotate("struct Foo::Bar {};");
+  ASSERT_EQ(Tokens.size(), 11u) << Tokens;
+  EXPECT_BRACE_KIND(Tokens[7], BK_Block);
+  EXPECT_BRACE_KIND(Tokens[8], BK_Block);
+
   Tokens = annotate("struct Foo : Base {};");
   ASSERT_EQ(Tokens.size(), 11u) << Tokens;
   EXPECT_BRACE_KIND(Tokens[7], BK_Block);

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[clang] [clang-format] Fix a regression in annotating class decl braces (PR #93657)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang-format

Author: Owen Pan (owenca)


Changes

Fixes #93604.

---
Full diff: https://github.com/llvm/llvm-project/pull/93657.diff


2 Files Affected:

- (modified) clang/lib/Format/UnwrappedLineParser.cpp (+3) 
- (modified) clang/unittests/Format/TokenAnnotatorTest.cpp (+5) 


``diff
diff --git a/clang/lib/Format/UnwrappedLineParser.cpp 
b/clang/lib/Format/UnwrappedLineParser.cpp
index b6f7567adc140..bf89def05bb2d 100644
--- a/clang/lib/Format/UnwrappedLineParser.cpp
+++ b/clang/lib/Format/UnwrappedLineParser.cpp
@@ -4026,6 +4026,9 @@ void UnwrappedLineParser::parseRecord(bool ParseAsExpr) {
   if (AngleNestingLevel == 0) {
 if (FormatTok->is(tok::colon)) {
   IsDerived = true;
+} else if (FormatTok->is(tok::identifier) &&
+   FormatTok->Previous->is(tok::coloncolon)) {
+  ClassName = FormatTok;
 } else if (FormatTok->is(tok::l_paren) &&
IsNonMacroIdentifier(FormatTok->Previous)) {
   break;
diff --git a/clang/unittests/Format/TokenAnnotatorTest.cpp 
b/clang/unittests/Format/TokenAnnotatorTest.cpp
index 6ea9c4a241dc5..3339a749df3a5 100644
--- a/clang/unittests/Format/TokenAnnotatorTest.cpp
+++ b/clang/unittests/Format/TokenAnnotatorTest.cpp
@@ -2914,6 +2914,11 @@ TEST_F(TokenAnnotatorTest, BraceKind) {
   EXPECT_BRACE_KIND(Tokens[5], BK_Block);
   EXPECT_BRACE_KIND(Tokens[6], BK_Block);
 
+  Tokens = annotate("struct Foo::Bar {};");
+  ASSERT_EQ(Tokens.size(), 11u) << Tokens;
+  EXPECT_BRACE_KIND(Tokens[7], BK_Block);
+  EXPECT_BRACE_KIND(Tokens[8], BK_Block);
+
   Tokens = annotate("struct Foo : Base {};");
   ASSERT_EQ(Tokens.size(), 11u) << Tokens;
   EXPECT_BRACE_KIND(Tokens[7], BK_Block);

``




https://github.com/llvm/llvm-project/pull/93657
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[clang] [clang-repl] Set up executor implicitly to account for init PTUs (PR #84758)

[Stefan Gränitz via cfe-commits]

weliveindetail wrote:

Oh indeed, it seems we can decide to skip tests in `SetUp()`

```
class FooTest : public ::testing:Test {
protected:
void SetUp()
{
GTEST_SKIP();
}
};
```

https://github.com/llvm/llvm-project/pull/84758
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[clang] [clang-format] Fix a regression in annotating class decl braces (PR #93657)

[via cfe-commits]

https://github.com/mydeveloperday approved this pull request.


https://github.com/llvm/llvm-project/pull/93657
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[clang] [clang-format] add an option to insert a space only for non-code block empty braces, not for empty parentheses (PR #93634)

[via cfe-commits]

@@ -6237,18 +6237,30 @@ the configuration (without a prefix: ``Auto``).
true:  false:
x = ( int32 )y vs. x = (int32)y
 
-  * ``bool InEmptyParentheses`` Put a space in parentheses only if the 
parentheses are empty i.e. '()'
+  * ``bool InEmptyParentheses`` Put a space in parentheses and braces only if 
they are empty i.e. '()' or '{}'

mydeveloperday wrote:

it feels to me like InEmptyParentheses should be parenthese only but 
InEmptyBraces should inherit by default from InEmptyParentheses  if its not 
defined in the config?

https://github.com/llvm/llvm-project/pull/93634
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[clang] [clang-format] add an option to insert a space only for non-code block empty braces, not for empty parentheses (PR #93634)

[via cfe-commits]

@@ -6237,18 +6237,30 @@ the configuration (without a prefix: ``Auto``).
true:  false:
x = ( int32 )y vs. x = (int32)y
 
-  * ``bool InEmptyParentheses`` Put a space in parentheses only if the 
parentheses are empty i.e. '()'
+  * ``bool InEmptyParentheses`` Put a space in parentheses and braces only if 
they are empty i.e. '()' or '{}'

mydeveloperday wrote:

Did you make this change by hand or by using the script in  docs/tools

https://github.com/llvm/llvm-project/pull/93634
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[clang] [clang-format] add an option to insert a space only for non-code block empty braces, not for empty parentheses (PR #93634)

[via cfe-commits]

https://github.com/mydeveloperday commented:

I think you might be missing a change in the == operator for the Style

https://github.com/llvm/llvm-project/pull/93634
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[clang] [clang-format] Insert a space between a keyword and a literal (PR #93632)

[via cfe-commits]

https://github.com/mydeveloperday approved this pull request.


https://github.com/llvm/llvm-project/pull/93632
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[clang] [Clang] Static and explicit object member functions with the same parameter-type-lists (PR #93430)

[via cfe-commits]

https://github.com/cor3ntin updated 
https://github.com/llvm/llvm-project/pull/93430

>From 131f515c1341122896ea3c9624751a634db06cb7 Mon Sep 17 00:00:00 2001
From: Corentin Jabot 
Date: Mon, 27 May 2024 01:16:06 +0200
Subject: [PATCH 1/3] [Clang] Static and explicit object member functions with
 the same parameter-type-lists

Implement wg21.link/P2797.

Because taking the address of an explicit object member function
results in a function pointer, a call expression where
the id-expression is an explicit object member is made to behave
consistently with that model.

This change forces clang to perform overload resolution
in the presence of an ixpression of the form `(&Foo::bar)(args...)`,
which we previously failed to do consistently.
---
 clang/docs/ReleaseNotes.rst   |  3 +
 clang/include/clang/AST/ExprCXX.h |  4 +
 clang/include/clang/Sema/Overload.h   |  4 +
 clang/lib/Sema/SemaExpr.cpp   | 27 ++-
 clang/lib/Sema/SemaOverload.cpp   | 74 ---
 clang/test/CXX/drs/cwg1xx.cpp |  8 +-
 clang/test/CXX/drs/cwg26xx.cpp| 26 +++
 clang/test/CXX/drs/cwg2771.cpp| 18 +
 clang/test/CodeGenCXX/cxx2b-deducing-this.cpp | 20 +
 clang/test/SemaCXX/cxx2b-deducing-this.cpp| 27 +++
 clang/www/cxx_dr_status.html  |  6 +-
 clang/www/cxx_status.html |  2 +-
 12 files changed, 197 insertions(+), 22 deletions(-)
 create mode 100644 clang/test/CXX/drs/cwg2771.cpp

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 825e91876ffce..0a945a9989b0d 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -209,6 +209,9 @@ C++23 Feature Support
 - Added a ``__reference_converts_from_temporary`` builtin, completing the 
necessary compiler support for
   `P2255R2: Type trait to determine if a reference binds to a temporary 
`_.
 
+- Implemented `P2797R0: Static and explicit object member functions with the 
same parameter-type-lists `.
+  This completes the support for "deducing this".
+
 C++2c Feature Support
 ^
 
diff --git a/clang/include/clang/AST/ExprCXX.h 
b/clang/include/clang/AST/ExprCXX.h
index dbf693611a7fa..557e9fd99c293 100644
--- a/clang/include/clang/AST/ExprCXX.h
+++ b/clang/include/clang/AST/ExprCXX.h
@@ -3027,6 +3027,7 @@ class OverloadExpr : public Expr {
   struct FindResult {
 OverloadExpr *Expression;
 bool IsAddressOfOperand;
+bool IsAddressOfOperandWithParen;
 bool HasFormOfMemberPointer;
   };
 
@@ -3039,6 +3040,7 @@ class OverloadExpr : public Expr {
 assert(E->getType()->isSpecificBuiltinType(BuiltinType::Overload));
 
 FindResult Result;
+bool HasParen = isa(E);
 
 E = E->IgnoreParens();
 if (isa(E)) {
@@ -3048,10 +3050,12 @@ class OverloadExpr : public Expr {
 
   Result.HasFormOfMemberPointer = (E == Ovl && Ovl->getQualifier());
   Result.IsAddressOfOperand = true;
+  Result.IsAddressOfOperandWithParen = HasParen;
   Result.Expression = Ovl;
 } else {
   Result.HasFormOfMemberPointer = false;
   Result.IsAddressOfOperand = false;
+  Result.IsAddressOfOperandWithParen = false;
   Result.Expression = cast(E);
 }
 
diff --git a/clang/include/clang/Sema/Overload.h 
b/clang/include/clang/Sema/Overload.h
index 76311b00d2fc5..64cdd6cdf043d 100644
--- a/clang/include/clang/Sema/Overload.h
+++ b/clang/include/clang/Sema/Overload.h
@@ -899,6 +899,8 @@ class Sema;
 /// object argument.
 bool IgnoreObjectArgument : 1;
 
+bool TookAddressOfOverload : 1;
+
 /// True if the candidate was found using ADL.
 CallExpr::ADLCallKind IsADLCandidate : 1;
 
@@ -999,6 +1001,8 @@ class Sema;
   /// Initialization of an object of class type by constructor,
   /// using either a parenthesized or braced list of arguments.
   CSK_InitByConstructor,
+
+  CSK_AddressOfOverloadSet,
 };
 
 /// Information about operator rewrites to consider when adding operator
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 410f80ae864a1..15496f3323b02 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -5813,6 +5813,24 @@ static TypoCorrection TryTypoCorrectionForCall(Sema &S, 
Expr *Fn,
   return TypoCorrection();
 }
 
+static bool isParenthetizedAndQualifiedAddressOfExpr(Expr *Fn) {
+  if (!isa(Fn))
+return false;
+
+  Fn = Fn->IgnoreParens();
+  auto *UO = dyn_cast(Fn);
+  if (!UO)
+return false;
+  assert(cast(Fn)->getOpcode() == UO_AddrOf);
+  if (auto *DRE = dyn_cast(UO->getSubExpr()->IgnoreParens())) {
+return DRE->hasQualifier();
+  }
+  if (auto *OVL = dyn_cast(UO->getSubExpr()->IgnoreParens())) {
+return OVL->getQualifier();
+  }
+  return false;
+}
+
 /// ConvertArgumentsForCall - Converts the arguments specified in
 /// Args/NumArgs to the parameter types of

[clang] [Clang] Static and explicit object member functions with the same parameter-type-lists (PR #93430)

[via cfe-commits]

@@ -5813,6 +5813,24 @@ static TypoCorrection TryTypoCorrectionForCall(Sema &S, 
Expr *Fn,
   return TypoCorrection();
 }
 
+static bool isParenthetizedAndQualifiedAddressOfExpr(Expr *Fn) {
+  if (!isa(Fn))
+return false;
+
+  Fn = Fn->IgnoreParens();
+  auto *UO = dyn_cast(Fn);
+  if (!UO)
+return false;
+  assert(cast(Fn)->getOpcode() == UO_AddrOf);

cor3ntin wrote:

Yes (and some tests were crashing)

https://github.com/llvm/llvm-project/pull/93430
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[clang] [Clang] Static and explicit object member functions with the same parameter-type-lists (PR #93430)

[via cfe-commits]

https://github.com/cor3ntin updated 
https://github.com/llvm/llvm-project/pull/93430

>From 131f515c1341122896ea3c9624751a634db06cb7 Mon Sep 17 00:00:00 2001
From: Corentin Jabot 
Date: Mon, 27 May 2024 01:16:06 +0200
Subject: [PATCH 1/4] [Clang] Static and explicit object member functions with
 the same parameter-type-lists

Implement wg21.link/P2797.

Because taking the address of an explicit object member function
results in a function pointer, a call expression where
the id-expression is an explicit object member is made to behave
consistently with that model.

This change forces clang to perform overload resolution
in the presence of an ixpression of the form `(&Foo::bar)(args...)`,
which we previously failed to do consistently.
---
 clang/docs/ReleaseNotes.rst   |  3 +
 clang/include/clang/AST/ExprCXX.h |  4 +
 clang/include/clang/Sema/Overload.h   |  4 +
 clang/lib/Sema/SemaExpr.cpp   | 27 ++-
 clang/lib/Sema/SemaOverload.cpp   | 74 ---
 clang/test/CXX/drs/cwg1xx.cpp |  8 +-
 clang/test/CXX/drs/cwg26xx.cpp| 26 +++
 clang/test/CXX/drs/cwg2771.cpp| 18 +
 clang/test/CodeGenCXX/cxx2b-deducing-this.cpp | 20 +
 clang/test/SemaCXX/cxx2b-deducing-this.cpp| 27 +++
 clang/www/cxx_dr_status.html  |  6 +-
 clang/www/cxx_status.html |  2 +-
 12 files changed, 197 insertions(+), 22 deletions(-)
 create mode 100644 clang/test/CXX/drs/cwg2771.cpp

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 825e91876ffce..0a945a9989b0d 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -209,6 +209,9 @@ C++23 Feature Support
 - Added a ``__reference_converts_from_temporary`` builtin, completing the 
necessary compiler support for
   `P2255R2: Type trait to determine if a reference binds to a temporary 
`_.
 
+- Implemented `P2797R0: Static and explicit object member functions with the 
same parameter-type-lists `.
+  This completes the support for "deducing this".
+
 C++2c Feature Support
 ^
 
diff --git a/clang/include/clang/AST/ExprCXX.h 
b/clang/include/clang/AST/ExprCXX.h
index dbf693611a7fa..557e9fd99c293 100644
--- a/clang/include/clang/AST/ExprCXX.h
+++ b/clang/include/clang/AST/ExprCXX.h
@@ -3027,6 +3027,7 @@ class OverloadExpr : public Expr {
   struct FindResult {
 OverloadExpr *Expression;
 bool IsAddressOfOperand;
+bool IsAddressOfOperandWithParen;
 bool HasFormOfMemberPointer;
   };
 
@@ -3039,6 +3040,7 @@ class OverloadExpr : public Expr {
 assert(E->getType()->isSpecificBuiltinType(BuiltinType::Overload));
 
 FindResult Result;
+bool HasParen = isa(E);
 
 E = E->IgnoreParens();
 if (isa(E)) {
@@ -3048,10 +3050,12 @@ class OverloadExpr : public Expr {
 
   Result.HasFormOfMemberPointer = (E == Ovl && Ovl->getQualifier());
   Result.IsAddressOfOperand = true;
+  Result.IsAddressOfOperandWithParen = HasParen;
   Result.Expression = Ovl;
 } else {
   Result.HasFormOfMemberPointer = false;
   Result.IsAddressOfOperand = false;
+  Result.IsAddressOfOperandWithParen = false;
   Result.Expression = cast(E);
 }
 
diff --git a/clang/include/clang/Sema/Overload.h 
b/clang/include/clang/Sema/Overload.h
index 76311b00d2fc5..64cdd6cdf043d 100644
--- a/clang/include/clang/Sema/Overload.h
+++ b/clang/include/clang/Sema/Overload.h
@@ -899,6 +899,8 @@ class Sema;
 /// object argument.
 bool IgnoreObjectArgument : 1;
 
+bool TookAddressOfOverload : 1;
+
 /// True if the candidate was found using ADL.
 CallExpr::ADLCallKind IsADLCandidate : 1;
 
@@ -999,6 +1001,8 @@ class Sema;
   /// Initialization of an object of class type by constructor,
   /// using either a parenthesized or braced list of arguments.
   CSK_InitByConstructor,
+
+  CSK_AddressOfOverloadSet,
 };
 
 /// Information about operator rewrites to consider when adding operator
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 410f80ae864a1..15496f3323b02 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -5813,6 +5813,24 @@ static TypoCorrection TryTypoCorrectionForCall(Sema &S, 
Expr *Fn,
   return TypoCorrection();
 }
 
+static bool isParenthetizedAndQualifiedAddressOfExpr(Expr *Fn) {
+  if (!isa(Fn))
+return false;
+
+  Fn = Fn->IgnoreParens();
+  auto *UO = dyn_cast(Fn);
+  if (!UO)
+return false;
+  assert(cast(Fn)->getOpcode() == UO_AddrOf);
+  if (auto *DRE = dyn_cast(UO->getSubExpr()->IgnoreParens())) {
+return DRE->hasQualifier();
+  }
+  if (auto *OVL = dyn_cast(UO->getSubExpr()->IgnoreParens())) {
+return OVL->getQualifier();
+  }
+  return false;
+}
+
 /// ConvertArgumentsForCall - Converts the arguments specified in
 /// Args/NumArgs to the parameter types of

[clang-tools-extra] [clangd] Add config option to allow detection of unused system headers (PR #87208)

[Vadim D. via cfe-commits]

vvd170501 wrote:

@HighCommander4, overall it looks good, but I'd replace "enables 
include-cleaner checks" with "enables unused include check", because the option 
doesn't affect missing include check.

https://github.com/llvm/llvm-project/pull/87208
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[clang] [clang/www/get_started.html] Use newer `cmake` syntax (PR #93503)

[Vlad Serebrennikov via cfe-commits]

https://github.com/Endilll edited 
https://github.com/llvm/llvm-project/pull/93503
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[clang] [clang/www/get_started.html] Use newer `cmake` syntax (PR #93503)

[Vlad Serebrennikov via cfe-commits]

@@ -67,15 +67,13 @@ On Unix-like Systems
   Build LLVM and Clang:
   
 cd llvm-project
-mkdir build (in-tree build is not supported)
-cd build
 This builds both LLVM and Clang in release mode. Alternatively, if
 you need a debug build, switch Release to Debug. See
 https://llvm.org/docs/CMake.html#frequently-used-cmake-variables";>frequently
 used cmake variables
 for more options.
 
-cmake -DLLVM_ENABLE_PROJECTS=clang -DCMAKE_BUILD_TYPE=Release -G 
"Unix Makefiles" ../llvm

Endilll wrote:

Yeah, instead of spreading the complexity between three lines, it's now 
concentrated in one.
I'd expect users to be more familiar with `cd` and `mkdir` than with `-S` and 
`-B`, so this change would make the docs less accessible.

https://github.com/llvm/llvm-project/pull/93503
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[clang] [clang/www/get_started.html] Use newer `cmake` syntax (PR #93503)

[Vlad Serebrennikov via cfe-commits]

https://github.com/Endilll requested changes to this pull request.

I'm fine with `cmake --build`, but I don't think that replacing `cd` with `-S` 
and `-B` is an improvement.

https://github.com/llvm/llvm-project/pull/93503
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[clang] [analyzer] New optin.taint.TaintAlloc checker for catching unbounded memory allocation calls (PR #92420)

[Donát Nagy via cfe-commits]

https://github.com/NagyDonat edited 
https://github.com/llvm/llvm-project/pull/92420
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[clang] [analyzer] New optin.taint.TaintAlloc checker for catching unbounded memory allocation calls (PR #92420)

[Donát Nagy via cfe-commits]

https://github.com/NagyDonat approved this pull request.

I'd say that the commit is acceptable as it is now, but I added several inline 
comments for minor prettification issues.

https://github.com/llvm/llvm-project/pull/92420
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[clang] [analyzer] New optin.taint.TaintAlloc checker for catching unbounded memory allocation calls (PR #92420)

[Donát Nagy via cfe-commits]

@@ -938,6 +938,53 @@ optin.portability.UnixAPI
 "
 Finds implementation-defined behavior in UNIX/Posix functions.
 
+.. _optin-taint-TaintAlloc:
+
+optin.taint.TaintAlloc (C, C++)
+"""
+
+This checker warns for cases when the ``size`` parameter of the ``malloc`` ,
+``calloc``, ``realloc``, ``alloca`` or the size parameter of the
+array new C++ operator is tainted (potentially attacker controlled).
+If an attacker can inject a large value as the size parameter, memory 
exhaustion
+denial of service attack can be carried out.
+
+The ``alpha.security.taint.TaintPropagation`` checker also needs to be enabled 
for
+this checker to give warnings.
+
+The analyzer emits warning only if it cannot prove that the size parameter is
+within reasonable bounds (``<= SIZE_MAX/4``). This functionality partially
+covers the SEI Cert coding standard rule `INT04-C
+`_.
+
+You can silence this warning either by bound checking the ``size`` parameter, 
or
+by explicitly marking the ``size`` parameter as sanitized. See the
+:ref:`alpha-security-taint-TaintPropagation` checker for more details.
+
+.. code-block:: c
+
+  void t1(void) {

NagyDonat wrote:

```suggestion
  void vulnerable(void) {
```

https://github.com/llvm/llvm-project/pull/92420
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[clang] [analyzer] New optin.taint.TaintAlloc checker for catching unbounded memory allocation calls (PR #92420)

[Donát Nagy via cfe-commits]

@@ -938,6 +938,53 @@ optin.portability.UnixAPI
 "
 Finds implementation-defined behavior in UNIX/Posix functions.
 
+.. _optin-taint-TaintAlloc:
+
+optin.taint.TaintAlloc (C, C++)
+"""
+
+This checker warns for cases when the ``size`` parameter of the ``malloc`` ,
+``calloc``, ``realloc``, ``alloca`` or the size parameter of the
+array new C++ operator is tainted (potentially attacker controlled).
+If an attacker can inject a large value as the size parameter, memory 
exhaustion
+denial of service attack can be carried out.
+
+The ``alpha.security.taint.TaintPropagation`` checker also needs to be enabled 
for
+this checker to give warnings.
+
+The analyzer emits warning only if it cannot prove that the size parameter is
+within reasonable bounds (``<= SIZE_MAX/4``). This functionality partially
+covers the SEI Cert coding standard rule `INT04-C
+`_.
+
+You can silence this warning either by bound checking the ``size`` parameter, 
or
+by explicitly marking the ``size`` parameter as sanitized. See the
+:ref:`alpha-security-taint-TaintPropagation` checker for more details.
+
+.. code-block:: c
+
+  void t1(void) {
+size_t size;
+scanf("%zu", &size);
+int *p = malloc(size); // warn: malloc is called with a tainted 
(potentially attacker controlled) value
+free(p);
+  }
+
+  void t3(void) {

NagyDonat wrote:

```suggestion
  void bounds_checked(void) {
```

https://github.com/llvm/llvm-project/pull/92420
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[clang] [analyzer] New optin.taint.TaintAlloc checker for catching unbounded memory allocation calls (PR #92420)

[Donát Nagy via cfe-commits]

@@ -938,6 +938,53 @@ optin.portability.UnixAPI
 "
 Finds implementation-defined behavior in UNIX/Posix functions.
 
+.. _optin-taint-TaintAlloc:
+
+optin.taint.TaintAlloc (C, C++)
+"""
+
+This checker warns for cases when the ``size`` parameter of the ``malloc`` ,
+``calloc``, ``realloc``, ``alloca`` or the size parameter of the
+array new C++ operator is tainted (potentially attacker controlled).
+If an attacker can inject a large value as the size parameter, memory 
exhaustion
+denial of service attack can be carried out.
+
+The ``alpha.security.taint.TaintPropagation`` checker also needs to be enabled 
for
+this checker to give warnings.
+
+The analyzer emits warning only if it cannot prove that the size parameter is
+within reasonable bounds (``<= SIZE_MAX/4``). This functionality partially
+covers the SEI Cert coding standard rule `INT04-C
+`_.
+
+You can silence this warning either by bound checking the ``size`` parameter, 
or
+by explicitly marking the ``size`` parameter as sanitized. See the
+:ref:`alpha-security-taint-TaintPropagation` checker for more details.
+
+.. code-block:: c
+
+  void t1(void) {
+size_t size;
+scanf("%zu", &size);
+int *p = malloc(size); // warn: malloc is called with a tainted 
(potentially attacker controlled) value
+free(p);
+  }
+
+  void t3(void) {
+size_t size = 0;
+scanf("%zu", &size);
+if (1024 < size)
+  return;
+int *p = malloc(size); // No warning expected as the the user input is 
bound
+free(p);
+  }
+
+  void tcpp(void) {

NagyDonat wrote:

```suggestion
  void vulnerable_cpp(void) {
```

https://github.com/llvm/llvm-project/pull/92420
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[clang] [analyzer] New optin.taint.TaintAlloc checker for catching unbounded memory allocation calls (PR #92420)

[Donát Nagy via cfe-commits]

@@ -1779,18 +1797,76 @@ ProgramStateRef 
MallocChecker::MallocMemAux(CheckerContext &C,
 const CallEvent &Call,
 const Expr *SizeEx, SVal Init,
 ProgramStateRef State,
-AllocationFamily Family) {
+AllocationFamily Family) const {
   if (!State)
 return nullptr;
 
   assert(SizeEx);
   return MallocMemAux(C, Call, C.getSVal(SizeEx), Init, State, Family);
 }
 
+void MallocChecker::reportTaintBug(StringRef Msg, ProgramStateRef State,
+   CheckerContext &C,
+   llvm::ArrayRef TaintedSyms,
+   AllocationFamily Family) const {
+
+  if (!ChecksEnabled[CK_TaintAllocChecker])
+return;
+
+  if (ExplodedNode *N = C.generateNonFatalErrorNode(State, this)) {
+if (!BT_TaintedAlloc)
+  BT_TaintedAlloc.reset(new BugType(CheckNames[CK_TaintAllocChecker],
+"Tainted Memory Allocation",
+categories::TaintedData));
+auto R = std::make_unique(*BT_TaintedAlloc, Msg, 
N);
+for (auto TaintedSym : TaintedSyms) {
+  R->markInteresting(TaintedSym);
+}
+C.emitReport(std::move(R));
+  }
+}
+
+void MallocChecker::CheckTaintedness(CheckerContext &C, const CallEvent &Call,
+ const SVal SizeSVal, ProgramStateRef 
State,
+ AllocationFamily Family) const {
+  std::vector TaintedSyms =
+  taint::getTaintedSymbols(State, SizeSVal);
+  if (TaintedSyms.empty())
+return;
+
+  SValBuilder &SVB = C.getSValBuilder();
+  QualType SizeTy = SVB.getContext().getSizeType();
+  QualType CmpTy = SVB.getConditionType();
+  // In case the symbol is tainted, we give a warning if the
+  // size is larger than SIZE_MAX/4
+  BasicValueFactory &BVF = SVB.getBasicValueFactory();
+  const llvm::APSInt MaxValInt = BVF.getMaxValue(SizeTy);
+  NonLoc MaxLength =
+  SVB.makeIntVal(MaxValInt / APSIntType(MaxValInt).getValue(4));
+  std::optional SizeNL = SizeSVal.getAs();
+  auto Cmp = SVB.evalBinOpNN(State, BO_GE, *SizeNL, MaxLength, CmpTy)
+ .getAs();
+  if (!Cmp)
+return;
+  auto [StateTooLarge, StateNotTooLarge] = State->assume(*Cmp);
+  if (!StateTooLarge && StateNotTooLarge) {
+// we can prove that size is not too large so ok.

NagyDonat wrote:

```suggestion
// We can prove that size is not too large, so there is no issue."
```

https://github.com/llvm/llvm-project/pull/92420
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[clang] [analyzer] New optin.taint.TaintAlloc checker for catching unbounded memory allocation calls (PR #92420)

[Donát Nagy via cfe-commits]

@@ -1779,18 +1797,76 @@ ProgramStateRef 
MallocChecker::MallocMemAux(CheckerContext &C,
 const CallEvent &Call,
 const Expr *SizeEx, SVal Init,
 ProgramStateRef State,
-AllocationFamily Family) {
+AllocationFamily Family) const {
   if (!State)
 return nullptr;
 
   assert(SizeEx);
   return MallocMemAux(C, Call, C.getSVal(SizeEx), Init, State, Family);
 }
 
+void MallocChecker::reportTaintBug(StringRef Msg, ProgramStateRef State,
+   CheckerContext &C,
+   llvm::ArrayRef TaintedSyms,
+   AllocationFamily Family) const {
+
+  if (!ChecksEnabled[CK_TaintAllocChecker])
+return;

NagyDonat wrote:

Move this check to `CheckTaintedness` -- there is no reason to calculate taint 
information if it won't be reported.

https://github.com/llvm/llvm-project/pull/92420
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[clang] [analyzer] New optin.taint.TaintAlloc checker for catching unbounded memory allocation calls (PR #92420)

[Donát Nagy via cfe-commits]

@@ -1779,18 +1797,76 @@ ProgramStateRef 
MallocChecker::MallocMemAux(CheckerContext &C,
 const CallEvent &Call,
 const Expr *SizeEx, SVal Init,
 ProgramStateRef State,
-AllocationFamily Family) {
+AllocationFamily Family) const {
   if (!State)
 return nullptr;
 
   assert(SizeEx);
   return MallocMemAux(C, Call, C.getSVal(SizeEx), Init, State, Family);
 }
 
+void MallocChecker::reportTaintBug(StringRef Msg, ProgramStateRef State,
+   CheckerContext &C,
+   llvm::ArrayRef TaintedSyms,
+   AllocationFamily Family) const {
+
+  if (!ChecksEnabled[CK_TaintAllocChecker])
+return;
+
+  if (ExplodedNode *N = C.generateNonFatalErrorNode(State, this)) {
+if (!BT_TaintedAlloc)
+  BT_TaintedAlloc.reset(new BugType(CheckNames[CK_TaintAllocChecker],
+"Tainted Memory Allocation",
+categories::TaintedData));
+auto R = std::make_unique(*BT_TaintedAlloc, Msg, 
N);
+for (auto TaintedSym : TaintedSyms) {
+  R->markInteresting(TaintedSym);
+}
+C.emitReport(std::move(R));
+  }
+}
+
+void MallocChecker::CheckTaintedness(CheckerContext &C, const CallEvent &Call,

NagyDonat wrote:

Rename this to `checkTaintedness` with a lowercase 'c' to follow the global 
coding guidelines. I know that MallocChecker has lots of functions whose name 
start with an uppercase letter, but I think it's better to introduce new 
functions with conforming names and eventually switch to the standard naming 
scheme when there is a refactoring that already touches many functions.

(This is how I standardized the variable names in ArrayBoundV2.)

https://github.com/llvm/llvm-project/pull/92420
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[clang] fa649df - [clang][ExtractAPI] Flatten all enum cases from anonymous enums at top level (#93559)

[via cfe-commits]

Author: Daniel Grumberg
Date: 2024-05-29T09:47:23+01:00
New Revision: fa649df8e54c2aa8921a42ad8d10e1e45700e5d7

URL: 
https://github.com/llvm/llvm-project/commit/fa649df8e54c2aa8921a42ad8d10e1e45700e5d7
DIFF: 
https://github.com/llvm/llvm-project/commit/fa649df8e54c2aa8921a42ad8d10e1e45700e5d7.diff

LOG: [clang][ExtractAPI] Flatten all enum cases from anonymous enums at top 
level (#93559)

rdar://128863241

Added: 


Modified: 
clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
clang/test/ExtractAPI/anonymous_record_no_typedef.c
clang/test/ExtractAPI/enum.c
clang/tools/libclang/CXExtractAPI.cpp

Removed: 




diff  --git a/clang/include/clang/ExtractAPI/ExtractAPIVisitor.h 
b/clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
index 8ccebe457ed53..76d7fd798bed3 100644
--- a/clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
+++ b/clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
@@ -21,6 +21,7 @@
 #include "clang/AST/DeclTemplate.h"
 #include "clang/AST/ParentMapContext.h"
 #include "clang/AST/RecursiveASTVisitor.h"
+#include "clang/Basic/LLVM.h"
 #include "clang/Basic/Module.h"
 #include "clang/Basic/SourceManager.h"
 #include "clang/Basic/Specifiers.h"
@@ -127,7 +128,7 @@ class ExtractAPIVisitorBase : public 
RecursiveASTVisitor {
 protected:
   /// Collect API information for the enum constants and associate with the
   /// parent enum.
-  void recordEnumConstants(EnumRecord *EnumRecord,
+  void recordEnumConstants(SymbolReference Container,
const EnumDecl::enumerator_range Constants);
 
   /// Collect API information for the Objective-C methods and associate with 
the
@@ -248,12 +249,8 @@ class ExtractAPIVisitorBase : public 
RecursiveASTVisitor {
 clang::index::generateUSRForDecl(Tag, TagUSR);
 if (auto *Record = llvm::dyn_cast_if_present(
 API.findRecordForUSR(TagUSR))) {
-  if (Record->IsEmbeddedInVarDeclarator) {
+  if (Record->IsEmbeddedInVarDeclarator)
 NewRecordContext->stealRecordChain(*Record);
-auto *NewRecord = cast(NewRecordContext);
-if (NewRecord->Comment.empty())
-  NewRecord->Comment = Record->Comment;
-  }
 }
   }
 };
@@ -394,17 +391,6 @@ bool ExtractAPIVisitorBase::VisitEnumDecl(const 
EnumDecl *Decl) {
   if (!getDerivedExtractAPIVisitor().shouldDeclBeIncluded(Decl))
 return true;
 
-  SmallString<128> QualifiedNameBuffer;
-  // Collect symbol information.
-  StringRef Name = Decl->getName();
-  if (Name.empty())
-Name = getTypedefName(Decl);
-  if (Name.empty()) {
-llvm::raw_svector_ostream OS(QualifiedNameBuffer);
-Decl->printQualifiedName(OS);
-Name = QualifiedNameBuffer;
-  }
-
   SmallString<128> USR;
   index::generateUSRForDecl(Decl, USR);
   PresumedLoc Loc =
@@ -420,13 +406,29 @@ bool ExtractAPIVisitorBase::VisitEnumDecl(const 
EnumDecl *Decl) {
   DeclarationFragmentsBuilder::getFragmentsForEnum(Decl);
   DeclarationFragments SubHeading =
   DeclarationFragmentsBuilder::getSubHeading(Decl);
-  auto *ER = API.createRecord(
-  USR, Name, createHierarchyInformationForDecl(*Decl), Loc,
-  AvailabilityInfo::createFromDecl(Decl), Comment, Declaration, SubHeading,
-  isInSystemHeader(Decl), isEmbeddedInVarDeclarator(*Decl));
+
+  // Collect symbol information.
+  SymbolReference ParentContainer;
+
+  if (Decl->hasNameForLinkage()) {
+StringRef Name = Decl->getName();
+if (Name.empty())
+  Name = getTypedefName(Decl);
+
+auto *ER = API.createRecord(
+USR, Name, createHierarchyInformationForDecl(*Decl), Loc,
+AvailabilityInfo::createFromDecl(Decl), Comment, Declaration,
+SubHeading, isInSystemHeader(Decl), false);
+ParentContainer = SymbolReference(ER);
+  } else {
+// If this an anonymous enum then the parent scope of the constants is the
+// top level namespace.
+ParentContainer = {};
+  }
 
   // Now collect information about the enumerators in this enum.
-  getDerivedExtractAPIVisitor().recordEnumConstants(ER, Decl->enumerators());
+  getDerivedExtractAPIVisitor().recordEnumConstants(ParentContainer,
+Decl->enumerators());
 
   return true;
 }
@@ -1197,7 +1199,7 @@ bool 
ExtractAPIVisitorBase::VisitObjCCategoryDecl(
 /// parent enum.
 template 
 void ExtractAPIVisitorBase::recordEnumConstants(
-EnumRecord *EnumRecord, const EnumDecl::enumerator_range Constants) {
+SymbolReference Container, const EnumDecl::enumerator_range Constants) {
   for (const auto *Constant : Constants) {
 // Collect symbol information.
 StringRef Name = Constant->getName();
@@ -1218,9 +1220,8 @@ void ExtractAPIVisitorBase::recordEnumConstants(
 DeclarationFragmentsBuilder::getSubHeading(Constant);
 
 API.createRecord(
-USR, Name, createHierarchyInformationForDecl(*Constant), Loc,
-AvailabilityInfo::createFromDecl(Cons

[clang] [clang][ExtractAPI] Flatten all enum cases from anonymous enums at top level (PR #93559)

[Daniel Grumberg via cfe-commits]

https://github.com/daniel-grumberg closed 
https://github.com/llvm/llvm-project/pull/93559
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

https://github.com/FreddyLeaf updated 
https://github.com/llvm/llvm-project/pull/92338

>From 41fbc18c7a4a26b11bc4b772bbe2e384ad9d9dbc Mon Sep 17 00:00:00 2001
From: Freddy Ye 
Date: Fri, 10 May 2024 16:29:55 +0800
Subject: [PATCH 1/9] [X86] Support EGPR for inline assembly.

"jR": explictly enables EGPR
"r": enables/disables EGPR w/wo -mapx-inline-asm-use-gpr32
-mapx-inline-asm-use-gpr32 will also define a new Macro:
__APX_INLINE_ASM_USE_GPR32__
---
 clang/include/clang/Driver/Options.td |  2 +
 clang/lib/Basic/Targets/X86.cpp   | 26 +
 clang/lib/Basic/Targets/X86.h |  1 +
 clang/lib/Driver/ToolChains/Arch/X86.cpp  |  2 +
 .../Driver/x86-apx-inline-asm-use-gpr32.cpp   |  3 +
 clang/test/Preprocessor/x86_target_features.c |  3 +
 llvm/lib/Target/X86/X86.td|  3 +
 llvm/lib/Target/X86/X86ISelLowering.cpp   | 57 +--
 .../CodeGen/X86/inline-asm-jR-constraint.ll   | 19 +++
 .../CodeGen/X86/inline-asm-r-constraint.ll| 16 ++
 10 files changed, 127 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/Driver/x86-apx-inline-asm-use-gpr32.cpp
 create mode 100644 llvm/test/CodeGen/X86/inline-asm-jR-constraint.ll
 create mode 100644 llvm/test/CodeGen/X86/inline-asm-r-constraint.ll

diff --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 73a2518480e9b..20a7c482bbf06 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -6281,6 +6281,8 @@ def mno_apx_features_EQ : CommaJoined<["-"], 
"mno-apx-features=">, Group, Alias, 
AliasArgs<["egpr","push2pop2","ppx", "ndd"]>;
 def mno_apxf : Flag<["-"], "mno-apxf">, Alias, 
AliasArgs<["egpr","push2pop2","ppx","ndd"]>;
+def mapx_inline_asm_use_gpr32 : Flag<["-"], "mapx-inline-asm-use-gpr32">, 
Group,
+HelpText<"Enable use of GPR32 in inline 
assembly for APX">;
 } // let Flags = [TargetSpecific]
 
 // VE feature flags
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 67e2126cf766b..9e61b6e6d6441 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -450,6 +450,8 @@ bool 
X86TargetInfo::handleTargetFeatures(std::vector &Features,
   HasFullBFloat16 = true;
 } else if (Feature == "+egpr") {
   HasEGPR = true;
+} else if (Feature == "+inline-asm-use-gpr32") {
+  HasInlineAsmUseGPR32 = true;
 } else if (Feature == "+push2pop2") {
   HasPush2Pop2 = true;
 } else if (Feature == "+ppx") {
@@ -974,6 +976,8 @@ void X86TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   // Condition here is aligned with the feature set of mapxf in Options.td
   if (HasEGPR && HasPush2Pop2 && HasPPX && HasNDD)
 Builder.defineMacro("__APX_F__");
+  if (HasInlineAsmUseGPR32)
+Builder.defineMacro("__APX_INLINE_ASM_USE_GPR32__");
 
   // Each case falls through to the previous one here.
   switch (SSELevel) {
@@ -1493,6 +1497,15 @@ bool X86TargetInfo::validateAsmConstraint(
   case 'C': // SSE floating point constant.
   case 'G': // x87 floating point constant.
 return true;
+  case 'j':
+Name++;
+switch (*Name) {
+default:
+  return false;
+case 'R':
+  Info.setAllowsRegister();
+  return true;
+}
   case '@':
 // CC condition changes.
 if (auto Len = matchAsmCCConstraint(Name)) {
@@ -1764,6 +1777,19 @@ std::string X86TargetInfo::convertConstraint(const char 
*&Constraint) const {
   // to the next constraint.
   return std::string("^") + std::string(Constraint++, 2);
 }
+  case 'j':
+switch (Constraint[1]) {
+default:
+  // Break from inner switch and fall through (copy single char),
+  // continue parsing after copying the current constraint into
+  // the return string.
+  break;
+case 'R':
+  // "^" hints llvm that this is a 2 letter constraint.
+  // "Constraint++" is used to promote the string iterator
+  // to the next constraint.
+  return std::string("^") + std::string(Constraint++, 2);
+}
 [[fallthrough]];
   default:
 return std::string(1, *Constraint);
diff --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h
index c14e4d5f433d8..69c68ee80f3ba 100644
--- a/clang/lib/Basic/Targets/X86.h
+++ b/clang/lib/Basic/Targets/X86.h
@@ -174,6 +174,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public 
TargetInfo {
   bool HasNDD = false;
   bool HasCCMP = false;
   bool HasCF = false;
+  bool HasInlineAsmUseGPR32 = false;
 
 protected:
   llvm::X86::CPUKind CPU = llvm::X86::CK_None;
diff --git a/clang/lib/Driver/ToolChains/Arch/X86.cpp 
b/clang/lib/Driver/ToolChains/Arch/X86.cpp
index 53e26a9f8e229..085ff4824a9b0 100644
--- a/clang/lib/Driver/ToolChains/Arch/X86.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/X86.cpp
@@ -309,4 +309,6 @@ void x86::getX86TargetFeatures(const Driver &D, const 
llvm::Triple &Triple,
 Features.push_back("+prefer-no-gathe

[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

https://github.com/FreddyLeaf edited 
https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

@@ -0,0 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: not llc -mtriple=x86_64 < %s 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: not llc -mtriple=x86_64 -mattr=+egpr < %s 2>&1 | FileCheck %s 
--check-prefix=ERR
+; RUN: llc -mtriple=x86_64 -mattr=+egpr,+inline-asm-use-gpr32 < %s | FileCheck 
%s

FreddyLeaf wrote:

agree, extended `q` in 
[bf3a53c](https://github.com/llvm/llvm-project/pull/92338/commits/bf3a53c0b7fc1828572f771e4772d25062110dc0)

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

@@ -0,0 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: not llc -mtriple=x86_64 < %s 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: not llc -mtriple=x86_64 -mattr=+egpr < %s 2>&1 | FileCheck %s 
--check-prefix=ERR
+; RUN: llc -mtriple=x86_64 -mattr=+egpr,+inline-asm-use-gpr32 < %s | FileCheck 
%s
+
+; ERR: error: inline assembly requires more registers than available
+
+define void @constraint_r_test() nounwind "frame-pointer"="all" {

FreddyLeaf wrote:

addressed in 
[bf3a53c](https://github.com/llvm/llvm-project/pull/92338/commits/bf3a53c0b7fc1828572f771e4772d25062110dc0)

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

@@ -0,0 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: not llc -mtriple=x86_64 %s 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: llc -mtriple=x86_64 -mattr=+egpr < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64 -mattr=+egpr,+inline-asm-use-gpr32 < %s | FileCheck 
%s
+
+; ERR: error: inline assembly requires more registers than available
+
+define void @constraint_jR_test() nounwind "frame-pointer"="all" {

FreddyLeaf wrote:

it turns out relate to `rbp`, addressed in 
[bf3a53c](https://github.com/llvm/llvm-project/pull/92338/commits/bf3a53c0b7fc1828572f771e4772d25062110dc0)

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

@@ -58255,6 +58281,22 @@ X86TargetLowering::getRegForInlineAsmConstraint(const 
TargetRegisterInfo *TRI,
   }
   break;
 }
+  } else if (Constraint.size() == 2 && Constraint[0] == 'j') {
+switch (Constraint[1]) {
+default:
+  break;
+case 'R':
+  if (VT == MVT::i8 || VT == MVT::i1)
+return std::make_pair(0U, &X86::GR8RegClass);
+  if (VT == MVT::i16)
+return std::make_pair(0U, &X86::GR16RegClass);
+  if (VT == MVT::i32 || VT == MVT::f32 ||
+  (!VT.isVector() && !Subtarget.is64Bit()))
+return std::make_pair(0U, &X86::GR32RegClass);

FreddyLeaf wrote:

addressed in 
[bf3a53c](https://github.com/llvm/llvm-project/pull/92338/commits/bf3a53c0b7fc1828572f771e4772d25062110dc0)

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

@@ -58024,15 +58043,22 @@ X86TargetLowering::getRegForInlineAsmConstraint(const 
TargetRegisterInfo *TRI,
 case 'r':   // GENERAL_REGS
 case 'l':   // INDEX_REGS
   if (VT == MVT::i8 || VT == MVT::i1)
-return std::make_pair(0U, &X86::GR8_NOREX2RegClass);
+return std::make_pair(0U, Subtarget.useInlineAsmGPR32()
+  ? &X86::GR8_NOREX2RegClass
+  : &X86::GR8RegClass);
   if (VT == MVT::i16)
-return std::make_pair(0U, &X86::GR16_NOREX2RegClass);
+return std::make_pair(0U, Subtarget.useInlineAsmGPR32()
+  ? &X86::GR16_NOREX2RegClass
+  : &X86::GR16RegClass);
   if (VT == MVT::i32 || VT == MVT::f32 ||
   (!VT.isVector() && !Subtarget.is64Bit()))
-return std::make_pair(0U, &X86::GR32_NOREX2RegClass);
+return std::make_pair(0U, Subtarget.useInlineAsmGPR32()

FreddyLeaf wrote:

addressed in 
[bf3a53c](https://github.com/llvm/llvm-project/pull/92338/commits/bf3a53c0b7fc1828572f771e4772d25062110dc0)

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

@@ -5418,6 +5418,8 @@ X86:
   operand will get allocated only to RAX -- if two 32-bit operands are needed,
   you're better off splitting it yourself, before passing it to the asm
   statement.
+- ``jR``: An 8, 16, 32, or 64-bit integer EGPR when EGPR feature is on.
+  Otherwise, same as ``R``.

FreddyLeaf wrote:

[bf3a53c](https://github.com/llvm/llvm-project/pull/92338/commits/bf3a53c0b7fc1828572f771e4772d25062110dc0)
 extended jr, l, q

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] Recover performance loss after PagedVector introduction (PR #67972)

[Giulio Eulisse via cfe-commits]

https://github.com/ktf updated https://github.com/llvm/llvm-project/pull/67972

>From 154f82bd0e35e9d8ad8f8812ba3eb1cf8d211003 Mon Sep 17 00:00:00 2001
From: Giulio Eulisse <10544+...@users.noreply.github.com>
Date: Mon, 2 Oct 2023 13:01:14 +0200
Subject: [PATCH 1/3] Hint for branch likelihood

---
 llvm/include/llvm/ADT/PagedVector.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/include/llvm/ADT/PagedVector.h 
b/llvm/include/llvm/ADT/PagedVector.h
index 667bece6d7183..f8d014c9c84da 100644
--- a/llvm/include/llvm/ADT/PagedVector.h
+++ b/llvm/include/llvm/ADT/PagedVector.h
@@ -84,7 +84,7 @@ template  
class PagedVector {
 assert(Index / PageSize < PageToDataPtrs.size());
 T *&PagePtr = PageToDataPtrs[Index / PageSize];
 // If the page was not yet allocated, allocate it.
-if (!PagePtr) {
+if (LLVM_UNLIKELY(!PagePtr)) {
   PagePtr = Allocator.getPointer()->template Allocate(PageSize);
   // We need to invoke the default constructor on all the elements of the
   // page.

>From f119cca040b2bebabff8db32394cc4650f5115d5 Mon Sep 17 00:00:00 2001
From: Giulio Eulisse <10544+...@users.noreply.github.com>
Date: Mon, 2 Oct 2023 17:19:43 +0200
Subject: [PATCH 2/3] Change PageSize to 32 elements

Moves from 42 elements (automatically calculated) to 32. It should
both reduce memory usage (it does at least in my test) and avoid
the need for a division when indexing the elements.
---
 clang/include/clang/Basic/SourceManager.h | 2 +-
 clang/lib/Basic/SourceManager.cpp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/SourceManager.h 
b/clang/include/clang/Basic/SourceManager.h
index c1b24eec2759c..ac077d1ab3508 100644
--- a/clang/include/clang/Basic/SourceManager.h
+++ b/clang/include/clang/Basic/SourceManager.h
@@ -700,7 +700,7 @@ class SourceManager : public RefCountedBase {
   ///
   /// Negative FileIDs are indexes into this table. To get from ID to an index,
   /// use (-ID - 2).
-  llvm::PagedVector LoadedSLocEntryTable;
+  llvm::PagedVector LoadedSLocEntryTable;
 
   /// The starting offset of the next local SLocEntry.
   ///
diff --git a/clang/lib/Basic/SourceManager.cpp 
b/clang/lib/Basic/SourceManager.cpp
index 3066cc53dbfd8..a9c6453da94a3 100644
--- a/clang/lib/Basic/SourceManager.cpp
+++ b/clang/lib/Basic/SourceManager.cpp
@@ -2102,7 +2102,7 @@ std::pair 
SourceManager::isInTheSameTranslationUnit(
 unsigned Offset;
 FileID ParentFID; // Used for breaking ties.
   };
-  llvm::SmallDenseMap LChain;
+  llvm::SmallDenseMap LChain;
 
   FileID Parent;
   do {

>From 684d85f0c889358fddd52ca2a805caaad025fe10 Mon Sep 17 00:00:00 2001
From: Giulio Eulisse <10544+...@users.noreply.github.com>
Date: Mon, 2 Oct 2023 17:36:09 +0200
Subject: [PATCH 3/3] fix

---
 clang/include/clang/Basic/SourceManager.h | 2 +-
 clang/lib/Basic/SourceManager.cpp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/clang/include/clang/Basic/SourceManager.h 
b/clang/include/clang/Basic/SourceManager.h
index ac077d1ab3508..1999e1ff4300b 100644
--- a/clang/include/clang/Basic/SourceManager.h
+++ b/clang/include/clang/Basic/SourceManager.h
@@ -700,7 +700,7 @@ class SourceManager : public RefCountedBase {
   ///
   /// Negative FileIDs are indexes into this table. To get from ID to an index,
   /// use (-ID - 2).
-  llvm::PagedVector LoadedSLocEntryTable;
+  llvm::PagedVector LoadedSLocEntryTable;
 
   /// The starting offset of the next local SLocEntry.
   ///
diff --git a/clang/lib/Basic/SourceManager.cpp 
b/clang/lib/Basic/SourceManager.cpp
index a9c6453da94a3..3066cc53dbfd8 100644
--- a/clang/lib/Basic/SourceManager.cpp
+++ b/clang/lib/Basic/SourceManager.cpp
@@ -2102,7 +2102,7 @@ std::pair 
SourceManager::isInTheSameTranslationUnit(
 unsigned Offset;
 FileID ParentFID; // Used for breaking ties.
   };
-  llvm::SmallDenseMap LChain;
+  llvm::SmallDenseMap LChain;
 
   FileID Parent;
   do {

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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

https://github.com/FreddyLeaf updated 
https://github.com/llvm/llvm-project/pull/92338

>From 41fbc18c7a4a26b11bc4b772bbe2e384ad9d9dbc Mon Sep 17 00:00:00 2001
From: Freddy Ye 
Date: Fri, 10 May 2024 16:29:55 +0800
Subject: [PATCH 01/10] [X86] Support EGPR for inline assembly.

"jR": explictly enables EGPR
"r": enables/disables EGPR w/wo -mapx-inline-asm-use-gpr32
-mapx-inline-asm-use-gpr32 will also define a new Macro:
__APX_INLINE_ASM_USE_GPR32__
---
 clang/include/clang/Driver/Options.td |  2 +
 clang/lib/Basic/Targets/X86.cpp   | 26 +
 clang/lib/Basic/Targets/X86.h |  1 +
 clang/lib/Driver/ToolChains/Arch/X86.cpp  |  2 +
 .../Driver/x86-apx-inline-asm-use-gpr32.cpp   |  3 +
 clang/test/Preprocessor/x86_target_features.c |  3 +
 llvm/lib/Target/X86/X86.td|  3 +
 llvm/lib/Target/X86/X86ISelLowering.cpp   | 57 +--
 .../CodeGen/X86/inline-asm-jR-constraint.ll   | 19 +++
 .../CodeGen/X86/inline-asm-r-constraint.ll| 16 ++
 10 files changed, 127 insertions(+), 5 deletions(-)
 create mode 100644 clang/test/Driver/x86-apx-inline-asm-use-gpr32.cpp
 create mode 100644 llvm/test/CodeGen/X86/inline-asm-jR-constraint.ll
 create mode 100644 llvm/test/CodeGen/X86/inline-asm-r-constraint.ll

diff --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 73a2518480e9b..20a7c482bbf06 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -6281,6 +6281,8 @@ def mno_apx_features_EQ : CommaJoined<["-"], 
"mno-apx-features=">, Group, Alias, 
AliasArgs<["egpr","push2pop2","ppx", "ndd"]>;
 def mno_apxf : Flag<["-"], "mno-apxf">, Alias, 
AliasArgs<["egpr","push2pop2","ppx","ndd"]>;
+def mapx_inline_asm_use_gpr32 : Flag<["-"], "mapx-inline-asm-use-gpr32">, 
Group,
+HelpText<"Enable use of GPR32 in inline 
assembly for APX">;
 } // let Flags = [TargetSpecific]
 
 // VE feature flags
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 67e2126cf766b..9e61b6e6d6441 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -450,6 +450,8 @@ bool 
X86TargetInfo::handleTargetFeatures(std::vector &Features,
   HasFullBFloat16 = true;
 } else if (Feature == "+egpr") {
   HasEGPR = true;
+} else if (Feature == "+inline-asm-use-gpr32") {
+  HasInlineAsmUseGPR32 = true;
 } else if (Feature == "+push2pop2") {
   HasPush2Pop2 = true;
 } else if (Feature == "+ppx") {
@@ -974,6 +976,8 @@ void X86TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   // Condition here is aligned with the feature set of mapxf in Options.td
   if (HasEGPR && HasPush2Pop2 && HasPPX && HasNDD)
 Builder.defineMacro("__APX_F__");
+  if (HasInlineAsmUseGPR32)
+Builder.defineMacro("__APX_INLINE_ASM_USE_GPR32__");
 
   // Each case falls through to the previous one here.
   switch (SSELevel) {
@@ -1493,6 +1497,15 @@ bool X86TargetInfo::validateAsmConstraint(
   case 'C': // SSE floating point constant.
   case 'G': // x87 floating point constant.
 return true;
+  case 'j':
+Name++;
+switch (*Name) {
+default:
+  return false;
+case 'R':
+  Info.setAllowsRegister();
+  return true;
+}
   case '@':
 // CC condition changes.
 if (auto Len = matchAsmCCConstraint(Name)) {
@@ -1764,6 +1777,19 @@ std::string X86TargetInfo::convertConstraint(const char 
*&Constraint) const {
   // to the next constraint.
   return std::string("^") + std::string(Constraint++, 2);
 }
+  case 'j':
+switch (Constraint[1]) {
+default:
+  // Break from inner switch and fall through (copy single char),
+  // continue parsing after copying the current constraint into
+  // the return string.
+  break;
+case 'R':
+  // "^" hints llvm that this is a 2 letter constraint.
+  // "Constraint++" is used to promote the string iterator
+  // to the next constraint.
+  return std::string("^") + std::string(Constraint++, 2);
+}
 [[fallthrough]];
   default:
 return std::string(1, *Constraint);
diff --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h
index c14e4d5f433d8..69c68ee80f3ba 100644
--- a/clang/lib/Basic/Targets/X86.h
+++ b/clang/lib/Basic/Targets/X86.h
@@ -174,6 +174,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public 
TargetInfo {
   bool HasNDD = false;
   bool HasCCMP = false;
   bool HasCF = false;
+  bool HasInlineAsmUseGPR32 = false;
 
 protected:
   llvm::X86::CPUKind CPU = llvm::X86::CK_None;
diff --git a/clang/lib/Driver/ToolChains/Arch/X86.cpp 
b/clang/lib/Driver/ToolChains/Arch/X86.cpp
index 53e26a9f8e229..085ff4824a9b0 100644
--- a/clang/lib/Driver/ToolChains/Arch/X86.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/X86.cpp
@@ -309,4 +309,6 @@ void x86::getX86TargetFeatures(const Driver &D, const 
llvm::Triple &Triple,
 Features.push_back("+prefer-no-gat

[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Freddy Ye via cfe-commits]

@@ -5418,6 +5418,8 @@ X86:
   operand will get allocated only to RAX -- if two 32-bit operands are needed,
   you're better off splitting it yourself, before passing it to the asm
   statement.
+- ``jR``: An 8, 16, 32, or 64-bit integer EGPR when EGPR feature is on.

FreddyLeaf wrote:

[fb6ba87](https://github.com/llvm/llvm-project/pull/92338/commits/fb6ba87b4f678df51d9e9e0807401f883bdbaced)

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] Recover performance loss after PagedVector introduction (PR #67972)

[Giulio Eulisse via cfe-commits]

ktf wrote:

I have updated the branch and I think the two changes in this PR are in any 
case good. However it's my understanding that the performance regression was 
actually due to some less aggressive inlining of the new code. I have no idea 
how to proceed for that though.

https://github.com/llvm/llvm-project/pull/67972
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[clang] 0f7b4b0 - [X86][Driver] Enable feature ccmp,nf for -mapxf

[Shengchen Kan via cfe-commits]

Author: Shengchen Kan
Date: 2024-05-29T17:34:26+08:00
New Revision: 0f7b4b04a548e10d0f552f13bebc21972d55d7f6

URL: 
https://github.com/llvm/llvm-project/commit/0f7b4b04a548e10d0f552f13bebc21972d55d7f6
DIFF: 
https://github.com/llvm/llvm-project/commit/0f7b4b04a548e10d0f552f13bebc21972d55d7f6.diff

LOG: [X86][Driver] Enable feature ccmp,nf for -mapxf

This is follow-up for #78901 after validation.

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Basic/Targets/X86.cpp
clang/test/Driver/x86-target-features.c
clang/test/Preprocessor/x86_target_features.c

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index de2f245fb29f8..4119e69c85540 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -6277,11 +6277,9 @@ def mapx_features_EQ : CommaJoined<["-"], 
"mapx-features=">, Group, 
Values<"egpr,push2pop2,ppx,ndd,ccmp,nf,cf">;
 def mno_apx_features_EQ : CommaJoined<["-"], "mno-apx-features=">, 
Group,
 HelpText<"Disable features of APX">, 
Values<"egpr,push2pop2,ppx,ndd,ccmp,nf,cf">;
-// Features egpr, push2pop2, ppx and ndd are validated with llvm-test-suite && 
cpu2017 on Intel SDE.
-// For stability, we turn on these features only for -mapxf. After a feature 
pass the validation,
-// we will add it to -mapxf.
-def mapxf : Flag<["-"], "mapxf">, Alias, 
AliasArgs<["egpr","push2pop2","ppx", "ndd"]>;
-def mno_apxf : Flag<["-"], "mno-apxf">, Alias, 
AliasArgs<["egpr","push2pop2","ppx","ndd"]>;
+// For stability, we only add a feature to -mapxf after it passes the 
validation of llvm-test-suite && cpu2017 on Intel SDE.
+def mapxf : Flag<["-"], "mapxf">, Alias, 
AliasArgs<["egpr","push2pop2","ppx","ndd","ccmp","nf"]>;
+def mno_apxf : Flag<["-"], "mno-apxf">, Alias, 
AliasArgs<["egpr","push2pop2","ppx","ndd","ccmp","nf"]>;
 } // let Flags = [TargetSpecific]
 
 // VE feature flags

diff  --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 3a30cff917bb4..08e44360bfbe3 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -961,7 +961,7 @@ void X86TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   if (HasCF)
 Builder.defineMacro("__CF__");
   // Condition here is aligned with the feature set of mapxf in Options.td
-  if (HasEGPR && HasPush2Pop2 && HasPPX && HasNDD)
+  if (HasEGPR && HasPush2Pop2 && HasPPX && HasNDD && HasCCMP && HasNF)
 Builder.defineMacro("__APX_F__");
 
   // Each case falls through to the previous one here.

diff  --git a/clang/test/Driver/x86-target-features.c 
b/clang/test/Driver/x86-target-features.c
index 1d5f001c23fcc..3022ed1250d59 100644
--- a/clang/test/Driver/x86-target-features.c
+++ b/clang/test/Driver/x86-target-features.c
@@ -423,8 +423,8 @@
 // RUN: %clang -target x86_64-unknown-linux-gnu -mno-apxf -mapxf %s -### -o 
%t.o 2>&1 | FileCheck -check-prefix=APXF %s
 // RUN: %clang -target x86_64-unknown-linux-gnu -mapxf -mno-apxf %s -### -o 
%t.o 2>&1 | FileCheck -check-prefix=NO-APXF %s
 //
-// APXF: "-target-feature" "+egpr" "-target-feature" "+push2pop2" 
"-target-feature" "+ppx" "-target-feature" "+ndd"
-// NO-APXF: "-target-feature" "-egpr" "-target-feature" "-push2pop2" 
"-target-feature" "-ppx" "-target-feature" "-ndd"
+// APXF: "-target-feature" "+egpr" "-target-feature" "+push2pop2" 
"-target-feature" "+ppx" "-target-feature" "+ndd" "-target-feature" "+ccmp" 
"-target-feature" "+nf"
+// NO-APXF: "-target-feature" "-egpr" "-target-feature" "-push2pop2" 
"-target-feature" "-ppx" "-target-feature" "-ndd" "-target-feature" "-ccmp" 
"-target-feature" "-nf"
 
 // RUN: %clang -target x86_64-unknown-linux-gnu -mapx-features=egpr %s -### -o 
%t.o 2>&1 | FileCheck -check-prefix=EGPR %s
 // RUN: %clang -target x86_64-unknown-linux-gnu -mapx-features=push2pop2 %s 
-### -o %t.o 2>&1 | FileCheck -check-prefix=PUSH2POP2 %s

diff  --git a/clang/test/Preprocessor/x86_target_features.c 
b/clang/test/Preprocessor/x86_target_features.c
index 7567267be26b4..6c08b379c9386 100644
--- a/clang/test/Preprocessor/x86_target_features.c
+++ b/clang/test/Preprocessor/x86_target_features.c
@@ -754,7 +754,7 @@
 // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 
-mapx-features=ccmp -x c -E -dM -o - %s | FileCheck --check-prefix=CCMP %s
 // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapx-features=nf 
-x c -E -dM -o - %s | FileCheck --check-prefix=NF %s
 // RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapx-features=cf 
-x c -E -dM -o - %s | FileCheck --check-prefix=CF %s
-// RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapxf -x c -E -dM 
-o - %s | FileCheck --check-prefixes=EGPR,PUSH2POP2,PPX,NDD,APXF %s
+// RUN: %clang -target x86_64-unknown-unknown -march=x86-64 -mapxf -x c -E -dM 
-o - %s | FileCheck --check-prefixes=EGPR,PUSH2POP2,PPX,NDD,CCMP,NF,APXF %s
 // APXF: 

[clang] 4bb6974 - [X86] x86-atomic-long_double.c - cleanup check prefixes

[Simon Pilgrim via cfe-commits]

Author: Simon Pilgrim
Date: 2024-05-29T10:38:03+01:00
New Revision: 4bb6974a87e495f19faea4b13475a65e842473f0

URL: 
https://github.com/llvm/llvm-project/commit/4bb6974a87e495f19faea4b13475a65e842473f0
DIFF: 
https://github.com/llvm/llvm-project/commit/4bb6974a87e495f19faea4b13475a65e842473f0.diff

LOG: [X86] x86-atomic-long_double.c - cleanup check prefixes

Added: 


Modified: 
clang/test/CodeGen/X86/x86-atomic-long_double.c

Removed: 




diff  --git a/clang/test/CodeGen/X86/x86-atomic-long_double.c 
b/clang/test/CodeGen/X86/x86-atomic-long_double.c
index 74a22d5db151e..2c3f381f13511 100644
--- a/clang/test/CodeGen/X86/x86-atomic-long_double.c
+++ b/clang/test/CodeGen/X86/x86-atomic-long_double.c
@@ -1,170 +1,171 @@
-// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -emit-llvm -o 
- | FileCheck %s
-// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -emit-llvm -o - 
| FileCheck -check-prefix=CHECK32 %s
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -emit-llvm -o 
- | FileCheck --check-prefixes=X64 %s
+// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -emit-llvm -o - 
| FileCheck --check-prefixes=X86 %s
 
-// CHECK-LABEL: define dso_local x86_fp80 @testinc(
-// CHECK-SAME: ptr noundef [[ADDR:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:[[RETVAL:%.*]] = alloca x86_fp80, align 16
-// CHECK-NEXT:[[ADDR_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT:store ptr [[ADDR]], ptr [[ADDR_ADDR]], align 8
-// CHECK-NEXT:[[TMP0:%.*]] = load ptr, ptr [[ADDR_ADDR]], align 8
-// CHECK-NEXT:[[TMP1:%.*]] = atomicrmw fadd ptr [[TMP0]], float 
1.00e+00 seq_cst, align 16
-// CHECK-NEXT:[[TMP2:%.*]] = fadd float [[TMP1]], 1.00e+00
-// CHECK-NEXT:store float [[TMP2]], ptr [[RETVAL]], align 16
-// CHECK-NEXT:[[TMP3:%.*]] = load x86_fp80, ptr [[RETVAL]], align 16
-// CHECK-NEXT:ret x86_fp80 [[TMP3]]
+// X64-LABEL: define dso_local x86_fp80 @testinc(
+// X64-SAME: ptr noundef [[ADDR:%.*]]) #[[ATTR0:[0-9]+]] {
+// X64-NEXT:  [[ENTRY:.*:]]
+// X64-NEXT:[[RETVAL:%.*]] = alloca x86_fp80, align 16
+// X64-NEXT:[[ADDR_ADDR:%.*]] = alloca ptr, align 8
+// X64-NEXT:store ptr [[ADDR]], ptr [[ADDR_ADDR]], align 8
+// X64-NEXT:[[TMP0:%.*]] = load ptr, ptr [[ADDR_ADDR]], align 8
+// X64-NEXT:[[TMP1:%.*]] = atomicrmw fadd ptr [[TMP0]], float 1.00e+00 
seq_cst, align 16
+// X64-NEXT:[[TMP2:%.*]] = fadd float [[TMP1]], 1.00e+00
+// X64-NEXT:store float [[TMP2]], ptr [[RETVAL]], align 16
+// X64-NEXT:[[TMP3:%.*]] = load x86_fp80, ptr [[RETVAL]], align 16
+// X64-NEXT:ret x86_fp80 [[TMP3]]
 //
-// CHECK32-LABEL: define dso_local x86_fp80 @testinc(
-// CHECK32-SAME: ptr noundef [[ADDR:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK32-NEXT:  entry:
-// CHECK32-NEXT:[[RETVAL:%.*]] = alloca x86_fp80, align 4
-// CHECK32-NEXT:[[ADDR_ADDR:%.*]] = alloca ptr, align 4
-// CHECK32-NEXT:store ptr [[ADDR]], ptr [[ADDR_ADDR]], align 4
-// CHECK32-NEXT:[[TMP0:%.*]] = load ptr, ptr [[ADDR_ADDR]], align 4
-// CHECK32-NEXT:[[TMP1:%.*]] = atomicrmw fadd ptr [[TMP0]], float 
1.00e+00 seq_cst, align 4
-// CHECK32-NEXT:[[TMP2:%.*]] = fadd float [[TMP1]], 1.00e+00
-// CHECK32-NEXT:store float [[TMP2]], ptr [[RETVAL]], align 4
-// CHECK32-NEXT:[[TMP3:%.*]] = load x86_fp80, ptr [[RETVAL]], align 4
-// CHECK32-NEXT:ret x86_fp80 [[TMP3]]
+// X86-LABEL: define dso_local x86_fp80 @testinc(
+// X86-SAME: ptr noundef [[ADDR:%.*]]) #[[ATTR0:[0-9]+]] {
+// X86-NEXT:  [[ENTRY:.*:]]
+// X86-NEXT:[[RETVAL:%.*]] = alloca x86_fp80, align 4
+// X86-NEXT:[[ADDR_ADDR:%.*]] = alloca ptr, align 4
+// X86-NEXT:store ptr [[ADDR]], ptr [[ADDR_ADDR]], align 4
+// X86-NEXT:[[TMP0:%.*]] = load ptr, ptr [[ADDR_ADDR]], align 4
+// X86-NEXT:[[TMP1:%.*]] = atomicrmw fadd ptr [[TMP0]], float 1.00e+00 
seq_cst, align 4
+// X86-NEXT:[[TMP2:%.*]] = fadd float [[TMP1]], 1.00e+00
+// X86-NEXT:store float [[TMP2]], ptr [[RETVAL]], align 4
+// X86-NEXT:[[TMP3:%.*]] = load x86_fp80, ptr [[RETVAL]], align 4
+// X86-NEXT:ret x86_fp80 [[TMP3]]
 //
 long double testinc(_Atomic long double *addr) {
 
   return ++*addr;
 }
 
-// CHECK-LABEL: define dso_local x86_fp80 @testdec(
-// CHECK-SAME: ptr noundef [[ADDR:%.*]]) #[[ATTR0]] {
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:[[RETVAL:%.*]] = alloca x86_fp80, align 16
-// CHECK-NEXT:[[ADDR_ADDR:%.*]] = alloca ptr, align 8
-// CHECK-NEXT:store ptr [[ADDR]], ptr [[ADDR_ADDR]], align 8
-// CHECK-NEXT:[[TMP0:%.*]] = load ptr, ptr [[ADDR_ADDR]], align 8
-// CHECK-NEXT:[[TMP1:%.*]] = atomicrmw fsub ptr [[TMP0]], float 
1.00e+00 seq_cst, align 16
-// CHECK-NEXT:store float [[TMP1]], ptr [[RETVAL]], align 16
-// CHECK-N

[clang] 9c42ed1 - [X86] Add x86-atomic-double.c double test coverage

[Simon Pilgrim via cfe-commits]

Author: Simon Pilgrim
Date: 2024-05-29T10:38:03+01:00
New Revision: 9c42ed1371ee8c211aedcfe8aed16662a9befb69

URL: 
https://github.com/llvm/llvm-project/commit/9c42ed1371ee8c211aedcfe8aed16662a9befb69
DIFF: 
https://github.com/llvm/llvm-project/commit/9c42ed1371ee8c211aedcfe8aed16662a9befb69.diff

LOG: [X86] Add x86-atomic-double.c double test coverage

Added: 
clang/test/CodeGen/X86/x86-atomic-double.c

Modified: 


Removed: 




diff  --git a/clang/test/CodeGen/X86/x86-atomic-double.c 
b/clang/test/CodeGen/X86/x86-atomic-double.c
new file mode 100644
index 0..2354c89cc2b17
--- /dev/null
+++ b/clang/test/CodeGen/X86/x86-atomic-double.c
@@ -0,0 +1,104 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 4
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -emit-llvm -o 
- | FileCheck -check-prefixes=X64 %s
+// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -emit-llvm -o - 
| FileCheck -check-prefixes=X86 %s
+
+
+// X64-LABEL: define dso_local double @test_double_post_inc(
+// X64-SAME: ) #[[ATTR0:[0-9]+]] {
+// X64-NEXT:  entry:
+// X64-NEXT:[[RETVAL:%.*]] = alloca double, align 8
+// X64-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_double_post_inc.n, 
float 1.00e+00 seq_cst, align 8
+// X64-NEXT:store float [[TMP0]], ptr [[RETVAL]], align 8
+// X64-NEXT:[[TMP1:%.*]] = load double, ptr [[RETVAL]], align 8
+// X64-NEXT:ret double [[TMP1]]
+//
+// X86-LABEL: define dso_local double @test_double_post_inc(
+// X86-SAME: ) #[[ATTR0:[0-9]+]] {
+// X86-NEXT:  entry:
+// X86-NEXT:[[RETVAL:%.*]] = alloca double, align 4
+// X86-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_double_post_inc.n, 
float 1.00e+00 seq_cst, align 8
+// X86-NEXT:store float [[TMP0]], ptr [[RETVAL]], align 4
+// X86-NEXT:[[TMP1:%.*]] = load double, ptr [[RETVAL]], align 4
+// X86-NEXT:ret double [[TMP1]]
+//
+double test_double_post_inc()
+{
+static _Atomic double n;
+return n++;
+}
+
+// X64-LABEL: define dso_local double @test_double_post_dc(
+// X64-SAME: ) #[[ATTR0]] {
+// X64-NEXT:  entry:
+// X64-NEXT:[[RETVAL:%.*]] = alloca double, align 8
+// X64-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_double_post_dc.n, 
float 1.00e+00 seq_cst, align 8
+// X64-NEXT:store float [[TMP0]], ptr [[RETVAL]], align 8
+// X64-NEXT:[[TMP1:%.*]] = load double, ptr [[RETVAL]], align 8
+// X64-NEXT:ret double [[TMP1]]
+//
+// X86-LABEL: define dso_local double @test_double_post_dc(
+// X86-SAME: ) #[[ATTR0]] {
+// X86-NEXT:  entry:
+// X86-NEXT:[[RETVAL:%.*]] = alloca double, align 4
+// X86-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_double_post_dc.n, 
float 1.00e+00 seq_cst, align 8
+// X86-NEXT:store float [[TMP0]], ptr [[RETVAL]], align 4
+// X86-NEXT:[[TMP1:%.*]] = load double, ptr [[RETVAL]], align 4
+// X86-NEXT:ret double [[TMP1]]
+//
+double test_double_post_dc()
+{
+static _Atomic double n;
+return n--;
+}
+
+// X64-LABEL: define dso_local double @test_double_pre_dc(
+// X64-SAME: ) #[[ATTR0]] {
+// X64-NEXT:  entry:
+// X64-NEXT:[[RETVAL:%.*]] = alloca double, align 8
+// X64-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_double_pre_dc.n, float 
1.00e+00 seq_cst, align 8
+// X64-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], 1.00e+00
+// X64-NEXT:store float [[TMP1]], ptr [[RETVAL]], align 8
+// X64-NEXT:[[TMP2:%.*]] = load double, ptr [[RETVAL]], align 8
+// X64-NEXT:ret double [[TMP2]]
+//
+// X86-LABEL: define dso_local double @test_double_pre_dc(
+// X86-SAME: ) #[[ATTR0]] {
+// X86-NEXT:  entry:
+// X86-NEXT:[[RETVAL:%.*]] = alloca double, align 4
+// X86-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_double_pre_dc.n, float 
1.00e+00 seq_cst, align 8
+// X86-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], 1.00e+00
+// X86-NEXT:store float [[TMP1]], ptr [[RETVAL]], align 4
+// X86-NEXT:[[TMP2:%.*]] = load double, ptr [[RETVAL]], align 4
+// X86-NEXT:ret double [[TMP2]]
+//
+double test_double_pre_dc()
+{
+static _Atomic double n;
+return --n;
+}
+
+// X64-LABEL: define dso_local double @test_double_pre_inc(
+// X64-SAME: ) #[[ATTR0]] {
+// X64-NEXT:  entry:
+// X64-NEXT:[[RETVAL:%.*]] = alloca double, align 8
+// X64-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_double_pre_inc.n, 
float 1.00e+00 seq_cst, align 8
+// X64-NEXT:[[TMP1:%.*]] = fadd float [[TMP0]], 1.00e+00
+// X64-NEXT:store float [[TMP1]], ptr [[RETVAL]], align 8
+// X64-NEXT:[[TMP2:%.*]] = load double, ptr [[RETVAL]], align 8
+// X64-NEXT:ret double [[TMP2]]
+//
+// X86-LABEL: define dso_local double @test_double_pre_inc(
+// X86-SAME: ) #[[ATTR0]] {
+// X86-NEXT:  entry:
+// X86-NEXT:[[RETVAL:%.*]] = alloca double, align 4
+// X86-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_double_pre_inc.n, 
f

[clang] f3fb7f5 - [X86] x86-atomic-float.c - cleanup unused check prefixes

[Simon Pilgrim via cfe-commits]

Author: Simon Pilgrim
Date: 2024-05-29T10:38:02+01:00
New Revision: f3fb7f569936db418feef98e4ae68777a9a4cd2a

URL: 
https://github.com/llvm/llvm-project/commit/f3fb7f569936db418feef98e4ae68777a9a4cd2a
DIFF: 
https://github.com/llvm/llvm-project/commit/f3fb7f569936db418feef98e4ae68777a9a4cd2a.diff

LOG: [X86] x86-atomic-float.c - cleanup unused check prefixes

Added: 


Modified: 
clang/test/CodeGen/X86/x86-atomic-float.c

Removed: 




diff  --git a/clang/test/CodeGen/X86/x86-atomic-float.c 
b/clang/test/CodeGen/X86/x86-atomic-float.c
index 2d3c72d2a0299..6ee441c2dd7a8 100644
--- a/clang/test/CodeGen/X86/x86-atomic-float.c
+++ b/clang/test/CodeGen/X86/x86-atomic-float.c
@@ -1,11 +1,11 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 4
-// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -emit-llvm -o 
- | FileCheck -check-prefixes=CHECK,CHECK64 %s
-// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -emit-llvm -o - 
| FileCheck -check-prefixes=CHECK,CHECK32 %s
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -emit-llvm -o 
- | FileCheck %s
+// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -emit-llvm -o - 
| FileCheck %s
 
 
 // CHECK-LABEL: define dso_local i32 @test_int_inc(
 // CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
-// CHECK-NEXT:  entry:
+// CHECK-NEXT:  [[ENTRY:.*:]]
 // CHECK-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 
seq_cst, align 4
 // CHECK-NEXT:ret i32 [[TMP0]]
 //
@@ -17,7 +17,7 @@ int test_int_inc()
 
 // CHECK-LABEL: define dso_local float @test_float_post_inc(
 // CHECK-SAME: ) #[[ATTR0]] {
-// CHECK-NEXT:  entry:
+// CHECK-NEXT:  [[ENTRY:.*:]]
 // CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, 
float 1.00e+00 seq_cst, align 4
 // CHECK-NEXT:ret float [[TMP0]]
 //
@@ -29,7 +29,7 @@ float test_float_post_inc()
 
 // CHECK-LABEL: define dso_local float @test_float_post_dc(
 // CHECK-SAME: ) #[[ATTR0]] {
-// CHECK-NEXT:  entry:
+// CHECK-NEXT:  [[ENTRY:.*:]]
 // CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, 
float 1.00e+00 seq_cst, align 4
 // CHECK-NEXT:ret float [[TMP0]]
 //
@@ -41,7 +41,7 @@ float test_float_post_dc()
 
 // CHECK-LABEL: define dso_local float @test_float_pre_dc(
 // CHECK-SAME: ) #[[ATTR0]] {
-// CHECK-NEXT:  entry:
+// CHECK-NEXT:  [[ENTRY:.*:]]
 // CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, 
float 1.00e+00 seq_cst, align 4
 // CHECK-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], 1.00e+00
 // CHECK-NEXT:ret float [[TMP1]]
@@ -54,7 +54,7 @@ float test_float_pre_dc()
 
 // CHECK-LABEL: define dso_local float @test_float_pre_inc(
 // CHECK-SAME: ) #[[ATTR0]] {
-// CHECK-NEXT:  entry:
+// CHECK-NEXT:  [[ENTRY:.*:]]
 // CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_pre_inc.n, 
float 1.00e+00 seq_cst, align 4
 // CHECK-NEXT:[[TMP1:%.*]] = fadd float [[TMP0]], 1.00e+00
 // CHECK-NEXT:ret float [[TMP1]]
@@ -64,6 +64,3 @@ float test_float_pre_inc()
 static _Atomic float n;
 return ++n;
 }
- NOTE: These prefixes are unused and the list is autogenerated. Do not add 
tests below this line:
-// CHECK32: {{.*}}
-// CHECK64: {{.*}}



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[clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #93202)

[via cfe-commits]

https://github.com/Lukacma updated 
https://github.com/llvm/llvm-project/pull/93202

>From a1750b2b5658f8ced700bbf010019703fc52f126 Mon Sep 17 00:00:00 2001
From: Caroline Concatto 
Date: Mon, 15 Apr 2024 13:31:00 +
Subject: [PATCH 1/7] [LLVM][AARCH64]Replace +sme2p1+smef16f16 by +smef16f16

According to the latest ISA Spec release[1] all instructions under:
 HasSME2p1 and HasSMEF16F16
should now only require:
HasSMEF16F16

[1]https://developer.arm.com
---
 llvm/test/MC/AArch64/SME2p1/fadd.s | 8 
 llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s | 2 +-
 llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s | 2 +-
 llvm/test/MC/AArch64/SME2p1/fsub.s | 8 
 4 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/llvm/test/MC/AArch64/SME2p1/fadd.s 
b/llvm/test/MC/AArch64/SME2p1/fadd.s
index bdb769093c838..ec4f27e021a00 100644
--- a/llvm/test/MC/AArch64/SME2p1/fadd.s
+++ b/llvm/test/MC/AArch64/SME2p1/fadd.s
@@ -1,16 +1,24 @@
 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \
 // RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f8f16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \
+// RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f8f16 < %s \
 // RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:| FileCheck %s --check-prefix=CHECK-ERROR
 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \
 // RUN:| llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s 
--check-prefix=CHECK-INST
 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \
+// RUN:| llvm-objdump -d --mattr=+sme-f16f16 - | FileCheck %s 
--check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f16f16 < %s \
 // RUN:| llvm-objdump -d --mattr=-sme2p1 - | FileCheck %s 
--check-prefix=CHECK-UNKNOWN
 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \
 // RUN:| sed '/.text/d' | sed 's/.*encoding: //g' \
 // RUN:| llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble 
-show-encoding \
+// RUN:| llvm-mc -triple=aarch64 -mattr=+sme-f16f16 -disassemble 
-show-encoding \
 // RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 
 faddza.h[w8, 0, vgx2], {z0.h, z1.h}  // 1101-10100100-00011100-
diff --git a/llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s 
b/llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s
index 2f0dccb57c907..c31b54fc05dea 100644
--- a/llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s
@@ -66,7 +66,7 @@ fmla za.h[w8, 8, vgx2], {z12.h-z13.h}, {z8.h-z9.h}
 // Invalid Register Suffix
 
 fmla za.d[w8, 7, vgx2], {z12.h-z13.h}, {z8.h-z9.h}
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected 
suffix .s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected 
suffix .h
 // CHECK-NEXT: fmla za.d[w8, 7, vgx2], {z12.h-z13.h}, {z8.h-z9.h}
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 
diff --git a/llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s 
b/llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s
index 3ff09321e3436..2deb18186eafc 100644
--- a/llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s
@@ -66,7 +66,7 @@ fmls za.h[w8, 8, vgx2], {z12.h-z13.h}, {z8.h-z9.h}
 // Invalid Register Suffix
 
 fmls za.d[w8, 7, vgx2], {z12.h-z13.h}, {z8.h-z9.h}
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected 
suffix .s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected 
suffix .h
 // CHECK-NEXT: fmls za.d[w8, 7, vgx2], {z12.h-z13.h}, {z8.h-z9.h}
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 
diff --git a/llvm/test/MC/AArch64/SME2p1/fsub.s 
b/llvm/test/MC/AArch64/SME2p1/fsub.s
index 66410008eb11d..e42a819e0d415 100644
--- a/llvm/test/MC/AArch64/SME2p1/fsub.s
+++ b/llvm/test/MC/AArch64/SME2p1/fsub.s
@@ -1,16 +1,24 @@
 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \
 // RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f8f16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f16f16 < %s \
+// RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f8f16 < %s \
 // RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:| FileCheck %s --check-prefix=CHECK-ERROR
 // 

[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Shengchen Kan via cfe-commits]

@@ -5394,10 +5394,12 @@ X86:
 - ``Z``: An immediate 32-bit unsigned integer.
 - ``q``: An 8, 16, 32, or 64-bit register which can be accessed as an 8-bit
   ``l`` integer register. On X86-32, this is the ``a``, ``b``, ``c``, and ``d``
-  registers, and on X86-64, it is all of the integer registers.
+  registers, and on X86-64, it is all of the integer registers. When feature
+  `egpr` and `inline-asm-use-gpr32` are both on, they will be extended to EGPR.

KanRobert wrote:

EGPR -> gp32

EGPR refers to r16-r31.

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Shengchen Kan via cfe-commits]

@@ -5394,10 +5394,12 @@ X86:
 - ``Z``: An immediate 32-bit unsigned integer.
 - ``q``: An 8, 16, 32, or 64-bit register which can be accessed as an 8-bit
   ``l`` integer register. On X86-32, this is the ``a``, ``b``, ``c``, and ``d``
-  registers, and on X86-64, it is all of the integer registers.
+  registers, and on X86-64, it is all of the integer registers. When feature
+  `egpr` and `inline-asm-use-gpr32` are both on, they will be extended to EGPR.
 - ``Q``: An 8, 16, 32, or 64-bit register which can be accessed as an 8-bit
   ``h`` integer register. This is the ``a``, ``b``, ``c``, and ``d`` registers.
-- ``r`` or ``l``: An 8, 16, 32, or 64-bit integer register.
+- ``r`` or ``l``: An 8, 16, 32, or 64-bit integer register. When feature
+  `egpr` and `inline-asm-use-gpr32` are both on, they will be extended to EGPR.

KanRobert wrote:

ditto

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [AArch64][SME] Add intrinsics for multi-vector BFCLAMP (PR #93532)

[via cfe-commits]

Lukacma wrote:

> You should just re-open the old PR instead of making a new one, or if the fix 
> is trivial then just re-commit the change without a PR unless you need 
> someone to review it.

I see. Wasn't aware of this. Thanks for pointing it out.

https://github.com/llvm/llvm-project/pull/93532
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[clang] 78cc9cb - [AArch64][SME] Add intrinsics for multi-vector BFCLAMP (#93532)

[via cfe-commits]

Author: Lukacma
Date: 2024-05-29T10:44:58+01:00
New Revision: 78cc9cbba23fd1783a9b233ae745f126ece56cc7

URL: 
https://github.com/llvm/llvm-project/commit/78cc9cbba23fd1783a9b233ae745f126ece56cc7
DIFF: 
https://github.com/llvm/llvm-project/commit/78cc9cbba23fd1783a9b233ae745f126ece56cc7.diff

LOG: [AArch64][SME] Add intrinsics for multi-vector BFCLAMP (#93532)

According to the specification in
https://github.com/ARM-software/acle/pull/309 this adds the intrinsics

```
  svbfloat16x2_t svclamp[_single_bf16_x2](svbfloat16x2_t zd, svbfloat16_t zn,
svbfloat16_t zm)  __arm_streaming;

  svbfloat16x4_t svclamp[_single_bf16_x4](svbfloat16x4_t zd, svbfloat16_t zn,
svbfloat16_t zm)  __arm_streaming;
```
These are available only  if __ARM_FEATURE_SME_B16B16 is enabled.

Added: 
clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_b16b16.cpp

Modified: 
clang/include/clang/Basic/arm_sve.td
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/test/CodeGen/AArch64/sve2p1-intrinsics-bfclamp.ll

Removed: 




diff  --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index 03570f94de666..078ef576342a7 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -2151,6 +2151,11 @@ let TargetGuard = "sme2" in {
   def SVFCLAMP_X4 : SInst<"svclamp[_single_{d}_x4]",  "44dd",   "hfd",  
MergeNone, "aarch64_sve_fclamp_single_x4",  [IsStreaming], []>;
 }
 
+let TargetGuard = "sme2,b16b16"in {
+  def SVBFCLAMP_X2 : SInst<"svclamp[_single_{d}_x2]",  "22dd",   "b",  
MergeNone, "aarch64_sve_bfclamp_single_x2",  [IsStreaming], []>;
+  def SVBFCLAMP_X4 : SInst<"svclamp[_single_{d}_x4]",  "44dd",   "b",  
MergeNone, "aarch64_sve_bfclamp_single_x4",  [IsStreaming], []>;
+}
+
 let TargetGuard = "sme2" in {
 // == ADD (vectors) ==
   def SVADD_SINGLE_X2 : SInst<"svadd[_single_{d}_x2]", "22d", "cUcsUsiUilUl", 
MergeNone, "aarch64_sve_add_single_x2", [IsStreaming], []>;

diff  --git a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c 
b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
index 57ea4d2a1ac47..21a8229bbf244 100644
--- a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
+++ b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
@@ -1,14 +1,14 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // REQUIRES: aarch64-registered-target
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 \
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +b16b16 \
 // RUN:  -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sme2 \
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sme2 -target-feature +b16b16 \
 // RUN:  -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 \
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +b16b16 \
 // RUN:  -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sme2 \
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu 
-target-feature +sme2 -target-feature +b16b16 \
 // RUN:  -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 \
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2 
-target-feature +b16b16 \
 // RUN:  -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
 
 #include 
@@ -745,3 +745,67 @@ svfloat32x4_t test_svclamp_single_f32_x4(svfloat32x4_t 
op1, svfloat32_t op2, svf
 svfloat64x4_t test_svclamp_single_f64_x4(svfloat64x4_t op1, svfloat64_t op2, 
svfloat64_t op3) __arm_streaming {
   return SVE_ACLE_FUNC(svclamp, _single_f64_x4, , )(op1, op2, op3);
 }
+
+// CHECK-LABEL: @test_svclamp_single_bf16_x2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = tail call  
@llvm.vector.extract.nxv8bf16.nxv16bf16( [[OP1:%.*]], i64 
0)
+// CHECK-NEXT:[[TMP1:%.*]] = tail call  
@llvm.vector.extract.nxv8bf16.nxv16bf16( [[OP1]], i64 8)
+// CHECK-NEXT:[[TMP2:%.*]] = tail call { ,  } @llvm.aarch64.sve.bfclamp.single.x2.nxv8bf16( [[TMP0]],  [[TMP1]],  
[[OP2:%.*]],  [[OP3:%.*]])
+// CHEC

[clang] [llvm] [AArch64][SME] Add intrinsics for multi-vector BFCLAMP (PR #93532)

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https://github.com/Lukacma closed 
https://github.com/llvm/llvm-project/pull/93532
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[clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #93201)

[via cfe-commits]

https://github.com/Lukacma updated 
https://github.com/llvm/llvm-project/pull/93201

>From c44bd42f8011dd09771fda50a76a7321342c2b2f Mon Sep 17 00:00:00 2001
From: Marian Lukac 
Date: Thu, 4 Apr 2024 14:36:54 +
Subject: [PATCH 1/6] WIP

---
 clang/include/clang/Basic/arm_sme.td  |  29 ++-
 .../acle_sme2p1_zero.c|  91 +
 .../acle_sme2p1_imm.cpp   | 190 ++
 llvm/include/llvm/IR/IntrinsicsAArch64.td |   6 +
 4 files changed, 315 insertions(+), 1 deletion(-)
 create mode 100644 
clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
 create mode 100644 
clang/test/Sema/aarch64-sme2p1-intrinsics/acle_sme2p1_imm.cpp

diff --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index 1ac6d5170ea28..b00eabe331169 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -146,6 +146,33 @@ let TargetGuard = "sme" in {
  [IsOverloadNone, IsStreamingCompatible, IsOutZA]>;
 }
 
+let TargetGuard = "sme2p1" in {
+  def SVZERO_ZA64_VG1x2 : SInst<"svzero_za64_vg1x2", "vi", "", MergeNone, 
"aarch64_sme_zero_za64_vg1x2",
+[IsOverloadNone, IsStreaming, IsInOutZA],
+[ImmCheck<0, ImmCheck0_7>]>;
+  def SVZERO_ZA64_VG1x4 : SInst<"svzero_za64_vg1x4", "vi", "", MergeNone, 
"aarch64_sme_zero_za64_vg1x4",
+[IsOverloadNone, IsStreaming, IsInOutZA],
+[ImmCheck<0, ImmCheck0_7>]>;
+  def SVZERO_ZA64_VG2x1 : SInst<"svzero_za64_vg2x1", "vi", "", MergeNone, 
"aarch64_sme_zero_za64_vg2x1",
+[IsOverloadNone, IsStreaming, IsInOutZA],
+[ImmCheck<0, ImmCheck0_7>]>;
+  def SVZERO_ZA64_VG2x2 : SInst<"svzero_za64_vg2x2", "vi", "", MergeNone, 
"aarch64_sme_zero_za64_vg2x2",
+[IsOverloadNone, IsStreaming, IsInOutZA],
+[ImmCheck<0, ImmCheck0_3>]>;
+  def SVZERO_ZA64_VG2x4 : SInst<"svzero_za64_vg2x4", "vi", "", MergeNone, 
"aarch64_sme_zero_za64_vg2x4",
+[IsOverloadNone, IsStreaming, IsInOutZA],
+[ImmCheck<0, ImmCheck0_3>]>;
+  def SVZERO_ZA64_VG4x1 : SInst<"svzero_za64_vg4x1", "vi", "", MergeNone, 
"aarch64_sme_zero_za64_vg4x1",
+[IsOverloadNone, IsStreaming, IsInOutZA],
+[ImmCheck<0, ImmCheck0_3>]>;
+  def SVZERO_ZA64_VG4x2 : SInst<"svzero_za64_vg4x2", "vi", "", MergeNone, 
"aarch64_sme_zero_za64_vg4x2",
+[IsOverloadNone, IsStreaming, IsInOutZA],
+[ImmCheck<0, ImmCheck0_1>]>;
+  def SVZERO_ZA64_VG4x4 : SInst<"svzero_za64_vg4x4", "vi", "", MergeNone, 
"aarch64_sme_zero_za64_vg4x4",
+[IsOverloadNone, IsStreaming, IsInOutZA],
+[ImmCheck<0, ImmCheck0_1>]>;
+}
+
 

 // SME - Counting elements in a streaming vector
 
@@ -673,4 +700,4 @@ let TargetGuard = "sme2" in {
 let TargetGuard = "sme2" in {
   def SVLUTI2_LANE_ZT_X2 : Inst<"svluti2_lane_zt_{d}_x2", "2.di[i", 
"cUcsUsiUibhf", MergeNone, "aarch64_sme_luti2_lane_zt_x2", [IsStreaming, 
IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_7>]>;
   def SVLUTI4_LANE_ZT_X2 : Inst<"svluti4_lane_zt_{d}_x2", "2.di[i", 
"cUcsUsiUibhf", MergeNone, "aarch64_sme_luti4_lane_zt_x2", [IsStreaming, 
IsInZT0], [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_3>]>;
-}
+}
\ No newline at end of file
diff --git a/clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c 
b/clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
new file mode 100644
index 0..3b661ec425cda
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
@@ -0,0 +1,91 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 4
+// REQUIRES: aarch64-registered-target
+
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2p1 -S 
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2p1 -S 
-disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+#include 
+
+#define SVE_ACLE_FUNC(A1,A2) A1##A2
+
+// CHECK-LABEL: define dso_local void @test_svzero_za64_vg1x2(
+// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:tail call void @llvm.aarch64.sme.zero.za64.vg1x2(i32 0)
+// CHECK-NEXT:ret void
+//
+void test_svzero_za64_vg1x2(void) __arm_streaming __arm_inout("za")
+{
+   SVE_ACLE_FUNC(svzero_za64,_vg1x2)(0);
+}
+
+// CHECK-LABEL: define dso_local void @test_svzero_za64_vg1x4(
+// CHECK

[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Shengchen Kan via cfe-commits]

@@ -57581,6 +57581,14 @@ X86TargetLowering::getConstraintType(StringRef 
Constraint) const {
   case '2':
 return C_RegisterClass;
   }
+case 'j':
+  switch (Constraint[1]) {
+  default:
+break;
+  case 'r':
+  case 'R':
+return C_RegisterClass;

KanRobert wrote:

What's this used for? I can't find `r` in the switch-cases before this PR.

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Shengchen Kan via cfe-commits]

@@ -57660,6 +57668,19 @@ X86TargetLowering::getSingleConstraintMatchWeight(
   break;
 }
 break;
+  case 'j':
+if (StringRef(Constraint).size() != 2)
+  break;
+switch (Constraint[1]) {
+default:
+  return CW_Invalid;
+case 'r':
+case 'R':
+  if (CallOperandVal->getType()->isIntegerTy())
+Wt = CW_SpecificReg;

KanRobert wrote:

Same question here.

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Shengchen Kan via cfe-commits]

KanRobert wrote:

Remove this test and update llvm/test/CodeGen/X86/apx/asm-constraint.ll

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Shengchen Kan via cfe-commits]

KanRobert wrote:

Merge this into llvm/test/CodeGen/X86/apx/inline-asm-jr-constraint.ll

You can add `not` at each run line. llc does not stop processing when 
encountering such kind of error.

https://github.com/llvm/llvm-project/pull/92338
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[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Shengchen Kan via cfe-commits]

@@ -0,0 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: not llc -mtriple=x86_64 %s 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: llc -mtriple=x86_64 -mattr=+egpr < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64 -mattr=+egpr,+inline-asm-use-gpr32 < %s | FileCheck 
%s

KanRobert wrote:

Add a new line for +inline-asm-use-gpr32 only

https://github.com/llvm/llvm-project/pull/92338
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[clang] 5c214eb - [Inline] Clone return range attribute on the callsite into inlined call (#92666)

[via cfe-commits]

Author: Andreas Jonson
Date: 2024-05-29T12:05:05+02:00
New Revision: 5c214eb0c628c874f2c9496e663be4067e64442a

URL: 
https://github.com/llvm/llvm-project/commit/5c214eb0c628c874f2c9496e663be4067e64442a
DIFF: 
https://github.com/llvm/llvm-project/commit/5c214eb0c628c874f2c9496e663be4067e64442a.diff

LOG: [Inline] Clone return range attribute on the callsite into inlined call 
(#92666)

Added: 


Modified: 
clang/test/Headers/__clang_hip_math.hip
llvm/lib/Transforms/Utils/InlineFunction.cpp
llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll

Removed: 




diff  --git a/clang/test/Headers/__clang_hip_math.hip 
b/clang/test/Headers/__clang_hip_math.hip
index 1271868a53b86..26da82843c512 100644
--- a/clang/test/Headers/__clang_hip_math.hip
+++ b/clang/test/Headers/__clang_hip_math.hip
@@ -231,7 +231,7 @@ extern "C" __device__ uint64_t test___make_mantissa(const 
char *p) {
 
 // CHECK-LABEL: @test_abs(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call noundef i32 @llvm.abs.i32(i32 
[[X:%.*]], i1 true)
+// CHECK-NEXT:[[TMP0:%.*]] = tail call noundef range(i32 0, -2147483648) 
i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
 // CHECK-NEXT:ret i32 [[TMP0]]
 //
 extern "C" __device__ int test_abs(int x) {
@@ -240,7 +240,7 @@ extern "C" __device__ int test_abs(int x) {
 
 // CHECK-LABEL: @test_labs(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call noundef i64 @llvm.abs.i64(i64 
[[X:%.*]], i1 true)
+// CHECK-NEXT:[[TMP0:%.*]] = tail call noundef range(i64 0, 
-9223372036854775808) i64 @llvm.abs.i64(i64 [[X:%.*]], i1 true)
 // CHECK-NEXT:ret i64 [[TMP0]]
 //
 extern "C" __device__ long test_labs(long x) {
@@ -249,7 +249,7 @@ extern "C" __device__ long test_labs(long x) {
 
 // CHECK-LABEL: @test_llabs(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call noundef i64 @llvm.abs.i64(i64 
[[X:%.*]], i1 true)
+// CHECK-NEXT:[[TMP0:%.*]] = tail call noundef range(i64 0, 
-9223372036854775808) i64 @llvm.abs.i64(i64 [[X:%.*]], i1 true)
 // CHECK-NEXT:ret i64 [[TMP0]]
 //
 extern "C" __device__ long long test_llabs(long x) {

diff  --git a/llvm/lib/Transforms/Utils/InlineFunction.cpp 
b/llvm/lib/Transforms/Utils/InlineFunction.cpp
index 7b846f2d2d72d..eb471b259c7d4 100644
--- a/llvm/lib/Transforms/Utils/InlineFunction.cpp
+++ b/llvm/lib/Transforms/Utils/InlineFunction.cpp
@@ -30,11 +30,12 @@
 #include "llvm/Analysis/ProfileSummaryInfo.h"
 #include "llvm/Analysis/ValueTracking.h"
 #include "llvm/Analysis/VectorUtils.h"
-#include "llvm/IR/AttributeMask.h"
 #include "llvm/IR/Argument.h"
+#include "llvm/IR/AttributeMask.h"
 #include "llvm/IR/BasicBlock.h"
 #include "llvm/IR/CFG.h"
 #include "llvm/IR/Constant.h"
+#include "llvm/IR/ConstantRange.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/DebugInfo.h"
@@ -1450,6 +1451,8 @@ static AttrBuilder 
IdentifyValidPoisonGeneratingAttributes(CallBase &CB) {
 Valid.addAttribute(Attribute::NonNull);
   if (CB.hasRetAttr(Attribute::Alignment))
 Valid.addAlignmentAttr(CB.getRetAlign());
+  if (std::optional Range = CB.getRange())
+Valid.addRangeAttr(*Range);
   return Valid;
 }
 
@@ -1541,6 +1544,14 @@ static void AddReturnAttributes(CallBase &CB, 
ValueToValueMapTy &VMap) {
 if (ValidPG.getAlignment().valueOrOne() < 
AL.getRetAlignment().valueOrOne())
   ValidPG.removeAttribute(Attribute::Alignment);
 if (ValidPG.hasAttributes()) {
+  Attribute CBRange = ValidPG.getAttribute(Attribute::Range);
+  if (CBRange.isValid()) {
+Attribute NewRange = AL.getRetAttr(Attribute::Range);
+if (NewRange.isValid()) {
+  ValidPG.addRangeAttr(
+  CBRange.getRange().intersectWith(NewRange.getRange()));
+}
+  }
   // Three checks.
   // If the callsite has `noundef`, then a poison due to violating the
   // return attribute will create UB anyways so we can always propagate.

diff  --git a/llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll 
b/llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll
index c038ffccf3e96..f4cebf1fcb5da 100644
--- a/llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll
+++ b/llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll
@@ -5,10 +5,12 @@
 
 declare ptr @foo()
 declare void @use.ptr(ptr) willreturn nounwind
+declare void @use.val(i8) willreturn nounwind
 declare void @bar()
 declare void @baz()
 declare ptr @llvm.ptrmask.p0.i64(ptr, i64)
 declare i1 @val()
+declare i8 @val8()
 
 define ptr @callee0123() {
 ; CHECK-LABEL: define ptr @callee0123() {
@@ -337,3 +339,74 @@ define ptr @caller12_todo() {
   %r = call nonnull ptr @callee12()
   ret ptr %r
 }
+
+define i8 @callee13() {
+; CHECK-LABEL: define i8 @callee13() {
+; CHECK-NEXT:[[R:%.*]] = call i8 @val8()
+; CHECK-NEXT:ret i8 [[R]]
+;
+  %r = call i8 @val8()
+  ret i8 %r
+}
+
+define i8 @caller13_

[clang] [llvm] [inline] Clone return range attribute on the callsite into inlined call (PR #92666)

[Nikita Popov via cfe-commits]

https://github.com/nikic closed https://github.com/llvm/llvm-project/pull/92666
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[clang] e93799f - [SME] Add intrinsics for FCVT(wid.) and FCVTL (#93202)

[via cfe-commits]

Author: Lukacma
Date: 2024-05-29T11:34:24+01:00
New Revision: e93799f260e881ff2f7c0fd7afc78374d615d70e

URL: 
https://github.com/llvm/llvm-project/commit/e93799f260e881ff2f7c0fd7afc78374d615d70e
DIFF: 
https://github.com/llvm/llvm-project/commit/e93799f260e881ff2f7c0fd7afc78374d615d70e.diff

LOG: [SME] Add intrinsics for FCVT(wid.) and FCVTL (#93202)

According to the specification in
https://github.com/ARM-software/acle/pull/309 this adds the intrinsics
```
svfloat32x2_t svcvt_f32[_f16_x2](svfloat16_t zn) __arm_streaming;
svfloat32x2_t svcvtl_f32[_f16_x2](svfloat16_t zn) __arm_streaming;

```
These are available only if __ARM_FEATURE_SME_F16F16 is enabled.

-

Co-authored-by: Caroline Concatto 

Added: 
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtl.c
llvm/test/CodeGen/AArch64/sme2-intrinsics-cvtl.ll

Modified: 
clang/include/clang/Basic/arm_sve.td
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/test/CodeGen/AArch64/sme2-intrinsics-cvt.ll

Removed: 




diff  --git a/clang/include/clang/Basic/arm_sve.td 
b/clang/include/clang/Basic/arm_sve.td
index 078ef576342a7..88938a981fd8a 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -2270,6 +2270,10 @@ let TargetGuard = "sme2" in {
   def SVCVT_S32_F32_X4 : SInst<"svcvt_{d}[_f32_x4]", "4.d4.M", "i",  
MergeNone, "aarch64_sve_fcvtzs_x4", [IsStreaming, 
IsOverloadWhileOrMultiVecCvt], []>;
 }
 
+let TargetGuard = "sme-f16f16" in {
+  def SVCVT_F32_X2 : SInst<"svcvt_{d}[_f16_x2]", "2h", "f", MergeNone, 
"aarch64_sve_fcvt_widen_x2", [ IsStreaming],[]>;
+}
+
 //
 // Multi-vector floating-point convert from single-precision to interleaved 
half-precision/BFloat16
 //
@@ -2278,6 +2282,13 @@ let TargetGuard = "sme2" in {
   def SVCVTN_BF16_X2 : SInst<"svcvtn_bf16[_f32_x2]", "$2", "f", MergeNone, 
"aarch64_sve_bfcvtn_x2", [IsOverloadNone, IsStreaming],[]>;
 }
 
+//
+//Multi-vector floating-point convert from half-precision to deinterleaved 
single-precision.
+//
+let TargetGuard = "sme-f16f16" in {
+  def SVCVTL_F32_X2 : SInst<"svcvtl_f32[_f16_x2]", "2h", "f", MergeNone, 
"aarch64_sve_fcvtl_widen_x2", [ IsStreaming],[]>;
+}
+
 //
 // Multi-vector saturating extract narrow
 //

diff  --git a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c 
b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
index 4a5ee7e021f74..e26499d3a63cc 100644
--- a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
+++ b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
@@ -497,3 +497,25 @@ svuint8_t test_qcvt_u8_s32_x4(svint32x4_t zn) 
__arm_streaming {
 svuint16_t test_qcvt_u16_s64_x4(svint64x4_t zn) __arm_streaming {
   return SVE_ACLE_FUNC(svqcvt_u16,_s64_x4,,)(zn);
 }
+
+// CHECK-LABEL: @test_cvt_f32_x2(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = tail call { ,  } @llvm.aarch64.sve.fcvt.widen.x2.nxv4f32( 
[[ZN:%.*]])
+// CHECK-NEXT:[[TMP1:%.*]] = extractvalue { ,  } [[TMP0]], 0
+// CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.vector.insert.nxv8f32.nxv4f32( poison,  [[TMP1]], i64 0)
+// CHECK-NEXT:[[TMP3:%.*]] = extractvalue { ,  } [[TMP0]], 1
+// CHECK-NEXT:[[TMP4:%.*]] = tail call  
@llvm.vector.insert.nxv8f32.nxv4f32( [[TMP2]],  [[TMP3]], i64 4)
+// CHECK-NEXT:ret  [[TMP4]]
+//
+// CPP-CHECK-LABEL: @_Z15test_cvt_f32_x2u13__SVFloat16_t(
+// CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:[[TMP0:%.*]] = tail call { ,  } @llvm.aarch64.sve.fcvt.widen.x2.nxv4f32( 
[[ZN:%.*]])
+// CPP-CHECK-NEXT:[[TMP1:%.*]] = extractvalue { , 
 } [[TMP0]], 0
+// CPP-CHECK-NEXT:[[TMP2:%.*]] = tail call  
@llvm.vector.insert.nxv8f32.nxv4f32( poison,  [[TMP1]], i64 0)
+// CPP-CHECK-NEXT:[[TMP3:%.*]] = extractvalue { , 
 } [[TMP0]], 1
+// CPP-CHECK-NEXT:[[TMP4:%.*]] = tail call  
@llvm.vector.insert.nxv8f32.nxv4f32( [[TMP2]],  [[TMP3]], i64 4)
+// CPP-CHECK-NEXT:ret  [[TMP4]]
+//
+__attribute__((target("sme-f16f16"))) svfloat32x2_t 
test_cvt_f32_x2(svfloat16_t zn)  __arm_streaming {
+  return SVE_ACLE_FUNC(svcvt_f32,_f16_x2,,)(zn);
+}

diff  --git a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtl.c 
b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtl.c
new file mode 100644
index 0..453dd3db6adf0
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtl.c
@@ -0,0 +1,40 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+
+// REQUIRES: aarch64-registered-target
+
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme 
-target-feature +sme-f16f16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - 
%s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme 
-target-feature +sme-f16f16 -d

[clang] [llvm] [SME] Add intrinsics for FCVT(wid.) and FCVTL (PR #93202)

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https://github.com/Lukacma closed 
https://github.com/llvm/llvm-project/pull/93202
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[clang] 1e44a96 - [AArch64][SME] Add intrinsics for vector groups ZERO (#93201)

[via cfe-commits]

Author: Lukacma
Date: 2024-05-29T11:35:21+01:00
New Revision: 1e44a9690915e8acf7b2a0e67b56aaf4509e9257

URL: 
https://github.com/llvm/llvm-project/commit/1e44a9690915e8acf7b2a0e67b56aaf4509e9257
DIFF: 
https://github.com/llvm/llvm-project/commit/1e44a9690915e8acf7b2a0e67b56aaf4509e9257.diff

LOG: [AArch64][SME] Add intrinsics for vector groups ZERO (#93201)

According to the specification in
https://github.com/ARM-software/acle/pull/309 this adds the intrinsics:

  void svzero_za64_vg1x2(uint32_t slice)
__arm_streaming __arm_inout("za");

  void svzero_za64_vg1x4(uint32_t slice)
__arm_streaming __arm_inout("za");

  void svzero_za64_vg2x1(uint32_t slice)
__arm_streaming __arm_inout("za");

  void svzero_za64_vg2x2(uint32_t slice)
__arm_streaming __arm_inout("za");

  void svzero_za64_vg2x4(uint32_t slice)
__arm_streaming __arm_inout("za");

  void svzero_za64_vg4x1(uint32_t slice)
__arm_streaming __arm_inout("za");

  void svzero_za64_vg4x2(uint32_t slice)
__arm_streaming __arm_inout("za");

  void svzero_za64_vg4x4(uint32_t slice)
__arm_streaming __arm_inout("za");

Added: 
clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
llvm/test/CodeGen/AArch64/sme2p1-intrinsics-zero.ll

Modified: 
clang/include/clang/Basic/arm_sme.td
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/SMEInstrFormats.td

Removed: 




diff  --git a/clang/include/clang/Basic/arm_sme.td 
b/clang/include/clang/Basic/arm_sme.td
index 80e635e4a57ec..564a58e4eb670 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -146,6 +146,25 @@ let TargetGuard = "sme" in {
  [IsOverloadNone, IsStreamingCompatible, IsOutZA]>;
 }
 
+let TargetGuard = "sme2p1" in {
+  def SVZERO_ZA64_VG1x2 : SInst<"svzero_za64_vg1x2", "vm", "", MergeNone, 
"aarch64_sme_zero_za64_vg1x2",
+[IsOverloadNone, IsStreaming, IsInOutZA]>;
+  def SVZERO_ZA64_VG1x4 : SInst<"svzero_za64_vg1x4", "vm", "", MergeNone, 
"aarch64_sme_zero_za64_vg1x4",
+[IsOverloadNone, IsStreaming, IsInOutZA]>;
+  def SVZERO_ZA64_VG2x1 : SInst<"svzero_za64_vg2x1", "vm", "", MergeNone, 
"aarch64_sme_zero_za64_vg2x1",
+[IsOverloadNone, IsStreaming, IsInOutZA]>;
+  def SVZERO_ZA64_VG2x2 : SInst<"svzero_za64_vg2x2", "vm", "", MergeNone, 
"aarch64_sme_zero_za64_vg2x2",
+[IsOverloadNone, IsStreaming, IsInOutZA]>;
+  def SVZERO_ZA64_VG2x4 : SInst<"svzero_za64_vg2x4", "vm", "", MergeNone, 
"aarch64_sme_zero_za64_vg2x4",
+[IsOverloadNone, IsStreaming, IsInOutZA]>;
+  def SVZERO_ZA64_VG4x1 : SInst<"svzero_za64_vg4x1", "vm", "", MergeNone, 
"aarch64_sme_zero_za64_vg4x1",
+[IsOverloadNone, IsStreaming, IsInOutZA]>;
+  def SVZERO_ZA64_VG4x2 : SInst<"svzero_za64_vg4x2", "vm", "", MergeNone, 
"aarch64_sme_zero_za64_vg4x2",
+[IsOverloadNone, IsStreaming, IsInOutZA]>;
+  def SVZERO_ZA64_VG4x4 : SInst<"svzero_za64_vg4x4", "vm", "", MergeNone, 
"aarch64_sme_zero_za64_vg4x4",
+[IsOverloadNone, IsStreaming, IsInOutZA]>;
+}
+
 

 // SME - Counting elements in a streaming vector
 

diff  --git a/clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c 
b/clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
new file mode 100644
index 0..2ad2044c267ed
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sme2p1-intrinsics/acle_sme2p1_zero.c
@@ -0,0 +1,139 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 4
+// REQUIRES: aarch64-registered-target
+
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2p1 
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2p1 
-disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p 
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme2p1 
-disable-O0-optnone -Werror -Wall -o /dev/null %s
+
+#include 
+
+#define SVE_ACLE_FUNC(A1,A2) A1##A2
+
+// CHECK-LABEL: define dso_local void @test_svzero_za64_vg1x2(
+// CHECK-SAME: i32 noundef [[SLICE:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:tail call void @llvm.aarch64.sme.zero.za64.vg1x2(i32 
[[SLICE]])
+// CHECK-NEXT:ret void
+//
+// CPP-CHECK-LABEL: define dso_local void @_Z22test_svzero_za64_vg1x2j(
+// CPP-CHECK-SAME: i32 noundef [[SLICE:%.*]]) #[[ATTR0:[0-9]+]] {
+// CPP-CHECK-NEXT:  entry:
+// CPP-CHECK-NEXT:tail call void @llvm.aarch64.sme.zero.za64.vg1x2

[clang] [llvm] [AArch64][SME] Add intrinsics for vector groups ZERO (PR #93201)

[via cfe-commits]

https://github.com/Lukacma closed 
https://github.com/llvm/llvm-project/pull/93201
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[clang] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

[Matt Arsenault via cfe-commits]

@@ -0,0 +1,180 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --function-signature
+
+// Simple calls to known variadic functions that are completely elided when
+// optimisations are on This is a functional check that the expand-variadic 
pass
+// is consistent with clang's va_arg handling
+
+// When expand-variadics is added to the default pipeline, clang -O1 will
+// suffice here -Wno-varargs avoids warning second argument to 'va_start' is 
not
+// the last named parameter
+
+// RUN: %clang_cc1 %s -triple wasm32-unknown-unknown -Wno-varargs -O1 
-emit-llvm -o - | opt - -S --passes='module(expand-variadics,default)' 
--expand-variadics-override=optimize -o - | FileCheck %s

arsenm wrote:

Does this need REQUIRES: wasm-registered-target 

https://github.com/llvm/llvm-project/pull/93362
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[clang] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

[Matt Arsenault via cfe-commits]

@@ -103,19 +104,27 @@ void AMDGPUABIInfo::computeInfo(CGFunctionInfo &FI) const 
{
   if (!getCXXABI().classifyReturnType(FI))
 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
 
+  unsigned ArgumentIndex = 0;
+  const unsigned numFixedArguments = FI.getNumRequiredArgs();

arsenm wrote:

Can you split the clang AMDGPU ABI changes into a separate PR? The tests for 
this are also missing 

https://github.com/llvm/llvm-project/pull/93362
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[clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)

[Vikram Hegde via cfe-commits]

https://github.com/vikramRH edited 
https://github.com/llvm/llvm-project/pull/92725
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[clang] [llvm] [AMDGPU][WIP] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (PR #92725)

[Vikram Hegde via cfe-commits]

vikramRH wrote:

1. Added/updated tests for permlanex16, permlane64
2. This needs https://github.com/llvm/llvm-project/pull/89217 to land first so 
that only incremental changes can be reviewed. 

https://github.com/llvm/llvm-project/pull/92725
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[clang] [clang] Implement a bitwise_copyable builtin type trait. (PR #86512)

[Haojian Wu via cfe-commits]

https://github.com/hokein edited https://github.com/llvm/llvm-project/pull/86512
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[clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)

[Matt Arsenault via cfe-commits]

@@ -1170,6 +1170,23 @@ The AMDGPU backend implements the following LLVM IR 
intrinsics.
 
   :ref:`llvm.set.fpenv` Sets the floating point 
environment to the specifies state.
 
+  llvm.amdgcn.readfirstlaneProvides direct access to 
v_readfirstlane_b32. Returns the value in
+   the lowest active lane of 
the input operand. Currently 
+   implemented for i16, i32, 
float, half, bf16, v2i16, v2f16 and types 

arsenm wrote:

This mixes type naming conventions. Probably should stick to the IR convention 
(and say `bfloat`, `<2 x i16>`, `<2 x half>`, `<2 x bfloat>`. Also, pointers 
double, and multiples of the 32-bit vectors should work.

https://github.com/llvm/llvm-project/pull/89217
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[clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)

[Matt Arsenault via cfe-commits]

@@ -5387,6 +5387,124 @@ bool 
AMDGPULegalizerInfo::legalizeDSAtomicFPIntrinsic(LegalizerHelper &Helper,
   return true;
 }
 
+// TODO: Fix pointer type handling
+bool AMDGPULegalizerInfo::legalizeLaneOp(LegalizerHelper &Helper,
+ MachineInstr &MI,
+ Intrinsic::ID IID) const {
+
+  MachineIRBuilder &B = Helper.MIRBuilder;
+  MachineRegisterInfo &MRI = *B.getMRI();
+
+  Register DstReg = MI.getOperand(0).getReg();
+  Register Src0 = MI.getOperand(2).getReg();
+
+  auto createLaneOp = [&](Register Src0, Register Src1,
+  Register Src2) -> Register {
+auto LaneOp = B.buildIntrinsic(IID, {S32}).addUse(Src0);
+switch (IID) {
+case Intrinsic::amdgcn_readfirstlane:
+  return LaneOp.getReg(0);
+case Intrinsic::amdgcn_readlane:
+  return LaneOp.addUse(Src1).getReg(0);
+case Intrinsic::amdgcn_writelane:
+  return LaneOp.addUse(Src1).addUse(Src2).getReg(0);
+default:
+  llvm_unreachable("unhandled lane op");
+}
+  };
+
+  Register Src1, Src2;
+  if (IID == Intrinsic::amdgcn_readlane || IID == Intrinsic::amdgcn_writelane) 
{
+Src1 = MI.getOperand(3).getReg();
+if (IID == Intrinsic::amdgcn_writelane) {
+  Src2 = MI.getOperand(4).getReg();
+}
+  }
+
+  LLT Ty = MRI.getType(DstReg);
+  unsigned Size = Ty.getSizeInBits();
+
+  if (Size == 32) {
+// Already legal
+return true;
+  }
+
+  if (Size < 32) {
+Src0 = B.buildAnyExt(S32, Src0).getReg(0);
+if (Src2.isValid())
+  Src2 = B.buildAnyExt(LLT::scalar(32), Src2).getReg(0);
+
+Register LaneOpDst = createLaneOp(Src0, Src1, Src2);
+B.buildTrunc(DstReg, LaneOpDst);
+
+MI.eraseFromParent();
+return true;
+  }
+
+  if ((Size % 32) == 0) {

arsenm wrote:

Early return instead of indenting everything on this.

https://github.com/llvm/llvm-project/pull/89217
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[clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)

[Matt Arsenault via cfe-commits]

@@ -6086,6 +6086,63 @@ static SDValue lowerBALLOTIntrinsic(const 
SITargetLowering &TLI, SDNode *N,
   DAG.getConstant(0, SL, MVT::i32), DAG.getCondCode(ISD::SETNE));
 }
 
+static SDValue lowerLaneOp(const SITargetLowering &TLI, SDNode *N,
+   SelectionDAG &DAG) {
+  EVT VT = N->getValueType(0);
+  unsigned ValSize = VT.getSizeInBits();
+  unsigned IntrinsicID = N->getConstantOperandVal(0);
+  SDValue Src0 = N->getOperand(1);
+  SDLoc SL(N);
+  MVT IntVT = MVT::getIntegerVT(ValSize);
+
+  auto createLaneOp = [&DAG, &SL](SDValue Src0, SDValue Src1, SDValue Src2,
+  MVT VT) -> SDValue {
+return (Src2 ? DAG.getNode(AMDGPUISD::WRITELANE, SL, VT, {Src0, Src1, 
Src2})
+: Src1 ? DAG.getNode(AMDGPUISD::READLANE, SL, VT, {Src0, Src1})
+   : DAG.getNode(AMDGPUISD::READFIRSTLANE, SL, VT, {Src0}));
+  };
+
+  SDValue Src1, Src2;
+  if (IntrinsicID == Intrinsic::amdgcn_readlane ||
+  IntrinsicID == Intrinsic::amdgcn_writelane) {
+Src1 = N->getOperand(2);
+if (IntrinsicID == Intrinsic::amdgcn_writelane)
+  Src2 = N->getOperand(3);
+  }
+
+  if (ValSize == 32) {
+// Already legal
+return SDValue();
+  }
+
+  if (ValSize < 32) {
+bool IsFloat = VT.isFloatingPoint();
+Src0 = DAG.getAnyExtOrTrunc(IsFloat ? DAG.getBitcast(IntVT, Src0) : Src0,
+SL, MVT::i32);
+if (Src2.getNode()) {
+  Src2 = DAG.getAnyExtOrTrunc(IsFloat ? DAG.getBitcast(IntVT, Src2) : Src2,
+  SL, MVT::i32);
+}
+SDValue LaneOp = createLaneOp(Src0, Src1, Src2, MVT::i32);
+SDValue Trunc = DAG.getAnyExtOrTrunc(LaneOp, SL, IntVT);
+return IsFloat ? DAG.getBitcast(VT, Trunc) : Trunc;
+  }
+
+  if ((ValSize % 32) == 0) {
+MVT VecVT = MVT::getVectorVT(MVT::i32, ValSize / 32);

arsenm wrote:

Same comment, but more important than the globalisel case. Try to maintain the 
element type (e.g. v2f32->f32) 

https://github.com/llvm/llvm-project/pull/89217
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[clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)

[Matt Arsenault via cfe-commits]

@@ -1170,6 +1170,23 @@ The AMDGPU backend implements the following LLVM IR 
intrinsics.
 
   :ref:`llvm.set.fpenv` Sets the floating point 
environment to the specifies state.
 
+  llvm.amdgcn.readfirstlaneProvides direct access to 
v_readfirstlane_b32. Returns the value in
+   the lowest active lane of 
the input operand. Currently 
+   implemented for i16, i32, 
float, half, bf16, v2i16, v2f16 and types 
+   whose sizes are multiples 
of 32-bit.
+
+  llvm.amdgcn.readlane Provides direct access to 
v_readlane_b32. Returns the value in the 
+   specified lane of the first 
input operand. The second operand 
+   specifies the lane to read 
from. Currently implemented
+   for i16, i32, float, half, 
bf16, v2i16, v2f16 and types whose sizes

arsenm wrote:

Should probably try to avoid repeating all the same information on all 3 
intrinsics 

https://github.com/llvm/llvm-project/pull/89217
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[clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)

[Matt Arsenault via cfe-commits]

@@ -5387,6 +5387,124 @@ bool 
AMDGPULegalizerInfo::legalizeDSAtomicFPIntrinsic(LegalizerHelper &Helper,
   return true;
 }
 
+// TODO: Fix pointer type handling
+bool AMDGPULegalizerInfo::legalizeLaneOp(LegalizerHelper &Helper,
+ MachineInstr &MI,
+ Intrinsic::ID IID) const {
+
+  MachineIRBuilder &B = Helper.MIRBuilder;
+  MachineRegisterInfo &MRI = *B.getMRI();
+
+  Register DstReg = MI.getOperand(0).getReg();
+  Register Src0 = MI.getOperand(2).getReg();
+
+  auto createLaneOp = [&](Register Src0, Register Src1,
+  Register Src2) -> Register {
+auto LaneOp = B.buildIntrinsic(IID, {S32}).addUse(Src0);
+switch (IID) {
+case Intrinsic::amdgcn_readfirstlane:
+  return LaneOp.getReg(0);
+case Intrinsic::amdgcn_readlane:
+  return LaneOp.addUse(Src1).getReg(0);
+case Intrinsic::amdgcn_writelane:
+  return LaneOp.addUse(Src1).addUse(Src2).getReg(0);
+default:
+  llvm_unreachable("unhandled lane op");
+}
+  };
+
+  Register Src1, Src2;
+  if (IID == Intrinsic::amdgcn_readlane || IID == Intrinsic::amdgcn_writelane) 
{
+Src1 = MI.getOperand(3).getReg();
+if (IID == Intrinsic::amdgcn_writelane) {
+  Src2 = MI.getOperand(4).getReg();
+}
+  }
+
+  LLT Ty = MRI.getType(DstReg);
+  unsigned Size = Ty.getSizeInBits();
+
+  if (Size == 32) {
+// Already legal
+return true;
+  }
+
+  if (Size < 32) {
+Src0 = B.buildAnyExt(S32, Src0).getReg(0);
+if (Src2.isValid())
+  Src2 = B.buildAnyExt(LLT::scalar(32), Src2).getReg(0);
+
+Register LaneOpDst = createLaneOp(Src0, Src1, Src2);
+B.buildTrunc(DstReg, LaneOpDst);
+
+MI.eraseFromParent();
+return true;
+  }
+
+  if ((Size % 32) == 0) {
+SmallVector PartialRes;
+unsigned NumParts = Size / 32;
+LLT PartialResTy =
+Ty.isVector() && Ty.getElementType() == S16 ? V2S16 : S32;

arsenm wrote:

This isn't trying to preserve pointer element types, and will also lose FP 
information in the future. Can you use changeElementCount in the size == 16 
case, and try to maintain the element type for the 32-bit case? 

https://github.com/llvm/llvm-project/pull/89217
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[clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)

[Matt Arsenault via cfe-commits]

@@ -6086,6 +6086,63 @@ static SDValue lowerBALLOTIntrinsic(const 
SITargetLowering &TLI, SDNode *N,
   DAG.getConstant(0, SL, MVT::i32), DAG.getCondCode(ISD::SETNE));
 }
 
+static SDValue lowerLaneOp(const SITargetLowering &TLI, SDNode *N,
+   SelectionDAG &DAG) {
+  EVT VT = N->getValueType(0);
+  unsigned ValSize = VT.getSizeInBits();
+  unsigned IntrinsicID = N->getConstantOperandVal(0);
+  SDValue Src0 = N->getOperand(1);
+  SDLoc SL(N);
+  MVT IntVT = MVT::getIntegerVT(ValSize);
+
+  auto createLaneOp = [&DAG, &SL](SDValue Src0, SDValue Src1, SDValue Src2,
+  MVT VT) -> SDValue {
+return (Src2 ? DAG.getNode(AMDGPUISD::WRITELANE, SL, VT, {Src0, Src1, 
Src2})
+: Src1 ? DAG.getNode(AMDGPUISD::READLANE, SL, VT, {Src0, Src1})
+   : DAG.getNode(AMDGPUISD::READFIRSTLANE, SL, VT, {Src0}));
+  };
+
+  SDValue Src1, Src2;
+  if (IntrinsicID == Intrinsic::amdgcn_readlane ||
+  IntrinsicID == Intrinsic::amdgcn_writelane) {
+Src1 = N->getOperand(2);
+if (IntrinsicID == Intrinsic::amdgcn_writelane)
+  Src2 = N->getOperand(3);
+  }
+
+  if (ValSize == 32) {
+// Already legal
+return SDValue();
+  }
+
+  if (ValSize < 32) {
+bool IsFloat = VT.isFloatingPoint();
+Src0 = DAG.getAnyExtOrTrunc(IsFloat ? DAG.getBitcast(IntVT, Src0) : Src0,
+SL, MVT::i32);
+if (Src2.getNode()) {
+  Src2 = DAG.getAnyExtOrTrunc(IsFloat ? DAG.getBitcast(IntVT, Src2) : Src2,
+  SL, MVT::i32);
+}
+SDValue LaneOp = createLaneOp(Src0, Src1, Src2, MVT::i32);
+SDValue Trunc = DAG.getAnyExtOrTrunc(LaneOp, SL, IntVT);
+return IsFloat ? DAG.getBitcast(VT, Trunc) : Trunc;
+  }
+
+  if ((ValSize % 32) == 0) {
+MVT VecVT = MVT::getVectorVT(MVT::i32, ValSize / 32);
+Src0 = DAG.getBitcast(VecVT, Src0);
+
+if (Src2.getNode())
+  Src2 = DAG.getBitcast(VecVT, Src2);
+
+SDValue LaneOp = createLaneOp(Src0, Src1, Src2, VecVT);
+SDValue UnrolledLaneOp = DAG.UnrollVectorOp(LaneOp.getNode());
+return DAG.getBitcast(VT, UnrolledLaneOp);

arsenm wrote:

You should not be using TLI.getRegClassFor or getTargetExtractSubreg. The 
GlobalISel equivalent does not use these. Stick to the higher level operations 
unless necessary, which it isn't here 

https://github.com/llvm/llvm-project/pull/89217
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[clang] Reapply "[Clang][Sema] placement new initializes typedef array with correct size (#83124)" (PR #89036)

[via cfe-commits]

awson wrote:

It looks like the author of the patch have either diverted to other activities 
or is unable to fix it.

Could we, perhaps, **just diagnose** the situation and gracefully fail with 
something like "typedefed array blah-blah is not supported in blah-blah" 
instead of generating segfaulting code?

https://github.com/llvm/llvm-project/pull/89036
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[clang] [clang][dataflow] Rewrite `getReferencedDecls()` with a `RecursiveASTVisitor`. (PR #93461)

[Yitzhak Mandelbaum via cfe-commits]

https://github.com/ymand approved this pull request.


https://github.com/llvm/llvm-project/pull/93461
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[clang] [clang][dataflow] Rewrite `getReferencedDecls()` with a `RecursiveASTVisitor`. (PR #93461)

[Yitzhak Mandelbaum via cfe-commits]

@@ -188,90 +188,97 @@ static MemberExpr *getMemberForAccessor(const 
CXXMemberCallExpr &C) {
   return nullptr;
 }
 
-static void getReferencedDecls(const Decl &D, ReferencedDecls &Referenced) {
-  insertIfGlobal(D, Referenced.Globals);
-  insertIfFunction(D, Referenced.Functions);
-  if (const auto *Decomp = dyn_cast(&D))
-for (const auto *B : Decomp->bindings())
-  if (auto *ME = dyn_cast_or_null(B->getBinding()))
-// FIXME: should we be using `E->getFoundDecl()`?
-if (const auto *FD = dyn_cast(ME->getMemberDecl()))
-  Referenced.Fields.insert(FD);
-}
+class ReferencedDeclsVisitor
+: public AnalysisASTVisitor {
+public:
+  ReferencedDeclsVisitor(ReferencedDecls &Referenced)
+  : Referenced(Referenced) {}
+
+  void TraverseConstructorInits(const CXXConstructorDecl *Ctor) {
+for (const CXXCtorInitializer *Init : Ctor->inits()) {
+  if (Init->isMemberInitializer()) {
+Referenced.Fields.insert(Init->getMember());
+  } else if (Init->isIndirectMemberInitializer()) {
+for (const auto *I : Init->getIndirectMember()->chain())
+  Referenced.Fields.insert(cast(I));
+  }
+
+  Expr *InitExpr = Init->getInit();
+
+  // Ensure that any result objects within `InitExpr` (e.g. temporaries)
+  // are also propagated to the prvalues that initialize them.

ymand wrote:

Here and below: this comment seems out of place for this visitor -- it's just 
collecting names, not doing any propagating (I thought)?

https://github.com/llvm/llvm-project/pull/93461
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[clang] [clang][dataflow] Rewrite `getReferencedDecls()` with a `RecursiveASTVisitor`. (PR #93461)

[Yitzhak Mandelbaum via cfe-commits]

https://github.com/ymand edited https://github.com/llvm/llvm-project/pull/93461
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[clang] [clang][analyzer] Improved PointerSubChecker (PR #93676)

[Balázs Kéri via cfe-commits]

https://github.com/balazske created 
https://github.com/llvm/llvm-project/pull/93676

The checker is made more exact (only pointer into array is allowed) and more 
tests are added.

From a896030e71d09ebe7239d6fab343606918ee4c1b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bal=C3=A1zs=20K=C3=A9ri?= 
Date: Wed, 29 May 2024 14:28:43 +0200
Subject: [PATCH] [clang][analyzer] Improved PointerSubChecker

The checker is made more exact (only pointer into array is allowed)
and more tests are added.
---
 .../Checkers/PointerSubChecker.cpp| 34 +
 clang/test/Analysis/pointer-sub.c | 74 +++
 clang/test/Analysis/ptr-arith.c   | 14 +---
 3 files changed, 96 insertions(+), 26 deletions(-)
 create mode 100644 clang/test/Analysis/pointer-sub.c

diff --git a/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp 
b/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
index 2438cf30b39b5..4caa9ded93ed4 100644
--- a/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
@@ -35,7 +35,7 @@ class PointerSubChecker
 void PointerSubChecker::checkPreStmt(const BinaryOperator *B,
  CheckerContext &C) const {
   // When doing pointer subtraction, if the two pointers do not point to the
-  // same memory chunk, emit a warning.
+  // same array, emit a warning.
   if (B->getOpcode() != BO_Sub)
 return;
 
@@ -44,24 +44,30 @@ void PointerSubChecker::checkPreStmt(const BinaryOperator 
*B,
 
   const MemRegion *LR = LV.getAsRegion();
   const MemRegion *RR = RV.getAsRegion();
-
-  if (!(LR && RR))
-return;
-
-  const MemRegion *BaseLR = LR->getBaseRegion();
-  const MemRegion *BaseRR = RR->getBaseRegion();
-
-  if (BaseLR == BaseRR)
+  if (!LR || !RR)
 return;
 
-  // Allow arithmetic on different symbolic regions.
-  if (isa(BaseLR) || isa(BaseRR))
-return;
+  const auto *ElemLR = dyn_cast(LR);
+  const auto *ElemRR = dyn_cast(RR);
+  // FIXME: We want to verify that these are elements of an array.
+  // Because behavior of ElementRegion it may be confused with a cast.
+  // There is not a simple way to distinguish it from array element (check the
+  // types?). Because this missing check a warning is missing in the rare case
+  // when two casted pointers to the same region (variable) are subtracted.
+  if (ElemLR && ElemRR) {
+const MemRegion *SuperLR = ElemLR->getSuperRegion();
+const MemRegion *SuperRR = ElemRR->getSuperRegion();
+if (SuperLR == SuperRR)
+  return;
+// Allow arithmetic on different symbolic regions.
+if (isa(SuperLR) || isa(SuperRR))
+  return;
+  }
 
   if (ExplodedNode *N = C.generateNonFatalErrorNode()) {
 constexpr llvm::StringLiteral Msg =
-"Subtraction of two pointers that do not point to the same memory "
-"chunk may cause incorrect result.";
+"Subtraction of two pointers that do not point into the same array "
+"is undefined behavior.";
 auto R = std::make_unique(BT, Msg, N);
 R->addRange(B->getSourceRange());
 C.emitReport(std::move(R));
diff --git a/clang/test/Analysis/pointer-sub.c 
b/clang/test/Analysis/pointer-sub.c
new file mode 100644
index 0..010c739d6ad10
--- /dev/null
+++ b/clang/test/Analysis/pointer-sub.c
@@ -0,0 +1,74 @@
+// RUN: %clang_analyze_cc1 -analyzer-checker=alpha.core.PointerSub -verify %s
+
+void f1(void) {
+  int x, y, z[10];
+  int d = &y - &x; // expected-warning{{Subtraction of two pointers that do 
not point into the same array is undefined behavior}}
+  d = z - &y; // expected-warning{{Subtraction of two pointers that do not 
point into the same array is undefined behavior}}
+  d = &x - &x; // expected-warning{{Subtraction of two pointers that do not 
point into the same array is undefined behavior}}
+  d = (long*)&x - (long*)&x;
+}
+
+void f2(void) {
+  int a[10], b[10], c;
+  int *p = &a[2];
+  int *q = &a[8];
+  int d = q - p; // no-warning
+
+  q = &b[3];
+  d = q - p; // expected-warning{{Subtraction of two pointers that}}
+
+  q = a + 10;
+  d = q - p; // no warning (use of pointer to one after the end is allowed)
+  d = &a[4] - a; // no warning
+
+  q = a + 11;
+  d = q - a; // ?
+
+  d = &c - p; // expected-warning{{Subtraction of two pointers that}}
+}
+
+void f3(void) {
+  int a[3][4];
+  int d;
+
+  d = &(a[2]) - &(a[1]);
+  d = a[2] - a[1]; // expected-warning{{Subtraction of two pointers that}}
+  d = a[1] - a[1];
+  d = &(a[1][2]) - &(a[1][0]);
+  d = &(a[1][2]) - &(a[0][0]); // expected-warning{{Subtraction of two 
pointers that}}
+}
+
+void f4(void) {
+  int n = 4, m = 3;
+  int a[n][m];
+  int (*p)[m] = a; // p == &a[0]
+  p += 1; // p == &a[1]
+  int d = p - a; // d == 1 // expected-warning{{subtraction of pointers to 
type 'int[m]' of zero size has undefined behavior}}
+
+  d = &(a[2]) - &(a[1]); // expected-warning{{subtraction of pointers to type 
'int[m]' of zero size has undefined behavior}}
+  d = a[

[clang] [clang][analyzer] Improved PointerSubChecker (PR #93676)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: Balázs Kéri (balazske)


Changes

The checker is made more exact (only pointer into array is allowed) and more 
tests are added.

---
Full diff: https://github.com/llvm/llvm-project/pull/93676.diff


3 Files Affected:

- (modified) clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp (+20-14) 
- (added) clang/test/Analysis/pointer-sub.c (+74) 
- (modified) clang/test/Analysis/ptr-arith.c (+2-12) 


``diff
diff --git a/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp 
b/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
index 2438cf30b39b5..4caa9ded93ed4 100644
--- a/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
@@ -35,7 +35,7 @@ class PointerSubChecker
 void PointerSubChecker::checkPreStmt(const BinaryOperator *B,
  CheckerContext &C) const {
   // When doing pointer subtraction, if the two pointers do not point to the
-  // same memory chunk, emit a warning.
+  // same array, emit a warning.
   if (B->getOpcode() != BO_Sub)
 return;
 
@@ -44,24 +44,30 @@ void PointerSubChecker::checkPreStmt(const BinaryOperator 
*B,
 
   const MemRegion *LR = LV.getAsRegion();
   const MemRegion *RR = RV.getAsRegion();
-
-  if (!(LR && RR))
-return;
-
-  const MemRegion *BaseLR = LR->getBaseRegion();
-  const MemRegion *BaseRR = RR->getBaseRegion();
-
-  if (BaseLR == BaseRR)
+  if (!LR || !RR)
 return;
 
-  // Allow arithmetic on different symbolic regions.
-  if (isa(BaseLR) || isa(BaseRR))
-return;
+  const auto *ElemLR = dyn_cast(LR);
+  const auto *ElemRR = dyn_cast(RR);
+  // FIXME: We want to verify that these are elements of an array.
+  // Because behavior of ElementRegion it may be confused with a cast.
+  // There is not a simple way to distinguish it from array element (check the
+  // types?). Because this missing check a warning is missing in the rare case
+  // when two casted pointers to the same region (variable) are subtracted.
+  if (ElemLR && ElemRR) {
+const MemRegion *SuperLR = ElemLR->getSuperRegion();
+const MemRegion *SuperRR = ElemRR->getSuperRegion();
+if (SuperLR == SuperRR)
+  return;
+// Allow arithmetic on different symbolic regions.
+if (isa(SuperLR) || isa(SuperRR))
+  return;
+  }
 
   if (ExplodedNode *N = C.generateNonFatalErrorNode()) {
 constexpr llvm::StringLiteral Msg =
-"Subtraction of two pointers that do not point to the same memory "
-"chunk may cause incorrect result.";
+"Subtraction of two pointers that do not point into the same array "
+"is undefined behavior.";
 auto R = std::make_unique(BT, Msg, N);
 R->addRange(B->getSourceRange());
 C.emitReport(std::move(R));
diff --git a/clang/test/Analysis/pointer-sub.c 
b/clang/test/Analysis/pointer-sub.c
new file mode 100644
index 0..010c739d6ad10
--- /dev/null
+++ b/clang/test/Analysis/pointer-sub.c
@@ -0,0 +1,74 @@
+// RUN: %clang_analyze_cc1 -analyzer-checker=alpha.core.PointerSub -verify %s
+
+void f1(void) {
+  int x, y, z[10];
+  int d = &y - &x; // expected-warning{{Subtraction of two pointers that do 
not point into the same array is undefined behavior}}
+  d = z - &y; // expected-warning{{Subtraction of two pointers that do not 
point into the same array is undefined behavior}}
+  d = &x - &x; // expected-warning{{Subtraction of two pointers that do not 
point into the same array is undefined behavior}}
+  d = (long*)&x - (long*)&x;
+}
+
+void f2(void) {
+  int a[10], b[10], c;
+  int *p = &a[2];
+  int *q = &a[8];
+  int d = q - p; // no-warning
+
+  q = &b[3];
+  d = q - p; // expected-warning{{Subtraction of two pointers that}}
+
+  q = a + 10;
+  d = q - p; // no warning (use of pointer to one after the end is allowed)
+  d = &a[4] - a; // no warning
+
+  q = a + 11;
+  d = q - a; // ?
+
+  d = &c - p; // expected-warning{{Subtraction of two pointers that}}
+}
+
+void f3(void) {
+  int a[3][4];
+  int d;
+
+  d = &(a[2]) - &(a[1]);
+  d = a[2] - a[1]; // expected-warning{{Subtraction of two pointers that}}
+  d = a[1] - a[1];
+  d = &(a[1][2]) - &(a[1][0]);
+  d = &(a[1][2]) - &(a[0][0]); // expected-warning{{Subtraction of two 
pointers that}}
+}
+
+void f4(void) {
+  int n = 4, m = 3;
+  int a[n][m];
+  int (*p)[m] = a; // p == &a[0]
+  p += 1; // p == &a[1]
+  int d = p - a; // d == 1 // expected-warning{{subtraction of pointers to 
type 'int[m]' of zero size has undefined behavior}}
+
+  d = &(a[2]) - &(a[1]); // expected-warning{{subtraction of pointers to type 
'int[m]' of zero size has undefined behavior}}
+  d = a[2] - a[1]; // expected-warning{{Subtraction of two pointers that}}
+}
+
+typedef struct {
+  int a;
+  int b;
+  int c[10];
+  int d[10];
+} S;
+
+void f5(void) {
+  S s;
+  int y;
+  int d;
+
+  d = &s.b - &s.a; // expected-warning{{Subtraction of two pointers that}}
+  d = &s.c[0] - &s.a; // expected-warning{{Subtr

[clang] [clang][analyzer] Improved PointerSubChecker (PR #93676)

[via cfe-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang-static-analyzer-1

Author: Balázs Kéri (balazske)


Changes

The checker is made more exact (only pointer into array is allowed) and more 
tests are added.

---
Full diff: https://github.com/llvm/llvm-project/pull/93676.diff


3 Files Affected:

- (modified) clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp (+20-14) 
- (added) clang/test/Analysis/pointer-sub.c (+74) 
- (modified) clang/test/Analysis/ptr-arith.c (+2-12) 


``diff
diff --git a/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp 
b/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
index 2438cf30b39b5..4caa9ded93ed4 100644
--- a/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
@@ -35,7 +35,7 @@ class PointerSubChecker
 void PointerSubChecker::checkPreStmt(const BinaryOperator *B,
  CheckerContext &C) const {
   // When doing pointer subtraction, if the two pointers do not point to the
-  // same memory chunk, emit a warning.
+  // same array, emit a warning.
   if (B->getOpcode() != BO_Sub)
 return;
 
@@ -44,24 +44,30 @@ void PointerSubChecker::checkPreStmt(const BinaryOperator 
*B,
 
   const MemRegion *LR = LV.getAsRegion();
   const MemRegion *RR = RV.getAsRegion();
-
-  if (!(LR && RR))
-return;
-
-  const MemRegion *BaseLR = LR->getBaseRegion();
-  const MemRegion *BaseRR = RR->getBaseRegion();
-
-  if (BaseLR == BaseRR)
+  if (!LR || !RR)
 return;
 
-  // Allow arithmetic on different symbolic regions.
-  if (isa(BaseLR) || isa(BaseRR))
-return;
+  const auto *ElemLR = dyn_cast(LR);
+  const auto *ElemRR = dyn_cast(RR);
+  // FIXME: We want to verify that these are elements of an array.
+  // Because behavior of ElementRegion it may be confused with a cast.
+  // There is not a simple way to distinguish it from array element (check the
+  // types?). Because this missing check a warning is missing in the rare case
+  // when two casted pointers to the same region (variable) are subtracted.
+  if (ElemLR && ElemRR) {
+const MemRegion *SuperLR = ElemLR->getSuperRegion();
+const MemRegion *SuperRR = ElemRR->getSuperRegion();
+if (SuperLR == SuperRR)
+  return;
+// Allow arithmetic on different symbolic regions.
+if (isa(SuperLR) || isa(SuperRR))
+  return;
+  }
 
   if (ExplodedNode *N = C.generateNonFatalErrorNode()) {
 constexpr llvm::StringLiteral Msg =
-"Subtraction of two pointers that do not point to the same memory "
-"chunk may cause incorrect result.";
+"Subtraction of two pointers that do not point into the same array "
+"is undefined behavior.";
 auto R = std::make_unique(BT, Msg, N);
 R->addRange(B->getSourceRange());
 C.emitReport(std::move(R));
diff --git a/clang/test/Analysis/pointer-sub.c 
b/clang/test/Analysis/pointer-sub.c
new file mode 100644
index 0..010c739d6ad10
--- /dev/null
+++ b/clang/test/Analysis/pointer-sub.c
@@ -0,0 +1,74 @@
+// RUN: %clang_analyze_cc1 -analyzer-checker=alpha.core.PointerSub -verify %s
+
+void f1(void) {
+  int x, y, z[10];
+  int d = &y - &x; // expected-warning{{Subtraction of two pointers that do 
not point into the same array is undefined behavior}}
+  d = z - &y; // expected-warning{{Subtraction of two pointers that do not 
point into the same array is undefined behavior}}
+  d = &x - &x; // expected-warning{{Subtraction of two pointers that do not 
point into the same array is undefined behavior}}
+  d = (long*)&x - (long*)&x;
+}
+
+void f2(void) {
+  int a[10], b[10], c;
+  int *p = &a[2];
+  int *q = &a[8];
+  int d = q - p; // no-warning
+
+  q = &b[3];
+  d = q - p; // expected-warning{{Subtraction of two pointers that}}
+
+  q = a + 10;
+  d = q - p; // no warning (use of pointer to one after the end is allowed)
+  d = &a[4] - a; // no warning
+
+  q = a + 11;
+  d = q - a; // ?
+
+  d = &c - p; // expected-warning{{Subtraction of two pointers that}}
+}
+
+void f3(void) {
+  int a[3][4];
+  int d;
+
+  d = &(a[2]) - &(a[1]);
+  d = a[2] - a[1]; // expected-warning{{Subtraction of two pointers that}}
+  d = a[1] - a[1];
+  d = &(a[1][2]) - &(a[1][0]);
+  d = &(a[1][2]) - &(a[0][0]); // expected-warning{{Subtraction of two 
pointers that}}
+}
+
+void f4(void) {
+  int n = 4, m = 3;
+  int a[n][m];
+  int (*p)[m] = a; // p == &a[0]
+  p += 1; // p == &a[1]
+  int d = p - a; // d == 1 // expected-warning{{subtraction of pointers to 
type 'int[m]' of zero size has undefined behavior}}
+
+  d = &(a[2]) - &(a[1]); // expected-warning{{subtraction of pointers to type 
'int[m]' of zero size has undefined behavior}}
+  d = a[2] - a[1]; // expected-warning{{Subtraction of two pointers that}}
+}
+
+typedef struct {
+  int a;
+  int b;
+  int c[10];
+  int d[10];
+} S;
+
+void f5(void) {
+  S s;
+  int y;
+  int d;
+
+  d = &s.b - &s.a; // expected-warning{{Subtraction of two pointers that}}
+  d = &s.c[0] - &s.a; // expec

[clang] [clang] Fix loss of `dllexport` for exported template specialization (PR #93302)

[via cfe-commits]

zmodem wrote:

> I understand that removing the code that drops `dllexport` may not be the 
> "best" place to fix this issue but if this code is not actually required, 
> which appears to be the case (please let me know if this is not), then 
> removing the code to achieve "better" behaviour feels like a "win". The 
> alternative would be to add more code/complexity to the AST handling.

I still think fixing the AST would be better. That would also fix the 
"dllimport version" of your test case:

```
struct s {
  template  static bool f();
};
template  bool template_using_f(T) { return s::f(); }
bool use_template_using_f() { return template_using_f(0); }

template<> inline
bool __declspec(dllimport) s::f() { return true; }
```

Here, `dllimport` gets dropped from `s::f()` for the same reason as in 
your test: the AST node which the call in `template_using_f()` refers to is 
missing the attribute. (Godbolt: https://godbolt.org/z/nnfET4r13)

https://github.com/llvm/llvm-project/pull/93302
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[clang] [DebugInfo] Add flag to only emit referenced member functions (PR #87018)

[Paul T Robinson via cfe-commits]

pogo59 wrote:

What @SLTozer said. I don't want "members" to mean "some but not all members" 
and "methods" was shorter than "member-functions" (but I'm okay with 
"member-functions").

https://github.com/llvm/llvm-project/pull/87018
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[clang] [clang][CodeGen] `used` globals && the payloads for global ctors & dtors are globals (PR #93601)

[Matt Arsenault via cfe-commits]

@@ -2928,12 +2928,13 @@ static void emitUsed(CodeGenModule &CGM, StringRef Name,
   for (unsigned i = 0, e = List.size(); i != e; ++i) {
 UsedArray[i] =
 llvm::ConstantExpr::getPointerBitCastOrAddrSpaceCast(
-cast(&*List[i]), CGM.Int8PtrTy);

arsenm wrote:

For the purpose of used/compiler_used, I think it's best to ignore the language 
address space map (reiterating that the IR address space has little to do with 
the language). Just treat it as a special global that always uses addrspace(0). 
The required addrspacecasts will be inserted to 0, so it just leaves this as 
the status quo. It doesn't really matter if the target considers the casts 
valid or not, the used variables never codegened. 

If we really had to go out of our way to avoid illegal constant expression 
casts, we'd probably have to have multiple used intrinsic variables per address 
space. In a better future we wouldn't allow constantexpr addrspacecasts, and 
then we'd also need to come up with another solution 

https://github.com/llvm/llvm-project/pull/93601
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[clang] [clang] Lower _BitInt(129+) to a different type in LLVM IR (PR #91364)

[Momchil Velikov via cfe-commits]

@@ -1989,6 +1989,14 @@ llvm::Value *CodeGenFunction::EmitLoadOfScalar(Address 
Addr, bool Volatile,
 return EmitAtomicLoad(AtomicLValue, Loc).getScalarVal();
   }
 
+  if (const auto *BIT = Ty->getAs()) {
+if (BIT->getNumBits() > 128) {
+  // Long _BitInt has array of bytes as in-memory type.
+  llvm::Type *NewTy = ConvertType(Ty);

momchil-velikov wrote:

Shouldn't we call calling `ConvertTypeForMem` here?

https://github.com/llvm/llvm-project/pull/91364
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