[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei updated this revision to Diff 323601.
pengfei added a comment.

Address Sanjay's comment.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

Files:
  clang/include/clang/Basic/BuiltinsX86.def
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Headers/avx512fintrin.h
  clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c

Index: clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
===
--- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
+++ clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
@@ -14,18 +14,14 @@
   return _mm512_reduce_max_epu64(__W);
 }
 
-double test_mm512_reduce_max_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_max_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_max_pd(__W); 
+double test_mm512_reduce_max_pd(__m512d __W, double ExtraAddOp){
+// CHECK-LABEL: @test_mm512_reduce_max_pd(
+// CHECK-NOT: nnan
+// CHECK-NOT: nsz
+// CHECK:call nnan nsz double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+// CHECK-NOT: nsz
+  return _mm512_reduce_max_pd(__W) + ExtraAddOp;
 }
 
 long long test_mm512_reduce_min_epi64(__m512i __W){
@@ -40,18 +36,14 @@
   return _mm512_reduce_min_epu64(__W);
 }
 
-double test_mm512_reduce_min_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_min_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_min_pd(__W); 
+double test_mm512_reduce_min_pd(__m512d __W, double ExtraMulOp){
+// CHECK-LABEL: @test_mm512_reduce_min_pd(
+// CHECK-NOT: nnan
+// CHECK-NOT: nsz
+// CHECK:call nnan nsz double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+// CHECK-NOT: nsz
+  return _mm512_reduce_min_pd(__W) * ExtraMulOp;
 }
 
 long long test_mm512_mask_reduce_max_epi64(__mmask8 __M, __m512i __W){
@@ -59,7 +51,7 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epi64(__M, __W); 
+  return _mm512_mask_reduce_max_epi64(__M, __W);
 }
 
 unsigned long test_mm512_mask_reduce_max_epu64(__mmask8 __M, __m512i __W){
@@ -67,23 +59,15 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epu64(__M, __W); 
+  return _mm512_mask_reduce_max_epu64(__M, __W);
 }
 
 double test_mm512_mask_reduce_max_pd(__mmask8 __M, __m512d __W){
-  // CHECK-LABEL: @test_mm512_mask_reduce_max_pd(
-  // CHECK:bitcast i8 %{{.*}} to <8 x i1>
-  // CHECK:select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double>  %{{.*}}, <2 x i32> 
-  // CHECK:ca

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei added inline comments.



Comment at: clang/lib/Headers/avx512fintrin.h:9305
+ * 1. The elements are reassociable when using fadd/fmul intrinsics;
+ * 2. There's no nan and signed zero in the elements when using fmin/max
+ intrinsics;

spatel wrote:
> If I understand correctly, there's nothing preventing -0.0 or NaN values in 
> these ops. But if either of those are present, then the result is potentially 
> indeterminate.
> 
> For the LLVM intrinsic, we have this text in LangRef:
> "The result will always be a number unless all elements of the vector are 
> NaN. For a vector with minimum element magnitude 0.0 and containing both +0.0 
> and -0.0 elements, the sign of the result is unspecified."
Thanks @spatel for the information. I checked that the LLVM intrinsic does 
ignore the sign of zeros. https://godbolt.org/z/a9Yj8a. So we can remove the no 
signed zero assumption.
But X86 fmin/fmax instructions have difference with the LLVM intrinsic, i.e. 
the result might be NaN even there's only one NaN in elements.
Besides, the LangRef also says "If the intrinsic call has the nnan fast-math 
flag, then the operation can assume that NaNs are not present in the input 
vector."
So we still need the no nan assumption here.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei updated this revision to Diff 323602.
pengfei added a comment.

Update test accordingly.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

Files:
  clang/include/clang/Basic/BuiltinsX86.def
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Headers/avx512fintrin.h
  clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c

Index: clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
===
--- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
+++ clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
@@ -14,18 +14,12 @@
   return _mm512_reduce_max_epu64(__W);
 }
 
-double test_mm512_reduce_max_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_max_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_max_pd(__W); 
+double test_mm512_reduce_max_pd(__m512d __W, double ExtraAddOp){
+// CHECK-LABEL: @test_mm512_reduce_max_pd(
+// CHECK-NOT: nnan
+// CHECK:call nnan double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+  return _mm512_reduce_max_pd(__W) + ExtraAddOp;
 }
 
 long long test_mm512_reduce_min_epi64(__m512i __W){
@@ -40,18 +34,12 @@
   return _mm512_reduce_min_epu64(__W);
 }
 
-double test_mm512_reduce_min_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_min_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_min_pd(__W); 
+double test_mm512_reduce_min_pd(__m512d __W, double ExtraMulOp){
+// CHECK-LABEL: @test_mm512_reduce_min_pd(
+// CHECK-NOT: nnan
+// CHECK:call nnan double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+  return _mm512_reduce_min_pd(__W) * ExtraMulOp;
 }
 
 long long test_mm512_mask_reduce_max_epi64(__mmask8 __M, __m512i __W){
@@ -59,7 +47,7 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epi64(__M, __W); 
+  return _mm512_mask_reduce_max_epi64(__M, __W);
 }
 
 unsigned long test_mm512_mask_reduce_max_epu64(__mmask8 __M, __m512i __W){
@@ -67,23 +55,15 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epu64(__M, __W); 
+  return _mm512_mask_reduce_max_epu64(__M, __W);
 }
 
 double test_mm512_mask_reduce_max_pd(__mmask8 __M, __m512d __W){
-  // CHECK-LABEL: @test_mm512_mask_reduce_max_pd(
-  // CHECK:bitcast i8 %{{.*}} to <8 x i1>
-  // CHECK:select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double>  %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-

[PATCH] D86119: [OPENMP50]Allow overlapping mapping in target constrcuts.

2021-02-14 Thread George Rokos via Phabricator via cfe-commits 
grokos added a comment.

In D86119#2561163 , @abhinavgaba wrote:

> Thanks for the changes, Alexey! I tried the patch locally, and it looks 
> stable. It handled several tests I tried, including the following case 
> involving array section on a pointer to pointer base, and nested mappers with 
> `PTR_AND_OBJ` maps successfully:
>
>   #include 
>   
>   typedef struct { int a; double *b; } C;
>   #pragma omp declare mapper(id1: C s) map(to:s.a) map(from:s.b[0:2])
>   
>   typedef struct { int e; C f; int h; short *g; } D;
>   #pragma omp declare mapper(default: D r) map(from:r.e) map(mapper(id1), 
> tofrom:r.f) map(tofrom: r.g[0:r.h])
>   
>   int main() {
> constexpr int N = 10;
> D s;
> s.e = 111;
> s.f.a = 222;
> double x[2]; x[1] = 20;
> short y[N]; y[1] = 30;
> s.f.b = &x[0];
> s.g = &y[0];
> s.h = N;
>   
> D* sp = &s;
> D** spp = &sp;
>   
> printf("%d %d %lf %p %d %p\n", spp[0][0].e, spp[0][0].f.a, 
> spp[0][0].f.b[1], spp[0][0].f.b, spp[0][0].g[1], spp[0][0].g);
> // Expected: 111 222 20.0  30 
>   
> #pragma omp target map(tofrom:spp[0][0])
> {
>   printf("%d %d %lf %p %d %p\n", spp[0][0].e, spp[0][0].f.a, 
> spp[0][0].f.b[1], spp[0][0].f.b, spp[0][0].g[1], spp[0][0].g);
>   // Expected:  222   30 
>   spp[0][0].e = 333;
>   spp[0][0].f.a = 444;
>   spp[0][0].f.b[1] = 40;
>   spp[0][0].g[1] = 50;
> }
> printf("%d %d %lf %p %d %p\n", spp[0][0].e, spp[0][0].f.a, 
> spp[0][0].f.b[1], spp[0][0].f.b, spp[0][0].g[1], spp[0][0].g);
> // Expected: 333 222 40.0  50 
>   }

@ABataev This is a nice complex example, I think it's worth including it in the 
runtime tests (under libomptarget).

@abhinavgaba Thanks for providing it!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86119/new/

https://reviews.llvm.org/D86119

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei updated this revision to Diff 323603.
pengfei added a comment.

Minor fix.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

Files:
  clang/include/clang/Basic/BuiltinsX86.def
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Headers/avx512fintrin.h
  clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c

Index: clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
===
--- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
+++ clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
@@ -14,18 +14,12 @@
   return _mm512_reduce_max_epu64(__W);
 }
 
-double test_mm512_reduce_max_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_max_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_max_pd(__W); 
+double test_mm512_reduce_max_pd(__m512d __W, double ExtraAddOp){
+// CHECK-LABEL: @test_mm512_reduce_max_pd(
+// CHECK-NOT: nnan
+// CHECK:call nnan double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+  return _mm512_reduce_max_pd(__W) + ExtraAddOp;
 }
 
 long long test_mm512_reduce_min_epi64(__m512i __W){
@@ -40,18 +34,12 @@
   return _mm512_reduce_min_epu64(__W);
 }
 
-double test_mm512_reduce_min_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_min_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_min_pd(__W); 
+double test_mm512_reduce_min_pd(__m512d __W, double ExtraMulOp){
+// CHECK-LABEL: @test_mm512_reduce_min_pd(
+// CHECK-NOT: nnan
+// CHECK:call nnan double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+  return _mm512_reduce_min_pd(__W) * ExtraMulOp;
 }
 
 long long test_mm512_mask_reduce_max_epi64(__mmask8 __M, __m512i __W){
@@ -59,7 +47,7 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epi64(__M, __W); 
+  return _mm512_mask_reduce_max_epi64(__M, __W);
 }
 
 unsigned long test_mm512_mask_reduce_max_epu64(__mmask8 __M, __m512i __W){
@@ -67,23 +55,15 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epu64(__M, __W); 
+  return _mm512_mask_reduce_max_epu64(__M, __W);
 }
 
 double test_mm512_mask_reduce_max_pd(__mmask8 __M, __m512d __W){
-  // CHECK-LABEL: @test_mm512_mask_reduce_max_pd(
-  // CHECK:bitcast i8 %{{.*}} to <8 x i1>
-  // CHECK:select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double>  %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:e

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Sanjay Patel via Phabricator via cfe-commits 
spatel added inline comments.



Comment at: clang/lib/Headers/avx512fintrin.h:9305
+ * 1. The elements are reassociable when using fadd/fmul intrinsics;
+ * 2. There's no nan and signed zero in the elements when using fmin/max
+ intrinsics;

pengfei wrote:
> spatel wrote:
> > If I understand correctly, there's nothing preventing -0.0 or NaN values in 
> > these ops. But if either of those are present, then the result is 
> > potentially indeterminate.
> > 
> > For the LLVM intrinsic, we have this text in LangRef:
> > "The result will always be a number unless all elements of the vector are 
> > NaN. For a vector with minimum element magnitude 0.0 and containing both 
> > +0.0 and -0.0 elements, the sign of the result is unspecified."
> Thanks @spatel for the information. I checked that the LLVM intrinsic does 
> ignore the sign of zeros. https://godbolt.org/z/a9Yj8a. So we can remove the 
> no signed zero assumption.
> But X86 fmin/fmax instructions have difference with the LLVM intrinsic, i.e. 
> the result might be NaN even there's only one NaN in elements.
> Besides, the LangRef also says "If the intrinsic call has the nnan fast-math 
> flag, then the operation can assume that NaNs are not present in the input 
> vector."
> So we still need the no nan assumption here.
I understand the behavior that we want to specify for this API, but we are not 
stating it clearly for the user. I think we should do that. How about:

```
 * For floating-point intrinsics:
 * 1. When using fadd/fmul intrinsics, the order of operations within the 
vector is unspecified (associative math).
 * 2. When using fmin/fmax intrinsics, NaN or -0.0 elements within the vector 
produce unspecified results. 
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 39ff002 - [ASTMatchers] Clarify example in docs

2021-02-14 Thread Stephen Kelly via cfe-commits 

Author: Stephen Kelly
Date: 2021-02-14T13:49:06Z
New Revision: 39ff002e526e1df3e4bebbfdd2beebf0440d7d92

URL: 
https://github.com/llvm/llvm-project/commit/39ff002e526e1df3e4bebbfdd2beebf0440d7d92
DIFF: 
https://github.com/llvm/llvm-project/commit/39ff002e526e1df3e4bebbfdd2beebf0440d7d92.diff

LOG: [ASTMatchers] Clarify example in docs

Added: 


Modified: 
clang/docs/LibASTMatchersReference.html

Removed: 




diff  --git a/clang/docs/LibASTMatchersReference.html 
b/clang/docs/LibASTMatchersReference.html
index ac816d28970b..a956091318a1 100644
--- a/clang/docs/LibASTMatchersReference.html
+++ b/clang/docs/LibASTMatchersReference.html
@@ -508,7 +508,7 @@ Traverse Mode
 
 binaryOperator(
   hasOperatorName("<"),
-  hasRHS(integerLiteral(equals(0)))
+  hasRHS(hasDescendant(integerLiteral(equals(0
   )
 
 given:
@@ -529,6 +529,12 @@ Traverse Mode
 
 
 1 match found.
+
+
+   return a < b;
+  ^
+
+
 
 
 No match found.



___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei added inline comments.



Comment at: clang/lib/Headers/avx512fintrin.h:9305
+ * 1. The elements are reassociable when using fadd/fmul intrinsics;
+ * 2. There's no nan and signed zero in the elements when using fmin/max
+ intrinsics;

spatel wrote:
> pengfei wrote:
> > spatel wrote:
> > > If I understand correctly, there's nothing preventing -0.0 or NaN values 
> > > in these ops. But if either of those are present, then the result is 
> > > potentially indeterminate.
> > > 
> > > For the LLVM intrinsic, we have this text in LangRef:
> > > "The result will always be a number unless all elements of the vector are 
> > > NaN. For a vector with minimum element magnitude 0.0 and containing both 
> > > +0.0 and -0.0 elements, the sign of the result is unspecified."
> > Thanks @spatel for the information. I checked that the LLVM intrinsic does 
> > ignore the sign of zeros. https://godbolt.org/z/a9Yj8a. So we can remove 
> > the no signed zero assumption.
> > But X86 fmin/fmax instructions have difference with the LLVM intrinsic, 
> > i.e. the result might be NaN even there's only one NaN in elements.
> > Besides, the LangRef also says "If the intrinsic call has the nnan 
> > fast-math flag, then the operation can assume that NaNs are not present in 
> > the input vector."
> > So we still need the no nan assumption here.
> I understand the behavior that we want to specify for this API, but we are 
> not stating it clearly for the user. I think we should do that. How about:
> 
> ```
>  * For floating-point intrinsics:
>  * 1. When using fadd/fmul intrinsics, the order of operations within the 
> vector is unspecified (associative math).
>  * 2. When using fmin/fmax intrinsics, NaN or -0.0 elements within the vector 
> produce unspecified results. 
> ```
Great! It's much clear now. Thanks @spatel !


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei updated this revision to Diff 323616.
pengfei added a comment.

Address Sanjay's comment.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

Files:
  clang/include/clang/Basic/BuiltinsX86.def
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Headers/avx512fintrin.h
  clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c

Index: clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
===
--- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
+++ clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
@@ -14,18 +14,12 @@
   return _mm512_reduce_max_epu64(__W);
 }
 
-double test_mm512_reduce_max_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_max_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_max_pd(__W); 
+double test_mm512_reduce_max_pd(__m512d __W, double ExtraAddOp){
+// CHECK-LABEL: @test_mm512_reduce_max_pd(
+// CHECK-NOT: nnan
+// CHECK:call nnan double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+  return _mm512_reduce_max_pd(__W) + ExtraAddOp;
 }
 
 long long test_mm512_reduce_min_epi64(__m512i __W){
@@ -40,18 +34,12 @@
   return _mm512_reduce_min_epu64(__W);
 }
 
-double test_mm512_reduce_min_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_min_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_min_pd(__W); 
+double test_mm512_reduce_min_pd(__m512d __W, double ExtraMulOp){
+// CHECK-LABEL: @test_mm512_reduce_min_pd(
+// CHECK-NOT: nnan
+// CHECK:call nnan double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+  return _mm512_reduce_min_pd(__W) * ExtraMulOp;
 }
 
 long long test_mm512_mask_reduce_max_epi64(__mmask8 __M, __m512i __W){
@@ -59,7 +47,7 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epi64(__M, __W); 
+  return _mm512_mask_reduce_max_epi64(__M, __W);
 }
 
 unsigned long test_mm512_mask_reduce_max_epu64(__mmask8 __M, __m512i __W){
@@ -67,23 +55,15 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epu64(__M, __W); 
+  return _mm512_mask_reduce_max_epu64(__M, __W);
 }
 
 double test_mm512_mask_reduce_max_pd(__mmask8 __M, __m512d __W){
-  // CHECK-LABEL: @test_mm512_mask_reduce_max_pd(
-  // CHECK:bitcast i8 %{{.*}} to <8 x i1>
-  // CHECK:select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double>  %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Sanjay Patel via Phabricator via cfe-commits 
spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

Thanks! LGTM.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D96665: Revert "Implement nullPointerConstant() using a better API."

2021-02-14 Thread Stephen Kelly via Phabricator via cfe-commits 
steveire created this revision.
steveire added reviewers: aaron.ballman, njames93.
steveire requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This reverts commit 9148302a (2019-08-22) which broke the pre-existing
unit test for the matcher.  Also revert commit 518b2266 (Fix the
nullPointerConstant() test to get bots back to green., 2019-08-22) which
incorrectly changed the test to expect the broken behavior.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D96665

Files:
  clang/include/clang/ASTMatchers/ASTMatchers.h
  clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp


Index: clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
===
--- clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
+++ clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
@@ -3698,7 +3698,7 @@
   expr(nullPointerConstant(;
   EXPECT_TRUE(matches("char *cp = (char *)0;", expr(nullPointerConstant(;
   EXPECT_TRUE(matches("int *ip = 0;", expr(nullPointerConstant(;
-  EXPECT_TRUE(matches("int i = 0;", expr(nullPointerConstant(;
+  EXPECT_FALSE(matches("int i = 0;", expr(nullPointerConstant(;
 }
 
 TEST_P(ASTMatchersTest, NullPointerConstant_GNUNull) {
Index: clang/include/clang/ASTMatchers/ASTMatchers.h
===
--- clang/include/clang/ASTMatchers/ASTMatchers.h
+++ clang/include/clang/ASTMatchers/ASTMatchers.h
@@ -7384,9 +7384,10 @@
 /// expr(nullPointerConstant())
 ///   matches the initializer for v1, v2, v3, cp, and ip. Does not match the
 ///   initializer for i.
-AST_MATCHER(Expr, nullPointerConstant) {
-  return Node.isNullPointerConstant(Finder->getASTContext(),
-Expr::NPC_ValueDependentIsNull);
+AST_MATCHER_FUNCTION(internal::Matcher, nullPointerConstant) {
+  return anyOf(
+  gnuNullExpr(), cxxNullPtrLiteralExpr(),
+  integerLiteral(equals(0), hasParent(expr(hasType(pointerType());
 }
 
 /// Matches the DecompositionDecl the binding belongs to.


Index: clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
===
--- clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
+++ clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
@@ -3698,7 +3698,7 @@
   expr(nullPointerConstant(;
   EXPECT_TRUE(matches("char *cp = (char *)0;", expr(nullPointerConstant(;
   EXPECT_TRUE(matches("int *ip = 0;", expr(nullPointerConstant(;
-  EXPECT_TRUE(matches("int i = 0;", expr(nullPointerConstant(;
+  EXPECT_FALSE(matches("int i = 0;", expr(nullPointerConstant(;
 }
 
 TEST_P(ASTMatchersTest, NullPointerConstant_GNUNull) {
Index: clang/include/clang/ASTMatchers/ASTMatchers.h
===
--- clang/include/clang/ASTMatchers/ASTMatchers.h
+++ clang/include/clang/ASTMatchers/ASTMatchers.h
@@ -7384,9 +7384,10 @@
 /// expr(nullPointerConstant())
 ///   matches the initializer for v1, v2, v3, cp, and ip. Does not match the
 ///   initializer for i.
-AST_MATCHER(Expr, nullPointerConstant) {
-  return Node.isNullPointerConstant(Finder->getASTContext(),
-Expr::NPC_ValueDependentIsNull);
+AST_MATCHER_FUNCTION(internal::Matcher, nullPointerConstant) {
+  return anyOf(
+  gnuNullExpr(), cxxNullPtrLiteralExpr(),
+  integerLiteral(equals(0), hasParent(expr(hasType(pointerType());
 }
 
 /// Matches the DecompositionDecl the binding belongs to.
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 25f753c - [clang-format] Add possibility to be based on parent directory

2021-02-14 Thread Björn Schäpers via cfe-commits 

Author: Björn Schäpers
Date: 2021-02-14T19:56:10+01:00
New Revision: 25f753c51e7b17bfca08155c1d777c5667110970

URL: 
https://github.com/llvm/llvm-project/commit/25f753c51e7b17bfca08155c1d777c5667110970
DIFF: 
https://github.com/llvm/llvm-project/commit/25f753c51e7b17bfca08155c1d777c5667110970.diff

LOG: [clang-format] Add possibility to be based on parent directory

This allows the define BasedOnStyle: InheritParentConfig and then
clang-format looks into the parent directories for their
.clang-format and takes that as a basis.

Differential Revision: https://reviews.llvm.org/D93844

Added: 


Modified: 
clang/docs/ClangFormatStyleOptions.rst
clang/docs/ReleaseNotes.rst
clang/include/clang/Format/Format.h
clang/lib/Format/Format.cpp
clang/unittests/Format/FormatTest.cpp

Removed: 




diff  --git a/clang/docs/ClangFormatStyleOptions.rst 
b/clang/docs/ClangFormatStyleOptions.rst
index d55c0d59b36a..7ae8ea913099 100644
--- a/clang/docs/ClangFormatStyleOptions.rst
+++ b/clang/docs/ClangFormatStyleOptions.rst
@@ -154,6 +154,15 @@ the configuration (without a prefix: ``Auto``).
   * ``GNU``
 A style complying with the `GNU coding standards
 `_
+  * ``InheritParentConfig``
+Not a real style, but allows to use the ``.clang-format`` file from the
+parent directory (or its parent if there is none). If there is no parent
+file found it falls back to the ``fallback`` style, and applies the changes
+to that.
+
+With this option you can overwrite some parts of your main style for your
+subdirectories. This is also possible through the command line, e.g.:
+``--style={BasedOnStyle: InheritParentConfig, ColumnLimit: 20}``
 
 .. START_FORMAT_STYLE_OPTIONS
 

diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index ff73ac92b758..6b28ead401cb 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -189,6 +189,9 @@ clang-format
 #include "B/A.h"
 #include "B/a.h"
 
+- ``BasedOnStyle: InheritParentConfig`` allows to use the ``.clang-format`` of
+  the parent directories to overwrite only parts of it.
+
 libclang
 
 

diff  --git a/clang/include/clang/Format/Format.h 
b/clang/include/clang/Format/Format.h
index 7cedbfb80610..1a669ebf07f5 100644
--- a/clang/include/clang/Format/Format.h
+++ b/clang/include/clang/Format/Format.h
@@ -52,6 +52,11 @@ std::error_code make_error_code(ParseError e);
 /// The ``FormatStyle`` is used to configure the formatting to follow
 /// specific guidelines.
 struct FormatStyle {
+  // If the BasedOn: was InheritParentConfig and this style needs the file from
+  // the parent directories. It is not part of the actual style for formatting.
+  // Thus the // instead of ///.
+  bool InheritsParentConfig;
+
   /// The extra indent or outdent of access modifiers, e.g. ``public:``.
   int AccessModifierOffset;
 

diff  --git a/clang/lib/Format/Format.cpp b/clang/lib/Format/Format.cpp
index fbef7c5148a2..a8808b389f84 100644
--- a/clang/lib/Format/Format.cpp
+++ b/clang/lib/Format/Format.cpp
@@ -908,6 +908,7 @@ static FormatStyle expandPresets(const FormatStyle &Style) {
 
 FormatStyle getLLVMStyle(FormatStyle::LanguageKind Language) {
   FormatStyle LLVMStyle;
+  LLVMStyle.InheritsParentConfig = false;
   LLVMStyle.Language = Language;
   LLVMStyle.AccessModifierOffset = -2;
   LLVMStyle.AlignEscapedNewlines = FormatStyle::ENAS_Right;
@@ -1382,6 +1383,8 @@ bool getPredefinedStyle(StringRef Name, 
FormatStyle::LanguageKind Language,
 *Style = getMicrosoftStyle(Language);
   } else if (Name.equals_lower("none")) {
 *Style = getNoStyle();
+  } else if (Name.equals_lower("inheritparentconfig")) {
+Style->InheritsParentConfig = true;
   } else {
 return false;
   }
@@ -2947,21 +2950,36 @@ llvm::Expected getStyle(StringRef 
StyleName, StringRef FileName,
   if (!getPredefinedStyle(FallbackStyleName, Style.Language, &FallbackStyle))
 return make_string_error("Invalid fallback style \"" + FallbackStyleName);
 
+  llvm::SmallVector, 1>
+  ChildFormatTextToApply;
+
   if (StyleName.startswith("{")) {
 // Parse YAML/JSON style from the command line.
-if (std::error_code ec = parseConfiguration(
-llvm::MemoryBufferRef(StyleName, ""), &Style,
-AllowUnknownOptions))
+StringRef Source = "";
+if (std::error_code ec =
+parseConfiguration(llvm::MemoryBufferRef(StyleName, Source), 
&Style,
+   AllowUnknownOptions))
   return make_string_error("Error parsing -style: " + ec.message());
-return Style;
+if (Style.InheritsParentConfig)
+  ChildFormatTextToApply.emplace_back(
+  llvm::MemoryBuffer::getMemBuffer(StyleName, Source, false));
+else
+  return Style;
   }
 
-  if (!StyleName.equals_lower("file")) {
+  // If the style inherits the parent

[PATCH] D93844: [clang-format] Add possibility to be based on parent directory

2021-02-14 Thread Björn Schäpers via Phabricator via cfe-commits 
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG25f753c51e7b: [clang-format] Add possibility to be based on 
parent directory (authored by HazardyKnusperkeks).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93844/new/

https://reviews.llvm.org/D93844

Files:
  clang/docs/ClangFormatStyleOptions.rst
  clang/docs/ReleaseNotes.rst
  clang/include/clang/Format/Format.h
  clang/lib/Format/Format.cpp
  clang/unittests/Format/FormatTest.cpp

Index: clang/unittests/Format/FormatTest.cpp
===
--- clang/unittests/Format/FormatTest.cpp
+++ clang/unittests/Format/FormatTest.cpp
@@ -17923,6 +17923,111 @@
   auto StyleTd = getStyle("file", "x.td", "llvm", "", &FS);
   ASSERT_TRUE((bool)StyleTd);
   ASSERT_EQ(*StyleTd, getLLVMStyle(FormatStyle::LK_TableGen));
+
+  // Test 9.1: overwriting a file style, when parent no file exists with no
+  // fallback style
+  ASSERT_TRUE(FS.addFile(
+  "/e/sub/.clang-format", 0,
+  llvm::MemoryBuffer::getMemBuffer("BasedOnStyle: InheritParentConfig\n"
+   "ColumnLimit: 20")));
+  ASSERT_TRUE(FS.addFile("/e/sub/code.cpp", 0,
+ llvm::MemoryBuffer::getMemBuffer("int i;")));
+  auto Style9 = getStyle("file", "/e/sub/code.cpp", "none", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9, [] {
+auto Style = getNoStyle();
+Style.ColumnLimit = 20;
+return Style;
+  }());
+
+  // Test 9.2: with LLVM fallback style
+  Style9 = getStyle("file", "/e/sub/code.cpp", "LLVM", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9, [] {
+auto Style = getLLVMStyle();
+Style.ColumnLimit = 20;
+return Style;
+  }());
+
+  // Test 9.3: with a parent file
+  ASSERT_TRUE(
+  FS.addFile("/e/.clang-format", 0,
+ llvm::MemoryBuffer::getMemBuffer("BasedOnStyle: Google\n"
+  "UseTab: Always")));
+  Style9 = getStyle("file", "/e/sub/code.cpp", "none", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9, [] {
+auto Style = getGoogleStyle();
+Style.ColumnLimit = 20;
+Style.UseTab = FormatStyle::UT_Always;
+return Style;
+  }());
+
+  // Test 9.4: propagate more than one level
+  ASSERT_TRUE(FS.addFile("/e/sub/sub/code.cpp", 0,
+ llvm::MemoryBuffer::getMemBuffer("int i;")));
+  ASSERT_TRUE(FS.addFile("/e/sub/sub/.clang-format", 0,
+ llvm::MemoryBuffer::getMemBuffer(
+ "BasedOnStyle: InheritParentConfig\n"
+ "WhitespaceSensitiveMacros: ['FOO', 'BAR']")));
+  std::vector NonDefaultWhiteSpaceMacros{"FOO", "BAR"};
+
+  const auto SubSubStyle = [&NonDefaultWhiteSpaceMacros] {
+auto Style = getGoogleStyle();
+Style.ColumnLimit = 20;
+Style.UseTab = FormatStyle::UT_Always;
+Style.WhitespaceSensitiveMacros = NonDefaultWhiteSpaceMacros;
+return Style;
+  }();
+
+  ASSERT_NE(Style9->WhitespaceSensitiveMacros, NonDefaultWhiteSpaceMacros);
+  Style9 = getStyle("file", "/e/sub/sub/code.cpp", "none", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9, SubSubStyle);
+
+  // Test 9.5: use InheritParentConfig as style name
+  Style9 =
+  getStyle("inheritparentconfig", "/e/sub/sub/code.cpp", "none", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9, SubSubStyle);
+
+  // Test 9.6: use command line style with inheritance
+  Style9 = getStyle("{BasedOnStyle: InheritParentConfig}", "/e/sub/code.cpp",
+"none", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9, SubSubStyle);
+
+  // Test 9.7: use command line style with inheritance and own config
+  Style9 = getStyle("{BasedOnStyle: InheritParentConfig, "
+"WhitespaceSensitiveMacros: ['FOO', 'BAR']}",
+"/e/sub/code.cpp", "none", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9, SubSubStyle);
+
+  // Test 9.8: use inheritance from a file without BasedOnStyle
+  ASSERT_TRUE(FS.addFile("/e/withoutbase/.clang-format", 0,
+ llvm::MemoryBuffer::getMemBuffer("ColumnLimit: 123")));
+  ASSERT_TRUE(
+  FS.addFile("/e/withoutbase/sub/.clang-format", 0,
+ llvm::MemoryBuffer::getMemBuffer(
+ "BasedOnStyle: InheritParentConfig\nIndentWidth: 7")));
+  // Make sure we do not use the fallback style
+  Style9 = getStyle("file", "/e/withoutbase/code.cpp", "google", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9, [] {
+auto Style = getLLVMStyle();
+Style.ColumnLimit = 123;
+return Style;
+  }());
+
+  Style9 = getStyle("file", "/e/withoutbase/sub/code.cpp", "google", "", &FS);
+  ASSERT_TRUE(static_cast(Style9));
+  ASSERT_EQ(*Style9,

[PATCH] D95754: [clang] Print 32 candidates on the first failure, with -fshow-overloads=best.

2021-02-14 Thread Aaron Puchert via Phabricator via cfe-commits 
aaronpuchert added a comment.

In D95754#2561849 , @jlebar wrote:

> Not sure who can review this, but looking through blame it seems like maybe 
> @aaronpuchert?

I'm by no means an expert on overloading, but this seems more like a usability 
question.

I like the idea. Let's give @rsmith a chance to chime in, otherwise I'll 
approve it after a while.




Comment at: clang/lib/Sema/Sema.cpp:2310
 
+  S.Diags.noteNumOverloadCandidatesShown(ShownOverloads);
+

Why not in the following `if`? I assume we want to show a long list not 
necessarily once, but only if it comes with the first error?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95754/new/

https://reviews.llvm.org/D95754

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D96090: [analyzer] Replace StoreManager::CastRetrievedVal with SValBuilder::evalCast

2021-02-14 Thread Mikhail Ramalho via Phabricator via cfe-commits 
mikhail.ramalho added a comment.

I'm glad to see these patches, the SMT API will benefit greatly from them!


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96090/new/

https://reviews.llvm.org/D96090

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 61da205 - [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread via cfe-commits 

Author: Wang, Pengfei
Date: 2021-02-15T08:52:06+08:00
New Revision: 61da20575d6c6bc72438bb3d169b4b2797e909e4

URL: 
https://github.com/llvm/llvm-project/commit/61da20575d6c6bc72438bb3d169b4b2797e909e4
DIFF: 
https://github.com/llvm/llvm-project/commit/61da20575d6c6bc72438bb3d169b4b2797e909e4.diff

LOG: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction 
intrinsics (PR47506)

This is a follow up of D92940.

We have successfully converted fadd/fmul _mm_reduce_* intrinsics to
llvm.reduction + reassoc flag. We can do the same approach for fmin/fmax
too, i.e. llvm.reduction + nnan flag.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D93179

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsX86.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/avx512fintrin.h
clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsX86.def 
b/clang/include/clang/Basic/BuiltinsX86.def
index 16fb7dd7b0e6..18e541fe9cb5 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -1878,6 +1878,10 @@ TARGET_BUILTIN(__builtin_ia32_reduce_and_d512, "iV16i", 
"ncV:512:", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_reduce_and_q512, "OiV8Oi", "ncV:512:", "avx512f")
 TARGET_BUILTIN(__builtin_ia32_reduce_fadd_pd512, "ddV8d", "ncV:512:", 
"avx512f")
 TARGET_BUILTIN(__builtin_ia32_reduce_fadd_ps512, "ffV16f", "ncV:512:", 
"avx512f")
+TARGET_BUILTIN(__builtin_ia32_reduce_fmax_pd512, "dV8d", "ncV:512:", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_reduce_fmax_ps512, "fV16f", "ncV:512:", 
"avx512f")
+TARGET_BUILTIN(__builtin_ia32_reduce_fmin_pd512, "dV8d", "ncV:512:", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_reduce_fmin_ps512, "fV16f", "ncV:512:", 
"avx512f")
 TARGET_BUILTIN(__builtin_ia32_reduce_fmul_pd512, "ddV8d", "ncV:512:", 
"avx512f")
 TARGET_BUILTIN(__builtin_ia32_reduce_fmul_ps512, "ffV16f", "ncV:512:", 
"avx512f")
 TARGET_BUILTIN(__builtin_ia32_reduce_mul_d512, "iV16i", "ncV:512:", "avx512f")

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index a1d518697e60..ed59a1e3161e 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -13851,16 +13851,30 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned 
BuiltinID,
   case X86::BI__builtin_ia32_reduce_fadd_ps512: {
 Function *F =
 CGM.getIntrinsic(Intrinsic::vector_reduce_fadd, Ops[1]->getType());
-Builder.getFastMathFlags().setAllowReassoc(true);
+Builder.getFastMathFlags().setAllowReassoc();
 return Builder.CreateCall(F, {Ops[0], Ops[1]});
   }
   case X86::BI__builtin_ia32_reduce_fmul_pd512:
   case X86::BI__builtin_ia32_reduce_fmul_ps512: {
 Function *F =
 CGM.getIntrinsic(Intrinsic::vector_reduce_fmul, Ops[1]->getType());
-Builder.getFastMathFlags().setAllowReassoc(true);
+Builder.getFastMathFlags().setAllowReassoc();
 return Builder.CreateCall(F, {Ops[0], Ops[1]});
   }
+  case X86::BI__builtin_ia32_reduce_fmax_pd512:
+  case X86::BI__builtin_ia32_reduce_fmax_ps512: {
+Function *F =
+CGM.getIntrinsic(Intrinsic::vector_reduce_fmax, Ops[0]->getType());
+Builder.getFastMathFlags().setNoNaNs();
+return Builder.CreateCall(F, {Ops[0]});
+  }
+  case X86::BI__builtin_ia32_reduce_fmin_pd512:
+  case X86::BI__builtin_ia32_reduce_fmin_ps512: {
+Function *F =
+CGM.getIntrinsic(Intrinsic::vector_reduce_fmin, Ops[0]->getType());
+Builder.getFastMathFlags().setNoNaNs();
+return Builder.CreateCall(F, {Ops[0]});
+  }
   case X86::BI__builtin_ia32_reduce_mul_d512:
   case X86::BI__builtin_ia32_reduce_mul_q512: {
 Function *F =

diff  --git a/clang/lib/Headers/avx512fintrin.h 
b/clang/lib/Headers/avx512fintrin.h
index f226382cbb2c..e60cb5f3df1f 100644
--- a/clang/lib/Headers/avx512fintrin.h
+++ b/clang/lib/Headers/avx512fintrin.h
@@ -9300,8 +9300,11 @@ _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d 
__A)
  * computations. In vector-reduction arithmetic, the evaluation order is
  * independent of the order of the input elements of V.
 
- * For floating point types, we always assume the elements are reassociable 
even
- * if -fast-math is off.
+ * For floating-point intrinsics:
+ * 1. When using fadd/fmul intrinsics, the order of operations within the
+ * vector is unspecified (associative math).
+ * 2. When using fmin/fmax intrinsics, NaN or -0.0 elements within the vector
+ * produce unspecified results.
 
  * Used bisection method. At each step, we partition the vector with previous
  * step in half, and the operation is performed on its two halves.
@@ -9524,75 +9527,49 @@ _mm512_mask_reduce_min_epu32(__mmask16 __M, __m512i 
__V) {
   return __builtin_ia32_reduce_umin_d512((__v16si)__V);
 }
 
-#define _mm512_mask_reduce_operator(op) \
-  __m256d __t1 = _mm512_extractf64x4_pd(__V, 0); \
-  __

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

2021-02-14 Thread Pengfei Wang via Phabricator via cfe-commits 
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG61da20575d6c: [X86] Convert fmin/fmax _mm_reduce_* 
intrinsics to emit llvm.reduction… (authored by pengfei).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93179/new/

https://reviews.llvm.org/D93179

Files:
  clang/include/clang/Basic/BuiltinsX86.def
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Headers/avx512fintrin.h
  clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c

Index: clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
===
--- clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
+++ clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
@@ -14,18 +14,12 @@
   return _mm512_reduce_max_epu64(__W);
 }
 
-double test_mm512_reduce_max_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_max_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_max_pd(__W); 
+double test_mm512_reduce_max_pd(__m512d __W, double ExtraAddOp){
+// CHECK-LABEL: @test_mm512_reduce_max_pd(
+// CHECK-NOT: nnan
+// CHECK:call nnan double @llvm.vector.reduce.fmax.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+  return _mm512_reduce_max_pd(__W) + ExtraAddOp;
 }
 
 long long test_mm512_reduce_min_epi64(__m512i __W){
@@ -40,18 +34,12 @@
   return _mm512_reduce_min_epu64(__W);
 }
 
-double test_mm512_reduce_min_pd(__m512d __W){
-  // CHECK-LABEL: @test_mm512_reduce_min_pd(
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
-  return _mm512_reduce_min_pd(__W); 
+double test_mm512_reduce_min_pd(__m512d __W, double ExtraMulOp){
+// CHECK-LABEL: @test_mm512_reduce_min_pd(
+// CHECK-NOT: nnan
+// CHECK:call nnan double @llvm.vector.reduce.fmin.v8f64(<8 x double> %{{.*}})
+// CHECK-NOT: nnan
+  return _mm512_reduce_min_pd(__W) * ExtraMulOp;
 }
 
 long long test_mm512_mask_reduce_max_epi64(__mmask8 __M, __m512i __W){
@@ -59,7 +47,7 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.smax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epi64(__M, __W); 
+  return _mm512_mask_reduce_max_epi64(__M, __W);
 }
 
 unsigned long test_mm512_mask_reduce_max_epu64(__mmask8 __M, __m512i __W){
@@ -67,23 +55,15 @@
 // CHECK:bitcast i8 %{{.*}} to <8 x i1>
 // CHECK:select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
 // CHECK:call i64 @llvm.vector.reduce.umax.v8i64(<8 x i64> %{{.*}})
-  return _mm512_mask_reduce_max_epu64(__M, __W); 
+  return _mm512_mask_reduce_max_epu64(__M, __W);
 }
 
 double test_mm512_mask_reduce_max_pd(__mmask8 __M, __m512d __W){
-  // CHECK-LABEL: @test_mm512_mask_reduce_max_pd(
-  // CHECK:bitcast i8 %{{.*}} to <8 x i1>
-  // CHECK:select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x i32> 
-  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x i32> 
-  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK:shufflevecto

[PATCH] D96685: [WIP] Add noexcept clang-tidy codemod

2021-02-14 Thread Aditya Kumar via Phabricator via cfe-commits 
hiraditya created this revision.
hiraditya requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D96685

Files:
  clang-tools-extra/clang-tidy/modernize/AddNoexceptCheck.cpp
  clang-tools-extra/clang-tidy/modernize/AddNoexceptCheck.h

Index: clang-tools-extra/clang-tidy/modernize/AddNoexceptCheck.h
===
--- /dev/null
+++ clang-tools-extra/clang-tidy/modernize/AddNoexceptCheck.h
@@ -0,0 +1,39 @@
+//===--- AddNoexceptCheck.h - clang-tidy-*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_MODERNIZE_ADD_NOEXCEPT_H
+#define LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_MODERNIZE_ADD_NOEXCEPT_H
+
+#include "../ClangTidyCheck.h"
+
+namespace clang {
+namespace tidy {
+namespace modernize {
+
+/// Add noexcept to function delcaration and definitions. 
+/// For the user-facing documentation see:
+/// http://clang.llvm.org/extra/clang-tidy/checks/modernize-add-noexcept.html
+class AddNoexceptCheck : public ClangTidyCheck {
+public:
+  AddNoexceptCheck(StringRef Name, ClangTidyContext *Context);
+  bool isLanguageVersionSupported(const LangOptions &LangOpts) const override {
+return LangOpts.CPlusPlus11;
+  }
+  void storeOptions(ClangTidyOptions::OptionMap &Opts) override;
+  void registerMatchers(ast_matchers::MatchFinder *Finder) override;
+  void check(const ast_matchers::MatchFinder::MatchResult &Result) override;
+
+private:
+  const std::string NoexceptMacro;
+};
+
+} // namespace modernize
+} // namespace tidy
+} // namespace clang
+
+#endif // LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_MODERNIZE_ADD_NOEXCEPT_H
Index: clang-tools-extra/clang-tidy/modernize/AddNoexceptCheck.cpp
===
--- /dev/null
+++ clang-tools-extra/clang-tidy/modernize/AddNoexceptCheck.cpp
@@ -0,0 +1,121 @@
+//===--- AddNoexceptCheck.cpp - clang-tidy-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+// TODOs:
+// - Handle const functions properly.
+// - Handle functions with attributes.
+// - Handle functions with weird qualifiers (&, &&). There may not be too many 
+//  instances of this.
+//===--===//
+
+#include "AddNoexceptCheck.h"
+#include "clang/AST/ASTContext.h"
+#include "clang/Lex/Lexer.h"
+
+using namespace clang::ast_matchers;
+
+namespace clang {
+namespace tidy {
+namespace modernize {
+
+namespace {
+AST_MATCHER(NamedDecl, isValid) { return !Node.isInvalidDecl(); }
+AST_MATCHER(CXXMethodDecl, isStatic) { return Node.isStatic(); }
+AST_MATCHER(CXXMethodDecl, hasRefQualifier) { return Node.getRefQualifier() != clang::RQ_None; }
+AST_MATCHER(CXXMethodDecl, hasTrivialBody) { return Node.hasTrivialBody(); }
+
+AST_MATCHER(CXXRecordDecl, hasAnyDependentBases) {
+  return Node.hasAnyDependentBases();
+}
+
+AST_MATCHER(CXXMethodDecl, isTemplate) {
+  return Node.getTemplatedKind() != FunctionDecl::TK_NonTemplate;
+}
+
+AST_MATCHER(CXXMethodDecl, isDependentContext) {
+  return Node.isDependentContext();
+}
+
+AST_MATCHER(CXXMethodDecl, isInsideMacroDefinition) {
+  const ASTContext &Ctxt = Finder->getASTContext();
+  return clang::Lexer::makeFileCharRange(
+ clang::CharSourceRange::getCharRange(
+ Node.getTypeSourceInfo()->getTypeLoc().getSourceRange()),
+ Ctxt.getSourceManager(), Ctxt.getLangOpts())
+  .isInvalid();
+}
+
+// hasDynamicExceptionSpec mathes all 'throw's in the qualifier. We also skip all 'except's in the qualifier.
+AST_MATCHER(CXXMethodDecl, hasExceptSpec) { return clang::isNoexceptExceptionSpec(Node.getExceptionSpecType()); }
+
+AST_MATCHER_P(CXXMethodDecl, hasCanonicalDecl,
+  ast_matchers::internal::Matcher, InnerMatcher) {
+  return InnerMatcher.matches(*Node.getCanonicalDecl(), Finder, Builder);
+}
+
+} // namespace
+
+static SourceLocation getConstInsertionPoint(const CXXMethodDecl *M) {
+  TypeSourceInfo *TSI = M->getTypeSourceInfo();
+  if (!TSI)
+return {};
+
+  FunctionTypeLoc FTL = TSI->getTypeLoc().IgnoreParens().getAs();
+  if (!FTL)
+return {};
+  if (M->isConst()) {
+// TODO: Use a while loop to find the end of const.
+return FTL.getRParenLoc().getLocWithOffset(7);
+  }
+  return FTL.getRParenLoc().getLocWithOffset(1);
+}
+
+AddNoexceptCheck::AddNoexceptCheck(StringRef Name, ClangTidyContext *Context)
+: ClangTidyCheck(N