date:20151129

r254250 - ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply

2015-11-29 Thread Alexandros Lamprineas via cfe-commits

Author: alelab01
Date: Sun Nov 29 04:43:59 2015
New Revision: 254250

URL: http://llvm.org/viewvc/llvm-project?rev=254250&view=rev
Log:
ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply
Add/Subtract.

The following instructions are added to AArch32 instruction set:

- VQRDMLAH: Vector Saturating Rounding Doubling Multiply Accumulate
Returning High Half
- VQRDMLSH: Vector Saturating Rounding Doubling Multiply Subtract
Returning High Half

The following instructions are added to AArch64 instruction set:

- SQRDMLAH: Signed Saturating Rounding Doubling Multiply Accumulate
Returning High Half
- SQRDMLSH: Signed Saturating Rounding Doubling Multiply Subtract
Returning High Half

This patch adds intrinsic and ACLE macro support for these instructions,
as well as corresponding tests.

Differential Revision: http://reviews.llvm.org/D14982

Modified:
cfe/trunk/include/clang/Basic/arm_neon.td
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/test/Preprocessor/aarch64-target-features.c
cfe/trunk/test/Preprocessor/arm-target-features.c

Modified: cfe/trunk/include/clang/Basic/arm_neon.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/arm_neon.td?rev=254250&r1=254249&r2=254250&view=diff
==
--- cfe/trunk/include/clang/Basic/arm_neon.td (original)
+++ cfe/trunk/include/clang/Basic/arm_neon.td Sun Nov 29 04:43:59 2015
@@ -373,6 +373,10 @@ def OP_QDMLSLHi_LN : Op<(call "vqdmlsl",
   (splat $p2, $p3))>;
 def OP_QDMULH_LN : Op<(call "vqdmulh", $p0, (splat $p1, $p2))>;
 def OP_QRDMULH_LN : Op<(call "vqrdmulh", $p0, (splat $p1, $p2))>;
+def OP_QRDMLAH : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, $p2))>;
+def OP_QRDMLSH : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, $p2))>;
+def OP_QRDMLAH_LN : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, (splat $p2, 
$p3)))>;
+def OP_QRDMLSH_LN : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, (splat $p2, 
$p3)))>;
 def OP_FMS_LN   : Op<(call "vfma_lane", $p0, $p1, (op "-", $p2), $p3)>;
 def OP_FMS_LNQ  : Op<(call "vfma_laneq", $p0, $p1, (op "-", $p2), $p3)>;
 def OP_TRN1 : Op<(shuffle $p0, $p1, (interleave (decimate mask0, 2),
@@ -473,6 +477,11 @@ def OP_SCALAR_QDMULL_LN : ScalarMulOp<"v
 def OP_SCALAR_QDMULH_LN : ScalarMulOp<"vqdmulh">;
 def OP_SCALAR_QRDMULH_LN : ScalarMulOp<"vqrdmulh">;
 
+def OP_SCALAR_QRDMLAH_LN : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1,
+  (call "vget_lane", $p2, $p3)))>;
+def OP_SCALAR_QRDMLSH_LN : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1,
+  (call "vget_lane", $p2, $p3)))>;
+
 def OP_SCALAR_HALF_GET_LN : Op<(bitcast "float16_t",
(call "vget_lane",
  (bitcast "int16x4_t", $p0), $p1))>;
@@ -514,6 +523,12 @@ def VMLS : IOpInst<"vmls", "", "
 def VMLSL: SOpInst<"vmlsl", "wwdd", "csiUcUsUi", OP_MLSL>;
 def VQDMULH  : SInst<"vqdmulh", "ddd", "siQsQi">;
 def VQRDMULH : SInst<"vqrdmulh", "ddd", "siQsQi">;
+
+let ArchGuard = "defined(__ARM_FEATURE_QRDMX)" in {
+def VQRDMLAH : SOpInst<"vqrdmlah", "", "siQsQi", OP_QRDMLAH>;
+def VQRDMLSH : SOpInst<"vqrdmlsh", "", "siQsQi", OP_QRDMLSH>;
+}
+
 def VQDMLAL  : SInst<"vqdmlal", "wwdd", "si">;
 def VQDMLSL  : SInst<"vqdmlsl", "wwdd", "si">;
 def VMULL: SInst<"vmull", "wdd", "csiUcUsUiPc">;
@@ -741,6 +756,12 @@ def VQDMULH_N : SInst<"vqdmulh_n", "
 def VQDMULH_LANE  : SOpInst<"vqdmulh_lane", "ddgi", "siQsQi", OP_QDMULH_LN>;
 def VQRDMULH_N: SInst<"vqrdmulh_n", "dda", "siQsQi">;
 def VQRDMULH_LANE : SOpInst<"vqrdmulh_lane", "ddgi", "siQsQi", OP_QRDMULH_LN>;
+
+let ArchGuard = "defined(__ARM_FEATURE_QRDMX)" in {
+def VQRDMLAH_LANE : SOpInst<"vqrdmlah_lane", "dddgi", "siQsQi", OP_QRDMLAH_LN>;
+def VQRDMLSH_LANE : SOpInst<"vqrdmlsh_lane", "dddgi", "siQsQi", OP_QRDMLSH_LN>;
+}
+
 def VMLA_N: IOpInst<"vmla_n", "ddda", "siUsUifQsQiQUsQUiQf", OP_MLA_N>;
 def VMLAL_N   : SOpInst<"vmlal_n", "wwda", "siUsUi", OP_MLAL_N>;
 def VQDMLAL_N : SInst<"vqdmlal_n", "wwda", "si">;
@@ -1160,6 +1181,11 @@ def VQDMULL_HIGH_LANEQ  : SOpInst<"vqdmu
 def VQDMULH_LANEQ  : SOpInst<"vqdmulh_laneq", "ddji", "siQsQi", OP_QDMULH_LN>;
 def VQRDMULH_LANEQ : SOpInst<"vqrdmulh_laneq", "ddji", "siQsQi", 
OP_QRDMULH_LN>;
 
+let ArchGuard = "defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__)" in {
+def VQRDMLAH_LANEQ : SOpInst<"vqrdmlah_laneq", "dddji", "siQsQi", 
OP_QRDMLAH_LN>;
+def VQRDMLSH_LANEQ : SOpInst<"vqrdmlsh_laneq", "dddji", "siQsQi", 
OP_QRDMLSH_LN>;
+}
+
 // Note: d type implemented by SCALAR_VMULX_LANE
 def VMULX_LANE : IOpInst<"vmulx_lane", "ddgi", "fQfQd", OP_MULX_LN>;
 // Note: d type is implemented by SCALAR_VMULX_LANEQ
@@ -1405,6 +1431,16 @@ def SCALAR_SQDMULH : SInst<"vqdmulh", "s
 // Scalar Integer Saturating Rounding Doubling Multiply Half H

Re: [PATCH] D14982: ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply Add/Subtract.

2015-11-29 Thread Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rL254250: ARM v8.1a adds Advanced SIMD instructions for 
Rounding Double Multiply (authored by alelab01).

Changed prior to commit:
  http://reviews.llvm.org/D14982?vs=41316&id=41344#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D14982

Files:
  cfe/trunk/include/clang/Basic/arm_neon.td
  cfe/trunk/lib/Basic/Targets.cpp
  cfe/trunk/test/Preprocessor/aarch64-target-features.c
  cfe/trunk/test/Preprocessor/arm-target-features.c

Index: cfe/trunk/include/clang/Basic/arm_neon.td
===
--- cfe/trunk/include/clang/Basic/arm_neon.td
+++ cfe/trunk/include/clang/Basic/arm_neon.td
@@ -373,6 +373,10 @@
   (splat $p2, $p3))>;
 def OP_QDMULH_LN : Op<(call "vqdmulh", $p0, (splat $p1, $p2))>;
 def OP_QRDMULH_LN : Op<(call "vqrdmulh", $p0, (splat $p1, $p2))>;
+def OP_QRDMLAH : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, $p2))>;
+def OP_QRDMLSH : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, $p2))>;
+def OP_QRDMLAH_LN : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, (splat $p2, $p3)))>;
+def OP_QRDMLSH_LN : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, (splat $p2, $p3)))>;
 def OP_FMS_LN   : Op<(call "vfma_lane", $p0, $p1, (op "-", $p2), $p3)>;
 def OP_FMS_LNQ  : Op<(call "vfma_laneq", $p0, $p1, (op "-", $p2), $p3)>;
 def OP_TRN1 : Op<(shuffle $p0, $p1, (interleave (decimate mask0, 2),
@@ -473,6 +477,11 @@
 def OP_SCALAR_QDMULH_LN : ScalarMulOp<"vqdmulh">;
 def OP_SCALAR_QRDMULH_LN : ScalarMulOp<"vqrdmulh">;
 
+def OP_SCALAR_QRDMLAH_LN : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1,
+  (call "vget_lane", $p2, $p3)))>;
+def OP_SCALAR_QRDMLSH_LN : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1,
+  (call "vget_lane", $p2, $p3)))>;
+
 def OP_SCALAR_HALF_GET_LN : Op<(bitcast "float16_t",
(call "vget_lane",
  (bitcast "int16x4_t", $p0), $p1))>;
@@ -514,6 +523,12 @@
 def VMLSL: SOpInst<"vmlsl", "wwdd", "csiUcUsUi", OP_MLSL>;
 def VQDMULH  : SInst<"vqdmulh", "ddd", "siQsQi">;
 def VQRDMULH : SInst<"vqrdmulh", "ddd", "siQsQi">;
+
+let ArchGuard = "defined(__ARM_FEATURE_QRDMX)" in {
+def VQRDMLAH : SOpInst<"vqrdmlah", "", "siQsQi", OP_QRDMLAH>;
+def VQRDMLSH : SOpInst<"vqrdmlsh", "", "siQsQi", OP_QRDMLSH>;
+}
+
 def VQDMLAL  : SInst<"vqdmlal", "wwdd", "si">;
 def VQDMLSL  : SInst<"vqdmlsl", "wwdd", "si">;
 def VMULL: SInst<"vmull", "wdd", "csiUcUsUiPc">;
@@ -741,6 +756,12 @@
 def VQDMULH_LANE  : SOpInst<"vqdmulh_lane", "ddgi", "siQsQi", OP_QDMULH_LN>;
 def VQRDMULH_N: SInst<"vqrdmulh_n", "dda", "siQsQi">;
 def VQRDMULH_LANE : SOpInst<"vqrdmulh_lane", "ddgi", "siQsQi", OP_QRDMULH_LN>;
+
+let ArchGuard = "defined(__ARM_FEATURE_QRDMX)" in {
+def VQRDMLAH_LANE : SOpInst<"vqrdmlah_lane", "dddgi", "siQsQi", OP_QRDMLAH_LN>;
+def VQRDMLSH_LANE : SOpInst<"vqrdmlsh_lane", "dddgi", "siQsQi", OP_QRDMLSH_LN>;
+}
+
 def VMLA_N: IOpInst<"vmla_n", "ddda", "siUsUifQsQiQUsQUiQf", OP_MLA_N>;
 def VMLAL_N   : SOpInst<"vmlal_n", "wwda", "siUsUi", OP_MLAL_N>;
 def VQDMLAL_N : SInst<"vqdmlal_n", "wwda", "si">;
@@ -1160,6 +1181,11 @@
 def VQDMULH_LANEQ  : SOpInst<"vqdmulh_laneq", "ddji", "siQsQi", OP_QDMULH_LN>;
 def VQRDMULH_LANEQ : SOpInst<"vqrdmulh_laneq", "ddji", "siQsQi", OP_QRDMULH_LN>;
 
+let ArchGuard = "defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__)" in {
+def VQRDMLAH_LANEQ : SOpInst<"vqrdmlah_laneq", "dddji", "siQsQi", OP_QRDMLAH_LN>;
+def VQRDMLSH_LANEQ : SOpInst<"vqrdmlsh_laneq", "dddji", "siQsQi", OP_QRDMLSH_LN>;
+}
+
 // Note: d type implemented by SCALAR_VMULX_LANE
 def VMULX_LANE : IOpInst<"vmulx_lane", "ddgi", "fQfQd", OP_MULX_LN>;
 // Note: d type is implemented by SCALAR_VMULX_LANEQ
@@ -1405,6 +1431,16 @@
 // Scalar Integer Saturating Rounding Doubling Multiply Half High
 def SCALAR_SQRDMULH : SInst<"vqrdmulh", "sss", "SsSi">;
 
+let ArchGuard = "defined(__ARM_FEATURE_QRDMX) && defined(__aarch64__)" in {
+
+// Signed Saturating Rounding Doubling Multiply Accumulate Returning High Half
+def SCALAR_SQRDMLAH : SOpInst<"vqrdmlah", "", "SsSi", OP_QRDMLAH>;
+
+
+// Signed Saturating Rounding Doubling Multiply Subtract Returning High Half
+def SCALAR_SQRDMLSH : SOpInst<"vqrdmlsh", "", "SsSi", OP_QRDMLSH>;
+}
+
 
 // Scalar Floating-point Multiply Extended
 def SCALAR_FMULX : IInst<"vmulx", "sss", "SfSd">;
@@ -1606,6 +1642,16 @@
 def SCALAR_SQRDMULH_LANE : SOpInst<"vqrdmulh_lane", "ssdi", "SsSi", OP_SCALAR_QRDMULH_LN>;
 def SCALAR_SQRDMULH_LANEQ : SOpInst<"vqrdmulh_laneq", "ssji", "SsSi", OP_SCALAR_QRDMULH_LN>;
 
+let ArchGuard

r254251 - ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply

2015-11-29 Thread Alexandros Lamprineas via cfe-commits

Author: alelab01
Date: Sun Nov 29 04:53:28 2015
New Revision: 254251

URL: http://llvm.org/viewvc/llvm-project?rev=254251&view=rev
Log:
ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply
Add/Subtract.

Add missing tests that accidentally were not committed in rL254250.

Differential Revision: http://reviews.llvm.org/D14982

Added:
cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
cfe/trunk/test/CodeGen/arm-v8.1a-neon-intrinsics.c

Added: cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c?rev=254251&view=auto
==
--- cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c (added)
+++ cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c Sun Nov 29 04:53:28 
2015
@@ -0,0 +1,128 @@
+// REQUIRES: aarch64-registered-target
+
+// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
+// RUN:  -target-feature +v8.1a -O3 -S -o - %s \
+// RUN:  | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
+
+ #include 
+
+// CHECK-AARCH64-LABEL: test_vqrdmlah_laneq_s16
+int16x4_t test_vqrdmlah_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
+// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
+  return vqrdmlah_laneq_s16(a, b, v, 7);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlah_laneq_s32
+int32x2_t test_vqrdmlah_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
+// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
+  return vqrdmlah_laneq_s32(a, b, v, 3);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlahq_laneq_s16
+int16x8_t test_vqrdmlahq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v) {
+// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
+  return vqrdmlahq_laneq_s16(a, b, v, 7);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlahq_laneq_s32
+int32x4_t test_vqrdmlahq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v) {
+// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
+  return vqrdmlahq_laneq_s32(a, b, v, 3);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlahh_s16
+int16_t test_vqrdmlahh_s16(int16_t a, int16_t b, int16_t c) {
+// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, 
{{h[0-9]+|v[0-9]+.4h}}
+  return vqrdmlahh_s16(a, b, c);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlahs_s32
+int32_t test_vqrdmlahs_s32(int32_t a, int32_t b, int32_t c) {
+// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
+  return vqrdmlahs_s32(a, b, c);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlahh_lane_s16
+int16_t test_vqrdmlahh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
+// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, 
{{v[0-9]+}}.h[3]
+  return vqrdmlahh_lane_s16(a, b, c, 3);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlahs_lane_s32
+int32_t test_vqrdmlahs_lane_s32(int32_t a, int32_t b, int32x2_t c) {
+// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
+  return vqrdmlahs_lane_s32(a, b, c, 1);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlahh_laneq_s16
+int16_t test_vqrdmlahh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
+// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, 
{{v[0-9]+}}.h[7]
+  return vqrdmlahh_laneq_s16(a, b, c, 7);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlahs_laneq_s32
+int32_t test_vqrdmlahs_laneq_s32(int32_t a, int32_t b, int32x4_t c) {
+// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
+  return vqrdmlahs_laneq_s32(a, b, c, 3);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlsh_laneq_s16
+int16x4_t test_vqrdmlsh_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
+// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
+  return vqrdmlsh_laneq_s16(a, b, v, 7);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlsh_laneq_s32
+int32x2_t test_vqrdmlsh_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
+// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
+  return vqrdmlsh_laneq_s32(a, b, v, 3);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlshq_laneq_s16
+int16x8_t test_vqrdmlshq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v) {
+// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
+  return vqrdmlshq_laneq_s16(a, b, v, 7);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlshq_laneq_s32
+int32x4_t test_vqrdmlshq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v) {
+// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
+  return vqrdmlshq_laneq_s32(a, b, v, 3);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlshh_s16
+int16_t test_vqrdmlshh_s16(int16_t a, int16_t b, int16_t c) {
+// CHECK-AARCH64: sqrdmlsh {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, 
{{h[0-9]+|v[0-9]+.4h}}
+  return vqrdmlshh_s16(a, b, c);
+}
+
+// CHECK-AARCH64-LABEL: test_vqrdmlshs_s32
+int32_t test_vqrdmlshs_s32(int32_t a, int32_t b, int32_t c) {
+// CHECK-AARCH64: sqrdmlsh {{s[0-

[PATCH] D15055: [X86] Better support for the MCU psABI

2015-11-29 Thread Michael Kuperstein via cfe-commits

mkuper created this revision.
mkuper added reviewers: rnk, rafael, DavidKreitzer.
mkuper added a subscriber: cfe-commits.

This adds support for the MCU psABI in a way different from r251223 and 
r251224, basically reverting most of these two patches.
The problem with the approach taken in r251223 is that it only handled libcalls 
that originated from the backend. However, the midend also inserts quite a few 
libcalls and - with good reason - assumes these use the platform's default 
calling convention.

The previous patch tried to insert inregs when necessary both in the FE and, 
somewhat hackily, in the CG. This patch (and its clang companion patch) goes in 
a different direction. It defines a new default calling convention for the MCU, 
which doesn't use inreg marking at all, similarly to what, say, x86-64 does.

The LLVM part of this patch is D15054.

http://reviews.llvm.org/D15055

Files:
  lib/CodeGen/TargetInfo.cpp
  test/CodeGen/x86_32-arguments-iamcu.c

Index: lib/CodeGen/TargetInfo.cpp
===
--- lib/CodeGen/TargetInfo.cpp
+++ lib/CodeGen/TargetInfo.cpp
@@ -831,7 +831,12 @@
   Class classify(QualType Ty) const;
   ABIArgInfo classifyReturnType(QualType RetTy, CCState &State) const;
   ABIArgInfo classifyArgumentType(QualType RetTy, CCState &State) const;
-  bool shouldUseInReg(QualType Ty, CCState &State, bool &NeedsPadding) const;
+  /// \brief Updates the number of available free registers, returns 
+  /// true if any registers were allocated.
+  bool updateFreeRegs(QualType Ty, CCState &State) const;
+  bool shouldAggregateUseDirect(QualType Ty, CCState &State, bool &InReg,
+bool &NeedsPadding) const;
+  bool shouldPrimitiveUseInReg(QualType Ty, CCState &State) const;
 
   /// \brief Rewrite the function info so that all memory arguments use
   /// inalloca.
@@ -993,9 +998,10 @@
ASTContext &Context) const {
   uint64_t Size = Context.getTypeSize(Ty);
 
-  // Type must be register sized.
-  if (!isRegisterSize(Size))
-return false;
+  // For i386, type must be register sized.
+  // For the MCU ABI, it only needs to be <= 8-byte
+  if ((IsMCUABI && Size > 64) || (!IsMCUABI && !isRegisterSize(Size)))
+   return false;
 
   if (Ty->isVectorType()) {
 // 64- and 128- bit vectors inside structures are not returned in
@@ -1042,7 +1048,8 @@
   // integer register.
   if (State.FreeRegs) {
 --State.FreeRegs;
-return getNaturalAlignIndirectInReg(RetTy);
+if (!IsMCUABI)
+  return getNaturalAlignIndirectInReg(RetTy);
   }
   return getNaturalAlignIndirect(RetTy, /*ByVal=*/false);
 }
@@ -1182,7 +1189,8 @@
   if (!ByVal) {
 if (State.FreeRegs) {
   --State.FreeRegs; // Non-byval indirects just use one pointer.
-  return getNaturalAlignIndirectInReg(Ty);
+  if (!IsMCUABI)
+return getNaturalAlignIndirectInReg(Ty);
 }
 return getNaturalAlignIndirect(Ty, false);
   }
@@ -1213,9 +1221,7 @@
   return Integer;
 }
 
-bool X86_32ABIInfo::shouldUseInReg(QualType Ty, CCState &State,
-   bool &NeedsPadding) const {
-  NeedsPadding = false;
+bool X86_32ABIInfo::updateFreeRegs(QualType Ty, CCState &State) const {
   if (!IsSoftFloatABI) {
 Class C = classify(Ty);
 if (C == Float)
@@ -1243,25 +1249,45 @@
   }
 
   State.FreeRegs -= SizeInRegs;
+  return true;
+}
+
+bool X86_32ABIInfo::shouldAggregateUseDirect(QualType Ty, CCState &State, 
+  bool &InReg, bool &NeedsPadding) const {
+  NeedsPadding = false;
+  InReg = !IsMCUABI;
+
+  if (!updateFreeRegs(Ty, State))
+return false;
+
+  if (IsMCUABI)
+return true;
 
   if (State.CC == llvm::CallingConv::X86_FastCall ||
   State.CC == llvm::CallingConv::X86_VectorCall) {
-if (Size > 32)
-  return false;
-
-if (Ty->isIntegralOrEnumerationType())
-  return true;
+if (getContext().getTypeSize(Ty) <= 32 && State.FreeRegs)
+  NeedsPadding = true;
 
-if (Ty->isPointerType())
-  return true;
+return false;
+  }
 
-if (Ty->isReferenceType())
-  return true;
+  return true;
+}
 
-if (State.FreeRegs)
-  NeedsPadding = true;
+bool X86_32ABIInfo::shouldPrimitiveUseInReg(QualType Ty, CCState &State) const {
+  if (!updateFreeRegs(Ty, State))
+return false;
 
+  if (IsMCUABI)
 return false;
+
+  if (State.CC == llvm::CallingConv::X86_FastCall ||
+  State.CC == llvm::CallingConv::X86_VectorCall) {
+if (getContext().getTypeSize(Ty) > 32)
+  return false;
+
+return (Ty->isIntegralOrEnumerationType() || Ty->isPointerType() || 
+Ty->isReferenceType());
   }
 
   return true;
@@ -1317,21 +1343,27 @@
 
 llvm::LLVMContext &LLVMContext = getVMContext();
 llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext);
-bool NeedsPadding;
-if (shouldUseInReg(Ty, State, NeedsPadding)) {
+bool NeedsPadding, InReg;
+if (shouldAggregateUseDirect(Ty, State, InReg, NeedsPadding)) {

Re: [Static Analyzer] New checker hook: checkInitialState

2015-11-29 Thread Gabor Kozar via cfe-commits

+Jordan, Anna

---
Best regards,

Gábor 'ShdNx' Kozár http://gaborkozar.me



On Sat, Nov 28, 2015, at 22:52, Gabor Kozar via cfe-commits wrote:
> Hi,
>
> Once, long ago, I started working on this checker callback, but forgot
> about it. I have decided to finish it now. Original discussion:
> http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20131216/095565.html
>
> The motivation was (pipermail doesn't seem to have my original mail,
> for some reason):
>
>> I had an issue recently with the Static Analyzer [while implementing
>> a checker] that I wouldn't be able
 to detect when a function was entered - either through a call or
 serving as the entry point of the analysis. (I ended up using
 checkPreStmt and figuring out if we've been magically transported
 inside a function body and check the program state whether the
 necessary info was already recorded by checkPreCall. Not something I'd
 call nice by any means.)
>
> The attached patch creates a new checker hook, with the signature:
>
>> ProgramStateRef checkInitialState(const EntryPointInfo& EPInfo) /*
>> non-const */;
>
> EntryPointInfo is currently a very simple class containing a Decl* of
> the declaration being used as an entry point and a ProgramStateRef of
> the initial state.
>
> Checkers implementing this hook can make changes to the program state
> by returning a new one. They are also allowed to return nullptr, in
> which case the analysis doesn't proceed further from that entry point.
>
> Please let me know what you think!
>
> ---
> Best regards,
>
> Gábor 'ShdNx' Kozár http://gaborkozar.me
>
>
> _
> cfe-commits mailing list cfe-commits@lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits Email had 1
> attachment:


>  * clangsa_checkinitial.patch  11k (text/x-patch)
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r254252 - clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c REQUIRES both arm and aarch64.

2015-11-29 Thread NAKAMURA Takumi via cfe-commits

Author: chapuni
Date: Sun Nov 29 07:43:05 2015
New Revision: 254252

URL: http://llvm.org/viewvc/llvm-project?rev=254252&view=rev
Log:
clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c REQUIRES both arm and aarch64.

Modified:
cfe/trunk/test/CodeGen/arm-v8.1a-neon-intrinsics.c

Modified: cfe/trunk/test/CodeGen/arm-v8.1a-neon-intrinsics.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-v8.1a-neon-intrinsics.c?rev=254252&r1=254251&r2=254252&view=diff
==
--- cfe/trunk/test/CodeGen/arm-v8.1a-neon-intrinsics.c (original)
+++ cfe/trunk/test/CodeGen/arm-v8.1a-neon-intrinsics.c Sun Nov 29 07:43:05 2015
@@ -4,6 +4,7 @@
 // RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
 // RUN:  -target-feature +v8.1a -O3 -S -o - %s \
 // RUN:  | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
+// REQUIRES: arm-registered-target,aarch64-registered-target
 
 #include 
 


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Re: [PATCH] D8940: Clang changes for indirect call target profiling

2015-11-29 Thread David Li via cfe-commits

davidxl added a comment.

Betul, is this patch up to date?


http://reviews.llvm.org/D8940



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r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

2015-11-29 Thread Simon Pilgrim via cfe-commits

Author: rksimon
Date: Sun Nov 29 14:23:00 2015
New Revision: 254262

URL: http://llvm.org/viewvc/llvm-project?rev=254262&view=rev
Log:
[X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

Improved tests as discussed in PR24580

Added:
cfe/trunk/test/CodeGen/sse2-builtins.c

Added: cfe/trunk/test/CodeGen/sse2-builtins.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-builtins.c?rev=254262&view=auto
==
--- cfe/trunk/test/CodeGen/sse2-builtins.c (added)
+++ cfe/trunk/test/CodeGen/sse2-builtins.c Sun Nov 29 14:23:00 2015
@@ -0,0 +1,1656 @@
+// REQUIRES: x86-registered-target
+// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
-emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
+// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
-fno-signed-char -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
+// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 -S -o 
- -Werror | FileCheck %s --check-prefix=ASM
+// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
-fno-signed-char -S -o - -Werror | FileCheck %s --check-prefix=ASM
+
+// Don't include mm_malloc.h, it's system specific.
+#define __MM_MALLOC_H
+
+#include 
+
+__m128i test_mm_add_epi8(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_add_epi8
+  // DAG: add <16 x i8>
+  //
+  // ASM-LABEL: test_mm_add_epi8
+  // ASM: paddb
+  return _mm_add_epi8(A, B);
+}
+
+__m128i test_mm_add_epi16(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_add_epi16
+  // DAG: add <8 x i16>
+  //
+  // ASM-LABEL: test_mm_add_epi16
+  // ASM: paddw
+  return _mm_add_epi16(A, B);
+}
+
+__m128i test_mm_add_epi32(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_add_epi32
+  // DAG: add <4 x i32>
+  //
+  // ASM-LABEL: test_mm_add_epi32
+  // ASM: paddd
+  return _mm_add_epi32(A, B);
+}
+
+__m128i test_mm_add_epi64(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_add_epi64
+  // DAG: add <2 x i64>
+  //
+  // ASM-LABEL: test_mm_add_epi64
+  // ASM: paddq
+  return _mm_add_epi64(A, B);
+}
+
+__m128d test_mm_add_pd(__m128d A, __m128d B) {
+  // DAG-LABEL: test_mm_add_pd
+  // DAG: fadd <2 x double>
+  //
+  // ASM-LABEL: test_mm_add_pd
+  // ASM: addpd
+  return _mm_add_pd(A, B);
+}
+
+__m128d test_mm_add_sd(__m128d A, __m128d B) {
+  // DAG-LABEL: test_mm_add_sd
+  // DAG: fadd double
+  //
+  // ASM-LABEL: test_mm_add_sd
+  // ASM: addsd
+  return _mm_add_sd(A, B);
+}
+
+__m128i test_mm_adds_epi8(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_adds_epi8
+  // DAG: call <16 x i8> @llvm.x86.sse2.padds.b
+  //
+  // ASM-LABEL: test_mm_adds_epi8
+  // ASM: paddsb
+  return _mm_adds_epi8(A, B);
+}
+
+__m128i test_mm_adds_epi16(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_adds_epi16
+  // DAG: call <8 x i16> @llvm.x86.sse2.padds.w
+  //
+  // ASM-LABEL: test_mm_adds_epi16
+  // ASM: paddsw
+  return _mm_adds_epi16(A, B);
+}
+
+__m128i test_mm_adds_epu8(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_adds_epu8
+  // DAG: call <16 x i8> @llvm.x86.sse2.paddus.b
+  //
+  // ASM-LABEL: test_mm_adds_epu8
+  // ASM: paddusb
+  return _mm_adds_epu8(A, B);
+}
+
+__m128i test_mm_adds_epu16(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_adds_epu16
+  // DAG: call <8 x i16> @llvm.x86.sse2.paddus.w
+  //
+  // ASM-LABEL: test_mm_adds_epu16
+  // ASM: paddusw
+  return _mm_adds_epu16(A, B);
+}
+
+__m128d test_mm_and_pd(__m128d A, __m128d B) {
+  // DAG-LABEL: test_mm_and_pd
+  // DAG: and <4 x i32>
+  //
+  // ASM-LABEL: test_mm_and_pd
+  // ASM: pand
+  return _mm_and_pd(A, B);
+}
+
+__m128i test_mm_and_si128(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_and_si128
+  // DAG: and <2 x i64>
+  //
+  // ASM-LABEL: test_mm_and_si128
+  // ASM: andps
+  return _mm_and_si128(A, B);
+}
+
+__m128i test_mm_avg_epu8(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_avg_epu8
+  // DAG: call <16 x i8> @llvm.x86.sse2.pavg.b
+  //
+  // ASM-LABEL: test_mm_avg_epu8
+  // ASM: pavgb
+  return _mm_avg_epu8(A, B);
+}
+
+__m128i test_mm_avg_epu16(__m128i A, __m128i B) {
+  // DAG-LABEL: test_mm_avg_epu16
+  // DAG: call <8 x i16> @llvm.x86.sse2.pavg.w
+  //
+  // ASM-LABEL: test_mm_avg_epu16
+  // ASM: pavgw
+  return _mm_avg_epu16(A, B);
+}
+
+__m128i test_mm_bslli_si128(__m128i A) {
+  // DAG-LABEL: test_mm_bslli_si128
+  // DAG: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <16 x i32> 
+  //
+  // ASM-LABEL: test_mm_bslli_si128
+  // ASM: pslldq $5, %xmm{{.*}}
+  return _mm_bslli_si128(A, 5);
+}
+
+__m128i test_mm_bsrli_si128(__m128i A) {
+  // DAG-LABEL: test_mm_bsrli_si128
+  // DAG: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <16 x i32> 
+  //
+  // ASM-LABEL: test_mm_bsrli_si128
+  // ASM: psrldq $5, %xmm{{.*}}
+  return _mm_bsrli_si128(A, 5);
+}
+
+void test_mm_clflush(void* A) {
+  // DAG-LABEL: test_mm_clflush
+  // DAG: call void @llvm.x86.sse2.clflush(i8* %{{.*}})
+  //
+  // ASM-LABEL: test_m

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

2015-11-29 Thread Eric Christopher via cfe-commits

This is amazing... And entirely the wrong place for the asm tests. :)

Would you mind splitting this test case in two with an IR test for clang
and an asm test for llvm?

Thanks!

On Sun, Nov 29, 2015, 12:25 PM Simon Pilgrim via cfe-commits <
cfe-commits@lists.llvm.org> wrote:

> Author: rksimon
> Date: Sun Nov 29 14:23:00 2015
> New Revision: 254262
>
> URL: http://llvm.org/viewvc/llvm-project?rev=254262&view=rev
> Log:
> [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests
>
> Improved tests as discussed in PR24580
>
> Added:
> cfe/trunk/test/CodeGen/sse2-builtins.c
>
> Added: cfe/trunk/test/CodeGen/sse2-builtins.c
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-builtins.c?rev=254262&view=auto
>
> ==
> --- cfe/trunk/test/CodeGen/sse2-builtins.c (added)
> +++ cfe/trunk/test/CodeGen/sse2-builtins.c Sun Nov 29 14:23:00 2015
> @@ -0,0 +1,1656 @@
> +// REQUIRES: x86-registered-target
> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
> -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
> -fno-signed-char -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
> -S -o - -Werror | FileCheck %s --check-prefix=ASM
> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
> -fno-signed-char -S -o - -Werror | FileCheck %s --check-prefix=ASM
> +
> +// Don't include mm_malloc.h, it's system specific.
> +#define __MM_MALLOC_H
> +
> +#include 
> +
> +__m128i test_mm_add_epi8(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_add_epi8
> +  // DAG: add <16 x i8>
> +  //
> +  // ASM-LABEL: test_mm_add_epi8
> +  // ASM: paddb
> +  return _mm_add_epi8(A, B);
> +}
> +
> +__m128i test_mm_add_epi16(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_add_epi16
> +  // DAG: add <8 x i16>
> +  //
> +  // ASM-LABEL: test_mm_add_epi16
> +  // ASM: paddw
> +  return _mm_add_epi16(A, B);
> +}
> +
> +__m128i test_mm_add_epi32(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_add_epi32
> +  // DAG: add <4 x i32>
> +  //
> +  // ASM-LABEL: test_mm_add_epi32
> +  // ASM: paddd
> +  return _mm_add_epi32(A, B);
> +}
> +
> +__m128i test_mm_add_epi64(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_add_epi64
> +  // DAG: add <2 x i64>
> +  //
> +  // ASM-LABEL: test_mm_add_epi64
> +  // ASM: paddq
> +  return _mm_add_epi64(A, B);
> +}
> +
> +__m128d test_mm_add_pd(__m128d A, __m128d B) {
> +  // DAG-LABEL: test_mm_add_pd
> +  // DAG: fadd <2 x double>
> +  //
> +  // ASM-LABEL: test_mm_add_pd
> +  // ASM: addpd
> +  return _mm_add_pd(A, B);
> +}
> +
> +__m128d test_mm_add_sd(__m128d A, __m128d B) {
> +  // DAG-LABEL: test_mm_add_sd
> +  // DAG: fadd double
> +  //
> +  // ASM-LABEL: test_mm_add_sd
> +  // ASM: addsd
> +  return _mm_add_sd(A, B);
> +}
> +
> +__m128i test_mm_adds_epi8(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_adds_epi8
> +  // DAG: call <16 x i8> @llvm.x86.sse2.padds.b
> +  //
> +  // ASM-LABEL: test_mm_adds_epi8
> +  // ASM: paddsb
> +  return _mm_adds_epi8(A, B);
> +}
> +
> +__m128i test_mm_adds_epi16(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_adds_epi16
> +  // DAG: call <8 x i16> @llvm.x86.sse2.padds.w
> +  //
> +  // ASM-LABEL: test_mm_adds_epi16
> +  // ASM: paddsw
> +  return _mm_adds_epi16(A, B);
> +}
> +
> +__m128i test_mm_adds_epu8(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_adds_epu8
> +  // DAG: call <16 x i8> @llvm.x86.sse2.paddus.b
> +  //
> +  // ASM-LABEL: test_mm_adds_epu8
> +  // ASM: paddusb
> +  return _mm_adds_epu8(A, B);
> +}
> +
> +__m128i test_mm_adds_epu16(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_adds_epu16
> +  // DAG: call <8 x i16> @llvm.x86.sse2.paddus.w
> +  //
> +  // ASM-LABEL: test_mm_adds_epu16
> +  // ASM: paddusw
> +  return _mm_adds_epu16(A, B);
> +}
> +
> +__m128d test_mm_and_pd(__m128d A, __m128d B) {
> +  // DAG-LABEL: test_mm_and_pd
> +  // DAG: and <4 x i32>
> +  //
> +  // ASM-LABEL: test_mm_and_pd
> +  // ASM: pand
> +  return _mm_and_pd(A, B);
> +}
> +
> +__m128i test_mm_and_si128(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_and_si128
> +  // DAG: and <2 x i64>
> +  //
> +  // ASM-LABEL: test_mm_and_si128
> +  // ASM: andps
> +  return _mm_and_si128(A, B);
> +}
> +
> +__m128i test_mm_avg_epu8(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_avg_epu8
> +  // DAG: call <16 x i8> @llvm.x86.sse2.pavg.b
> +  //
> +  // ASM-LABEL: test_mm_avg_epu8
> +  // ASM: pavgb
> +  return _mm_avg_epu8(A, B);
> +}
> +
> +__m128i test_mm_avg_epu16(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_avg_epu16
> +  // DAG: call <8 x i16> @llvm.x86.sse2.pavg.w
> +  //
> +  // ASM-LABEL: test_mm_avg_epu16
> +  // ASM: pavgw
> +  return _mm_avg_epu16(A, B);
> +}
> +
> +__m128i test_mm_bslli_si128(__m128i A) {
> +  // DAG-LABEL: test_mm_bslli_si128
> +  // DAG

Re: r254251 - ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply

2015-11-29 Thread Eric Christopher via cfe-commits

Hi,

This is entirely the wrong way to do these tests. They shouldn't depend on
assembly output or optimization. Please split them onto frontend IR tests
and backend assembly tests.

Thanks!

On Sun, Nov 29, 2015, 2:56 AM Alexandros Lamprineas via cfe-commits <
cfe-commits@lists.llvm.org> wrote:

> Author: alelab01
> Date: Sun Nov 29 04:53:28 2015
> New Revision: 254251
>
> URL: http://llvm.org/viewvc/llvm-project?rev=254251&view=rev
> Log:
> ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply
> Add/Subtract.
>
> Add missing tests that accidentally were not committed in rL254250.
>
> Differential Revision: http://reviews.llvm.org/D14982
>
> Added:
> cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
> cfe/trunk/test/CodeGen/arm-v8.1a-neon-intrinsics.c
>
> Added: cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c?rev=254251&view=auto
>
> ==
> --- cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c (added)
> +++ cfe/trunk/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c Sun Nov 29
> 04:53:28 2015
> @@ -0,0 +1,128 @@
> +// REQUIRES: aarch64-registered-target
> +
> +// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
> +// RUN:  -target-feature +v8.1a -O3 -S -o - %s \
> +// RUN:  | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
> +
> + #include 
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlah_laneq_s16
> +int16x4_t test_vqrdmlah_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
> +// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h,
> {{v[0-9]+}}.h[7]
> +  return vqrdmlah_laneq_s16(a, b, v, 7);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlah_laneq_s32
> +int32x2_t test_vqrdmlah_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
> +// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s,
> {{v[0-9]+}}.s[3]
> +  return vqrdmlah_laneq_s32(a, b, v, 3);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlahq_laneq_s16
> +int16x8_t test_vqrdmlahq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v)
> {
> +// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h,
> {{v[0-9]+}}.h[7]
> +  return vqrdmlahq_laneq_s16(a, b, v, 7);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlahq_laneq_s32
> +int32x4_t test_vqrdmlahq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v)
> {
> +// CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s,
> {{v[0-9]+}}.s[3]
> +  return vqrdmlahq_laneq_s32(a, b, v, 3);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlahh_s16
> +int16_t test_vqrdmlahh_s16(int16_t a, int16_t b, int16_t c) {
> +// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}},
> {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}
> +  return vqrdmlahh_s16(a, b, c);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlahs_s32
> +int32_t test_vqrdmlahs_s32(int32_t a, int32_t b, int32_t c) {
> +// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
> +  return vqrdmlahs_s32(a, b, c);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlahh_lane_s16
> +int16_t test_vqrdmlahh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
> +// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}},
> {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[3]
> +  return vqrdmlahh_lane_s16(a, b, c, 3);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlahs_lane_s32
> +int32_t test_vqrdmlahs_lane_s32(int32_t a, int32_t b, int32x2_t c) {
> +// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
> +  return vqrdmlahs_lane_s32(a, b, c, 1);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlahh_laneq_s16
> +int16_t test_vqrdmlahh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
> +// CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}},
> {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[7]
> +  return vqrdmlahh_laneq_s16(a, b, c, 7);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlahs_laneq_s32
> +int32_t test_vqrdmlahs_laneq_s32(int32_t a, int32_t b, int32x4_t c) {
> +// CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
> +  return vqrdmlahs_laneq_s32(a, b, c, 3);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlsh_laneq_s16
> +int16x4_t test_vqrdmlsh_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
> +// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h,
> {{v[0-9]+}}.h[7]
> +  return vqrdmlsh_laneq_s16(a, b, v, 7);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlsh_laneq_s32
> +int32x2_t test_vqrdmlsh_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
> +// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s,
> {{v[0-9]+}}.s[3]
> +  return vqrdmlsh_laneq_s32(a, b, v, 3);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlshq_laneq_s16
> +int16x8_t test_vqrdmlshq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v)
> {
> +// CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h,
> {{v[0-9]+}}.h[7]
> +  return vqrdmlshq_laneq_s16(a, b, v, 7);
> +}
> +
> +// CHECK-AARCH64-LABEL: test_vqrdmlshq_laneq_s32
> +int32x4_t test_vqrdmlshq_laneq_s32(int32x4_t a

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

2015-11-29 Thread Simon Pilgrim via cfe-commits

So the problem we’re trying to solve is it make sure that in debug builds, 
clang compiles c/c++ intrinsics in the headers down to assembly that is very 
close to the expected instruction.

What we had before (testing c/c++ to IR results in clang/test/CodeGen and 
testing with llc on ‘similar' IR in llvm/test/CodeGen/X86) was very sensitive 
to bitrot, especially as we’ve put so much effort into removing what target 
specific intrinsics that we can.

I’m happy to split the tests but would prefer that they are both being tested 
from c/c++ source (that at least is unlikely to ever change) so that we have a 
better chance of keeping track of any big changes - so is there anywhere in the 
clang project that they can be put?

> On 29 Nov 2015, at 21:47, Eric Christopher  wrote:
> 
> In the backend. If at all possible IR tests only in the front end. Same with 
> optimization etc.
> 
> 
> On Sun, Nov 29, 2015, 1:46 PM Simon Pilgrim  > wrote:
> I can try - if asm is not supposed to go in tests/CodeGen where is it 
> supposed to go? 
> 
>> On 29 Nov 2015, at 20:38, Eric Christopher > > wrote:
>> 
>> This is amazing... And entirely the wrong place for the asm tests. :)
>> 
>> Would you mind splitting this test case in two with an IR test for clang and 
>> an asm test for llvm?
>> 
>> Thanks!
>> 
>> 
>> On Sun, Nov 29, 2015, 12:25 PM Simon Pilgrim via cfe-commits 
>> mailto:cfe-commits@lists.llvm.org>> wrote:
>> Author: rksimon
>> Date: Sun Nov 29 14:23:00 2015
>> New Revision: 254262
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=254262&view=rev 
>> 
>> Log:
>> [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests
>> 
>> Improved tests as discussed in PR24580
>> 
>> Added:
>> cfe/trunk/test/CodeGen/sse2-builtins.c
>> 
>> Added: cfe/trunk/test/CodeGen/sse2-builtins.c
>> URL: 
>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-builtins.c?rev=254262&view=auto
>>  
>> 
>> ==
>> --- cfe/trunk/test/CodeGen/sse2-builtins.c (added)
>> +++ cfe/trunk/test/CodeGen/sse2-builtins.c Sun Nov 29 14:23:00 2015
>> @@ -0,0 +1,1656 @@
>> +// REQUIRES: x86-registered-target
>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
>> -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
>> -fno-signed-char -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 -S 
>> -o - -Werror | FileCheck %s --check-prefix=ASM
>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
>> -fno-signed-char -S -o - -Werror | FileCheck %s --check-prefix=ASM
>> +
>> +// Don't include mm_malloc.h, it's system specific.
>> +#define __MM_MALLOC_H
>> +
>> +#include 
>> +
>> +__m128i test_mm_add_epi8(__m128i A, __m128i B) {
>> +  // DAG-LABEL: test_mm_add_epi8
>> +  // DAG: add <16 x i8>
>> +  //
>> +  // ASM-LABEL: test_mm_add_epi8
>> +  // ASM: paddb
>> +  return _mm_add_epi8(A, B);
>> +}
>> +
>> +__m128i test_mm_add_epi16(__m128i A, __m128i B) {
>> +  // DAG-LABEL: test_mm_add_epi16
>> +  // DAG: add <8 x i16>
>> +  //
>> +  // ASM-LABEL: test_mm_add_epi16
>> +  // ASM: paddw
>> +  return _mm_add_epi16(A, B);
>> +}
>> +
>> +__m128i test_mm_add_epi32(__m128i A, __m128i B) {
>> +  // DAG-LABEL: test_mm_add_epi32
>> +  // DAG: add <4 x i32>
>> +  //
>> +  // ASM-LABEL: test_mm_add_epi32
>> +  // ASM: paddd
>> +  return _mm_add_epi32(A, B);
>> +}
>> +
>> +__m128i test_mm_add_epi64(__m128i A, __m128i B) {
>> +  // DAG-LABEL: test_mm_add_epi64
>> +  // DAG: add <2 x i64>
>> +  //
>> +  // ASM-LABEL: test_mm_add_epi64
>> +  // ASM: paddq
>> +  return _mm_add_epi64(A, B);
>> +}
>> +
>> +__m128d test_mm_add_pd(__m128d A, __m128d B) {
>> +  // DAG-LABEL: test_mm_add_pd
>> +  // DAG: fadd <2 x double>
>> +  //
>> +  // ASM-LABEL: test_mm_add_pd
>> +  // ASM: addpd
>> +  return _mm_add_pd(A, B);
>> +}
>> +
>> +__m128d test_mm_add_sd(__m128d A, __m128d B) {
>> +  // DAG-LABEL: test_mm_add_sd
>> +  // DAG: fadd double
>> +  //
>> +  // ASM-LABEL: test_mm_add_sd
>> +  // ASM: addsd
>> +  return _mm_add_sd(A, B);
>> +}
>> +
>> +__m128i test_mm_adds_epi8(__m128i A, __m128i B) {
>> +  // DAG-LABEL: test_mm_adds_epi8
>> +  // DAG: call <16 x i8> @llvm.x86.sse2.padds.b
>> +  //
>> +  // ASM-LABEL: test_mm_adds_epi8
>> +  // ASM: paddsb
>> +  return _mm_adds_epi8(A, B);
>> +}
>> +
>> +__m128i test_mm_adds_epi16(__m128i A, __m128i B) {
>> +  // DAG-LABEL: test_mm_adds_epi16
>> +  // DAG: call <8 x i16> @llvm.x86.sse2.padds.w
>> +  //
>> +  // ASM-LABEL: test_mm_adds_epi16
>> +  // ASM: paddsw
>> +  return _mm_adds_epi16(A, B);
>> +}
>> +
>> +__m128i test_mm_adds_epu8(__m12

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

2015-11-29 Thread Eric Christopher via cfe-commits

There's no reason a split set of tests would fail at doing this. You can
test that the IR is what you expect and then that the backend tests it as
well. It's very simple to do.

On Sun, Nov 29, 2015, 2:08 PM Simon Pilgrim  wrote:

> So the problem we’re trying to solve is it make sure that in debug builds,
> clang compiles c/c++ intrinsics in the headers down to assembly that is
> very close to the expected instruction.
>
> What we had before (testing c/c++ to IR results in clang/test/CodeGen and
> testing with llc on ‘similar' IR in llvm/test/CodeGen/X86) was very
> sensitive to bitrot, especially as we’ve put so much effort into removing
> what target specific intrinsics that we can.
>
> I’m happy to split the tests but would prefer that they are both being
> tested from c/c++ source (that at least is unlikely to ever change) so that
> we have a better chance of keeping track of any big changes - so is there
> anywhere in the clang project that they can be put?
>
> On 29 Nov 2015, at 21:47, Eric Christopher  wrote:
>
> In the backend. If at all possible IR tests only in the front end. Same
> with optimization etc.
>
> On Sun, Nov 29, 2015, 1:46 PM Simon Pilgrim 
> wrote:
>
>> I can try - if asm is not supposed to go in tests/CodeGen where is it
>> supposed to go?
>>
>> On 29 Nov 2015, at 20:38, Eric Christopher  wrote:
>>
>> This is amazing... And entirely the wrong place for the asm tests. :)
>>
>> Would you mind splitting this test case in two with an IR test for clang
>> and an asm test for llvm?
>>
>> Thanks!
>>
>> On Sun, Nov 29, 2015, 12:25 PM Simon Pilgrim via cfe-commits <
>> cfe-commits@lists.llvm.org> wrote:
>>
>>> Author: rksimon
>>> Date: Sun Nov 29 14:23:00 2015
>>> New Revision: 254262
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=254262&view=rev
>>> Log:
>>> [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests
>>>
>>> Improved tests as discussed in PR24580
>>>
>>> Added:
>>> cfe/trunk/test/CodeGen/sse2-builtins.c
>>>
>>> Added: cfe/trunk/test/CodeGen/sse2-builtins.c
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-builtins.c?rev=254262&view=auto
>>>
>>> ==
>>> --- cfe/trunk/test/CodeGen/sse2-builtins.c (added)
>>> +++ cfe/trunk/test/CodeGen/sse2-builtins.c Sun Nov 29 14:23:00 2015
>>> @@ -0,0 +1,1656 @@
>>> +// REQUIRES: x86-registered-target
>>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
>>> -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
>>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
>>> -fno-signed-char -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
>>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
>>> -S -o - -Werror | FileCheck %s --check-prefix=ASM
>>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
>>> -fno-signed-char -S -o - -Werror | FileCheck %s --check-prefix=ASM
>>> +
>>> +// Don't include mm_malloc.h, it's system specific.
>>> +#define __MM_MALLOC_H
>>> +
>>> +#include 
>>> +
>>> +__m128i test_mm_add_epi8(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_add_epi8
>>> +  // DAG: add <16 x i8>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_epi8
>>> +  // ASM: paddb
>>> +  return _mm_add_epi8(A, B);
>>> +}
>>> +
>>> +__m128i test_mm_add_epi16(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_add_epi16
>>> +  // DAG: add <8 x i16>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_epi16
>>> +  // ASM: paddw
>>> +  return _mm_add_epi16(A, B);
>>> +}
>>> +
>>> +__m128i test_mm_add_epi32(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_add_epi32
>>> +  // DAG: add <4 x i32>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_epi32
>>> +  // ASM: paddd
>>> +  return _mm_add_epi32(A, B);
>>> +}
>>> +
>>> +__m128i test_mm_add_epi64(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_add_epi64
>>> +  // DAG: add <2 x i64>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_epi64
>>> +  // ASM: paddq
>>> +  return _mm_add_epi64(A, B);
>>> +}
>>> +
>>> +__m128d test_mm_add_pd(__m128d A, __m128d B) {
>>> +  // DAG-LABEL: test_mm_add_pd
>>> +  // DAG: fadd <2 x double>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_pd
>>> +  // ASM: addpd
>>> +  return _mm_add_pd(A, B);
>>> +}
>>> +
>>> +__m128d test_mm_add_sd(__m128d A, __m128d B) {
>>> +  // DAG-LABEL: test_mm_add_sd
>>> +  // DAG: fadd double
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_sd
>>> +  // ASM: addsd
>>> +  return _mm_add_sd(A, B);
>>> +}
>>> +
>>> +__m128i test_mm_adds_epi8(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_adds_epi8
>>> +  // DAG: call <16 x i8> @llvm.x86.sse2.padds.b
>>> +  //
>>> +  // ASM-LABEL: test_mm_adds_epi8
>>> +  // ASM: paddsb
>>> +  return _mm_adds_epi8(A, B);
>>> +}
>>> +
>>> +__m128i test_mm_adds_epi16(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_adds_epi16
>>> +  // DAG: call <8 x i16> @llvm.x86.sse2.padds.w
>>> +  //
>>> +  // ASM-LABEL: test_mm_adds_epi16
>>

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

2015-11-29 Thread Simon Pilgrim via cfe-commits

OK I’ll see what I can do to split the tests with a -O0/-fast-isel llc version. 
I understand the work is straightforward, as I said my fear is that by breaking 
the connection we end up with syncing issues with the backend testing for IR 
patterns that the frontend no longer generates, which is what we hit in the 
first place. Please don’t revert this just yet - I’ll start getting this moved 
over in the next few days. Cheers, Simon.

> On 29 Nov 2015, at 22:20, Eric Christopher  wrote:
> 
> There's no reason a split set of tests would fail at doing this. You can test 
> that the IR is what you expect and then that the backend tests it as well. 
> It's very simple to do.
> 
> 
> On Sun, Nov 29, 2015, 2:08 PM Simon Pilgrim  > wrote:
> So the problem we’re trying to solve is it make sure that in debug builds, 
> clang compiles c/c++ intrinsics in the headers down to assembly that is very 
> close to the expected instruction.
> 
> What we had before (testing c/c++ to IR results in clang/test/CodeGen and 
> testing with llc on ‘similar' IR in llvm/test/CodeGen/X86) was very sensitive 
> to bitrot, especially as we’ve put so much effort into removing what target 
> specific intrinsics that we can.
> 
> I’m happy to split the tests but would prefer that they are both being tested 
> from c/c++ source (that at least is unlikely to ever change) so that we have 
> a better chance of keeping track of any big changes - so is there anywhere in 
> the clang project that they can be put?
> 
>> On 29 Nov 2015, at 21:47, Eric Christopher > > wrote:
>> 
>> In the backend. If at all possible IR tests only in the front end. Same with 
>> optimization etc.
>> 
>> 
>> On Sun, Nov 29, 2015, 1:46 PM Simon Pilgrim > > wrote:
>> I can try - if asm is not supposed to go in tests/CodeGen where is it 
>> supposed to go? 
>> 
>>> On 29 Nov 2015, at 20:38, Eric Christopher >> > wrote:
>>> 
>>> This is amazing... And entirely the wrong place for the asm tests. :)
>>> 
>>> Would you mind splitting this test case in two with an IR test for clang 
>>> and an asm test for llvm?
>>> 
>>> Thanks!
>>> 
>>> 
>>> On Sun, Nov 29, 2015, 12:25 PM Simon Pilgrim via cfe-commits 
>>> mailto:cfe-commits@lists.llvm.org>> wrote:
>>> Author: rksimon
>>> Date: Sun Nov 29 14:23:00 2015
>>> New Revision: 254262
>>> 
>>> URL: http://llvm.org/viewvc/llvm-project?rev=254262&view=rev 
>>> 
>>> Log:
>>> [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests
>>> 
>>> Improved tests as discussed in PR24580
>>> 
>>> Added:
>>> cfe/trunk/test/CodeGen/sse2-builtins.c
>>> 
>>> Added: cfe/trunk/test/CodeGen/sse2-builtins.c
>>> URL: 
>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-builtins.c?rev=254262&view=auto
>>>  
>>> 
>>> ==
>>> --- cfe/trunk/test/CodeGen/sse2-builtins.c (added)
>>> +++ cfe/trunk/test/CodeGen/sse2-builtins.c Sun Nov 29 14:23:00 2015
>>> @@ -0,0 +1,1656 @@
>>> +// REQUIRES: x86-registered-target
>>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
>>> -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
>>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
>>> -fno-signed-char -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
>>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 -S 
>>> -o - -Werror | FileCheck %s --check-prefix=ASM
>>> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 
>>> -fno-signed-char -S -o - -Werror | FileCheck %s --check-prefix=ASM
>>> +
>>> +// Don't include mm_malloc.h, it's system specific.
>>> +#define __MM_MALLOC_H
>>> +
>>> +#include 
>>> +
>>> +__m128i test_mm_add_epi8(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_add_epi8
>>> +  // DAG: add <16 x i8>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_epi8
>>> +  // ASM: paddb
>>> +  return _mm_add_epi8(A, B);
>>> +}
>>> +
>>> +__m128i test_mm_add_epi16(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_add_epi16
>>> +  // DAG: add <8 x i16>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_epi16
>>> +  // ASM: paddw
>>> +  return _mm_add_epi16(A, B);
>>> +}
>>> +
>>> +__m128i test_mm_add_epi32(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_add_epi32
>>> +  // DAG: add <4 x i32>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_epi32
>>> +  // ASM: paddd
>>> +  return _mm_add_epi32(A, B);
>>> +}
>>> +
>>> +__m128i test_mm_add_epi64(__m128i A, __m128i B) {
>>> +  // DAG-LABEL: test_mm_add_epi64
>>> +  // DAG: add <2 x i64>
>>> +  //
>>> +  // ASM-LABEL: test_mm_add_epi64
>>> +  // ASM: paddq
>>> +  return _mm_add_epi64(A, B);
>>> +}
>>> +
>>> +__m128d test_mm_add_pd(__m128d A, __m128d B) {
>>> +  // DAG

RE: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

2015-11-29 Thread Robinson, Paul via cfe-commits

Resending because I forgot to explicitly CC the list AGAIN. :-P

> -Original Message-
> From: cfe-commits [mailto:cfe-commits-boun...@lists.llvm.org] On Behalf Of
> Simon Pilgrim via cfe-commits
> Sent: Sunday, November 29, 2015 12:23 PM
> To: cfe-commits@lists.llvm.org
> Subject: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin
> tests
> 
> Author: rksimon
> Date: Sun Nov 29 14:23:00 2015
> New Revision: 254262
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=254262&view=rev
> Log:
> [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests
> 
> Improved tests as discussed in PR24580
> 
> Added:
> cfe/trunk/test/CodeGen/sse2-builtins.c
> 
> Added: cfe/trunk/test/CodeGen/sse2-builtins.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-
> builtins.c?rev=254262&view=auto
> ==
> 
> --- cfe/trunk/test/CodeGen/sse2-builtins.c (added)
> +++ cfe/trunk/test/CodeGen/sse2-builtins.c Sun Nov 29 14:23:00 2015
> @@ -0,0 +1,1656 @@
> +// REQUIRES: x86-registered-target
> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 -
> emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 -
> fno-signed-char -emit-llvm -o - -Werror | FileCheck %s --check-prefix=DAG
> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 -
> S -o - -Werror | FileCheck %s --check-prefix=ASM
> +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2 -
> fno-signed-char -S -o - -Werror | FileCheck %s --check-prefix=ASM
> +
> +// Don't include mm_malloc.h, it's system specific.
> +#define __MM_MALLOC_H
> +
> +#include 
> +
> +__m128i test_mm_add_epi8(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_add_epi8
> +  // DAG: add <16 x i8>

Because DAG is a special suffix for FileCheck, I'd prefer not to have
it as the prefix.  I mean, it should work; but in a FileCheck context, 
DAG actually means something and I'd like not to have any more excuses 
than usual to be confused about reading FileChecks.
Thanks,
--paulr

> +  //
> +  // ASM-LABEL: test_mm_add_epi8
> +  // ASM: paddb
> +  return _mm_add_epi8(A, B);
> +}
> +
> +__m128i test_mm_add_epi16(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_add_epi16
> +  // DAG: add <8 x i16>
> +  //
> +  // ASM-LABEL: test_mm_add_epi16
> +  // ASM: paddw
> +  return _mm_add_epi16(A, B);
> +}
> +
> +__m128i test_mm_add_epi32(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_add_epi32
> +  // DAG: add <4 x i32>
> +  //
> +  // ASM-LABEL: test_mm_add_epi32
> +  // ASM: paddd
> +  return _mm_add_epi32(A, B);
> +}
> +
> +__m128i test_mm_add_epi64(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_add_epi64
> +  // DAG: add <2 x i64>
> +  //
> +  // ASM-LABEL: test_mm_add_epi64
> +  // ASM: paddq
> +  return _mm_add_epi64(A, B);
> +}
> +
> +__m128d test_mm_add_pd(__m128d A, __m128d B) {
> +  // DAG-LABEL: test_mm_add_pd
> +  // DAG: fadd <2 x double>
> +  //
> +  // ASM-LABEL: test_mm_add_pd
> +  // ASM: addpd
> +  return _mm_add_pd(A, B);
> +}
> +
> +__m128d test_mm_add_sd(__m128d A, __m128d B) {
> +  // DAG-LABEL: test_mm_add_sd
> +  // DAG: fadd double
> +  //
> +  // ASM-LABEL: test_mm_add_sd
> +  // ASM: addsd
> +  return _mm_add_sd(A, B);
> +}
> +
> +__m128i test_mm_adds_epi8(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_adds_epi8
> +  // DAG: call <16 x i8> @llvm.x86.sse2.padds.b
> +  //
> +  // ASM-LABEL: test_mm_adds_epi8
> +  // ASM: paddsb
> +  return _mm_adds_epi8(A, B);
> +}
> +
> +__m128i test_mm_adds_epi16(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_adds_epi16
> +  // DAG: call <8 x i16> @llvm.x86.sse2.padds.w
> +  //
> +  // ASM-LABEL: test_mm_adds_epi16
> +  // ASM: paddsw
> +  return _mm_adds_epi16(A, B);
> +}
> +
> +__m128i test_mm_adds_epu8(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_adds_epu8
> +  // DAG: call <16 x i8> @llvm.x86.sse2.paddus.b
> +  //
> +  // ASM-LABEL: test_mm_adds_epu8
> +  // ASM: paddusb
> +  return _mm_adds_epu8(A, B);
> +}
> +
> +__m128i test_mm_adds_epu16(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_adds_epu16
> +  // DAG: call <8 x i16> @llvm.x86.sse2.paddus.w
> +  //
> +  // ASM-LABEL: test_mm_adds_epu16
> +  // ASM: paddusw
> +  return _mm_adds_epu16(A, B);
> +}
> +
> +__m128d test_mm_and_pd(__m128d A, __m128d B) {
> +  // DAG-LABEL: test_mm_and_pd
> +  // DAG: and <4 x i32>
> +  //
> +  // ASM-LABEL: test_mm_and_pd
> +  // ASM: pand
> +  return _mm_and_pd(A, B);
> +}
> +
> +__m128i test_mm_and_si128(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_and_si128
> +  // DAG: and <2 x i64>
> +  //
> +  // ASM-LABEL: test_mm_and_si128
> +  // ASM: andps
> +  return _mm_and_si128(A, B);
> +}
> +
> +__m128i test_mm_avg_epu8(__m128i A, __m128i B) {
> +  // DAG-LABEL: test_mm_avg_epu8
> +  // DAG: call <16 x i8> @llvm.x86.sse2.pavg.b
> +  //
> +  // ASM-LABEL: test_mm_avg_epu8
> +  // ASM: pavgb
>

r254270 - [X86] _mm256_permutevar8x32_ps should take an integer vector for its shuffle index input.

2015-11-29 Thread Craig Topper via cfe-commits

Author: ctopper
Date: Sun Nov 29 16:53:32 2015
New Revision: 254270

URL: http://llvm.org/viewvc/llvm-project?rev=254270&view=rev
Log:
[X86] _mm256_permutevar8x32_ps should take an integer vector for its shuffle 
index input.

Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx2intrin.h
cfe/trunk/test/CodeGen/avx2-builtins.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=254270&r1=254269&r2=254270&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Sun Nov 29 16:53:32 2015
@@ -597,7 +597,7 @@ TARGET_BUILTIN(__builtin_ia32_psrlqi256,
 TARGET_BUILTIN(__builtin_ia32_psrlq256, "V4LLiV4LLiV2LLi", "", "avx2")
 TARGET_BUILTIN(__builtin_ia32_movntdqa256, "V4LLiV4LLiC*", "", "avx2")
 TARGET_BUILTIN(__builtin_ia32_permvarsi256, "V8iV8iV8i", "", "avx2")
-TARGET_BUILTIN(__builtin_ia32_permvarsf256, "V8fV8fV8f", "", "avx2")
+TARGET_BUILTIN(__builtin_ia32_permvarsf256, "V8fV8fV8i", "", "avx2")
 TARGET_BUILTIN(__builtin_ia32_permti256, "V4LLiV4LLiV4LLiIc", "", "avx2")
 TARGET_BUILTIN(__builtin_ia32_maskloadd256, "V8iV8iC*V8i", "", "avx2")
 TARGET_BUILTIN(__builtin_ia32_maskloadq256, "V4LLiV4LLiC*V4LLi", "", "avx2")

Modified: cfe/trunk/lib/Headers/avx2intrin.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx2intrin.h?rev=254270&r1=254269&r2=254270&view=diff
==
--- cfe/trunk/lib/Headers/avx2intrin.h (original)
+++ cfe/trunk/lib/Headers/avx2intrin.h Sun Nov 29 16:53:32 2015
@@ -867,9 +867,9 @@ _mm256_permutevar8x32_epi32(__m256i __a,
((M) & 0x30) >> 4, ((M) & 0xc0) >> 6); })
 
 static __inline__ __m256 __DEFAULT_FN_ATTRS
-_mm256_permutevar8x32_ps(__m256 __a, __m256 __b)
+_mm256_permutevar8x32_ps(__m256 __a, __m256i __b)
 {
-  return (__m256)__builtin_ia32_permvarsf256((__v8sf)__a, (__v8sf)__b);
+  return (__m256)__builtin_ia32_permvarsf256((__v8sf)__a, (__v8si)__b);
 }
 
 #define _mm256_permute4x64_epi64(V, M) __extension__ ({ \

Modified: cfe/trunk/test/CodeGen/avx2-builtins.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx2-builtins.c?rev=254270&r1=254269&r2=254270&view=diff
==
--- cfe/trunk/test/CodeGen/avx2-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx2-builtins.c Sun Nov 29 16:53:32 2015
@@ -862,7 +862,7 @@ __m256d test_mm256_permute4x64_pd(__m256
   return _mm256_permute4x64_pd(a, 25);
 }
 
-__m256 test_mm256_permutevar8x32_ps(__m256 a, __m256 b) {
+__m256 test_mm256_permutevar8x32_ps(__m256 a, __m256i b) {
   // CHECK: @llvm.x86.avx2.permps
   // CHECK-ASM: vpermps %ymm{{.*}}, %ymm{{.*}}, %ymm{{.*}}
   return _mm256_permutevar8x32_ps(a, b);


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Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

2015-11-29 Thread Eric Christopher via cfe-commits

Yeah, I've been trying to fix them. I didn't see them go in. :(

And yes, that's a good way to tie them. It shouldn't be bad though.
Separation of concerns and all.

-eric

On Sun, Nov 29, 2015, 3:10 PM Robinson, Paul <
paul_robin...@playstation.sony.com> wrote:

It looks like there are a number of the *-builtins.c tests that have grown
this feature of testing both IR and asm.  Seems to have sprung from PR24580.






Simon, if you're concerned about bitrot, I'd think you could have comments
in the Clang test citing the LLVM test, and vice versa.  It's not a
guarantee but it certainly should help.

--paulr



*From:* cfe-commits [mailto:cfe-commits-boun...@lists.llvm.org] *On Behalf
Of *Eric Christopher via cfe-commits
*Sent:* Sunday, November 29, 2015 2:21 PM
*To:* Simon Pilgrim; cfe-commits@lists.llvm.org
*Subject:* Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen
builtin tests



There's no reason a split set of tests would fail at doing this. You can
test that the IR is what you expect and then that the backend tests it as
well. It's very simple to do.



On Sun, Nov 29, 2015, 2:08 PM Simon Pilgrim  wrote:

So the problem we’re trying to solve is it make sure that in debug builds,
clang compiles c/c++ intrinsics in the headers down to assembly that is
very close to the expected instruction.



What we had before (testing c/c++ to IR results in clang/test/CodeGen and
testing with llc on ‘similar' IR in llvm/test/CodeGen/X86) was very
sensitive to bitrot, especially as we’ve put so much effort into removing
what target specific intrinsics that we can.



I’m happy to split the tests but would prefer that they are both being
tested from c/c++ source (that at least is unlikely to ever change) so that
we have a better chance of keeping track of any big changes - so is there
anywhere in the clang project that they can be put?



On 29 Nov 2015, at 21:47, Eric Christopher  wrote:



In the backend. If at all possible IR tests only in the front end. Same
with optimization etc.



On Sun, Nov 29, 2015, 1:46 PM Simon Pilgrim  wrote:

I can try - if asm is not supposed to go in tests/CodeGen where is it
supposed to go?



On 29 Nov 2015, at 20:38, Eric Christopher 
gmail.com > wrote:



This is amazing... And entirely the wrong place for the asm tests. :)

Would you mind splitting this test case in two with an IR test for clang
and an asm test for llvm?

Thanks!



On Sun, Nov 29, 2015, 12:25 PM Simon Pilgrim via cfe-commits <
cfe-commits@lists.llvm.org> wrote:

Author: rksimon
Date: Sun Nov 29 14:23:00 2015
New Revision: 254262

URL: http:// 
llvm.org /
viewvc
/
llvm-project

?rev=254262&view=rev

Log:
[X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

Improved tests as discussed in PR24580

Added:
cfe/trunk/test/CodeGen/sse2-builtins.c

Added: cfe/trunk/test/CodeGen/sse2-builtins.c
URL: http://

llvm.org

/

viewvc

/

llvm-project

/

cfe

/trunk/test/

CodeGen

/

sse2-builtins.c

?rev=254262&view=auto

==
--- cfe/trunk/test/CodeGen/sse2-builtins.c (added)
+++ cfe/trunk/test/CodeGen/sse2-builtins.c Sun Nov 29 14:23:00 2015
@@ -0,0 +1,1656 @@
+// REQUIRES: x86-registered-target
+// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +sse2
-emit-llvm -o - -Werror | FileCheck

[PATCH] D15062: [clang-format] Add test for AlignAfterOpenBracket = AlwaysBreak in C++.

2015-11-29 Thread Jean-Philippe Dufraigne via cfe-commits

jeanphilippeD created this revision.
jeanphilippeD added a subscriber: cfe-commits.
Herald added a subscriber: klimek.

Revision 251405 added AlwaysBreak to support Google's JavaScript style.
This changeset complete existing AlignsAfterOpenBracket tests to exercise 
AlwaysBreak for C++.

I thought this would be worthwhile.
With this option we can support request from 
http://lists.llvm.org/pipermail/cfe-dev/2015-May/042942.html, that had been 
requested a few times.
This also partially solve related Bug 23422 and is probably sufficient for most 
people.

AlignAfterOpenBracket = FormatStyle::BAS_AlwaysBreak;
BinPackArguments = false;
BinPackParameters = false;

With these setting we obtain this formatting:

void fooWithAVeryLongParamList(
int firstParameter,
int secondParameter
int lastParameter)
{
object.alsoThisDoenstFitSoIBreakImmidiatly(
firstParameter,
secondParameter,
lastParameter);
}

http://reviews.llvm.org/D15062

Files:
  unittests/Format/FormatTest.cpp

Index: unittests/Format/FormatTest.cpp
===
--- unittests/Format/FormatTest.cpp
+++ unittests/Format/FormatTest.cpp
@@ -4344,6 +4344,26 @@
   "SomeLongVariableName->someFunction(f(aaa,\n"
   "a, a));",
   Style);
+
+  Style.AlignAfterOpenBracket = FormatStyle::BAS_AlwaysBreak;
+  Style.BinPackArguments = false;
+  Style.BinPackParameters = false;
+  verifyFormat("void aa(\n"
+   "aaa ,\n"
+   "a aaa,\n"
+   "a) {}",
+   Style);
+  verifyFormat("SomeLongVariableName->someVeryLongFunctionName(\n"
+   "aaa a,\n"
+   "aaa a,\n"
+   "a);",
+   Style);
+  verifyFormat("SomeLongVariableName->someFunction(\n"
+   "f(\n"
+   "aaa,\n"
+   "a,\n"
+   "a));",
+   Style);
 }
 
 TEST_F(FormatTest, ParenthesesAndOperandAlignment) {


Index: unittests/Format/FormatTest.cpp
===
--- unittests/Format/FormatTest.cpp
+++ unittests/Format/FormatTest.cpp
@@ -4344,6 +4344,26 @@
   "SomeLongVariableName->someFunction(f(aaa,\n"
   "a, a));",
   Style);
+
+  Style.AlignAfterOpenBracket = FormatStyle::BAS_AlwaysBreak;
+  Style.BinPackArguments = false;
+  Style.BinPackParameters = false;
+  verifyFormat("void aa(\n"
+   "aaa ,\n"
+   "a aaa,\n"
+   "a) {}",
+   Style);
+  verifyFormat("SomeLongVariableName->someVeryLongFunctionName(\n"
+   "aaa a,\n"
+   "aaa a,\n"
+   "a);",
+   Style);
+  verifyFormat("SomeLongVariableName->someFunction(\n"
+   "f(\n"
+   "aaa,\n"
+   "a,\n"
+   "a));",
+   Style);
 }
 
 TEST_F(FormatTest, ParenthesesAndOperandAlignment) {
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Re: [PATCH] D8940: Clang changes for indirect call target profiling

2015-11-29 Thread Betul Buyukkurt via cfe-commits

betulb added a comment.

No it's not. I need to replace the API's w/ the recent ones for retrieving the 
value profile data and add the flag definition for -fprofile-values.
This was off the radar due to other commitments. I'll get back to this 
beginning of this week.

-Betul


http://reviews.llvm.org/D8940



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r254282 - Use range-based for loop to avoid the need for calculating an array size. NFC

2015-11-29 Thread Craig Topper via cfe-commits

Author: ctopper
Date: Sun Nov 29 21:11:12 2015
New Revision: 254282

URL: http://llvm.org/viewvc/llvm-project?rev=254282&view=rev
Log:
Use range-based for loop to avoid the need for calculating an array size. NFC

Modified:
cfe/trunk/lib/Analysis/CFG.cpp

Modified: cfe/trunk/lib/Analysis/CFG.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Analysis/CFG.cpp?rev=254282&r1=254281&r2=254282&view=diff
==
--- cfe/trunk/lib/Analysis/CFG.cpp (original)
+++ cfe/trunk/lib/Analysis/CFG.cpp Sun Nov 29 21:11:12 2015
@@ -825,10 +825,7 @@ private:
 // * Variable x is equal to the largest literal.
 // * Variable x is greater than largest literal.
 bool AlwaysTrue = true, AlwaysFalse = true;
-for (unsigned int ValueIndex = 0;
- ValueIndex < sizeof(Values) / sizeof(Values[0]);
- ++ValueIndex) {
-  llvm::APSInt Value = Values[ValueIndex];
+for (llvm::APSInt Value : Values) {
   TryResult Res1, Res2;
   Res1 = analyzeLogicOperatorCondition(BO1, Value, L1);
   Res2 = analyzeLogicOperatorCondition(BO2, Value, L2);


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r254281 - Use std::begin() and std::end() instead of doing the same manually. NFC

2015-11-29 Thread Craig Topper via cfe-commits

Author: ctopper
Date: Sun Nov 29 21:11:10 2015
New Revision: 254281

URL: http://llvm.org/viewvc/llvm-project?rev=254281&view=rev
Log:
Use std::begin() and std::end() instead of doing the same manually. NFC

Modified:
cfe/trunk/lib/Basic/VirtualFileSystem.cpp

Modified: cfe/trunk/lib/Basic/VirtualFileSystem.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/VirtualFileSystem.cpp?rev=254281&r1=254280&r2=254281&view=diff
==
--- cfe/trunk/lib/Basic/VirtualFileSystem.cpp (original)
+++ cfe/trunk/lib/Basic/VirtualFileSystem.cpp Sun Nov 29 21:11:10 2015
@@ -962,8 +962,7 @@ class RedirectingFileSystemParser {
   KeyStatusPair("use-external-name", false),
 };
 
-DenseMap Keys(
-&Fields[0], Fields + sizeof(Fields)/sizeof(Fields[0]));
+DenseMap Keys(std::begin(Fields), std::end(Fields));
 
 bool HasContents = false; // external or otherwise
 std::vector> EntryArrayContents;
@@ -1121,8 +1120,7 @@ public:
   KeyStatusPair("roots", true),
 };
 
-DenseMap Keys(
-&Fields[0], Fields + sizeof(Fields)/sizeof(Fields[0]));
+DenseMap Keys(std::begin(Fields), std::end(Fields));
 
 // Parse configuration and 'roots'
 for (yaml::MappingNode::iterator I = Top->begin(), E = Top->end(); I != E;


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[libcxx] r254283 - Implement more of P0006; Type Traits Variable Templates.

2015-11-29 Thread Marshall Clow via cfe-commits

Author: marshall
Date: Sun Nov 29 22:30:02 2015
New Revision: 254283

URL: http://llvm.org/viewvc/llvm-project?rev=254283&view=rev
Log:
Implement more of P0006; Type Traits Variable Templates.

Modified:
libcxx/trunk/include/type_traits
libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.rel/is_same.pass.cpp

libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp

Modified: libcxx/trunk/include/type_traits
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/include/type_traits?rev=254283&r1=254282&r2=254283&view=diff
==
--- libcxx/trunk/include/type_traits (original)
+++ libcxx/trunk/include/type_traits Sun Nov 29 22:30:02 2015
@@ -1079,6 +1079,11 @@ template  struct _LIBCPP_TYPE
 template  struct _LIBCPP_TYPE_VIS_ONLY rank<_Tp[_Np]>
 : public integral_constant::value + 1> {};
 
+#if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
+template  _LIBCPP_CONSTEXPR bool rank_v
+= rank<_Tp>::value;
+#endif
+
 // extent
 
 template  struct _LIBCPP_TYPE_VIS_ONLY extent
@@ -1092,6 +1097,11 @@ template  struct
 template  struct _LIBCPP_TYPE_VIS_ONLY 
extent<_Tp[_Np], _Ip>
 : public integral_constant::value> {};
 
+#if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
+template  _LIBCPP_CONSTEXPR bool extent_v
+= extent<_Tp, _Ip>::value;
+#endif
+
 // remove_extent
 
 template  struct _LIBCPP_TYPE_VIS_ONLY remove_extent
@@ -1218,6 +1228,11 @@ struct _LIBCPP_TYPE_VIS_ONLY is_base_of
 
 #endif  // _LIBCPP_HAS_IS_BASE_OF
 
+#if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
+template  _LIBCPP_CONSTEXPR bool is_base_of_v
+= is_base_of<_Bp, _Dp>::value;
+#endif
+
 // is_convertible
 
 #if __has_feature(is_convertible_to) && 
!defined(_LIBCPP_USE_IS_CONVERTIBLE_FALLBACK)
@@ -1345,6 +1360,11 @@ template  struct _
 
 #endif  // __has_feature(is_convertible_to)
 
+#if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
+template  _LIBCPP_CONSTEXPR bool is_convertible_v
+= is_convertible<_From, _To>::value;
+#endif
+
 // is_empty
 
 #if __has_feature(is_empty) || (_GNUC_VER >= 407)
@@ -1430,6 +1450,11 @@ template  _LIBCPP_CONSTEXPR b
 template  struct _LIBCPP_TYPE_VIS_ONLY alignment_of
 : public integral_constant {};
 
+#if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
+template  _LIBCPP_CONSTEXPR bool alignment_of_v
+= alignment_of<_Tp>::value;
+#endif
+
 // aligned_storage
 
 template 

Modified: libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp?rev=254283&r1=254282&r2=254283&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp (original)
+++ libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp Sun Nov 
29 22:30:02 2015
@@ -13,6 +13,8 @@
 
 #include 
 
+#include "test_macros.h"
+
 template 
 void test_is_base_of()
 {
@@ -20,6 +22,12 @@ void test_is_base_of()
 static_assert((std::is_base_of::value), "");
 static_assert((std::is_base_of::value), "");
 static_assert((std::is_base_of::value), "");
+#if TEST_STD_VERS > 14
+static_assert((std::is_base_of_v), "");
+static_assert((std::is_base_of_v), "");
+static_assert((std::is_base_of_v), "");
+static_assert((std::is_base_of_v), "");
+#endif
 }
 
 template 

Modified: libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp?rev=254283&r1=254282&r2=254283&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp 
(original)
+++ libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp Sun 
Nov 29 22:30:02 2015
@@ -13,6 +13,8 @@
 
 #include 
 
+#include "test_macros.h"
+
 template 
 void test_is_convertible()
 {
@@ -20,6 +22,12 @@ void test_is_convertible()
 static_assert((std::is_convertible::value), "");
 static_assert((std::is_convertible::value), "");
 static_assert((std::is_convertible::value), "");
+#if TEST_STD_VERS > 14
+static_assert((std::is_convertible_v), "");
+static_assert((std::is_convertible_v), "");
+static_assert((std::is_convertible_v), "");
+static_assert((std::is_convertible_v), "");
+#endif
 }
 
 template 
@@ -29,6 +37,12 @@ void test_is_not_convertible()
 static_assert((!std::is_convertible::value), "

[libcxx] r254284 - Fix bad macros in tests

2015-11-29 Thread Marshall Clow via cfe-commits

Author: marshall
Date: Sun Nov 29 23:03:35 2015
New Revision: 254284

URL: http://llvm.org/viewvc/llvm-project?rev=254284&view=rev
Log:
Fix bad macros in tests

Modified:
libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.rel/is_same.pass.cpp

Modified: libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp?rev=254284&r1=254283&r2=254284&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp (original)
+++ libcxx/trunk/test/std/utilities/meta/meta.rel/is_base_of.pass.cpp Sun Nov 
29 23:03:35 2015
@@ -22,7 +22,7 @@ void test_is_base_of()
 static_assert((std::is_base_of::value), "");
 static_assert((std::is_base_of::value), "");
 static_assert((std::is_base_of::value), "");
-#if TEST_STD_VERS > 14
+#if TEST_STD_VER > 14
 static_assert((std::is_base_of_v), "");
 static_assert((std::is_base_of_v), "");
 static_assert((std::is_base_of_v), "");

Modified: libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp?rev=254284&r1=254283&r2=254284&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp 
(original)
+++ libcxx/trunk/test/std/utilities/meta/meta.rel/is_convertible.pass.cpp Sun 
Nov 29 23:03:35 2015
@@ -22,7 +22,7 @@ void test_is_convertible()
 static_assert((std::is_convertible::value), "");
 static_assert((std::is_convertible::value), "");
 static_assert((std::is_convertible::value), "");
-#if TEST_STD_VERS > 14
+#if TEST_STD_VER > 14
 static_assert((std::is_convertible_v), "");
 static_assert((std::is_convertible_v), "");
 static_assert((std::is_convertible_v), "");
@@ -37,7 +37,7 @@ void test_is_not_convertible()
 static_assert((!std::is_convertible::value), "");
 static_assert((!std::is_convertible::value), "");
 static_assert((!std::is_convertible::value), "");
-#if TEST_STD_VERS > 14
+#if TEST_STD_VER > 14
 static_assert((!std::is_convertible_v), "");
 static_assert((!std::is_convertible_v), "");
 static_assert((!std::is_convertible_v), "");

Modified: libcxx/trunk/test/std/utilities/meta/meta.rel/is_same.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.rel/is_same.pass.cpp?rev=254284&r1=254283&r2=254284&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.rel/is_same.pass.cpp (original)
+++ libcxx/trunk/test/std/utilities/meta/meta.rel/is_same.pass.cpp Sun Nov 29 
23:03:35 2015
@@ -22,7 +22,7 @@ void test_is_same()
 static_assert((!std::is_same::value), "");
 static_assert((!std::is_same::value), "");
 static_assert(( std::is_same::value), "");
-#if TEST_STD_VERS > 14
+#if TEST_STD_VER > 14
 static_assert(( std::is_same_v), "");
 static_assert((!std::is_same_v), "");
 static_assert((!std::is_same_v), "");
@@ -37,7 +37,7 @@ void test_is_same_ref()
 static_assert((std::is_same::value), "");
 static_assert((std::is_same::value), "");
 static_assert((std::is_same::value), "");
-#if TEST_STD_VERS > 14
+#if TEST_STD_VER > 14
 static_assert((std::is_same_v), "");
 static_assert((std::is_same_v), "");
 static_assert((std::is_same_v), "");


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[libcxx] r254285 - Implement more of P0006; Type Traits Variable Templates.

2015-11-29 Thread Marshall Clow via cfe-commits

Author: marshall
Date: Sun Nov 29 23:04:22 2015
New Revision: 254285

URL: http://llvm.org/viewvc/llvm-project?rev=254285&view=rev
Log:
Implement more of P0006; Type Traits Variable Templates. 

Modified:
libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_equal.pass.cpp

libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_greater.pass.cpp

libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_greater_equal.pass.cpp
libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_less.pass.cpp

libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_less_equal.pass.cpp

libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_not_equal.pass.cpp

Modified: 
libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_equal.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_equal.pass.cpp?rev=254285&r1=254284&r2=254285&view=diff
==
--- libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_equal.pass.cpp 
(original)
+++ libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_equal.pass.cpp 
Sun Nov 29 23:04:22 2015
@@ -11,46 +11,57 @@
 
 #include 
 
+#include "test_macros.h"
+
+template 
+void test()
+{
+static_assert((result == std::ratio_equal::value), "");
+#if TEST_STD_VER > 14
+static_assert((result == std::ratio_equal_v), "");
+#endif
+}
+
 int main()
 {
 {
 typedef std::ratio<1, 1> R1;
 typedef std::ratio<1, 1> R2;
-static_assert((std::ratio_equal::value), "");
+test();
 }
 {
 typedef std::ratio<0x7FFFLL, 1> R1;
 typedef std::ratio<0x7FFFLL, 1> R2;
-static_assert((std::ratio_equal::value), "");
+test();
 }
 {
 typedef std::ratio<-0x7FFFLL, 1> R1;
 typedef std::ratio<-0x7FFFLL, 1> R2;
-static_assert((std::ratio_equal::value), "");
+test();
 }
 {
 typedef std::ratio<1, 0x7FFFLL> R1;
 typedef std::ratio<1, 0x7FFFLL> R2;
-static_assert((std::ratio_equal::value), "");
+test();
 }
 {
 typedef std::ratio<1, 1> R1;
 typedef std::ratio<1, -1> R2;
-static_assert((!std::ratio_equal::value), "");
+test();
 }
 {
 typedef std::ratio<0x7FFFLL, 1> R1;
 typedef std::ratio<-0x7FFFLL, 1> R2;
-static_assert((!std::ratio_equal::value), "");
+test();
 }
 {
 typedef std::ratio<-0x7FFFLL, 1> R1;
 typedef std::ratio<0x7FFFLL, 1> R2;
-static_assert((!std::ratio_equal::value), "");
+test();
 }
 {
 typedef std::ratio<1, 0x7FFFLL> R1;
 typedef std::ratio<1, -0x7FFFLL> R2;
-static_assert((!std::ratio_equal::value), "");
+test();
 }
 }

Modified: 
libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_greater.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_greater.pass.cpp?rev=254285&r1=254284&r2=254285&view=diff
==
--- 
libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_greater.pass.cpp 
(original)
+++ 
libcxx/trunk/test/std/utilities/ratio/ratio.comparison/ratio_greater.pass.cpp 
Sun Nov 29 23:04:22 2015
@@ -11,46 +11,57 @@
 
 #include 
 
+#include "test_macros.h"
+
+template 
+void test()
+{
+static_assert((result == std::ratio_greater::value), "");
+#if TEST_STD_VER > 14
+static_assert((result == std::ratio_greater_v), "");
+#endif
+}
+
 int main()
 {
 {
 typedef std::ratio<1, 1> R1;
 typedef std::ratio<1, 1> R2;
-static_assert((!std::ratio_greater::value), "");
+test();
 }
 {
 typedef std::ratio<0x7FFFLL, 1> R1;
 typedef std::ratio<0x7FFFLL, 1> R2;
-static_assert((!std::ratio_greater::value), "");
+test();
 }
 {
 typedef std::ratio<-0x7FFFLL, 1> R1;
 typedef std::ratio<-0x7FFFLL, 1> R2;
-static_assert((!std::ratio_greater::value), "");
+test();
 }
 {
 typedef std::ratio<1, 0x7FFFLL> R1;
 typedef std::ratio<1, 0x7FFFLL> R2;
-static_assert((!std::ratio_greater::value), "");
+test();
 }
 {
 typedef std::ratio<1, 1> R1;
 typedef std::ratio<1, -1> R2;
-static_assert((std::ratio_greater::value), "");
+test();
 }
 {
 typedef std::ratio<0x7FFFLL, 1> R1;
 typedef std::ratio<-0x7FFFLL, 1> R2;
-static_assert((std::ratio_greater::value), "");
+test();
 }
 {
 typedef std::ratio<-0x7FFFLL, 1> R1;
 typedef std::ratio<0x7FFFLL, 1> R2;
-static_assert((!std::ratio_greater::value), "");
+test();
 }
 {
 typedef std::ratio<1, 0x7FFFLL> R1;
 type

[libcxx] r254286 - Missing file from last commit

2015-11-29 Thread Marshall Clow via cfe-commits

Author: marshall
Date: Sun Nov 29 23:04:48 2015
New Revision: 254286

URL: http://llvm.org/viewvc/llvm-project?rev=254286&view=rev
Log:
Missing file from last commit

Modified:
libcxx/trunk/include/ratio

Modified: libcxx/trunk/include/ratio
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/include/ratio?rev=254286&r1=254285&r2=254286&view=diff
==
--- libcxx/trunk/include/ratio (original)
+++ libcxx/trunk/include/ratio Sun Nov 29 23:04:48 2015
@@ -62,6 +62,19 @@ typedef ratio<  100,
 typedef ratio<   10, 1> zetta;  // not supported
 typedef ratio<1, 1> yotta;  // not supported
 
+  // 20.11.5, ratio comparison
+  template  constexpr bool ratio_equal_v
+= ratio_equal::value;   // 
C++17
+  template  constexpr bool ratio_not_equal_v
+= ratio_not_equal::value;   // 
C++17
+  template  constexpr bool ratio_less_v
+= ratio_less::value;// 
C++17
+  template  constexpr bool ratio_less_equal_v
+= ratio_less_equal::value;  // 
C++17
+  template  constexpr bool ratio_greater_v
+= ratio_greater::value; // 
C++17
+  template  constexpr bool ratio_greater_equal_v
+= ratio_greater_equal::value;   // 
C++17
 }
 */
 
@@ -485,6 +498,26 @@ struct __ratio_gcd
   __static_lcm<_R1::den, _R2::den>::value> type;
 };
 
+#if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
+template  _LIBCPP_CONSTEXPR bool ratio_equal_v
+= ratio_equal<_R1, _R2>::value;
+
+template  _LIBCPP_CONSTEXPR bool ratio_not_equal_v
+= ratio_not_equal<_R1, _R2>::value;
+
+template  _LIBCPP_CONSTEXPR bool ratio_less_v
+= ratio_less<_R1, _R2>::value;
+
+template  _LIBCPP_CONSTEXPR bool ratio_less_equal_v
+= ratio_less_equal<_R1, _R2>::value;
+
+template  _LIBCPP_CONSTEXPR bool ratio_greater_v
+= ratio_greater<_R1, _R2>::value;
+
+template  _LIBCPP_CONSTEXPR bool ratio_greater_equal_v
+= ratio_greater_equal<_R1, _R2>::value;
+#endif
+
 _LIBCPP_END_NAMESPACE_STD
 
 #endif  // _LIBCPP_RATIO


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[libcxx] r254287 - Fix bad macros

2015-11-29 Thread Marshall Clow via cfe-commits

Author: marshall
Date: Sun Nov 29 23:10:10 2015
New Revision: 254287

URL: http://llvm.org/viewvc/llvm-project?rev=254287&view=rev
Log:
Fix bad macros

Modified:

libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp

Modified: 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp?rev=254287&r1=254286&r2=254287&view=diff
==
--- 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
 (original)
+++ 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
 Sun Nov 29 23:10:10 2015
@@ -23,7 +23,7 @@ void test_alignment_of()
 static_assert( std::alignment_of::value == A, "");
 static_assert( std::alignment_of::value == A, "");
 static_assert( std::alignment_of::value == A, "");
-#if TEST_STD_VERS > 14
+#if TEST_STD_VER > 14
 static_assert( std::alignment_of_v == A, "");
 static_assert( std::alignment_of_v == A, "");
 static_assert( std::alignment_of_v == A, "");


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[libcxx] r254288 - Temporarily disable new tests while I figure out what's going on

2015-11-29 Thread Marshall Clow via cfe-commits

Author: marshall
Date: Sun Nov 29 23:15:10 2015
New Revision: 254288

URL: http://llvm.org/viewvc/llvm-project?rev=254288&view=rev
Log:
Temporarily disable new tests while I figure out what's going on

Modified:

libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp

Modified: 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp?rev=254288&r1=254287&r2=254288&view=diff
==
--- 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
 (original)
+++ 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
 Sun Nov 29 23:15:10 2015
@@ -24,10 +24,10 @@ void test_alignment_of()
 static_assert( std::alignment_of::value == A, "");
 static_assert( std::alignment_of::value == A, "");
 #if TEST_STD_VER > 14
-static_assert( std::alignment_of_v == A, "");
-static_assert( std::alignment_of_v == A, "");
-static_assert( std::alignment_of_v == A, "");
-static_assert( std::alignment_of_v == A, "");
+// static_assert( std::alignment_of_v == A, "");
+// static_assert( std::alignment_of_v == A, "");
+// static_assert( std::alignment_of_v == A, "");
+// static_assert( std::alignment_of_v == A, "");
 #endif
 }
 

Modified: 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp?rev=254288&r1=254287&r2=254288&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp 
(original)
+++ libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp 
Sun Nov 29 23:15:10 2015
@@ -22,11 +22,11 @@ void test_extent()
 static_assert((std::extent::value == A), "");
 static_assert((std::extent::value == A), "");
 static_assert((std::extent::value == A), "");
-#if TEST_STD_VERS > 14
-static_assert((std::extent_v == A), "");
-static_assert((std::extent_v == A), "");
-static_assert((std::extent_v == A), "");
-static_assert((std::extent_v == A), "");
+#if TEST_STD_VER > 14
+// static_assert((std::extent_v == A), "");
+// static_assert((std::extent_v == A), "");
+// static_assert((std::extent_v == A), "");
+// static_assert((std::extent_v == A), "");
 #endif
 }
 
@@ -37,11 +37,11 @@ void test_extent1()
 static_assert((std::extent::value == A), "");
 static_assert((std::extent::value == A), "");
 static_assert((std::extent::value == A), "");
-#if TEST_STD_VERS > 14
-static_assert((std::extent_v == A), "");
-static_assert((std::extent_v == A), "");
-static_assert((std::extent_v == A), "");
-static_assert((std::extent_v == A), "");
+#if TEST_STD_VER > 14
+// static_assert((std::extent_v == A), "");
+// static_assert((std::extent_v == A), "");
+// static_assert((std::extent_v == A), "");
+// static_assert((std::extent_v == A), "");
 #endif
 }
 

Modified: 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp?rev=254288&r1=254287&r2=254288&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp 
(original)
+++ libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp 
Sun Nov 29 23:15:10 2015
@@ -22,11 +22,11 @@ void test_rank()
 static_assert( std::rank::value == A, "");
 static_assert( std::rank::value == A, "");
 static_assert( std::rank::value == A, "");
-#if TEST_STD_VERS > 14
-static_assert( std::rank_v == A, "");
-static_assert( std::rank_v == A, "");
-static_assert( std::rank_v == A, "");
-static_assert( std::rank_v == A, "");
+#if TEST_STD_VER > 14
+// static_assert( std::rank_v == A, "");
+// static_assert( std::rank_v == A, "");
+// static_assert( std::rank_v == A, "");
+// static_assert( std::rank_v == A, "");
 #endif
 }
 


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[libcxx] r254289 - Fix bugs in alignment_of_v, etc. Re-enable the newly added tests

2015-11-29 Thread Marshall Clow via cfe-commits

Author: marshall
Date: Sun Nov 29 23:20:00 2015
New Revision: 254289

URL: http://llvm.org/viewvc/llvm-project?rev=254289&view=rev
Log:
Fix bugs in alignment_of_v, etc. Re-enable the newly added tests

Modified:
libcxx/trunk/include/type_traits

libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp

Modified: libcxx/trunk/include/type_traits
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/include/type_traits?rev=254289&r1=254288&r2=254289&view=diff
==
--- libcxx/trunk/include/type_traits (original)
+++ libcxx/trunk/include/type_traits Sun Nov 29 23:20:00 2015
@@ -1080,7 +1080,7 @@ template  struct
 : public integral_constant::value + 1> {};
 
 #if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
-template  _LIBCPP_CONSTEXPR bool rank_v
+template  _LIBCPP_CONSTEXPR size_t rank_v
 = rank<_Tp>::value;
 #endif
 
@@ -1098,7 +1098,7 @@ template ::value> {};
 
 #if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
-template  _LIBCPP_CONSTEXPR bool extent_v
+template  _LIBCPP_CONSTEXPR size_t extent_v
 = extent<_Tp, _Ip>::value;
 #endif
 
@@ -1451,7 +1451,7 @@ template  struct _LIBCPP_TYPE
 : public integral_constant {};
 
 #if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
-template  _LIBCPP_CONSTEXPR bool alignment_of_v
+template  _LIBCPP_CONSTEXPR size_t alignment_of_v
 = alignment_of<_Tp>::value;
 #endif
 

Modified: 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp?rev=254289&r1=254288&r2=254289&view=diff
==
--- 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
 (original)
+++ 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/alignment_of.pass.cpp
 Sun Nov 29 23:20:00 2015
@@ -24,10 +24,10 @@ void test_alignment_of()
 static_assert( std::alignment_of::value == A, "");
 static_assert( std::alignment_of::value == A, "");
 #if TEST_STD_VER > 14
-// static_assert( std::alignment_of_v == A, "");
-// static_assert( std::alignment_of_v == A, "");
-// static_assert( std::alignment_of_v == A, "");
-// static_assert( std::alignment_of_v == A, "");
+static_assert( std::alignment_of_v == A, "");
+static_assert( std::alignment_of_v == A, "");
+static_assert( std::alignment_of_v == A, "");
+static_assert( std::alignment_of_v == A, "");
 #endif
 }
 

Modified: 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp?rev=254289&r1=254288&r2=254289&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp 
(original)
+++ libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/extent.pass.cpp 
Sun Nov 29 23:20:00 2015
@@ -23,10 +23,10 @@ void test_extent()
 static_assert((std::extent::value == A), "");
 static_assert((std::extent::value == A), "");
 #if TEST_STD_VER > 14
-// static_assert((std::extent_v == A), "");
-// static_assert((std::extent_v == A), "");
-// static_assert((std::extent_v == A), "");
-// static_assert((std::extent_v == A), "");
+static_assert((std::extent_v == A), "");
+static_assert((std::extent_v == A), "");
+static_assert((std::extent_v == A), "");
+static_assert((std::extent_v == A), "");
 #endif
 }
 
@@ -38,10 +38,10 @@ void test_extent1()
 static_assert((std::extent::value == A), "");
 static_assert((std::extent::value == A), "");
 #if TEST_STD_VER > 14
-// static_assert((std::extent_v == A), "");
-// static_assert((std::extent_v == A), "");
-// static_assert((std::extent_v == A), "");
-// static_assert((std::extent_v == A), "");
+static_assert((std::extent_v == A), "");
+static_assert((std::extent_v == A), "");
+static_assert((std::extent_v == A), "");
+static_assert((std::extent_v == A), "");
 #endif
 }
 

Modified: 
libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp?rev=254289&r1=254288&r2=254289&view=diff
==
--- libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp 
(original)
+++ libcxx/trunk/test/std/utilities/meta/meta.unary.prop.query/rank.pass.cpp 
Sun Nov 29 23:20:00 2015
@@ -23,10 +23,10

[libcxx] r254290 - Last bit of P0006; mark it as complete

2015-11-29 Thread Marshall Clow via cfe-commits

Author: marshall
Date: Sun Nov 29 23:39:30 2015
New Revision: 254290

URL: http://llvm.org/viewvc/llvm-project?rev=254290&view=rev
Log:
Last bit of P0006; mark it as complete

Modified:
libcxx/trunk/include/chrono

libcxx/trunk/test/std/utilities/time/time.traits/time.traits.is_fp/treat_as_floating_point.pass.cpp
libcxx/trunk/www/cxx1z_status.html

Modified: libcxx/trunk/include/chrono
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/include/chrono?rev=254290&r1=254289&r2=254290&view=diff
==
--- libcxx/trunk/include/chrono (original)
+++ libcxx/trunk/include/chrono Sun Nov 29 23:39:30 2015
@@ -26,6 +26,9 @@ duration_cast(const duration struct treat_as_floating_point : is_floating_point 
{};
 
+template  constexpr bool treat_as_floating_point_v
+= treat_as_floating_point::value;   // C++17
+
 template 
 struct duration_values
 {
@@ -413,6 +416,11 @@ duration_cast(const duration<_Rep, _Peri
 template 
 struct _LIBCPP_TYPE_VIS_ONLY treat_as_floating_point : is_floating_point<_Rep> 
{};
 
+#if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES)
+template  _LIBCPP_CONSTEXPR bool treat_as_floating_point_v
+= treat_as_floating_point<_Rep>::value;
+#endif
+
 template 
 struct _LIBCPP_TYPE_VIS_ONLY duration_values
 {

Modified: 
libcxx/trunk/test/std/utilities/time/time.traits/time.traits.is_fp/treat_as_floating_point.pass.cpp
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/std/utilities/time/time.traits/time.traits.is_fp/treat_as_floating_point.pass.cpp?rev=254290&r1=254289&r2=254290&view=diff
==
--- 
libcxx/trunk/test/std/utilities/time/time.traits/time.traits.is_fp/treat_as_floating_point.pass.cpp
 (original)
+++ 
libcxx/trunk/test/std/utilities/time/time.traits/time.traits.is_fp/treat_as_floating_point.pass.cpp
 Sun Nov 29 23:39:30 2015
@@ -20,6 +20,10 @@ test()
 {
 static_assert((std::is_base_of,
std::chrono::treat_as_floating_point 
>::value), "");
+#if TEST_STD_VER > 14
+static_assert((std::is_base_of,
+   std::chrono::treat_as_floating_point_v 
>), "");
+#endif
 }
 
 struct A {};

Modified: libcxx/trunk/www/cxx1z_status.html
URL: 
http://llvm.org/viewvc/llvm-project/libcxx/trunk/www/cxx1z_status.html?rev=254290&r1=254289&r2=254290&view=diff
==
--- libcxx/trunk/www/cxx1z_status.html (original)
+++ libcxx/trunk/www/cxx1z_status.html Sun Nov 29 23:39:30 2015
@@ -71,7 +71,7 @@
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2015/n4510";>N4510LWGMinimal
 incomplete type support for standard containers, revision 
4LenexaComplete3.6

http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2015/P0004R1.html";>P0004R1LWGRemove
 Deprecated iostreams 
aliases.KonaComplete3.8
-   http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2015/P0006R0.html";>P0006R0LWGAdopt
 Type Traits Variable Templates for C++17.KonaIn 
progress
+   http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2015/P0006R0.html";>P0006R0LWGAdopt
 Type Traits Variable Templates for 
C++17.KonaComplete3.8
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2015/P0092R1.html";>P0092R1LWGPolishing
 KonaComplete3.8
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2015/P0007R1.html";>P0007R1LWGConstant
 View: A proposal for a std::as_const helper function 
template.KonaComplete3.8
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2015/P0156R0.htm"; 
>P0156R0LWGVariadic lock_guard(rev 
3).Kona


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Re: [PATCH] D10833: Retrieve BinaryOperator::getOpcode and BinaryOperator::getOpcodeStr via libclang and its python interface

2015-11-29 Thread guibufolo+l...@gmail.com via cfe-commits

RedX2501 added a comment.

Ping


http://reviews.llvm.org/D10833



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r254250 - ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply

Re: [PATCH] D14982: ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply Add/Subtract.

r254251 - ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply

[PATCH] D15055: [X86] Better support for the MCU psABI

Re: [Static Analyzer] New checker hook: checkInitialState

r254252 - clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c REQUIRES both arm and aarch64.

Re: [PATCH] D8940: Clang changes for indirect call target profiling

r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

Re: r254251 - ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

RE: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

r254270 - [X86] _mm256_permutevar8x32_ps should take an integer vector for its shuffle index input.

Re: r254262 - [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests

[PATCH] D15062: [clang-format] Add test for AlignAfterOpenBracket = AlwaysBreak in C++.

Re: [PATCH] D8940: Clang changes for indirect call target profiling

r254282 - Use range-based for loop to avoid the need for calculating an array size. NFC

r254281 - Use std::begin() and std::end() instead of doing the same manually. NFC

[libcxx] r254283 - Implement more of P0006; Type Traits Variable Templates.

[libcxx] r254284 - Fix bad macros in tests

[libcxx] r254285 - Implement more of P0006; Type Traits Variable Templates.

[libcxx] r254286 - Missing file from last commit

[libcxx] r254287 - Fix bad macros

[libcxx] r254288 - Temporarily disable new tests while I figure out what's going on

[libcxx] r254289 - Fix bugs in alignment_of_v, etc. Re-enable the newly added tests

[libcxx] r254290 - Last bit of P0006; mark it as complete

Re: [PATCH] D10833: Retrieve BinaryOperator::getOpcode and BinaryOperator::getOpcodeStr via libclang and its python interface

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