[Bug binutils/14875] New: Disassembling m68k shows scales which the m68000 does not support
http://sourceware.org/bugzilla/show_bug.cgi?id=14875 Bug #: 14875 Summary: Disassembling m68k shows scales which the m68000 does not support Product: binutils Version: 2.23 Status: NEW Severity: minor Priority: P2 Component: binutils AssignedTo: unassig...@sourceware.org ReportedBy: i-bugzilla-sourceware-org-kasuj...@rf.risimo.net Classification: Unclassified The M68000 chip does not support scales in the "Memory Indirect Preindexed" mode. objdump should not display the scale if disassembling of the M68000 is requested via -mm68k:68000 Also a minor thing is that the offsets are printed with too many leading zeros. /tmp/binutils-2.23.1> cat bug.s orib #64,%a0@(56,%d3:w) orib #64,%a0@(56,%d3:w:1) orib #64,%a0@(56,%d3:w:2) orib #64,%a0@(56,%d3:w:4) orib #64,%a0@(56,%d3:w:8) /tmp/binutils-2.23.1> ./gas/as-new bug.s -o bug.o /tmp/binutils-2.23.1> ./binutils/objdump -mm68k:68000 -D bug.o bug.o: file format elf32-m68k Disassembly of section .text: <.text>: 0: 0030 0040 3038 orib #64,%a0@(0038,%d3:w) 6: 0030 0040 3038 orib #64,%a0@(0038,%d3:w) c: 0030 0040 3238 orib #64,%a0@(0038,%d3:w:2) 12: 0030 0040 3438 orib #64,%a0@(0038,%d3:w:4) 18: 0030 0040 3638 orib #64,%a0@(0038,%d3:w:8) /tmp/binutils-2.23.1> /tmp/binutils-2.23.1> uname -m -p -i -o -r 2.6.34.9-69.fc13.x86_64 x86_64 x86_64 x86_64 GNU/Linux -- Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/23192] New: aarch64: indexed fcmla doesn't support all registers
https://sourceware.org/bugzilla/show_bug.cgi?id=23192 Bug ID: 23192 Summary: aarch64: indexed fcmla doesn't support all registers Product: binutils Version: 2.30 Status: UNCONFIRMED Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: i-bugzilla-sourceware-org-kasujfzh at rf dot risimo.net Target Milestone: --- $ cat fcmla.asm .global main .section .text .balign 4 main: fcmla v0.8h,v1.8h,v2.h[0],#270 fcmla v0.8h,v0.8h,v27.h[0],#270 ret $ as -mcpu=saphira -o fcmla.o fcmla.asm fcmla.asm: Assembler messages: fcmla.asm:7: Error: register number out of range 0 to 15 at operand 3 -- `fcmla v0.8h,v0.8h,v27.h[0],#270' $ According to the docs I have there no restriction to the range of the third register since the full 5 bits are encoded in M:Rm and M can be 1. There is a related bug in objdump which says that such opcodes with M=1 (like for example 0x6f5b7000) are invalid. If required I will file another issue for this. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23193] New: aarch64: orr should not be converted to alias mov when non-zero shift
https://sourceware.org/bugzilla/show_bug.cgi?id=23193 Bug ID: 23193 Summary: aarch64: orr should not be converted to alias mov when non-zero shift Product: binutils Version: 2.30 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: i-bugzilla-sourceware-org-kasujfzh at rf dot risimo.net Target Milestone: --- $ hexdump bin2 000 ee f3 9e aa 004 $ objdump -D -b binary -maarch64 -Mno-aliases bin2 bin2: file format binary Disassembly of section .data: <.data>: 0: aa9ef3eeorr x14, xzr, x30, asr #60 $ objdump -D -b binary -maarch64 bin2 bin2: file format binary Disassembly of section .data: <.data>: 0: aa9ef3eemov x14, x30, asr #60 $ The condition for the alias is shift == '00' && imm6 == '00' && Rn == '1' here imm6 (the shift amount) is clearly not all zeros and therefore the output of no-aliases and aliases should be the same (the orr variant). -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23204] New: objdump doesn't disassemble 'sqrdmlah v9.4s,v22.4s,v18.4s'
https://sourceware.org/bugzilla/show_bug.cgi?id=23204
Bug ID: 23204
Summary: objdump doesn't disassemble 'sqrdmlah
v9.4s,v22.4s,v18.4s'
Product: binutils
Version: 2.30
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: binutils
Assignee: unassigned at sourceware dot org
Reporter: i-bugzilla-sourceware-org-kasujfzh at rf dot risimo.net
Target Milestone: ---
$ cat sqrdmlah.asm
.global main
.section .text
.balign 4
main:
sqrdmlah v9.4h,v22.4h,v18.4h
sqrdmlah v1.4s,v2.4s,v3.4s
sqrdmlah v9.4s,v22.4s,v18.4s
ret
$ as -mcpu=saphira -o sqrdmlah.o sqrdmlah.asm
$ objdump -d sqrdmlah.o
sqrdmlah.o: file format elf64-littleaarch64
Disassembly of section .text:
:
0: 2e5286c9.inst 0x2e5286c9 ; undefined
4: 6e838441sqrdmlahv1.4s, v2.4s, v3.4s
8: 6e9286c9.inst 0x6e9286c9 ; undefined
c: d65f03c0ret
$
As you can see the assembler has no problem but objdump has one.
Looks like the register number and not the type is causing the problem.
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[Bug binutils/23212] New: aarch64: objdump disassembles invalid fmla
https://sourceware.org/bugzilla/show_bug.cgi?id=23212 Bug ID: 23212 Summary: aarch64: objdump disassembles invalid fmla Product: binutils Version: 2.30 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: i-bugzilla-sourceware-org-kasujfzh at rf dot risimo.net Target Milestone: --- $ cat fmla.asm .global main .section .text .balign 4 main: fmla d10,d17,v30.d[1] .inst 0x5ffe1a2a ret $ as -mcpu=saphira -o fmla.o fmla.asm objdump -d fmla.o fmla.o: file format elf64-littleaarch64 Disassembly of section .text: : 0: 5fde1a2afmlad10, d17, v30.d[1] 4: 5ffe1a2afmlad10, d17, v30.d[1] 8: d65f03c0ret $ The second variant (0x5ffe1a2a) has the L bit set. But the sz=1 and L=1 is invalid according to the docs I have. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23204] aarch64: objdump doesn't disassemble 'sqrdmlah v9.4s,v22.4s,v18.4s'
https://sourceware.org/bugzilla/show_bug.cgi?id=23204 Raimar Falke changed: What|Removed |Added Summary|objdump doesn't disassemble |aarch64: objdump doesn't |'sqrdmlah |disassemble 'sqrdmlah |v9.4s,v22.4s,v18.4s'|v9.4s,v22.4s,v18.4s' -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23212] aarch64: objdump disassembles invalid fmla
https://sourceware.org/bugzilla/show_bug.cgi?id=23212 --- Comment #1 from Raimar Falke --- Looks like fmls has the same problem. Take 0x5fe158bb for example which is (IMHO wrongly) disassembled as fmls d27,d5,v1.d[1] -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23230] New: aarch64: objdump disassembles invalid mrs
https://sourceware.org/bugzilla/show_bug.cgi?id=23230 Bug ID: 23230 Summary: aarch64: objdump disassembles invalid mrs Product: binutils Version: 2.30 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: i-bugzilla-sourceware-org-kasujfzh at rf dot risimo.net Target Milestone: --- $ cat mrs.asm .global main .section .text .balign 4 main: mrs x0,s0_0_c0_c4_3 .inst 0xd5200460 .inst 0xd5300460 ret $ as -mcpu=saphira -o mrs.o mrs.asm $ objdump -d mrs.o mrs.o: file format elf64-littleaarch64 Disassembly of section .text: : 0: d5200460mrs x0, s0_0_c0_c4_3 4: d5200460mrs x0, s0_0_c0_c4_3 8: d5300460mrs x0, s2_0_c0_c4_3 c: d65f03c0ret $ The MRS requires that bit 20 is set. However in 0xd5200460 the bit is not set and objdump should return ".inst 0xd5200460". Related problem is that the S value should be either 2 or 3 (depending on bit o0) but not like in the above case. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23230] aarch64: objdump disassembles invalid mrs
https://sourceware.org/bugzilla/show_bug.cgi?id=23230 --- Comment #1 from Raimar Falke --- MSR has the same problem: 0xd506178e is disassembled as "msr s0_6_c1_c7_4, x14" but is invalid. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23242] New: aarch64: objdump requires ignores bits to be set in ldar
https://sourceware.org/bugzilla/show_bug.cgi?id=23242 Bug ID: 23242 Summary: aarch64: objdump requires ignores bits to be set in ldar Product: binutils Version: 2.30 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: i-bugzilla-sourceware-org-kasujfzh at rf dot risimo.net Target Milestone: --- $ cat ldarb.asm .global main .section .text .balign 4 main: ldarb w11,[x5] .inst 0x08c0b8ab ret $ as -mcpu=saphira -o ldarb.o ldarb.asm $ objdump -d ldarb.o ldarb.o: file format elf64-littleaarch64 Disassembly of section .text: : 0: 08dffcabldarb w11, [x5] 4: 08c0b8ab.inst 0x08c0b8ab ; undefined 8: d65f03c0ret $ The bits which differ between 0x08dffcab and 0x08c0b8ab all belong to Rs and Rt2. The doc says that these are ignored. From my interpretation this means that the bits should be set to 1 by the assembler but the disassembler should ignore these bits. So 0x08c0b8ab should also be disassembled as 'ldarb w11, [x5]'. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23242] aarch64: objdump requires ignores bits to be set in ldar
https://sourceware.org/bugzilla/show_bug.cgi?id=23242 Raimar Falke changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |INVALID --- Comment #2 from Raimar Falke --- Usually these constrains are expressed in the decoding or operation section of an instruction. For example look at LDAXP for t==t2. So I'm a bit confused when it states for LDARB: integer n = UInt(Rn); integer t = UInt(Rt); integer t2 = UInt(Rt2); // ignored by load/store single register integer s = UInt(Rs); // ignored by all loads and store-release So two contradicting statements from the ARM doc. Looks like I should complain to ARM here. But I understand now why objdump behaves like it does. I will resolve the issue then. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23242] aarch64: objdump requires ignores bits to be set in ldar
https://sourceware.org/bugzilla/show_bug.cgi?id=23242 --- Comment #4 from Raimar Falke --- I'm sorry to bother you again but if objdump requires that the SBO bits are set than how is the following explained? $ cat ldarh.asm .global main .section .text .balign 4 main: ldarh w12,[x12] .inst 0x48cffd8c ret $ objdump -d ldarh.o ldarh.o: file format elf64-littleaarch64 Disassembly of section .text: : 0: 48dffd8cldarh w12, [x12] 4: 48cffd8cldarh w12, [x12] 8: d65f03c0ret Shouldn't objdump output the 0x48cffd8c (not all bits of Rs set) as invalid? -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23242] aarch64: objdump should treat SBO bits consistent
https://sourceware.org/bugzilla/show_bug.cgi?id=23242 Raimar Falke changed: What|Removed |Added Summary|aarch64: objdump requires |aarch64: objdump should |ignores bits to be set in |treat SBO bits consistent |ldar| -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/23242] aarch64: objdump should treat SBO bits consistent
https://sourceware.org/bugzilla/show_bug.cgi?id=23242 Raimar Falke changed: What|Removed |Added Status|RESOLVED|UNCONFIRMED Resolution|INVALID |--- --- Comment #5 from Raimar Falke --- Changing the summary and set the issue to unconfirmed. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/20319] as and objdump allow "fmov sn, xm"
https://sourceware.org/bugzilla/show_bug.cgi?id=20319 Raimar Falke changed: What|Removed |Added CC||i-bugzilla-sourceware-org-k ||asujfzh at rf dot risimo.net --- Comment #3 from Raimar Falke --- The issue is still present in 2.30. Sample input: $ cat fmov.asm .global main .section .text .balign 4 main: fmov d4, w2 fmov s4, x2 fmov w4, d2 fmov x4, s2 ret $ The assembler should mark these instructions as invalid. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
