[Bug binutils/27214] Outputting hex file with --verilog-data-width 4 uses incorrect offsets

2022-12-14 Thread hepoh3 at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=27214

--- Comment #3 from Андрей Солодовников  ---
Thank you for your advise!
Yeah we can work around this issue — it's really not a big deal. I just thought
maybe new activity will revive this ticket, the problem get an appropriate fix
and things will set in right order.

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[Bug binutils/27214] Outputting hex file with --verilog-data-width 4 uses incorrect offsets

2022-12-14 Thread hepoh3 at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=27214

Андрей Солодовников  changed:

   What|Removed |Added

 CC||hepoh3 at gmail dot com

--- Comment #1 from Андрей Солодовников  ---
Came here with the same problem.

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[Bug binutils/27214] Outputting hex file with --verilog-data-width 4 uses incorrect offsets

2022-12-15 Thread hepoh3 at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=27214

--- Comment #4 from Andrei Solodovnikov  ---
I searched into unofficial mirror of sourceware binutils-gdb repository. The
bug persist till tag binutils-2-39, but in the master branch bug has been
fixed.

See:

bfd/verilog.c:309 (master branch):
verilog_write_address (abfd, list->where / VerilogDataWidth);

bfd/verilog.c:294 (binutils-2-39 branch):
verilog_write_address (abfd, list->where);

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