[Bug gas/12793] arm: push/pop equivalents using stm/ldm mnemonics assembled inconsistently
https://sourceware.org/bugzilla/show_bug.cgi?id=12793 DeepaB changed: What|Removed |Added CC||deepa.ballari at gmail dot com --- Comment #1 from DeepaB --- I checked this with GNU assembler version 2.24.0 (arm-none-eabi).Error "Error: cannot honor width suffix" looks correct.".n" suffix for an instruction says that the instruction will be of 2 byte length.stmfd/ldmfd instructions are of 4 byte length and can be reduced to equivalent 2 bytes if register R0-R7 ( Rn!, ) is used. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/14911] On ARM FIQ banked registers are case sensitive.
https://sourceware.org/bugzilla/show_bug.cgi?id=14911 DeepaB changed: What|Removed |Added CC||deepa.ballari at gmail dot com --- Comment #1 from DeepaB --- I'm not able to reproduce the issue. Can you please send the commandline used and assembler version info? -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/15348] GCC inline assembler for ARM thumb16 mnemonic lsls not recognized for CPU cortex-m0
https://sourceware.org/bugzilla/show_bug.cgi?id=15348 DeepaB changed: What|Removed |Added CC||deepa.ballari at gmail dot com --- Comment #1 from DeepaB --- "lsls" is equivalent UAL syntax for "lsl" thumb instruction."lsls" instruction works if directive ".syntax unified" is specified. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
