[Bug binutils/20754] New: 82 opcode (add Eb, Ib) wrong disassembling
https://sourceware.org/bugzilla/show_bug.cgi?id=20754 Bug ID: 20754 Summary: 82 opcode (add Eb, Ib) wrong disassembling Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- 82 opcode (add Eb, Ib) wrong disassembling for 16 and 32 bit modes -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20763] New: 8e opcode wrong disassembling
https://sourceware.org/bugzilla/show_bug.cgi?id=20763 Bug ID: 20763 Summary: 8e opcode wrong disassembling Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: minor Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- 8e opcode(mov Sw, Ew) is disassembled wrong for source register operand. There is example for 16-bit mode here: 66 8e c0:mov es, eax but must be: 66 8e c0:mov es, ax Most significant bits of source register is ignored unlike 8c opcode(mov Ev, Sw). For 8c opcode most significant bits are zeroed if operand size is larger than 16 bit. Source register is 16-bit for all processor modes. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20771] New: DC E0 wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20771 Bug ID: 20771 Summary: DC E0 wrong opcode name Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- from Intel specification DC E0 is fsubr but not fsub -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20771] DC E0-E7 wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20771 anatoly changed: What|Removed |Added Summary|DC E0 wrong opcode name |DC E0-E7 wrong opcode name -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20772] New: DC E8-EF wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20772 Bug ID: 20772 Summary: DC E8-EF wrong opcode name Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- from Intel documentation DC E8-EF is fsub but not fsubr -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20773] New: DC F0-F7 wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20773 Bug ID: 20773 Summary: DC F0-F7 wrong opcode name Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- from Intel specification DC F0-F7 is fdivr but not fdiv -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20774] New: DC F8-FF wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20774 Bug ID: 20774 Summary: DC F8-FF wrong opcode name Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- from Intel specification DC F8-FF is fdiv but not fdivr -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20775] New: dd f0 is disassebled as fnop
https://sourceware.org/bugzilla/show_bug.cgi?id=20775 Bug ID: 20775 Summary: dd f0 is disassebled as fnop Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- dd f0 is disassebled as fnop, but this is invalid opcode -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20776] New: de e0-e7 wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20776 Bug ID: 20776 Summary: de e0-e7 wrong opcode name Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- from Intel specification de e0-e7 is fsubrp but no fsubp -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20777] New: de e8-ef wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20777 Bug ID: 20777 Summary: de e8-ef wrong opcode name Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- from Intel specification de e8-ef is fsubp but not fsubrp -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20778] New: de f0-f7 wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20778 Bug ID: 20778 Summary: de f0-f7 wrong opcode name Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- from Intel specification de f0-f7 is fdivrp but not fdivp -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20779] New: de f8-ff wrong opcode name
https://sourceware.org/bugzilla/show_bug.cgi?id=20779 Bug ID: 20779 Summary: de f8-ff wrong opcode name Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- from Intel specification de f8-ff is fdivp but not fdivrp -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20780] New: e8 opcode wrong disassembling
https://sourceware.org/bugzilla/show_bug.cgi?id=20780 Bug ID: 20780 Summary: e8 opcode wrong disassembling Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- e8 opcode is disassembled wrong for 64-bit mode. 66 prefix affects on instruction, but for this opcode all operand prefixes are ignored and operand size is forced to 64-bit -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20781] New: e9 opcode wrong disassembling
https://sourceware.org/bugzilla/show_bug.cgi?id=20781 Bug ID: 20781 Summary: e9 opcode wrong disassembling Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- e9 opcode is disassembled wrong for 64-bit mode. 66 prefix affects on instruction, but for this opcode all operand prefixes are ignored and operand size is forced to 64-bit -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20782] New: FF /2 (CALL Ev) wrong disassembling
https://sourceware.org/bugzilla/show_bug.cgi?id=20782 Bug ID: 20782 Summary: FF /2 (CALL Ev) wrong disassembling Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- FF /2 (CALL Ev) is affected by operand size prefix in 64 bit mode. It's wrong. In 64-bit mode operand size prefix is ignored for this opcode. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/20783] New: FF /4 (JMP Ev) wrong disassembling
https://sourceware.org/bugzilla/show_bug.cgi?id=20783 Bug ID: 20783 Summary: FF /4 (JMP Ev) wrong disassembling Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: anatolymik at gmail dot com Target Milestone: --- FF /4 (JMP Ev) is affected by operand size prefix in 64 bit mode. It's wrong. In 64-bit mode operand size prefix is ignored for this opcode and forced to 64-bit. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
