[Bug binutils/30577] No way to prevent BFD plugin auto-loading
https://sourceware.org/bugzilla/show_bug.cgi?id=30577 Sam James changed: What|Removed |Added CC||sam at gentoo dot org -- You are receiving this mail because: You are on the CC list for the bug.
[Bug ld/12365] undefined references produced by linker plugin are silently ignored
https://sourceware.org/bugzilla/show_bug.cgi?id=12365 --- Comment #22 from cvs-commit at gcc dot gnu.org --- The master branch has been updated by Alan Modra : https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=0ec2cde4f48fbe19c72d0963101888743015041e commit 0ec2cde4f48fbe19c72d0963101888743015041e Author: Alan Modra Date: Fri Jun 23 11:36:13 2023 +0930 lto test fails with -fno-inline in CFLAGS Putting -fno-inline in CFLAGS results in these failures. FAIL: Build liblto-17b.so 1 FAIL: PR ld/12365 FAIL: PR ld/13183 * ld-plugin/lto.exp: Add -finline to compiler flags in some tests. -- You are receiving this mail because: You are on the CC list for the bug.
[Bug ld/13183] BFD linker does not work correctly with thin archives and LTO
https://sourceware.org/bugzilla/show_bug.cgi?id=13183 --- Comment #5 from cvs-commit at gcc dot gnu.org --- The master branch has been updated by Alan Modra : https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=0ec2cde4f48fbe19c72d0963101888743015041e commit 0ec2cde4f48fbe19c72d0963101888743015041e Author: Alan Modra Date: Fri Jun 23 11:36:13 2023 +0930 lto test fails with -fno-inline in CFLAGS Putting -fno-inline in CFLAGS results in these failures. FAIL: Build liblto-17b.so 1 FAIL: PR ld/12365 FAIL: PR ld/13183 * ld-plugin/lto.exp: Add -finline to compiler flags in some tests. -- You are receiving this mail because: You are on the CC list for the bug.
[Bug gas/30582] New: RISC-V assembler: check restrictions on LR/SC sequences
https://sourceware.org/bugzilla/show_bug.cgi?id=30582
Bug ID: 30582
Summary: RISC-V assembler: check restrictions on LR/SC
sequences
Product: binutils
Version: unspecified
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: gas
Assignee: unassigned at sourceware dot org
Reporter: skvadrik at gmail dot com
Target Milestone: ---
Hi! This is a feature request.
The restrictions on LR/SC sequences that guarantee progress ("10.3. Eventual
Success of Store-Conditional Instructions" in the unprivileged RISC-V spec)
state that:
• The loop comprises only an LR/SC sequence and code to retry the sequence in
the case of failure, and must comprise at most 16 instructions placed
sequentially in memory.
• An LR/SC sequence begins with an LR instruction and ends with an SC
instruction. The dynamic code executed between the LR and SC instructions can
only contain instructions from the base ''I'' instruction set, excluding loads,
stores, backward jumps, taken backward branches, JALR, FENCE, and SYSTEM
instructions. If the ''C'' extension is supported, then compressed forms of the
aforementioned ''I'' instructions are also permitted.
• The code to retry a failing LR/SC sequence can contain backwards jumps and/or
branches to repeat the LR/SC sequence, but otherwise has the same constraint as
the code between the LR and SC.
• The LR and SC addresses must lie within a memory region with the LR/SC
eventuality property. The execution environment is responsible for
communicating which regions have this property.
• The SC must be to the same effective address and of the same data size as the
latest LR executed by the same hart.
I wonder if the assembler could help verify some of these.
E.g. the limit is 16 instructions, but this gets difficult to ensure if we use
pseudo-instructions like LI (load immediate) which, depending on the immediate,
may unfold to a different number of instructions. Assembler knows how many
instructions LI unfolds to, so it can probably do the check. Alternatively it
could provide a directive that asserts that a sequence of instructions has a
given length and errors otherwise.
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[Bug gas/30582] RISC-V assembler: check restrictions on LR/SC sequences
https://sourceware.org/bugzilla/show_bug.cgi?id=30582 skvadrik at gmail dot com changed: What|Removed |Added CC||skvadrik at gmail dot com -- You are receiving this mail because: You are on the CC list for the bug.
Issue 57606 in oss-fuzz: binutils:fuzz_as: Direct-leak in xcalloc
Updates: Labels: Deadline-Approaching Comment #2 on issue 57606 by sheriffbot: binutils:fuzz_as: Direct-leak in xcalloc https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=57606#c2 This bug is approaching its deadline for being fixed, and will be automatically derestricted within 7 days. If a fix is planned within 2 weeks after the deadline has passed, a grace extension can be granted. - Your friendly Sheriffbot -- You received this message because: 1. You were specifically CC'd on the issue You may adjust your notification preferences at: https://bugs.chromium.org/hosting/settings Reply to this email to add a comment.
