[Bug ld/22903] [AArch64] Insufficient veneer stub alignment
https://sourceware.org/bugzilla/show_bug.cgi?id=22903
--- Comment #8 from cvs-commit at gcc dot gnu.org ---
The master branch has been updated by Nick Clifton :
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=9a2ebffd4dd9cffac395177e997f6f47408b4782
commit 9a2ebffd4dd9cffac395177e997f6f47408b4782
Author: Jim Wilson
Date: Fri Mar 2 10:47:25 2018 +
Ensure 8-byte alignment for AArch64 stubs.
PR 22903
bfd * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch
and nop instead of 4.
(elfNN_arch64_build_stubs): Add nop after branch. Increase size by
8 instead of 4.
ld * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section):
Give stub_sec 8 byte alignment.
* emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5.
* emulparams/aarch64elf.sh (NOP): Likewise.
* emulparams/aarch64elf32.sh (NOP): Likewise.
* emulparams/aarch64fbsd.sh (NOP): Likewise.
* emulparams/aarch64linux.sh (NOP): Likewise.
* emulparams/aarch64linux32.sh (NOP): Likewise.
* testsuite/ld-aarch64/erratum835769.d: Adjust for added nop.
* testsuite/ld-aarch64/erratum843419.d: Likewise.
* testsuite/ld-aarch64/farcall-b-defsym.d: Likewise.
* testsuite/ld-aarch64/farcall-b-none-function.d: Likewise.
* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
* testsuite/ld-aarch64/farcall-b-section.d: Likewise.
* testsuite/ld-aarch64/farcall-b.d: Likewise.
* testsuite/ld-aarch64/farcall-back.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
* testsuite/ld-aarch64/farcall-bl.d: Likewise.
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[Bug ld/22903] [AArch64] Insufficient veneer stub alignment
https://sourceware.org/bugzilla/show_bug.cgi?id=22903 Nick Clifton changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #9 from Nick Clifton --- Well a working patch is definitely preferable to a broken one. So I have tweaked your patch so that it applies, added the NOP definitions to the AArch64 emulparam files, and checked the result in. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/22911] New: Huge slowdown in objdump -d caused by scanning the dynamic relocs
https://sourceware.org/bugzilla/show_bug.cgi?id=22911 Bug ID: 22911 Summary: Huge slowdown in objdump -d caused by scanning the dynamic relocs Product: binutils Version: unspecified Status: NEW Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: mark at klomp dot org CC: jseward at acm dot org Target Milestone: --- The following commit: commit a24bb4f0cce83eea8b2ad1542316651143af6f90 Author: Nick Clifton Date: Tue Oct 11 13:50:10 2016 +0100 Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. binutils * objdump.c (is_significant_symbol_name): New function. (remove_useless_symbols): Do not remove significanr symbols. (find_symbol_for_address): If an exact match for the specified address has not been found, try scanning the dynamic relocs to see if one of these matches the address. If so, use the symbol associated with the reloc. (objdump_print_addr_with_symbol): Do not print offsets to symbols with no value. (disassemble_section): Only use dynamic relocs if the user requested this. (disassemble_data): Always load dynamic relocs if they are available. Caused a huge slowdown of disassembling some binaries. Specifically reverting: https://sourceware.org/git/?p=binutils-gdb.git;a=blobdiff_plain;f=binutils/objdump.c;h=59abc1189be5643a44405cc71cabb1397ae9f5d8;hp=2d2bddb03ce5fc9093befb61522e05371d783d66;hb=a24bb4f0cce83eea8b2ad1542316651143af6f90;hpb=199fa1b7089d7f7438b087fa30504ea5a590f561 Makes time ./binutils/objdump -d /usr/lib64/firefox/libxul.so > /dev/null go from: real2m48.616s user2m48.242s sys 0m0.160s to: real0m11.781s user0m11.717s sys 0m0.064s -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/22912] New: .irp variable not expanding if followed by a parameter defined earlier
https://sourceware.org/bugzilla/show_bug.cgi?id=22912 Bug ID: 22912 Summary: .irp variable not expanding if followed by a parameter defined earlier Product: binutils Version: unspecified Status: UNCONFIRMED Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: andre.simoesdiasvieira at arm dot com Target Milestone: --- With the following input: .macro mname op0, op1 .irp p0, _and_, _or_ \op0\p0\op1 .endr .endm .syntax unified .text mname banana, pear I would expect the macro to expand to: banana_and_pear banana_or_pear Unfortunately when passing it to arm-none-eabi-as I get: Error: bad instruction `banana\p0pear' Error: bad instruction `banana\p0pear' I have also tried this with \() in between operands, but no luck. FYI, if I change this to: .macro mname op0 .irp op1, pear .irp p0, _and_, _or_ \op0\p0\op1 .endr .endr .endm It still will not work, however, if I move the op1 irp past the p0 irp: .macro mname op0 .irp p0, _and_, _or_ .irp op1, pear \op0\p0\op1 .endr .endr .endm then I get the expected: banana_and_pear banana_or_pear -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gold/22914] New: Gold doesn't support .note.gnu.property section (NT_GNU_PROPERTY_TYPE_0)
https://sourceware.org/bugzilla/show_bug.cgi?id=22914
Bug ID: 22914
Summary: Gold doesn't support .note.gnu.property section
(NT_GNU_PROPERTY_TYPE_0)
Product: binutils
Version: 2.31 (HEAD)
Status: NEW
Severity: enhancement
Priority: P2
Component: gold
Assignee: ccoutant at gmail dot com
Reporter: hjl.tools at gmail dot com
CC: ian at airs dot com
Target Milestone: ---
.note.gnu.property section and NT_GNU_PROPERTY_TYPE_0 are specified in
Linux Extensions to gABI:
https://github.com/hjl-tools/linux-abi/wiki/linux-abi-draft.pdf
[hjl@gnu-cfl-1 gold-2]$ cat x.S
#ifndef NT_GNU_PROPERTY_TYPE_0
# define NT_GNU_PROPERTY_TYPE_0 5
#endif
#ifndef GNU_PROPERTY_STACK_SIZE
# define GNU_PROPERTY_STACK_SIZE 1
#endif
#if __SIZEOF_PTRDIFF_T__ == 8
# define ALIGN 3
#elif __SIZEOF_PTRDIFF_T__ == 4
# define ALIGN 2
#endif
.section ".note.gnu.property", "a"
.p2align ALIGN
.long 1f - 0f /* name length */
.long 5f - 2f /* data length */
.long NT_GNU_PROPERTY_TYPE_0/* note type */
0: .asciz "GNU"/* vendor name */
1:
.p2align ALIGN
2: .long GNU_PROPERTY_STACK_SIZE /* pr_type. */
.long 4f - 3f /* pr_datasz. */
3:
.dc.a 0x800 /* Stack size. */
4:
.p2align ALIGN
5:
[hjl@gnu-cfl-1 gold-2]$ cat y.S
#ifndef NT_GNU_PROPERTY_TYPE_0
# define NT_GNU_PROPERTY_TYPE_0 5
#endif
#ifndef GNU_PROPERTY_NO_COPY_ON_PROTECTED
# define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2
#endif
#if __SIZEOF_PTRDIFF_T__ == 8
# define ALIGN 3
#elif __SIZEOF_PTRDIFF_T__ == 4
# define ALIGN 2
#endif
.section ".note.gnu.property", "a"
.p2align ALIGN
.long 1f - 0f /* name length */
.long 3f - 2f /* data length */
.long NT_GNU_PROPERTY_TYPE_0/* note type */
0: .asciz "GNU"/* vendor name */
1:
.p2align ALIGN
2: .long GNU_PROPERTY_NO_COPY_ON_PROTECTED /* pr_type. */
.long 0 /* pr_datasz. */
3:
.p2align ALIGN
[hjl@gnu-cfl-1 gold-2]$ cat z.S
#ifndef NT_GNU_PROPERTY_TYPE_0
# define NT_GNU_PROPERTY_TYPE_0 5
#endif
#ifndef GNU_PROPERTY_STACK_SIZE
# define GNU_PROPERTY_STACK_SIZE 1
#endif
#ifndef GNU_PROPERTY_NO_COPY_ON_PROTECTED
# define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2
#endif
#if __SIZEOF_PTRDIFF_T__ == 8
# define ALIGN 3
#elif __SIZEOF_PTRDIFF_T__ == 4
# define ALIGN 2
#endif
.section ".note.gnu.property", "a"
.p2align ALIGN
.long 1f - 0f /* name length */
.long 5f - 2f /* data length */
.long NT_GNU_PROPERTY_TYPE_0/* note type */
0: .asciz "GNU"/* vendor name */
1:
.p2align ALIGN
2: .long GNU_PROPERTY_STACK_SIZE /* pr_type. */
.long 4f - 3f /* pr_datasz. */
3:
.dc.a 0x00 /* Stack size. */
4:
.p2align ALIGN
.long GNU_PROPERTY_NO_COPY_ON_PROTECTED /* pr_type. */
.long 0 /* pr_datasz. */
.p2align ALIGN
5:
[hjl@gnu-cfl-1 gold-2]$ cat bar.c
void
_start (void)
{
}
[hjl@gnu-cfl-1 gold-2]$ make
gcc -B./ -c -o x.o x.S
gcc -B./ -c -o y.o y.S
gcc -B./ -c -o z.o z.S
gcc -B./ -c -o bar.o bar.c
./ld -o x x.o y.o z.o bar.o
ld -o y x.o y.o z.o bar.o
readelf -n x y
File: x
Displaying notes found in: .note.gnu.property
Owner Data size Description
GNU 0x0010 NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x800
GNU 0x0008 NT_GNU_PROPERTY_TYPE_0
Properties: no copy on protected
GNU 0x0018 NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x00
no copy on protected
Displaying notes found in: .note.gnu.gold-version
Owner Data size Description
GNU 0x0009 NT_GNU_GOLD_VERSION (gold version)
Version: gold 1.15
File: y
Displaying notes found in: .note.gnu.property
Owner Data size Description
GNU 0x0018 NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x00
no copy on protected
[hjl@gnu-cfl-1 gold-2]$
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[Bug gold/22915] New: Gold doesn't support Intel CET
https://sourceware.org/bugzilla/show_bug.cgi?id=22915 Bug ID: 22915 Summary: Gold doesn't support Intel CET Product: binutils Version: 2.31 (HEAD) Status: NEW Severity: normal Priority: P2 Component: gold Assignee: ccoutant at gmail dot com Reporter: hjl.tools at gmail dot com CC: ian at airs dot com Target Milestone: --- Target: x86 Intel CET psABI extension: https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-cet.pdf adds GNU_PROPERTY_X86_FEATURE_1_IBT and GNU_PROPERTY_X86_FEATURE_1_SHSTK to GNU program property with .note.gnu.property section and NT_GNU_PROPERTY_TYPE_0 are specified in Linux Extensions to gABI: https://github.com/hjl-tools/linux-abi/wiki/linux-abi-draft.pdf GNU_PROPERTY_X86_FEATURE_1_IBT is added to GNU program property to indicate that all executable sections are compatible with IBT when ENDBR instruction starts each valid target where an indirect branch instruction can land. Linker sets GNU_PROPERTY_X86_FEATURE_1_IBT on output only if it is set on all relocatable inputs. The followings changes are made to the Procedure Linkage Table (PLT): 1. For 64-bit x86-64, PLT is changed to PLT0: push GOT[1] bnd jmp*GOT[2] nop ... PLTn: endbr64 push namen_reloc_index bnd jmpPLT0 together with the second PLT section: PLTn: endbr64 bnd jmp *GOT[namen_index] nop BND prefix is also added so that IBT-enabled PLT is compatible with MPX. 2. For 32-bit x86-64 (x32) and i386, PLT is changed to PLT0: push GOT[1] jmp*GOT[2] nop ... PLTn: endbr64 # endbr32 for i386. push namen_reloc_index jmpPLT0 together with the second PLT section: PLTn: endbr64 # endbr32 for i386. jmp *GOT[namen_index] nop BND prefix isn't used since MPX isn't supported on x32 and BND registers aren't used in parameter passing on i386. GNU_PROPERTY_X86_FEATURE_1_SHSTK is added to GNU program property to indicate that all executable sections are compatible with SHSTK where return address popped from shadow stack always matches return address popped from normal stack. Linker sets GNU_PROPERTY_X86_FEATURE_1_SHSTK on output only if it is set on all relocatable inputs. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
