[Bug gas/21118] New: As silently converts registers to immediates
https://sourceware.org/bugzilla/show_bug.cgi?id=21118 Bug ID: 21118 Summary: As silently converts registers to immediates Product: binutils Version: 2.27 Status: UNCONFIRMED Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: nikita at karetnikov dot org Target Milestone: --- Tested on 32-bit PowerPC Debian in QEMU: when compiled with -mregnames, addi r30,r30,r5 becomes addi r30,r30,5 when disassembled. Yes, the instruction expects an immediate as the third argument and add works as expected, but I'd like to get at least a warning. Nothing is printed with -Wall -Werror. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/21118] As silently converts registers to immediates
https://sourceware.org/bugzilla/show_bug.cgi?id=21118 nikita at karetnikov dot org changed: What|Removed |Added Version|2.27|2.25 -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug ld/21076] (cygwin) Output DLL import lookup/address tables are incorrect
https://sourceware.org/bugzilla/show_bug.cgi?id=21076 --- Comment #4 from Alex --- I have determined through further testing that the problem was occurring because some object files were created using "ld -r" to combine other object files together, and at one such point a DLL import library was being linked in that way. This was causing chaos later on in the linking process because the linker has no way (right now) of coalescing the various DLL imports into a single import table: the import library was basically being linked in twice, with different functions being used from it. So this may not be a bug necessarily, just an issue arising from lacking functionality. But I hardly consider this a common, or even uncommon, use case, as this is not how DLL import libraries are intended to be linked whatsoever. It would be cool if it worked, but I imagine that will take a good amount of effort. Technically, however, there probably should be some sort of error when this case occurs, rather than generating an invalid binary. But from the current state of the code, it looks like it would be difficult to detect it (since the code is just shuffling around various .idata symbols for the most part). I'll leave it to you guys to determine whether this should be closed out. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/21123] New: [PowerPC] tlbie instruction restricted to two-operand form and incorrectly limits operand 2
https://sourceware.org/bugzilla/show_bug.cgi?id=21123 Bug ID: 21123 Summary: [PowerPC] tlbie instruction restricted to two-operand form and incorrectly limits operand 2 Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: nholcomb at wisc dot edu Target Milestone: --- When I try to assemble the instruction "tlbie r10, r26, 1, 1, 1", gas produces the errors: Error: operand out of range (26 is not between 0 and 1) Error: junk at end of line: `1,1,1' Looking at the PPC manual v3.0, TLBIE has two forms: tlbie RB,RS,RIC,PRS,R (<-- the form I used) and tlbie RB,RS (equivalent to tlbie RB,RS,0,0,0) I can't find any documentation about a restriction on which register is used for RS in the manual. Ideally, either instruction form would be accepted as well. -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/21124] New: [PowerPC] Source and target registers must be different for some load instructions - should be decoded as invalid
https://sourceware.org/bugzilla/show_bug.cgi?id=21124 Bug ID: 21124 Summary: [PowerPC] Source and target registers must be different for some load instructions - should be decoded as invalid Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: binutils Assignee: unassigned at sourceware dot org Reporter: nholcomb at wisc dot edu Target Milestone: --- The source and target registers must be different for some load instructions. For example, 7c 00 02 28 is an invalid instruction, but decoding the instruction with libopcodes returns "lqarx r0, 0, r0". -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/21125] New: [PowerPC] dcbt and dcbtst instructions not accepted in 3-operand form
https://sourceware.org/bugzilla/show_bug.cgi?id=21125 Bug ID: 21125 Summary: [PowerPC] dcbt and dcbtst instructions not accepted in 3-operand form Product: binutils Version: 2.26 Status: UNCONFIRMED Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: nholcomb at wisc dot edu Target Milestone: --- Both DCBT and DCBTST instructions have three operand forms as follows: dcbt RA,RB,TH dcbtst RA,RB,TH However, assembling "dcbt r9, r2, 10" resulted in the error: "Error: junk at end of line: 10" Note that there is a two operand form described in the manual: "If the dcbt mnemonic is used with only two oper- ands, the TH operand is assumed to be 0b0." -- You are receiving this mail because: You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
